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016fedbd20
Instead of doing that on the IntelDisplayPlane class, let's have this in derived classes so these classes can decide how to use the settings that were provided before calling the enable method.
77 lines
2.5 KiB
C++
77 lines
2.5 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/RefPtr.h>
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#include <AK/Try.h>
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#include <AK/Types.h>
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#include <Kernel/Graphics/DisplayConnector.h>
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#include <Kernel/Graphics/Intel/Definitions.h>
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#include <Kernel/Locking/Spinlock.h>
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#include <Kernel/Memory/TypedMapping.h>
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namespace Kernel {
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class IntelDisplayConnectorGroup;
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class IntelDisplayPlane {
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public:
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enum class PipeSelect {
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PipeA,
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PipeB,
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PipeC,
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PipeD,
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};
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// Note: This is used to "cache" all the registers we wrote to, because
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// we might not be able to read them directly from hardware later.
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struct ShadowRegisters {
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u32 control;
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u32 linear_offset;
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u32 stride;
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u32 surface_base;
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};
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public:
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static ErrorOr<NonnullOwnPtr<IntelDisplayPlane>> create_with_physical_address(PhysicalAddress plane_registers_start_address);
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ErrorOr<void> set_horizontal_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t horizontal_active_pixels_count);
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ErrorOr<void> set_vertical_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t vertical_active_pixels_count);
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ErrorOr<void> set_horizontal_stride(Badge<IntelDisplayConnectorGroup>, size_t horizontal_stride);
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ErrorOr<void> set_aperture_base(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start);
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ErrorOr<void> set_pipe(Badge<IntelDisplayConnectorGroup>, PipeSelect);
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virtual ErrorOr<void> enable(Badge<IntelDisplayConnectorGroup>) = 0;
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bool is_enabled(Badge<IntelDisplayConnectorGroup>);
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ErrorOr<void> disable(Badge<IntelDisplayConnectorGroup>);
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ShadowRegisters shadow_registers() const;
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virtual ~IntelDisplayPlane() = default;
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protected:
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struct [[gnu::packed]] PlaneRegisters {
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u32 control;
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u32 linear_offset;
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u32 stride;
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u8 padding[24]; // Note: This might contain other registers, don't touch them.
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u32 surface_base;
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};
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explicit IntelDisplayPlane(Memory::TypedMapping<PlaneRegisters volatile> registers_mapping);
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mutable Spinlock<LockRank::None> m_access_lock;
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ShadowRegisters m_shadow_registers {};
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Memory::TypedMapping<PlaneRegisters volatile> m_plane_registers;
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// Note: The PipeSelect value is used only in planes until Skylake graphics.
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PipeSelect m_pipe_select { PipeSelect::PipeA };
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PhysicalAddress m_aperture_start;
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size_t m_horizontal_stride { 0 };
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size_t m_horizontal_active_pixels_count { 0 };
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size_t m_vertical_active_pixels_count { 0 };
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};
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}
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