mirrors/rpcs3
1
0
Fork 0
mirror of https://github.com/RPCS3/rpcs3.git synced 2025-04-22 04:25:19 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Minor changes (#2352)

Browse source 
* More initial values for rsx method registers

* Implemented spu decrementer event

* Remove u32 cast
This commit is contained in:
Oil 2017-02-07 23:59:59 +03:00 • committed by Ivan
parent 47b4c649f1
commit 1669d0fdbd
4 changed files with 28 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
rpcs3/Emu/Cell/SPUThread.cpp
View file

@ -511,6 +511,12 @@ u32 SPUThread::get_events(bool waiting)
last_raddr = 0;
}
// SPU Decrementer Event
if ((ch_dec_value - (get_timebased_time() - ch_dec_start_timestamp)) >> 31)
{
ch_event_stat |= SPU_EVENT_TM;
}
// initialize waiting
if (waiting)
{

2
rpcs3/Emu/Cell/SPUThread.h
View file

@ -63,7 +63,7 @@ enum : u32
SPU_EVENT_SN = 0x2, // MFC List Command stall-and-notify event
SPU_EVENT_TG = 0x1, // MFC Tag Group status update event
SPU_EVENT_IMPLEMENTED = SPU_EVENT_LR, // Mask of implemented events
SPU_EVENT_IMPLEMENTED = SPU_EVENT_LR | SPU_EVENT_TM, // Mask of implemented events
SPU_EVENT_WAITING = 0x80000000, // Originally unused, set when SPU thread starts waiting on ch_event_stat
//SPU_EVENT_AVAILABLE = 0x40000000, // Originally unused, channel count of the SPU_RdEventStat channel

6
rpcs3/Emu/RSX/gcm_enums.h
View file

@ -690,6 +690,12 @@ enum
CELL_GCM_CONTEXT_DMA_TO_MEMORY_GET_REPORT = 0x66626660,
CELL_GCM_CONTEXT_DMA_REPORT_LOCATION_MAIN = 0xBAD68000,
CELL_GCM_CONTEXT_DMA_NOTIFY_MAIN_0 = 0x6660420F,
CELL_GCM_CONTEXT_DMA_TO_MEMORY_GET_NOTIFY0 = 0x66604200,
CELL_GCM_CONTEXT_DMA_SEMAPHORE_RW = 0x66606660,
CELL_GCM_CONTEXT_DMA_SEMAPHORE_R = 0x66616661,
CELL_GCM_CONTEXT_DMA_DEVICE_RW = 0x56616660,
CELL_GCM_CONTEXT_DMA_DEVICE_R = 0x56616661
};
enum

17
rpcs3/Emu/RSX/rsx_methods.cpp
View file

@ -859,8 +859,6 @@ namespace rsx
registers[NV4097_SET_CULL_FACE] = CELL_GCM_BACK;
registers[NV4097_SET_FRONT_FACE] = CELL_GCM_CCW;
registers[NV4097_SET_RESTART_INDEX] = -1;
registers[NV4097_SET_CONTEXT_DMA_REPORT] = CELL_GCM_CONTEXT_DMA_TO_MEMORY_GET_REPORT;
registers[NV4097_SET_CLEAR_RECT_HORIZONTAL] = (4096 << 16) | 0;
registers[NV4097_SET_CLEAR_RECT_VERTICAL] = (4096 << 16) | 0;
@ -870,6 +868,21 @@ namespace rsx
// CELL_GCM_SURFACE_A8R8G8B8, CELL_GCM_SURFACE_Z24S8 and CELL_GCM_SURFACE_CENTER_1
registers[NV4097_SET_SURFACE_FORMAT] = (8 << 0) | (2 << 5) | (0 << 12) | (1 << 16) | (1 << 24);
// rsx dma initial values
registers[NV4097_SET_CONTEXT_DMA_REPORT] = CELL_GCM_CONTEXT_DMA_TO_MEMORY_GET_REPORT;
registers[NV406E_SET_CONTEXT_DMA_SEMAPHORE] = CELL_GCM_CONTEXT_DMA_SEMAPHORE_RW;
registers[NV3062_SET_CONTEXT_DMA_IMAGE_DESTIN] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV309E_SET_CONTEXT_DMA_IMAGE] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV0039_SET_CONTEXT_DMA_BUFFER_IN] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV0039_SET_CONTEXT_DMA_BUFFER_OUT] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV4097_SET_CONTEXT_DMA_COLOR_A] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV4097_SET_CONTEXT_DMA_COLOR_B] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV4097_SET_CONTEXT_DMA_COLOR_C] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV4097_SET_CONTEXT_DMA_COLOR_D] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV4097_SET_CONTEXT_DMA_ZETA] = CELL_GCM_CONTEXT_DMA_MEMORY_FRAME_BUFFER;
registers[NV3089_SET_CONTEXT_SURFACE] = 0x313371C3; // CELL_GCM_CONTEXT_SURFACE2D
for (auto& tex : fragment_textures) tex.init();
for (auto& tex : vertex_textures) tex.init();
for (auto& vtx : vertex_arrays_info) vtx.reset();