From 3354f068fcde2b19f2e15592ef1ae958ad68ec90 Mon Sep 17 00:00:00 2001 From: Nekotekina Date: Tue, 2 Apr 2019 13:12:05 +0300 Subject: [PATCH] PPU/SPU transactions: ease cache line interference (TSX path) Touch memory on the same memory page, but different cache lines. --- rpcs3/Emu/Cell/PPUThread.cpp | 8 ++++++++ rpcs3/Emu/Cell/SPUThread.cpp | 12 ++++++++++++ 2 files changed, 20 insertions(+) diff --git a/rpcs3/Emu/Cell/PPUThread.cpp b/rpcs3/Emu/Cell/PPUThread.cpp index fa8319d5b1..bc23813dbc 100644 --- a/rpcs3/Emu/Cell/PPUThread.cpp +++ b/rpcs3/Emu/Cell/PPUThread.cpp @@ -1054,8 +1054,12 @@ const auto ppu_stwcx_tx = build_function_asm([]( // Touch memory after transaction failure c.bind(fall); c.pause(); + c.xor_(x86::r11, 0xf80); + c.xor_(x86::r10, 0xf80); c.mov(x86::rax, x86::qword_ptr(x86::r11)); c.mov(x86::rax, x86::qword_ptr(x86::r10)); + c.xor_(x86::r11, 0xf80); + c.xor_(x86::r10, 0xf80); c.sub(args[0], 1); c.jnz(begin); c.mov(x86::eax, 1); @@ -343,8 +351,12 @@ const auto spu_putlluc_tx = build_function_asm