From 38745e5782a8e6250e2511373a48af73d50d081c Mon Sep 17 00:00:00 2001 From: Nekotekina Date: Tue, 8 Dec 2020 09:25:41 +0300 Subject: [PATCH] SPU ASMJIT: fixup mfence replacement --- rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp index 973170e1a4..f2f81bd79f 100644 --- a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp +++ b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp @@ -1310,7 +1310,7 @@ void spu_recompiler::LNOP(spu_opcode_t op) void spu_recompiler::SYNC(spu_opcode_t op) { // This instruction must be used following a store instruction that modifies the instruction stream. - c->lock().or_(asmjit::x86::dword_ptr(asmjit::x86::esp), 0); + c->lock().or_(asmjit::x86::dword_ptr(asmjit::x86::rsp), 0); if (g_cfg.core.spu_block_size == spu_block_size_type::safe) { @@ -1325,7 +1325,7 @@ void spu_recompiler::SYNC(spu_opcode_t op) void spu_recompiler::DSYNC(spu_opcode_t op) { // This instruction forces all earlier load, store, and channel instructions to complete before proceeding. - c->lock().or_(asmjit::x86::dword_ptr(asmjit::x86::esp), 0); + c->lock().or_(asmjit::x86::dword_ptr(asmjit::x86::rsp), 0); } void spu_recompiler::MFSPR(spu_opcode_t op)