mirror of
https://github.com/RPCS3/rpcs3.git
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vm::atomic update (or, and, xor)
CellSyncMutex, CellSyncBarrier, CellSyncRwm refactoring
This commit is contained in:
parent
169c8c47c0
commit
3ab08e0d7a
5 changed files with 200 additions and 200 deletions
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@ -46,18 +46,21 @@ void strcpy_trunc(char(&dst)[size], const char(&src)[rsize])
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#define _CRT_ALIGN(x) __attribute__((aligned(x)))
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#define InterlockedCompareExchange(ptr,new_val,old_val) __sync_val_compare_and_swap(ptr,old_val,new_val)
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#define InterlockedExchange(ptr, value) __sync_lock_test_and_set(ptr, value)
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#define InterlockedOr(ptr, value) __sync_fetch_and_or(ptr, value)
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#define InterlockedAnd(ptr, value) __sync_fetch_and_and(ptr, value)
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#define InterlockedXor(ptr, value) __sync_fetch_and_xor(ptr, value)
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inline int64_t InterlockedOr64(volatile int64_t *dest, int64_t val)
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{
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int64_t olderval;
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int64_t oldval = *dest;
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do
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{
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olderval = oldval;
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oldval = __sync_val_compare_and_swap(dest, olderval | val, olderval);
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} while (olderval != oldval);
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return oldval;
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}
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//inline int64_t InterlockedOr64(volatile int64_t *dest, int64_t val)
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//{
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// int64_t olderval;
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// int64_t oldval = *dest;
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// do
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// {
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// olderval = oldval;
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// oldval = __sync_val_compare_and_swap(dest, olderval | val, olderval);
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// } while (olderval != oldval);
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// return oldval;
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//}
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inline uint64_t __umulh(uint64_t a, uint64_t b)
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{
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@ -112,3 +115,36 @@ static __forceinline uint64_t InterlockedExchange(volatile uint64_t* dest, uint6
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return _InterlockedExchange64((volatile long long*)dest, value);
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}
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#endif
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#ifndef InterlockedOr
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static __forceinline uint32_t InterlockedOr(volatile uint32_t* dest, uint32_t value)
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{
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return _InterlockedOr((volatile long*)dest, value);
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}
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static __forceinline uint64_t InterlockedOr(volatile uint64_t* dest, uint64_t value)
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{
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return _InterlockedOr64((volatile long long*)dest, value);
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}
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#endif
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#ifndef InterlockedAnd
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static __forceinline uint32_t InterlockedAnd(volatile uint32_t* dest, uint32_t value)
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{
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return _InterlockedAnd((volatile long*)dest, value);
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}
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static __forceinline uint64_t InterlockedAnd(volatile uint64_t* dest, uint64_t value)
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{
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return _InterlockedAnd64((volatile long long*)dest, value);
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}
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#endif
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#ifndef InterlockedXor
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static __forceinline uint32_t InterlockedXor(volatile uint32_t* dest, uint32_t value)
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{
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return _InterlockedXor((volatile long*)dest, value);
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}
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static __forceinline uint64_t InterlockedXor(volatile uint64_t* dest, uint64_t value)
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{
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return _InterlockedXor64((volatile long long*)dest, value);
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}
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#endif
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@ -358,7 +358,7 @@ public:
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}
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else
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{
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InterlockedOr64((volatile s64*)m_indval, ((u64)value << 32) | 1);
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InterlockedOr((volatile u64*)m_indval, ((u64)value << 32) | 1);
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}
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}
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@ -93,6 +93,42 @@ namespace vm
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}
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}
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__forceinline const T _or(const T right) volatile
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{
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const atomic_type res = InterlockedOr((volatile atomic_type*)&data, (atomic_type&)right);
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return (T&)res;
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}
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__forceinline const T _and(const T right) volatile
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{
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const atomic_type res = InterlockedAnd((volatile atomic_type*)&data, (atomic_type&)right);
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return (T&)res;
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}
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__forceinline const T _xor(const T right) volatile
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{
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const atomic_type res = InterlockedXor((volatile atomic_type*)&data, (atomic_type&)right);
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return (T&)res;
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}
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__forceinline const T operator |= (const T right) volatile
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{
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const atomic_type res = InterlockedOr((volatile atomic_type*)&data, (atomic_type&)right) | (atomic_type&)right;
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return (T&)res;
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}
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__forceinline const T operator &= (const T right) volatile
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{
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const atomic_type res = InterlockedAnd((volatile atomic_type*)&data, (atomic_type&)right) & (atomic_type&)right;
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return (T&)res;
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}
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__forceinline const T operator ^= (const T right) volatile
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{
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const atomic_type res = InterlockedXor((volatile atomic_type*)&data, (atomic_type&)right) ^ (atomic_type&)right;
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return (T&)res;
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}
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};
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template<typename T> struct atomic_le : public _atomic_base<T>
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@ -54,9 +54,9 @@ s32 cellSyncMutexLock(vm::ptr<CellSyncMutex> mutex)
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// prx: increase m_acq and remember its old value
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be_t<u16> order;
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mutex->data.atomic_op([&order](CellSyncMutex::data_t& _mutex)
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mutex->data.atomic_op([&order](CellSyncMutex::data_t& mutex)
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{
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order = _mutex.m_acq++;
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order = mutex.m_acq++;
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});
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// prx: wait until this old value is equal to m_rel
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@ -89,9 +89,9 @@ s32 cellSyncMutexTryLock(vm::ptr<CellSyncMutex> mutex)
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}
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// prx: exit if m_acq and m_rel are not equal, increase m_acq
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return mutex->data.atomic_op<s32>(CELL_OK, [](CellSyncMutex::data_t& _mutex) -> s32
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return mutex->data.atomic_op(CELL_OK, [](CellSyncMutex::data_t& mutex) -> s32
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{
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if (_mutex.m_acq++ != _mutex.m_rel)
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if (mutex.m_acq++ != mutex.m_rel)
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{
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return CELL_SYNC_ERROR_BUSY;
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}
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@ -113,9 +113,9 @@ s32 cellSyncMutexUnlock(vm::ptr<CellSyncMutex> mutex)
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}
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mutex->data.read_sync();
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mutex->data.atomic_op([](CellSyncMutex::data_t& _mutex)
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mutex->data.atomic_op([](CellSyncMutex::data_t& mutex)
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{
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_mutex.m_rel++;
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mutex.m_rel++;
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});
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return CELL_OK;
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}
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@ -147,6 +147,24 @@ s32 cellSyncBarrierInitialize(vm::ptr<CellSyncBarrier> barrier, u16 total_count)
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return syncBarrierInitialize(barrier, total_count);
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}
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s32 syncBarrierTryNotifyOp(CellSyncBarrier::data_t& barrier)
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{
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// prx: extract m_value (repeat if < 0), increase, compare with second s16, set sign bit if equal, insert it back
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s16 value = (s16)barrier.m_value;
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if (value < 0)
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{
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return CELL_SYNC_ERROR_BUSY;
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}
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value++;
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if (value == (s16)barrier.m_count)
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{
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value |= 0x8000;
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}
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barrier.m_value = value;
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return CELL_OK;
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};
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s32 cellSyncBarrierNotify(vm::ptr<CellSyncBarrier> barrier)
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{
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cellSync->Log("cellSyncBarrierNotify(barrier_addr=0x%x)", barrier.addr());
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@ -160,35 +178,16 @@ s32 cellSyncBarrierNotify(vm::ptr<CellSyncBarrier> barrier)
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return CELL_SYNC_ERROR_ALIGN;
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}
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// prx: sync, extract m_value, repeat if < 0, increase, compare with second s16, set sign bit if equal, insert it back
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barrier->data.read_sync();
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while (true)
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while (barrier->data.atomic_op(CELL_OK, syncBarrierTryNotifyOp))
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{
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const auto old = barrier->data.read_relaxed();
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auto _barrier = old;
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s16 value = (s16)_barrier.m_value;
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if (value < 0)
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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cellSync->Warning("cellSyncBarrierNotify(barrier_addr=0x%x) aborted", barrier.addr());
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return CELL_OK;
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}
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continue;
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cellSync->Warning("cellSyncBarrierNotify(barrier_addr=0x%x) aborted", barrier.addr());
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return CELL_OK;
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}
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value++;
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if (value == (s16)_barrier.m_count)
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{
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value |= 0x8000;
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}
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_barrier.m_value = value;
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if (barrier->data.compare_and_swap_test(old, _barrier)) break;
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}
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return CELL_OK;
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}
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@ -206,29 +205,24 @@ s32 cellSyncBarrierTryNotify(vm::ptr<CellSyncBarrier> barrier)
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}
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barrier->data.read_sync();
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return barrier->data.atomic_op(CELL_OK, syncBarrierTryNotifyOp);
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}
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while (true)
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s32 syncBarrierTryWaitOp(CellSyncBarrier::data_t& barrier)
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{
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// prx: extract m_value (repeat if >= 0), decrease it, set 0 if == 0x8000, insert it back
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s16 value = (s16)barrier.m_value;
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if (value >= 0)
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{
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const auto old = barrier->data.read_relaxed();
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auto _barrier = old;
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s16 value = (s16)_barrier.m_value;
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if (value >= 0)
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{
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value++;
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if (value == (s16)_barrier.m_count)
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{
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value |= 0x8000;
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}
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_barrier.m_value = value;
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if (barrier->data.compare_and_swap_test(old, _barrier)) break;
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}
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else
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{
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if (barrier->data.compare_and_swap_test(old, _barrier)) return CELL_SYNC_ERROR_BUSY;
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}
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return CELL_SYNC_ERROR_BUSY;
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}
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value--;
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if (value == (s16)0x8000)
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{
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value = 0;
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}
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barrier.m_value = value;
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return CELL_OK;
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}
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return CELL_SYNC_ERROR_ALIGN;
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}
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// prx: sync, extract m_value (repeat if >= 0), decrease it, set 0 if == 0x8000, insert it back
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barrier->data.read_sync();
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while (true)
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while (barrier->data.atomic_op(CELL_OK, syncBarrierTryWaitOp))
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{
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const auto old = barrier->data.read_relaxed();
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auto _barrier = old;
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s16 value = (s16)_barrier.m_value;
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if (value >= 0)
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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cellSync->Warning("cellSyncBarrierWait(barrier_addr=0x%x) aborted", barrier.addr());
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return CELL_OK;
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}
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continue;
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cellSync->Warning("cellSyncBarrierWait(barrier_addr=0x%x) aborted", barrier.addr());
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return CELL_OK;
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}
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value--;
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if (value == (s16)0x8000)
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{
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value = 0;
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}
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_barrier.m_value = value;
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if (barrier->data.compare_and_swap_test(old, _barrier)) break;
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}
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return CELL_OK;
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}
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@ -291,28 +266,7 @@ s32 cellSyncBarrierTryWait(vm::ptr<CellSyncBarrier> barrier)
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}
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barrier->data.read_sync();
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while (true)
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{
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const auto old = barrier->data.read_relaxed();
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auto _barrier = old;
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s16 value = (s16)_barrier.m_value;
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if (value >= 0)
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{
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return CELL_SYNC_ERROR_BUSY;
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}
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value--;
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if (value == (s16)0x8000)
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{
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value = 0;
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}
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_barrier.m_value = value;
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if (barrier->data.compare_and_swap_test(old, _barrier)) break;
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}
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return CELL_OK;
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return barrier->data.atomic_op(CELL_OK, syncBarrierTryWaitOp);
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}
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s32 syncRwmInitialize(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer, u32 buffer_size)
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@ -331,10 +285,9 @@ s32 syncRwmInitialize(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer, u32 buffer
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}
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// prx: zeroize first u16 and second u16, write buffer_size in second u32, write buffer_addr in second u64 and sync
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rwm->m_data() = 0;
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rwm->m_size = buffer_size;
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rwm->m_buffer = buffer;
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InterlockedCompareExchange(&rwm->m_data(), 0, 0);
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rwm->data.exchange({});
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return CELL_OK;
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}
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@ -345,6 +298,27 @@ s32 cellSyncRwmInitialize(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer, u32 bu
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return syncRwmInitialize(rwm, buffer, buffer_size);
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}
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s32 syncRwmTryReadBeginOp(CellSyncRwm::data_t& rwm)
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{
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if (rwm.m_writers.ToBE())
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{
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return CELL_SYNC_ERROR_BUSY;
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}
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rwm.m_readers++;
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return CELL_OK;
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}
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s32 syncRwmReadEndOp(CellSyncRwm::data_t& rwm)
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{
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if (!rwm.m_readers.ToBE())
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{
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cellSync->Error("syncRwmReadEndOp(rwm_addr=0x%x): m_readers == 0 (m_writers=%d)", Memory.RealToVirtualAddr(&rwm), (u16)rwm.m_writers);
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return CELL_SYNC_ERROR_ABORT;
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}
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rwm.m_readers--;
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return CELL_OK;
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}
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s32 cellSyncRwmRead(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer)
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{
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cellSync->Log("cellSyncRwmRead(rwm_addr=0x%x, buffer_addr=0x%x)", rwm.addr(), buffer.addr());
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@ -358,48 +332,22 @@ s32 cellSyncRwmRead(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer)
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return CELL_SYNC_ERROR_ALIGN;
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}
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// prx: atomically load first u32, repeat until second u16 == 0, increase first u16 and sync
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while (true)
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// prx: increase m_readers, wait until m_writers is zero
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while (rwm->data.atomic_op(CELL_OK, syncRwmTryReadBeginOp))
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{
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const u32 old_data = rwm->m_data();
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CellSyncRwm new_rwm;
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new_rwm.m_data() = old_data;
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if (new_rwm.m_writers.ToBE())
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
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if (Emu.IsStopped())
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{
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cellSync->Warning("cellSyncRwmRead(rwm_addr=0x%x) aborted", rwm.addr());
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return CELL_OK;
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}
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continue;
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cellSync->Warning("cellSyncRwmRead(rwm_addr=0x%x) aborted", rwm.addr());
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return CELL_OK;
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}
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new_rwm.m_readers++;
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if (InterlockedCompareExchange(&rwm->m_data(), new_rwm.m_data(), old_data) == old_data) break;
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}
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// copy data to buffer_addr
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memcpy(buffer.get_ptr(), rwm->m_buffer.get_ptr(), (u32)rwm->m_size);
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// prx: load first u32, return 0x8041010C if first u16 == 0, atomically decrease it
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while (true)
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{
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const u32 old_data = rwm->m_data();
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CellSyncRwm new_rwm;
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new_rwm.m_data() = old_data;
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if (!new_rwm.m_readers.ToBE())
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{
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cellSync->Error("cellSyncRwmRead(rwm_addr=0x%x): m_readers == 0 (m_writers=%d)", rwm.addr(), (u16)new_rwm.m_writers);
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return CELL_SYNC_ERROR_ABORT;
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}
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new_rwm.m_readers--;
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if (InterlockedCompareExchange(&rwm->m_data(), new_rwm.m_data(), old_data) == old_data) break;
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}
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return CELL_OK;
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// prx: decrease m_readers (return 0x8041010C if already zero)
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return rwm->data.atomic_op(CELL_OK, syncRwmReadEndOp);
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}
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s32 cellSyncRwmTryRead(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer)
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@ -415,38 +363,22 @@ s32 cellSyncRwmTryRead(vm::ptr<CellSyncRwm> rwm, vm::ptr<void> buffer)
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return CELL_SYNC_ERROR_ALIGN;
|
||||
}
|
||||
|
||||
while (true)
|
||||
if (s32 res = rwm->data.atomic_op(CELL_OK, syncRwmTryReadBeginOp))
|
||||
{
|
||||
const u32 old_data = rwm->m_data();
|
||||
CellSyncRwm new_rwm;
|
||||
new_rwm.m_data() = old_data;
|
||||
|
||||
if (new_rwm.m_writers.ToBE())
|
||||
{
|
||||
return CELL_SYNC_ERROR_BUSY;
|
||||
}
|
||||
|
||||
new_rwm.m_readers++;
|
||||
if (InterlockedCompareExchange(&rwm->m_data(), new_rwm.m_data(), old_data) == old_data) break;
|
||||
return res;
|
||||
}
|
||||
|
||||
memcpy(buffer.get_ptr(), rwm->m_buffer.get_ptr(), (u32)rwm->m_size);
|
||||
|
||||
while (true)
|
||||
return rwm->data.atomic_op(CELL_OK, syncRwmReadEndOp);
|
||||
}
|
||||
|
||||
s32 syncRwmTryWriteBeginOp(CellSyncRwm::data_t& rwm)
|
||||
{
|
||||
if (rwm.m_writers.ToBE())
|
||||
{
|
||||
const u32 old_data = rwm->m_data();
|
||||
CellSyncRwm new_rwm;
|
||||
new_rwm.m_data() = old_data;
|
||||
|
||||
if (!new_rwm.m_readers.ToBE())
|
||||
{
|
||||
cellSync->Error("cellSyncRwmRead(rwm_addr=0x%x): m_readers == 0 (m_writers=%d)", rwm.addr(), (u16)new_rwm.m_writers);
|
||||
return CELL_SYNC_ERROR_ABORT;
|
||||
}
|
||||
|
||||
new_rwm.m_readers--;
|
||||
if (InterlockedCompareExchange(&rwm->m_data(), new_rwm.m_data(), old_data) == old_data) break;
|
||||
return CELL_SYNC_ERROR_BUSY;
|
||||
}
|
||||
rwm.m_writers = 1;
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
|
@ -463,30 +395,18 @@ s32 cellSyncRwmWrite(vm::ptr<CellSyncRwm> rwm, vm::ptr<const void> buffer)
|
|||
return CELL_SYNC_ERROR_ALIGN;
|
||||
}
|
||||
|
||||
// prx: atomically compare second u16 (m_writers) with 0, repeat if not 0, set 1, sync
|
||||
while (true)
|
||||
while (rwm->data.atomic_op(CELL_OK, syncRwmTryWriteBeginOp))
|
||||
{
|
||||
const u32 old_data = rwm->m_data();
|
||||
CellSyncRwm new_rwm;
|
||||
new_rwm.m_data() = old_data;
|
||||
|
||||
if (new_rwm.m_writers.ToBE())
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
|
||||
if (Emu.IsStopped())
|
||||
{
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
|
||||
if (Emu.IsStopped())
|
||||
{
|
||||
cellSync->Warning("cellSyncRwmWrite(rwm_addr=0x%x) aborted (I)", rwm.addr());
|
||||
return CELL_OK;
|
||||
}
|
||||
continue;
|
||||
cellSync->Warning("cellSyncRwmWrite(rwm_addr=0x%x) aborted (I)", rwm.addr());
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
new_rwm.m_writers = 1;
|
||||
if (InterlockedCompareExchange(&rwm->m_data(), new_rwm.m_data(), old_data) == old_data) break;
|
||||
}
|
||||
|
||||
// prx: wait until m_readers == 0
|
||||
while (rwm->m_readers.ToBE())
|
||||
while (rwm->data.read_relaxed().m_readers.ToBE())
|
||||
{
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1)); // hack
|
||||
if (Emu.IsStopped())
|
||||
|
@ -500,8 +420,7 @@ s32 cellSyncRwmWrite(vm::ptr<CellSyncRwm> rwm, vm::ptr<const void> buffer)
|
|||
memcpy(rwm->m_buffer.get_ptr(), buffer.get_ptr(), (u32)rwm->m_size);
|
||||
|
||||
// prx: sync and zeroize m_readers and m_writers
|
||||
InterlockedCompareExchange(&rwm->m_data(), 0, 0);
|
||||
rwm->m_data() = 0;
|
||||
rwm->data.exchange({});
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
|
@ -518,15 +437,17 @@ s32 cellSyncRwmTryWrite(vm::ptr<CellSyncRwm> rwm, vm::ptr<const void> buffer)
|
|||
return CELL_SYNC_ERROR_ALIGN;
|
||||
}
|
||||
|
||||
// prx: compare m_readers | m_writers with 0, return busy if not zero, set m_writers to 1
|
||||
if (InterlockedCompareExchange(&rwm->m_data(), se32(1), 0) != 0) return CELL_SYNC_ERROR_BUSY;
|
||||
// prx: compare m_readers | m_writers with 0, return if not zero, set m_writers to 1
|
||||
if (!rwm->data.compare_and_swap_test({}, {be_t<u16>::make(0), be_t<u16>::make(1)}))
|
||||
{
|
||||
return CELL_SYNC_ERROR_BUSY;
|
||||
}
|
||||
|
||||
// prx: copy data from buffer_addr
|
||||
memcpy(rwm->m_buffer.get_ptr(), buffer.get_ptr(), (u32)rwm->m_size);
|
||||
|
||||
// prx: sync and zeroize m_readers and m_writers
|
||||
InterlockedCompareExchange(&rwm->m_data(), 0, 0);
|
||||
rwm->m_data() = 0;
|
||||
rwm->data.exchange({});
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -57,23 +57,30 @@ static_assert(sizeof(CellSyncBarrier) == 4, "CellSyncBarrier: wrong size");
|
|||
|
||||
struct CellSyncRwm
|
||||
{
|
||||
be_t<u16> m_readers;
|
||||
be_t<u16> m_writers;
|
||||
struct data_t
|
||||
{
|
||||
be_t<u16> m_readers;
|
||||
be_t<u16> m_writers;
|
||||
};
|
||||
|
||||
vm::atomic<data_t> data;
|
||||
be_t<u32> m_size;
|
||||
vm::bptr<void, 1, u64> m_buffer;
|
||||
|
||||
volatile u32& m_data()
|
||||
{
|
||||
return *reinterpret_cast<u32*>(this);
|
||||
};
|
||||
};
|
||||
|
||||
static_assert(sizeof(CellSyncRwm) == 16, "CellSyncRwm: wrong size");
|
||||
|
||||
struct CellSyncQueue
|
||||
{
|
||||
struct data_t
|
||||
{
|
||||
be_t<u32> m_v1;
|
||||
be_t<u32> m_v2;
|
||||
};
|
||||
|
||||
be_t<u32> m_v1;
|
||||
be_t<u32> m_v2;
|
||||
//vm::atomic<data_t> data;
|
||||
be_t<u32> m_size;
|
||||
be_t<u32> m_depth;
|
||||
vm::bptr<u8, 1, u64> m_buffer;
|
||||
|
|
Loading…
Add table
Reference in a new issue