From 3baf79f92908530ac57b4e31d4ed3ca5c9724a21 Mon Sep 17 00:00:00 2001 From: Nekotekina Date: Sat, 4 Mar 2017 17:34:59 +0300 Subject: [PATCH] ror64 added --- Utilities/types.h | 20 +++++++++++++++----- rpcs3/Emu/Cell/PPUInterpreter.cpp | 2 +- rpcs3/Emu/Cell/PPUOpcodes.h | 3 +-- rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp | 4 ++-- rpcs3/Emu/Cell/SPUInterpreter.cpp | 4 ++-- 5 files changed, 21 insertions(+), 12 deletions(-) diff --git a/Utilities/types.h b/Utilities/types.h index 7a005a918d..52ef707a13 100644 --- a/Utilities/types.h +++ b/Utilities/types.h @@ -905,8 +905,9 @@ inline void busy_wait(std::size_t count = 100) while (count--) _mm_pause(); } -// Left rotate helpers +// Rotate helpers #if defined(__GNUG__) + inline u8 rol8(const u8 x, const u8 n) { u8 result = x; @@ -934,9 +935,18 @@ inline u64 rol64(const u64 x, const u64 n) __asm__("rolq %b[n], %[result]" : [result] "+g" (result) : [n] "c" (n)); return result; } + +inline u64 ror64(const u64 x, const u64 n) +{ + u64 result = x; + __asm__("rorq %b[n], %[result]" : [result] "+g" (result) : [n] "c" (n)); + return result; +} + #elif defined(_MSC_VER) inline u8 rol8(const u8 x, const u8 n) { return _rotl8(x, n); } -inline u16 rol16(const u16 x, const u16 n) { return _rotl16(x, n); } -inline u32 rol32(const u32 x, const u32 n) { return _rotl(x, n); } -inline u64 rol64(const u64 x, const u64 n) { return _rotl64(x, n); } -#endif \ No newline at end of file +inline u16 rol16(const u16 x, const u16 n) { return _rotl16(x, (u8)n); } +inline u32 rol32(const u32 x, const u32 n) { return _rotl(x, (int)n); } +inline u64 rol64(const u64 x, const u64 n) { return _rotl64(x, (int)n); } +inline u64 ror64(const u64 x, const u64 n) { return _rotr64(x, (int)n); } +#endif diff --git a/rpcs3/Emu/Cell/PPUInterpreter.cpp b/rpcs3/Emu/Cell/PPUInterpreter.cpp index 7de9da31e2..9cc29d7a1c 100644 --- a/rpcs3/Emu/Cell/PPUInterpreter.cpp +++ b/rpcs3/Emu/Cell/PPUInterpreter.cpp @@ -1175,7 +1175,7 @@ bool ppu_interpreter::VRLB(ppu_thread& ppu, ppu_opcode_t op) for (uint i = 0; i < 16; i++) { - d._u8[i] = rol8(a._u8[i], b._u8[i] & 0x7); + d._u8[i] = rol8(a._u8[i], b._u8[i]); } return true; } diff --git a/rpcs3/Emu/Cell/PPUOpcodes.h b/rpcs3/Emu/Cell/PPUOpcodes.h index 458ecb7ccb..66a66b8bd0 100644 --- a/rpcs3/Emu/Cell/PPUOpcodes.h +++ b/rpcs3/Emu/Cell/PPUOpcodes.h @@ -62,8 +62,7 @@ union ppu_opcode_t inline u64 ppu_rotate_mask(u32 mb, u32 me) { - const u64 mask = ~0ull << (63 ^ (me - mb)); - return mask >> mb | mask << (64 - mb); // Rotate + return ror64(~0ull << (63 ^ (me - mb)), mb); } inline u32 ppu_decode(u32 inst) diff --git a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp index 4a7d668a81..f7313a1e6a 100644 --- a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp +++ b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp @@ -478,7 +478,7 @@ void spu_recompiler::ROT(spu_opcode_t op) { for (u32 i = 0; i < 4; i++) { - t[i] = (a[i] << b[i]) | (a[i] >> (32 - b[i])); + t[i] = rol32(a[i], b[i]); } }; @@ -588,7 +588,7 @@ void spu_recompiler::ROTH(spu_opcode_t op) //nf { for (u32 i = 0; i < 8; i++) { - t[i] = (a[i] << b[i]) | (a[i] >> (16 - b[i])); + t[i] = rol16(a[i], b[i]); } }; diff --git a/rpcs3/Emu/Cell/SPUInterpreter.cpp b/rpcs3/Emu/Cell/SPUInterpreter.cpp index 93f2d268cf..0295e2e87d 100644 --- a/rpcs3/Emu/Cell/SPUInterpreter.cpp +++ b/rpcs3/Emu/Cell/SPUInterpreter.cpp @@ -145,7 +145,7 @@ void spu_interpreter::ROT(SPUThread& spu, spu_opcode_t op) for (u32 i = 0; i < 4; i++) { - spu.gpr[op.rt]._u32[i] = (a._u32[i] << b._s32[i]) | (a._u32[i] >> (32 - b._s32[i])); + spu.gpr[op.rt]._u32[i] = rol32(a._u32[i], b._u32[i]); } } @@ -192,7 +192,7 @@ void spu_interpreter::ROTH(SPUThread& spu, spu_opcode_t op) for (u32 i = 0; i < 8; i++) { - spu.gpr[op.rt]._u16[i] = (a._u16[i] << b._s16[i]) | (a._u16[i] >> (16 - b._s16[i])); + spu.gpr[op.rt]._u16[i] = rol16(a._u16[i], b._s16[i]); } }