mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-04-21 12:05:23 +00:00
rsx: Fix stencil initial values
This commit is contained in:
parent
ea2970d6e5
commit
423fd4a388
3 changed files with 16 additions and 18 deletions
|
@ -689,17 +689,6 @@ rsx::surface_color_format rsx::to_surface_color_format(u8 in)
|
|||
fmt::throw_exception("Unknown surface color format 0x%x" HERE, in);
|
||||
}
|
||||
|
||||
enum
|
||||
{
|
||||
CELL_GCM_INVERT = 0x150A,
|
||||
CELL_GCM_KEEP = 0x1E00,
|
||||
CELL_GCM_REPLACE = 0x1E01,
|
||||
CELL_GCM_INCR = 0x1E02,
|
||||
CELL_GCM_DECR = 0x1E03,
|
||||
CELL_GCM_INCR_WRAP = 0x8507,
|
||||
CELL_GCM_DECR_WRAP = 0x8508,
|
||||
};
|
||||
|
||||
rsx::stencil_op rsx::to_stencil_op(u16 in)
|
||||
{
|
||||
switch (in)
|
||||
|
|
|
@ -592,6 +592,14 @@ enum
|
|||
CELL_GCM_CW = 0x0900,
|
||||
CELL_GCM_CCW = 0x0901,
|
||||
|
||||
CELL_GCM_INVERT = 0x150A,
|
||||
CELL_GCM_KEEP = 0x1E00,
|
||||
CELL_GCM_REPLACE = 0x1E01,
|
||||
CELL_GCM_INCR = 0x1E02,
|
||||
CELL_GCM_DECR = 0x1E03,
|
||||
CELL_GCM_INCR_WRAP = 0x8507,
|
||||
CELL_GCM_DECR_WRAP = 0x8508,
|
||||
|
||||
CELL_GCM_TRANSFER_LOCAL_TO_LOCAL = 0,
|
||||
CELL_GCM_TRANSFER_MAIN_TO_LOCAL = 1,
|
||||
CELL_GCM_TRANSFER_LOCAL_TO_MAIN = 2,
|
||||
|
|
|
@ -908,17 +908,17 @@ namespace rsx
|
|||
registers[NV4097_SET_STENCIL_FUNC] = CELL_GCM_ALWAYS;
|
||||
registers[NV4097_SET_STENCIL_FUNC_REF] = 0x00;
|
||||
registers[NV4097_SET_STENCIL_FUNC_MASK] = 0xff;
|
||||
//registers[NV4097_SET_STENCIL_OP_FAIL] = CELL_GCM_KEEP;
|
||||
//registers[NV4097_SET_STENCIL_OP_ZFAIL] = CELL_GCM_KEEP;
|
||||
//registers[NV4097_SET_STENCIL_OP_ZPASS] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_STENCIL_OP_FAIL] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_STENCIL_OP_ZFAIL] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_STENCIL_OP_ZPASS] = CELL_GCM_KEEP;
|
||||
|
||||
registers[NV4097_SET_BACK_STENCIL_MASK] = 0xff;
|
||||
registers[NV4097_SET_BACK_STENCIL_FUNC] = CELL_GCM_ALWAYS;
|
||||
registers[NV4097_SET_BACK_STENCIL_FUNC_REF] = 0x00;
|
||||
registers[NV4097_SET_BACK_STENCIL_FUNC_MASK] = 0xff;
|
||||
//registers[NV4097_SET_BACK_STENCIL_OP_FAIL] = CELL_GCM_KEEP;
|
||||
//registers[NV4097_SET_BACK_STENCIL_OP_ZFAIL] = CELL_GCM_KEEP;
|
||||
//registers[NV4097_SET_BACK_STENCIL_OP_ZPASS] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_BACK_STENCIL_OP_FAIL] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_BACK_STENCIL_OP_ZFAIL] = CELL_GCM_KEEP;
|
||||
registers[NV4097_SET_BACK_STENCIL_OP_ZPASS] = CELL_GCM_KEEP;
|
||||
|
||||
//registers[NV4097_SET_SHADE_MODE] = CELL_GCM_SMOOTH;
|
||||
|
||||
|
@ -950,7 +950,8 @@ namespace rsx
|
|||
registers[NV4097_SET_CLEAR_RECT_HORIZONTAL] = (4096 << 16) | 0;
|
||||
registers[NV4097_SET_CLEAR_RECT_VERTICAL] = (4096 << 16) | 0;
|
||||
|
||||
registers[NV4097_SET_ZSTENCIL_CLEAR_VALUE] = 0xffffffff;
|
||||
// Stencil bits init to 00 - Tested with NPEB90184 (never sets the depth_stencil clear values but uses stencil test)
|
||||
registers[NV4097_SET_ZSTENCIL_CLEAR_VALUE] = 0xffffff00;
|
||||
|
||||
// CELL_GCM_SURFACE_A8R8G8B8, CELL_GCM_SURFACE_Z24S8 and CELL_GCM_SURFACE_CENTER_1
|
||||
registers[NV4097_SET_SURFACE_FORMAT] = (8 << 0) | (2 << 5) | (0 << 12) | (1 << 16) | (1 << 24);
|
||||
|
|
Loading…
Add table
Reference in a new issue