diff --git a/rpcs3/Emu/Cell/SPUInterpreter.h b/rpcs3/Emu/Cell/SPUInterpreter.h
index 10ef7c0e27..954fdfd79b 100644
--- a/rpcs3/Emu/Cell/SPUInterpreter.h
+++ b/rpcs3/Emu/Cell/SPUInterpreter.h
@@ -47,7 +47,7 @@ private:
 	}
 	void MFSPR(u32 rt, u32 sa)
 	{
-		UNIMPLEMENTED(); // not used
+		CPU.GPR[rt].clear();  // All SPRs read as zero.
 	}
 	void RDCH(u32 rt, u32 ra)
 	{
@@ -243,7 +243,7 @@ private:
 	}
 	void MTSPR(u32 rt, u32 sa)
 	{
-		UNIMPLEMENTED(); // not used
+		// SPR writes are ignored.
 	}
 	void WRCH(u32 ra, u32 rt)
 	{