diff --git a/rpcs3/Emu/Cell/SPUThread.cpp b/rpcs3/Emu/Cell/SPUThread.cpp index 94727d2cb8..05b06e4e65 100644 --- a/rpcs3/Emu/Cell/SPUThread.cpp +++ b/rpcs3/Emu/Cell/SPUThread.cpp @@ -1249,14 +1249,12 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args) if (!thread) { - fmt::throw_exception("RawSPU not found (cmd=0x%x, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x)" HERE, args.cmd, args.lsa, args.eal, args.tag, args.size); + // Access Violation } - - u32 value; - if ((eal - RAW_SPU_BASE_ADDR) % RAW_SPU_OFFSET + args.size - 1 < SPU_LS_SIZE) // LS access + else if ((eal - RAW_SPU_BASE_ADDR) % RAW_SPU_OFFSET + args.size - 1 < SPU_LS_SIZE) // LS access { } - else if (args.size == 4 && is_get && thread->read_reg(eal, value)) + else if (u32 value; args.size == 4 && is_get && thread->read_reg(eal, value)) { _ref(lsa) = value; return; @@ -1267,12 +1265,12 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args) } else { - fmt::throw_exception("Invalid RawSPU MMIO offset (cmd=0x%x, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x)" HERE, args.cmd, args.lsa, args.eal, args.tag, args.size); + fmt::throw_exception("Invalid RawSPU MMIO offset (cmd=[%s])" HERE, args); } } else if (get_type() >= spu_type::raw) { - fmt::throw_exception("SPU MMIO used for RawSPU (cmd=0x%x, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x)" HERE, args.cmd, args.lsa, args.eal, args.tag, args.size); + // Access Violation } else if (group && group->threads_map[index] != -1) { @@ -1289,12 +1287,12 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args) } else { - fmt::throw_exception("Invalid MMIO offset (cmd=0x%x, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x)" HERE, args.cmd, args.lsa, args.eal, args.tag, args.size); + fmt::throw_exception("Invalid MMIO offset (cmd=[%s])" HERE, args); } } else { - fmt::throw_exception("Invalid thread type (cmd=0x%x, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x)" HERE, args.cmd, args.lsa, args.eal, args.tag, args.size); + // Access Violation } } @@ -1765,7 +1763,7 @@ bool spu_thread::do_list_transfer(spu_mfc_cmd& args) const u32 size = items[index].ts & 0x7fff; const u32 addr = items[index].ea; - spu_log.trace("LIST: addr=0x%x, size=0x%x, lsa=0x%05x, sb=0x%x", addr, size, args.lsa | (addr & 0xf), items[index].sb); + spu_log.trace("LIST: item=0x%016x, lsa=0x%05x", std::bit_cast>(items[index]), args.lsa | (addr & 0xf)); if (size) { @@ -2163,7 +2161,7 @@ bool spu_thread::process_mfc_cmd() } spu::scheduler::concurrent_execution_watchdog watchdog(*this); - spu_log.trace("DMAC: cmd=%s, lsa=0x%x, ea=0x%llx, tag=0x%x, size=0x%x", ch_mfc_cmd.cmd, ch_mfc_cmd.lsa, ch_mfc_cmd.eal, ch_mfc_cmd.tag, ch_mfc_cmd.size); + spu_log.trace("DMAC: [%s]", ch_mfc_cmd); switch (ch_mfc_cmd.cmd) {