mirror of
https://github.com/RPCS3/rpcs3.git
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rsx: Fix typos (#5054)
This commit is contained in:
elad
kd-11
parent
4357892081
commit
685eaedbf9
2 changed files with 130 additions and 130 deletions
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@ -165,7 +165,7 @@ namespace
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 28 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 28"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 32 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 32"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 36 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 36"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 40, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 40"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 40 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 40"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 44 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 44"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 48 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 48"},
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{NV4097_SET_VERTEX_DATA_SCALED4S_M + 52 / 4, "NV4097_SET_VERTEX_DATA_SCALED4S_M + 52"},
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@ -1313,15 +1313,15 @@ namespace rsx
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registers[NV4097_SET_ATTRIB_UCLIP0] = 0x171615;
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registers[NV4097_SET_ATTRIB_UCLIP1] = 0x1b1a19;
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registers[NV4097_SET_TEX_COORD_CONTROL] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 1] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 2] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 3] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 4] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 5] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 6] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 7] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 8] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 12] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 16] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 20] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 24] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 28] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 32] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 36] = 0x0;
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registers[NV4097_SET_TEX_COORD_CONTROL + 9] = 0x0;
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registers[0xa0c / 4] = 0x0;
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registers[0xa60 / 4] = 0x0;
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registers[NV4097_SET_POLY_OFFSET_LINE_ENABLE] = 0x0;
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@ -1336,45 +1336,45 @@ namespace rsx
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registers[0x145c / 4] = 0x1;
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registers[NV4097_SET_REDUCE_DST_COLOR] = 0x1;
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registers[NV4097_SET_TEXTURE_CONTROL2] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 1] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 2] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 3] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 4] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 5] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 6] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 7] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 8] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 9] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 10] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 11] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 12] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 16] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 20] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 24] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 28] = 0x2dc8;
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registers[NV4097_SET_VERTEX_DATA_SCALED4S_M + 40] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 36] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 40] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 44] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 48] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 52] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 56] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 60] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 13] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 14] = 0x2dc8;
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registers[NV4097_SET_TEXTURE_CONTROL2 + 15] = 0x2dc8;
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registers[NV4097_SET_FOG_MODE] = 0x800;
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registers[NV4097_SET_FOG_PARAMS] = 0x0;
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registers[NV4097_SET_FOG_PARAMS + 4] = 0x0;
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registers[NV4097_SET_FOG_PARAMS + 8] = 0x0;
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registers[NV4097_SET_FOG_PARAMS + 1] = 0x0;
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registers[NV4097_SET_FOG_PARAMS + 2] = 0x0;
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registers[0x240 / 4] = 0xffff;
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registers[0x244 / 4] = 0x0;
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registers[0x248 / 4] = 0x0;
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registers[0x24c / 4] = 0x0;
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registers[NV4097_SET_ANISO_SPREAD] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 1] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 2] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 3] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 4] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 5] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 6] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 7] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 8] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 9] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 10] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 11] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 12] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 16] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 20] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 24] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 28] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 32] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 36] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 40] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 44] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 48] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 52] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 56] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 60] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 13] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 14] = 0x10101;
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registers[NV4097_SET_ANISO_SPREAD + 15] = 0x10101;
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registers[0x400 / 4] = 0x7421;
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registers[0x404 / 4] = 0x7421;
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registers[0x408 / 4] = 0x7421;
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@ -1467,99 +1467,99 @@ namespace rsx
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registers[NV4097_SET_TEXTURE_BORDER_COLOR] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x20] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x20] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x20] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x20] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x40] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x40] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x40] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x40] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x60] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x60] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x60] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x60] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x80] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x80] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x80] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x80] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0xa0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0xa0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0xa0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0xa0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0xc0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0xc0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0xc0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0xc0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0xe0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0xe0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0xe0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0xe0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x100] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x100] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x100] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x100] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x120] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x120] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x120] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x120] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x140] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x140] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x140] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x140] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x160] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x160] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x160] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x160] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x180] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x180] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x180] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x180] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x1a0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x1a0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x1a0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x1a0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x1c0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x1c0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x1c0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x1c0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 0x1e0] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 0x1e0] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 0x1e0] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 0x1e0] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 8] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 8] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 8] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 8] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 8] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 16] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 16] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 16] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 24] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 24] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 24] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 24] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 32] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 32] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 32] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 32] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 40] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 40] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 40] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 40] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 48] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 48] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 48] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 48] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 56] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 56] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 56] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 56] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 64] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 64] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 64] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 64] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 72] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 72] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 72] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 72] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 80] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 80] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 80] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 80] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 88] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 88] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 88] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 88] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 96] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 96] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 96] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 96] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 104] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 104] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 104] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 104] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 112] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 112] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 112] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 112] = 0x2052000;
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registers[NV4097_SET_TEXTURE_ADDRESS + 120] = 0x30101;
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registers[NV4097_SET_TEXTURE_BORDER_COLOR + 120] = 0x0;
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registers[NV4097_SET_TEXTURE_CONTROL0 + 120] = 0x60000;
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registers[NV4097_SET_TEXTURE_FILTER + 120] = 0x2052000;
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registers[NV4097_SET_TWO_SIDED_STENCIL_TEST_ENABLE] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 1] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 1] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 2] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 2] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 3] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 3] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 4] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 4] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 5] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 5] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 6] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 6] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 7] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 7] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 8] = 0x2;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 8] = 0x0;
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registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 9] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 9] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 10] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 10] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 11] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 11] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 12] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 12] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 16] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 16] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 20] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 20] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 24] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 24] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 28] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 28] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 32] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 32] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 36] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 36] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 40] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 40] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 44] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 44] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 48] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 48] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 52] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 52] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 56] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 56] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 60] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 60] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 13] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 13] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 14] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 14] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_FORMAT + 15] = 0x2;
|
||||
registers[NV4097_SET_VERTEX_DATA_ARRAY_OFFSET + 15] = 0x0;
|
||||
registers[NV4097_SET_VIEWPORT_HORIZONTAL] = 0x10000000;
|
||||
registers[NV4097_SET_VIEWPORT_VERTICAL] = 0x10000000;
|
||||
registers[NV4097_SET_CLIP_MIN] = 0x0;
|
||||
|
|
@ -1599,18 +1599,18 @@ namespace rsx
|
|||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 0x20] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 0x20] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 0x20] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 0x20] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 0x40] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 0x40] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 0x40] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 0x40] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 0x60] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 0x60] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 0x60] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 0x60] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 8] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 8] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 8] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 8] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 16] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 16] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 16] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 16] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_ADDRESS + 24] = 0x101;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR + 24] = 0x0;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_CONTROL0 + 24] = 0x60000;
|
||||
registers[NV4097_SET_VERTEX_TEXTURE_FILTER + 24] = 0x0;
|
||||
registers[NV4097_SET_CYLINDRICAL_WRAP] = 0x0;
|
||||
registers[NV4097_SET_ZMIN_MAX_CONTROL] = 0x1;
|
||||
registers[NV4097_SET_TWO_SIDE_LIGHT_EN] = 0x0;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue