From 6df5ddb973e151eedb29081f17e9ca98dbf8897f Mon Sep 17 00:00:00 2001 From: Nekotekina Date: Fri, 24 Oct 2014 17:24:09 +0400 Subject: [PATCH] Few warnings fixed --- Utilities/SQueue.h | 6 +- Utilities/rFile.cpp | 30 +- rpcs3.sln | 6 +- rpcs3/Emu/Cell/PPUInterpreter.h | 732 ++++++++++++++++--- rpcs3/Emu/Cell/SPUThread.cpp | 29 +- rpcs3/Emu/RSX/GL/GLShaderParam.h | 3 +- rpcs3/Emu/SysCalls/Modules.cpp | 30 +- rpcs3/Emu/SysCalls/Modules/cellAvconfExt.cpp | 6 +- rpcs3/Emu/SysCalls/Modules/cellPngDec.cpp | 6 +- rpcs3/Emu/SysCalls/Modules/cellSync.cpp | 18 +- rpcs3/Emu/SysCalls/Modules/libmixer.cpp | 2 +- rpcs3/Emu/SysCalls/Modules/sysPrxForUser.cpp | 2 +- rpcs3/Emu/SysCalls/lv2/sys_memory.cpp | 1 - rpcs3/Emu/SysCalls/lv2/sys_mutex.cpp | 3 +- rpcs3/Emu/System.cpp | 5 +- 15 files changed, 720 insertions(+), 159 deletions(-) diff --git a/Utilities/SQueue.h b/Utilities/SQueue.h index 35abca4654..9310bea613 100644 --- a/Utilities/SQueue.h +++ b/Utilities/SQueue.h @@ -28,7 +28,7 @@ public: { if (m_count >= SQSize) { - if (Emu.IsStopped() || do_exit && *do_exit) + if (Emu.IsStopped() || (do_exit && *do_exit)) { return false; } @@ -55,7 +55,7 @@ public: { if (!m_count) { - if (Emu.IsStopped() || do_exit && *do_exit) + if (Emu.IsStopped() || (do_exit && *do_exit)) { return false; } @@ -90,7 +90,7 @@ public: { if (m_count <= pos) { - if (Emu.IsStopped() || do_exit && *do_exit) + if (Emu.IsStopped() || (do_exit && *do_exit)) { return false; } diff --git a/Utilities/rFile.cpp b/Utilities/rFile.cpp index 554647c40b..912452ef89 100644 --- a/Utilities/rFile.cpp +++ b/Utilities/rFile.cpp @@ -21,6 +21,12 @@ std::wstring ConvertUTF8ToWString(const std::string &source) { } #endif +#ifdef _WIN32 +#define GET_API_ERROR GetLastError() +#else +#define GET_API_ERROR err +#endif + bool getFileInfo(const char *path, FileInfo *fileInfo) { // TODO: Expand relative paths? fileInfo->fullName = path; @@ -103,14 +109,15 @@ bool rMkpath(const std::string &path) bool rRmdir(const std::string &dir) { #ifdef _WIN32 - if (!RemoveDirectory(ConvertUTF8ToWString(dir).c_str())) { - LOG_ERROR(GENERAL, "Error deleting directory %s: %i", dir.c_str(), GetLastError()); + if (!RemoveDirectory(ConvertUTF8ToWString(dir).c_str())) +#else + if (int err = rmdir(dir.c_str())) +#endif + { + LOG_ERROR(GENERAL, "Error deleting directory %s: %i", dir.c_str(), GET_API_ERROR); return false; } return true; -#else - rmdir(dir.c_str()); -#endif } bool rRename(const std::string &from, const std::string &to) @@ -137,17 +144,14 @@ bool rExists(const std::string &file) bool rRemoveFile(const std::string &file) { #ifdef _WIN32 - if (!DeleteFile(ConvertUTF8ToWString(file).c_str())) { - LOG_ERROR(GENERAL, "Error deleting %s: %i", file.c_str(), GetLastError()); - return false; - } + if (!DeleteFile(ConvertUTF8ToWString(file).c_str())) #else - int err = unlink(file.c_str()); - if (err) { - LOG_ERROR(GENERAL, "Error unlinking %s: %i", file.c_str(), err); + if (int err = unlink(file.c_str())) +#endif + { + LOG_ERROR(GENERAL, "Error deleting %s: %i", file.c_str(), GET_API_ERROR); return false; } -#endif return true; } diff --git a/rpcs3.sln b/rpcs3.sln index 473c4354c2..9c10ade540 100644 --- a/rpcs3.sln +++ b/rpcs3.sln @@ -1,5 +1,5 @@ Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio Express 2013 for Windows Desktop +# Visual Studio 2013 VisualStudioVersion = 12.0.30723.0 MinimumVisualStudioVersion = 10.0.40219.1 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "rpcs3", "rpcs3\rpcs3.vcxproj", "{70CD65B0-91D6-4FAE-9A7B-4AF55D0D1B12}" @@ -21,6 +21,7 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "rpcs3", "rpcs3\rpcs3.vcxpro {7047EE97-7F80-A70D-6147-BC11102DB6F4} = {7047EE97-7F80-A70D-6147-BC11102DB6F4} {87B42A9C-3F5C-53D7-9017-2B1CAE39457D} = {87B42A9C-3F5C-53D7-9017-2B1CAE39457D} {6FCB55A5-563F-4039-1D79-1EB6ED8AAB82} = {6FCB55A5-563F-4039-1D79-1EB6ED8AAB82} + {8BC303AB-25BE-4276-8E57-73F171B2D672} = {8BC303AB-25BE-4276-8E57-73F171B2D672} {949C6DB8-E638-6EC6-AB31-BCCFD1379E01} = {949C6DB8-E638-6EC6-AB31-BCCFD1379E01} {74827EBD-93DC-5110-BA95-3F2AB029B6B0} = {74827EBD-93DC-5110-BA95-3F2AB029B6B0} {46333DC3-B4A5-3DCC-E8BF-A3F20ADC56D2} = {46333DC3-B4A5-3DCC-E8BF-A3F20ADC56D2} @@ -138,9 +139,6 @@ EndProject Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "asmjit", "asmjit", "{E2A982F2-4B1A-48B1-8D77-A17A589C58D7}" EndProject Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "emucore", "rpcs3\emucore.vcxproj", "{C4A10229-4712-4BD2-B63E-50D93C67A038}" - ProjectSection(ProjectDependencies) = postProject - {8BC303AB-25BE-4276-8E57-73F171B2D672} = {8BC303AB-25BE-4276-8E57-73F171B2D672} - EndProjectSection EndProject Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "llvm", "llvm", "{C8068CE9-D626-4FEA-BEE7-893F06A25BF3}" EndProject diff --git a/rpcs3/Emu/Cell/PPUInterpreter.h b/rpcs3/Emu/Cell/PPUInterpreter.h index cdb7a2d2ce..f69c8c3c50 100644 --- a/rpcs3/Emu/Cell/PPUInterpreter.h +++ b/rpcs3/Emu/Cell/PPUInterpreter.h @@ -2271,7 +2271,13 @@ private: void LVEBX(u32 vd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.VPR[vd]._u8[15 - (addr & 0xf)] = vm::read8(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.VPR[vd]._u8[15 - (addr & 0xf)] = vm::read8((u32)addr); // check LVEWX comments } void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) @@ -2337,16 +2343,36 @@ private: void LWARX(u32 rd, u32 ra, u32 rb) { CPU.R_ADDR = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.R_VALUE = vm::get_ref(CPU.R_ADDR); + if ((u32)CPU.R_ADDR != CPU.R_ADDR) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, CPU.R_ADDR); + Emu.Pause(); + return; + } + CPU.R_VALUE = vm::get_ref((u32)CPU.R_ADDR); CPU.GPR[rd] = re32((u32)CPU.R_VALUE); } void LDX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read64((u32)addr); } void LWZX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read32((u32)addr); } void SLW(u32 ra, u32 rs, u32 rb, bool rc) { @@ -2418,7 +2444,13 @@ private: void LVEHX(u32 vd, u32 ra, u32 rb) { const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL; - CPU.VPR[vd]._u16[7 - ((addr >> 1) & 0x7)] = vm::read16(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.VPR[vd]._u16[7 - ((addr >> 1) & 0x7)] = vm::read16((u32)addr); // check LVEWX comments } void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) @@ -2430,7 +2462,13 @@ private: void LDUX(u32 rd, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - CPU.GPR[rd] = vm::read64(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read64((u32)addr); CPU.GPR[ra] = addr; } void DCBST(u32 ra, u32 rb) @@ -2439,7 +2477,13 @@ private: void LWZUX(u32 rd, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - CPU.GPR[rd] = vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read32((u32)addr); CPU.GPR[ra] = addr; } void CNTLZD(u32 ra, u32 rs, bool rc) @@ -2465,7 +2509,13 @@ private: void LVEWX(u32 vd, u32 ra, u32 rb) { const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL; - CPU.VPR[vd]._u32[3 - ((addr >> 2) & 0x3)] = vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.VPR[vd]._u32[3 - ((addr >> 2) & 0x3)] = vm::read32((u32)addr); // It's not very good idea to implement it using read128(), // because it can theoretically read RawSPU 32-bit MMIO register (read128() will fail) //CPU.VPR[vd] = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL); @@ -2485,7 +2535,13 @@ private: void LDARX(u32 rd, u32 ra, u32 rb) { CPU.R_ADDR = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.R_VALUE = vm::get_ref(CPU.R_ADDR); + if ((u32)CPU.R_ADDR != CPU.R_ADDR) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, CPU.R_ADDR); + Emu.Pause(); + return; + } + CPU.R_VALUE = vm::get_ref((u32)CPU.R_ADDR); CPU.GPR[rd] = re64(CPU.R_VALUE); } void DCBF(u32 ra, u32 rb) @@ -2493,7 +2549,14 @@ private: } void LBZX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::read8(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read8((u32)addr); } void LVX(u32 vd, u32 ra, u32 rb) { @@ -2510,7 +2573,13 @@ private: //if(ra == 0 || ra == rd) throw "Bad instruction [LBZUX]"; const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - CPU.GPR[rd] = vm::read8(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read8((u32)addr); CPU.GPR[ra] = addr; } void NOR(u32 ra, u32 rs, u32 rb, bool rc) @@ -2521,8 +2590,14 @@ private: void STVEBX(u32 vs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = addr & 0xf; - vm::write8(addr, CPU.VPR[vs]._u8[15 - eb]); + vm::write8((u32)addr, CPU.VPR[vs]._u8[15 - eb]); } void SUBFE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { @@ -2593,15 +2668,28 @@ private: } void STDX(u32 rs, u32 ra, u32 rb) { - vm::write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, CPU.GPR[rs]); } void STWCX_(u32 rs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } if (CPU.R_ADDR == addr) { - CPU.SetCR_EQ(0, InterlockedCompareExchange(vm::get_ptr(addr), re32((u32)CPU.GPR[rs]), (u32)CPU.R_VALUE) == (u32)CPU.R_VALUE); + CPU.SetCR_EQ(0, InterlockedCompareExchange(vm::get_ptr((u32)CPU.R_ADDR), re32((u32)CPU.GPR[rs]), (u32)CPU.R_VALUE) == (u32)CPU.R_VALUE); CPU.R_ADDR = 0; } else @@ -2611,31 +2699,62 @@ private: } void STWX(u32 rs, u32 ra, u32 rb) { - vm::write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32)CPU.GPR[rs]); } void STVEHX(u32 vs, u32 ra, u32 rb) { const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = (addr & 0xf) >> 1; - vm::write16(addr, CPU.VPR[vs]._u16[7 - eb]); + vm::write16((u32)addr, CPU.VPR[vs]._u16[7 - eb]); } void STDUX(u32 rs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write64(addr, CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, CPU.GPR[rs]); CPU.GPR[ra] = addr; } void STWUX(u32 rs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write32(addr, (u32)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void STVEWX(u32 vs, u32 ra, u32 rb) { const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = (addr & 0xf) >> 2; - vm::write32(addr, CPU.VPR[vs]._u32[3 - eb]); + vm::write32((u32)addr, CPU.VPR[vs]._u32[3 - eb]); } void ADDZE(u32 rd, u32 ra, u32 oe, bool rc) { @@ -2656,10 +2775,16 @@ private: void STDCX_(u32 rs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } if (CPU.R_ADDR == addr) { - CPU.SetCR_EQ(0, InterlockedCompareExchange(vm::get_ptr(addr), re64(CPU.GPR[rs]), CPU.R_VALUE) == CPU.R_VALUE); + CPU.SetCR_EQ(0, InterlockedCompareExchange(vm::get_ptr((u32)CPU.R_ADDR), re64(CPU.GPR[rs]), CPU.R_VALUE) == CPU.R_VALUE); CPU.R_ADDR = 0; } else @@ -2669,7 +2794,14 @@ private: } void STBX(u32 rs, u32 ra, u32 rb) { - vm::write8((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u8)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write8((u32)addr, (u8)CPU.GPR[rs]); } void STVX(u32 vs, u32 ra, u32 rb) { @@ -2710,7 +2842,13 @@ private: void STBUX(u32 rs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write8(addr, (u8)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write8((u32)addr, (u8)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void ADD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) @@ -2726,7 +2864,14 @@ private: } void LHZX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read16((u32)addr); } void EQV(u32 ra, u32 rs, u32 rb, bool rc) { @@ -2736,12 +2881,25 @@ private: void ECIWX(u32 rd, u32 ra, u32 rb) { //HACK! - CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read32((u32)addr); } void LHZUX(u32 rd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.GPR[rd] = vm::read16(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read16((u32)addr); CPU.GPR[ra] = addr; } void XOR(u32 ra, u32 rs, u32 rb, bool rc) @@ -2755,14 +2913,28 @@ private: } void LWAX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = (s64)(s32)vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s32)vm::read32((u32)addr); } void DST(u32 ra, u32 rb, u32 strm, u32 t) { } void LHAX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = (s64)(s16)vm::read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s16)vm::read16((u32)addr); } void LVXL(u32 vd, u32 ra, u32 rb) { @@ -2783,7 +2955,13 @@ private: void LWAUX(u32 rd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.GPR[rd] = (s64)(s32)vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s32)vm::read32((u32)addr); CPU.GPR[ra] = addr; } void DSTST(u32 ra, u32 rb, u32 strm, u32 t) @@ -2792,12 +2970,25 @@ private: void LHAUX(u32 rd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; - CPU.GPR[rd] = (s64)(s16)vm::read16(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s16)vm::read16((u32)addr); CPU.GPR[ra] = addr; } void STHX(u32 rs, u32 ra, u32 rb) { - vm::write16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u16)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write16((u32)addr, (u16)CPU.GPR[rs]); } void ORC(u32 ra, u32 rs, u32 rb, bool rc) { @@ -2807,12 +2998,25 @@ private: void ECOWX(u32 rs, u32 ra, u32 rb) { //HACK! - vm::write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u32)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32)CPU.GPR[rs]); } void STHUX(u32 rs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write16(addr, (u16)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write16((u32)addr, (u16)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void OR(u32 ra, u32 rs, u32 rb, bool rc) @@ -2906,14 +3110,27 @@ private: void LVLX(u32 vd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u32 eb = addr & 0xf; CPU.VPR[vd].clear(); - for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i); + for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8((u32)addr + i); } void LDBRX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::get_ref(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::get_ref((u32)addr); } void LSWX(u32 rd, u32 ra, u32 rb) { @@ -2921,11 +3138,25 @@ private: } void LWBRX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::get_ref(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::get_ref((u32)addr); } void LFSX(u32 frd, u32 ra, u32 rb) { - CPU.FPR[frd] = vm::get_ref>(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]).ToLE(); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.FPR[frd] = vm::get_ref>((u32)addr).ToLE(); } void SRW(u32 ra, u32 rs, u32 rb, bool rc) { @@ -2948,14 +3179,26 @@ private: void LVRX(u32 vd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = addr & 0xf; CPU.VPR[vd].clear(); - for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i - 16); + for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8((u32)addr + i - 16); } void LSWI(u32 rd, u32 ra, u32 nb) { - u64 EA = ra ? CPU.GPR[ra] : 0; + u64 addr = ra ? CPU.GPR[ra] : 0; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } u64 N = nb ? nb : 32; u8 reg = rd; @@ -2963,8 +3206,8 @@ private: { if (N > 3) { - CPU.GPR[reg] = vm::read32(EA); - EA += 4; + CPU.GPR[reg] = vm::read32((u32)addr); + addr += 4; N -= 4; } else @@ -2974,8 +3217,8 @@ private: while (N > 0) { N = N - 1; - buf |= vm::read8(EA) << (i * 8); - EA = EA + 1; + buf |= vm::read8((u32)addr) << (i * 8); + addr++; i--; } CPU.GPR[reg] = buf; @@ -2986,7 +3229,13 @@ private: void LFSUX(u32 frd, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - (u64&)CPU.FPR[frd] = vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + (u64&)CPU.FPR[frd] = vm::read32((u32)addr); CPU.FPR[frd] = (float&)CPU.FPR[frd]; CPU.GPR[ra] = addr; } @@ -2996,20 +3245,39 @@ private: } void LFDX(u32 frd, u32 ra, u32 rb) { - (u64&)CPU.FPR[frd] = vm::read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + (u64&)CPU.FPR[frd] = vm::read64((u32)addr); } void LFDUX(u32 frd, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - (u64&)CPU.FPR[frd] = vm::read64(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + (u64&)CPU.FPR[frd] = vm::read64((u32)addr); CPU.GPR[ra] = addr; } void STVLX(u32 vs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u32 eb = addr & 0xf; - for (u32 i = 0; i < 16u - eb; ++i) vm::write8(addr + i, CPU.VPR[vs]._u8[15 - i]); + for (u32 i = 0; i < 16u - eb; ++i) vm::write8((u32)addr + i, CPU.VPR[vs]._u8[15 - i]); } void STSWX(u32 rs, u32 ra, u32 rb) { @@ -3017,28 +3285,60 @@ private: } void STWBRX(u32 rs, u32 ra, u32 rb) { - vm::get_ref(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) = (u32)CPU.GPR[rs]; + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::get_ref((u32)addr) = (u32)CPU.GPR[rs]; } void STFSX(u32 frs, u32 ra, u32 rb) { - vm::write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.FPR[frs].To32()); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, CPU.FPR[frs].To32()); } void STVRX(u32 vs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = addr & 0xf; - for (u32 i = 16 - eb; i < 16; ++i) vm::write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]); + for (u32 i = 16 - eb; i < 16; ++i) vm::write8((u32)addr + i - 16, CPU.VPR[vs]._u8[15 - i]); } void STFSUX(u32 frs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write32(addr, CPU.FPR[frs].To32()); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, CPU.FPR[frs].To32()); CPU.GPR[ra] = addr; } void STSWI(u32 rd, u32 ra, u32 nb) { - u64 EA = ra ? CPU.GPR[ra] : 0; + u64 addr = ra ? CPU.GPR[ra] : 0; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } u64 N = nb ? nb : 32; u8 reg = rd; @@ -3046,8 +3346,8 @@ private: { if (N > 3) { - vm::write32(EA, (u32)CPU.GPR[reg]); - EA += 4; + vm::write32((u32)addr, (u32)CPU.GPR[reg]); + addr += 4; N -= 4; } else @@ -3056,9 +3356,9 @@ private: while (N > 0) { N = N - 1; - vm::write8(EA, (0xFF000000 & buf) >> 24); + vm::write8((u32)addr, (0xFF000000 & buf) >> 24); buf <<= 8; - EA = EA + 1; + addr++; } } reg = (reg + 1) % 32; @@ -3066,25 +3366,51 @@ private: } void STFDX(u32 frs, u32 ra, u32 rb) { - vm::write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u64&)CPU.FPR[frs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, (u64&)CPU.FPR[frs]); } void STFDUX(u32 frs, u32 ra, u32 rb) { const u64 addr = CPU.GPR[ra] + CPU.GPR[rb]; - vm::write64(addr, (u64&)CPU.FPR[frs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, (u64&)CPU.FPR[frs]); CPU.GPR[ra] = addr; } void LVLXL(u32 vd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u32 eb = addr & 0xf; CPU.VPR[vd].clear(); - for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i); + for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8((u32)addr + i); } void LHBRX(u32 rd, u32 ra, u32 rb) { - CPU.GPR[rd] = vm::get_ref(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::get_ref((u32)addr); } void SRAW(u32 ra, u32 rs, u32 rb, bool rc) { @@ -3123,10 +3449,16 @@ private: void LVRXL(u32 vd, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = addr & 0xf; CPU.VPR[vd].clear(); - for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i - 16); + for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8((u32)addr + i - 16); } void DSS(u32 strm, u32 a) { @@ -3158,13 +3490,26 @@ private: void STVLXL(u32 vs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u32 eb = addr & 0xf; - for (u32 i = 0; i < 16u - eb; ++i) vm::write8(addr + i, CPU.VPR[vs]._u8[15 - i]); + for (u32 i = 0; i < 16u - eb; ++i) vm::write8((u32)addr + i, CPU.VPR[vs]._u8[15 - i]); } void STHBRX(u32 rs, u32 ra, u32 rb) { - vm::get_ref(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) = (u16)CPU.GPR[rs]; + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::get_ref((u32)addr) = (u16)CPU.GPR[rs]; } void EXTSH(u32 ra, u32 rs, bool rc) { @@ -3174,9 +3519,15 @@ private: void STVRXL(u32 vs, u32 ra, u32 rb) { const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } const u8 eb = addr & 0xf; - for (u32 i = 16 - eb; i < 16; ++i) vm::write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]); + for (u32 i = 16 - eb; i < 16; ++i) vm::write8((u32)addr + i - 16, CPU.VPR[vs]._u8[15 - i]); } void EXTSB(u32 ra, u32 rs, bool rc) { @@ -3185,7 +3536,14 @@ private: } void STFIWX(u32 frs, u32 ra, u32 rb) { - vm::write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32&)CPU.FPR[frs]); + const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32&)CPU.FPR[frs]); } void EXTSW(u32 ra, u32 rs, bool rc) { @@ -3205,146 +3563,321 @@ private: } void LWZ(u32 rd, u32 ra, s32 d) { - CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read32((u32)addr); } void LWZU(u32 rd, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - CPU.GPR[rd] = vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read32((u32)addr); CPU.GPR[ra] = addr; } void LBZ(u32 rd, u32 ra, s32 d) { - CPU.GPR[rd] = vm::read8(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read8((u32)addr); } void LBZU(u32 rd, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - CPU.GPR[rd] = vm::read8(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read8((u32)addr); CPU.GPR[ra] = addr; } void STW(u32 rs, u32 ra, s32 d) { - vm::write32(ra ? CPU.GPR[ra] + d : d, (u32)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32)CPU.GPR[rs]); } void STWU(u32 rs, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - vm::write32(addr, (u32)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, (u32)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void STB(u32 rs, u32 ra, s32 d) { - vm::write8(ra ? CPU.GPR[ra] + d : d, (u8)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write8((u32)addr, (u8)CPU.GPR[rs]); } void STBU(u32 rs, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - vm::write8(addr, (u8)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write8((u32)addr, (u8)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void LHZ(u32 rd, u32 ra, s32 d) { - CPU.GPR[rd] = vm::read16(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read16((u32)addr); } void LHZU(u32 rd, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - CPU.GPR[rd] = vm::read16(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read16((u32)addr); CPU.GPR[ra] = addr; } void LHA(u32 rd, u32 ra, s32 d) { - CPU.GPR[rd] = (s64)(s16)vm::read16(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s16)vm::read16((u32)addr); } void LHAU(u32 rd, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - CPU.GPR[rd] = (s64)(s16)vm::read16(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s16)vm::read16((u32)addr); CPU.GPR[ra] = addr; } void STH(u32 rs, u32 ra, s32 d) { - vm::write16(ra ? CPU.GPR[ra] + d : d, (u16)CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write16((u32)addr, (u16)CPU.GPR[rs]); } void STHU(u32 rs, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - vm::write16(addr, (u16)CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write16((u32)addr, (u16)CPU.GPR[rs]); CPU.GPR[ra] = addr; } void LMW(u32 rd, u32 ra, s32 d) { u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } for(u32 i=rd; i<32; ++i, addr += 4) { - CPU.GPR[i] = vm::read32(addr); + CPU.GPR[i] = vm::read32((u32)addr); } } void STMW(u32 rs, u32 ra, s32 d) { u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } for(u32 i=rs; i<32; ++i, addr += 4) { - vm::write32(addr, (u32)CPU.GPR[i]); + vm::write32((u32)addr, (u32)CPU.GPR[i]); } } void LFS(u32 frd, u32 ra, s32 d) { - const u32 v = vm::read32(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + const u32 v = vm::read32((u32)addr); CPU.FPR[frd] = (float&)v; } void LFSU(u32 frd, u32 ra, s32 ds) { const u64 addr = CPU.GPR[ra] + ds; - const u32 v = vm::read32(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + const u32 v = vm::read32((u32)addr); CPU.FPR[frd] = (float&)v; CPU.GPR[ra] = addr; } void LFD(u32 frd, u32 ra, s32 d) { - (u64&)CPU.FPR[frd] = vm::read64(ra ? CPU.GPR[ra] + d : d); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + (u64&)CPU.FPR[frd] = vm::read64((u32)addr); } void LFDU(u32 frd, u32 ra, s32 ds) { const u64 addr = CPU.GPR[ra] + ds; - (u64&)CPU.FPR[frd] = vm::read64(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + (u64&)CPU.FPR[frd] = vm::read64((u32)addr); CPU.GPR[ra] = addr; } void STFS(u32 frs, u32 ra, s32 d) { - vm::write32(ra ? CPU.GPR[ra] + d : d, CPU.FPR[frs].To32()); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, CPU.FPR[frs].To32()); } void STFSU(u32 frs, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - vm::write32(addr, CPU.FPR[frs].To32()); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write32((u32)addr, CPU.FPR[frs].To32()); CPU.GPR[ra] = addr; } void STFD(u32 frs, u32 ra, s32 d) { - vm::write64(ra ? CPU.GPR[ra] + d : d, (u64&)CPU.FPR[frs]); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, (u64&)CPU.FPR[frs]); } void STFDU(u32 frs, u32 ra, s32 d) { const u64 addr = CPU.GPR[ra] + d; - vm::write64(addr, (u64&)CPU.FPR[frs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, (u64&)CPU.FPR[frs]); CPU.GPR[ra] = addr; } void LD(u32 rd, u32 ra, s32 ds) { - CPU.GPR[rd] = vm::read64(ra ? CPU.GPR[ra] + ds : ds); + const u64 addr = ra ? CPU.GPR[ra] + ds : ds; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read64((u32)addr); } void LDU(u32 rd, u32 ra, s32 ds) { //if(ra == 0 || rt == ra) return; const u64 addr = CPU.GPR[ra] + ds; - CPU.GPR[rd] = vm::read64(addr); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = vm::read64((u32)addr); CPU.GPR[ra] = addr; } void LWA(u32 rd, u32 ra, s32 ds) { - CPU.GPR[rd] = (s64)(s32)vm::read32(ra ? CPU.GPR[ra] + ds : ds); + const u64 addr = ra ? CPU.GPR[ra] + ds : ds; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + CPU.GPR[rd] = (s64)(s32)vm::read32((u32)addr); } void FDIVS(u32 frd, u32 fra, u32 frb, bool rc) { @@ -3447,13 +3980,26 @@ private: } void STD(u32 rs, u32 ra, s32 d) { - vm::write64(ra ? CPU.GPR[ra] + d : d, CPU.GPR[rs]); + const u64 addr = ra ? CPU.GPR[ra] + d : d; + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, CPU.GPR[rs]); } void STDU(u32 rs, u32 ra, s32 ds) { //if(ra == 0 || rs == ra) return; const u64 addr = CPU.GPR[ra] + ds; - vm::write64(addr, CPU.GPR[rs]); + if ((u32)addr != addr) + { + LOG_ERROR(PPU, "%s(): invalid address (0x%llx)", __FUNCTION__, addr); + Emu.Pause(); + return; + } + vm::write64((u32)addr, CPU.GPR[rs]); CPU.GPR[ra] = addr; } void MTFSB1(u32 crbd, bool rc) diff --git a/rpcs3/Emu/Cell/SPUThread.cpp b/rpcs3/Emu/Cell/SPUThread.cpp index 5d069af957..bf8d55b984 100644 --- a/rpcs3/Emu/Cell/SPUThread.cpp +++ b/rpcs3/Emu/Cell/SPUThread.cpp @@ -241,13 +241,13 @@ void SPUThread::ProcessCmd(u32 cmd, u32 tag, u32 lsa, u64 ea, u32 size) { case MFC_PUT_CMD: { - vm::write32(ea, ReadLS32(lsa)); + vm::write32((u32)ea, ReadLS32(lsa)); return; } case MFC_GET_CMD: { - WriteLS32(lsa, vm::read32(ea)); + WriteLS32(lsa, vm::read32((u32)ea)); return; } @@ -264,13 +264,13 @@ void SPUThread::ProcessCmd(u32 cmd, u32 tag, u32 lsa, u64 ea, u32 size) { case MFC_PUT_CMD: { - memcpy(vm::get_ptr(ea), vm::get_ptr(ls_offset + lsa), size); + memcpy(vm::get_ptr((u32)ea), vm::get_ptr(ls_offset + lsa), size); return; } case MFC_GET_CMD: { - memcpy(vm::get_ptr(ls_offset + lsa), vm::get_ptr(ea), size); + memcpy(vm::get_ptr(ls_offset + lsa), vm::get_ptr((u32)ea), size); return; } @@ -402,6 +402,17 @@ void SPUThread::EnqMfcCmd(MFCReg& MFCArgs) op == MFC_PUTLLUC_CMD ? "PUTLLUC" : "PUTQLLUC"), lsa, ea, tag, size, cmd); + if ((u32)ea != ea) + { + LOG_ERROR(Log::SPU, "DMA %s: Invalid external address (0x%llx)", + (op == MFC_GETLLAR_CMD ? "GETLLAR" : + op == MFC_PUTLLC_CMD ? "PUTLLC" : + op == MFC_PUTLLUC_CMD ? "PUTLLUC" : "PUTQLLUC"), + ea); + Emu.Pause(); + return; + } + if (op == MFC_GETLLAR_CMD) // get reservation { if (R_ADDR) @@ -412,7 +423,7 @@ void SPUThread::EnqMfcCmd(MFCReg& MFCArgs) R_ADDR = ea; for (u32 i = 0; i < 16; i++) { - R_DATA[i] = vm::get_ptr(R_ADDR)[i]; + R_DATA[i] = vm::get_ptr((u32)R_ADDR)[i]; vm::get_ptr(ls_offset + lsa)[i] = R_DATA[i]; } MFCArgs.AtomicStat.PushUncond(MFC_GETLLAR_SUCCESS); @@ -432,7 +443,7 @@ void SPUThread::EnqMfcCmd(MFCReg& MFCArgs) { changed++; mask |= (0x3 << (i * 2)); - if (vm::get_ptr(R_ADDR)[i] != R_DATA[i]) + if (vm::get_ptr((u32)R_ADDR)[i] != R_DATA[i]) { m_events |= SPU_EVENT_LR; MFCArgs.AtomicStat.PushUncond(MFC_PUTLLC_FAILURE); @@ -446,7 +457,7 @@ void SPUThread::EnqMfcCmd(MFCReg& MFCArgs) { if (buf[i] != R_DATA[i]) { - if (InterlockedCompareExchange(&vm::get_ptr(ea)[i], buf[i], R_DATA[i]) != R_DATA[i]) + if (InterlockedCompareExchange(&vm::get_ptr((u32)R_ADDR)[i], buf[i], R_DATA[i]) != R_DATA[i]) { m_events |= SPU_EVENT_LR; MFCArgs.AtomicStat.PushUncond(MFC_PUTLLC_FAILURE); @@ -520,7 +531,7 @@ bool SPUThread::CheckEvents() { for (u32 i = 0; i < 16; i++) { - if (vm::get_ptr(R_ADDR)[i] != R_DATA[i]) + if (vm::get_ptr((u32)R_ADDR)[i] != R_DATA[i]) { m_events |= SPU_EVENT_LR; R_ADDR = 0; @@ -1165,4 +1176,4 @@ void SPUThread::StopAndSignal(u32 code) break; } } -} \ No newline at end of file +} diff --git a/rpcs3/Emu/RSX/GL/GLShaderParam.h b/rpcs3/Emu/RSX/GL/GLShaderParam.h index f39846da44..80fa5a3dec 100644 --- a/rpcs3/Emu/RSX/GL/GLShaderParam.h +++ b/rpcs3/Emu/RSX/GL/GLShaderParam.h @@ -90,9 +90,8 @@ struct GLParamArray case PARAM_IN: return "in "; case PARAM_UNIFORM: return "uniform "; case PARAM_CONST: return "const "; + default: return ""; } - - return ""; } bool HasParam(const GLParamFlag flag, std::string type, const std::string& name) diff --git a/rpcs3/Emu/SysCalls/Modules.cpp b/rpcs3/Emu/SysCalls/Modules.cpp index c3e8002554..7951808e2a 100644 --- a/rpcs3/Emu/SysCalls/Modules.cpp +++ b/rpcs3/Emu/SysCalls/Modules.cpp @@ -201,36 +201,38 @@ void fix_relocs(Module* module, u32 lib, u32 start, u32 end, u32 seg2) for (u32 i = lib + start; i < lib + end; i += 24) { - u64 addr = vm::read64(i); + u64 addr = vm::read64(i) + lib; const u64 flag = vm::read64(i + 8); - if (flag == 0x10100000001ull) + if ((u32)addr != addr || (u32)(addr + seg2) != (addr + seg2)) { - addr = addr + seg2 + lib; - u32 value = vm::read32(addr); + module->Error("fix_relocs(): invalid address (0x%llx)", addr); + } + else if (flag == 0x10100000001ull) + { + addr = addr + seg2; + u32 value = vm::read32((u32)addr); assert(value == vm::read64(i + 16) + seg2); - vm::write32(addr, value + lib); + vm::write32((u32)addr, value + lib); } else if (flag == 0x100000001ull) { - addr = addr + seg2 + lib; - u32 value = vm::read32(addr); + addr = addr + seg2; + u32 value = vm::read32((u32)addr); assert(value == vm::read64(i + 16)); - vm::write32(addr, value + lib); + vm::write32((u32)addr, value + lib); } else if (flag == 0x10000000001ull) { - addr = addr + lib; - u32 value = vm::read32(addr); + u32 value = vm::read32((u32)addr); assert(value == vm::read64(i + 16) + seg2); - vm::write32(addr, value + lib); + vm::write32((u32)addr, value + lib); } else if (flag == 1) { - addr = addr + lib; - u32 value = vm::read32(addr); + u32 value = vm::read32((u32)addr); assert(value == vm::read64(i + 16)); - vm::write32(addr, value + lib); + vm::write32((u32)addr, value + lib); } else if (flag == 0x10000000004ull || flag == 0x10000000006ull) { diff --git a/rpcs3/Emu/SysCalls/Modules/cellAvconfExt.cpp b/rpcs3/Emu/SysCalls/Modules/cellAvconfExt.cpp index a29056057a..cbb9506377 100644 --- a/rpcs3/Emu/SysCalls/Modules/cellAvconfExt.cpp +++ b/rpcs3/Emu/SysCalls/Modules/cellAvconfExt.cpp @@ -16,15 +16,15 @@ int cellVideoOutGetScreenSize(u32 videoOut, vm::ptr screenSize) { cellAvconfExt->Warning("cellVideoOutGetScreenSize(videoOut=%d, screenSize_addr=0x%x)", videoOut, screenSize.addr()); - if (!videoOut == CELL_VIDEO_OUT_PRIMARY) + if (videoOut != CELL_VIDEO_OUT_PRIMARY) return CELL_VIDEO_OUT_ERROR_UNSUPPORTED_VIDEO_OUT; #ifdef _WIN32 HDC screen = GetDC(NULL); - u32 diagonal = round(sqrt((pow(GetDeviceCaps(screen, HORZSIZE), 2) + pow(GetDeviceCaps(screen, VERTSIZE), 2))) * 0.0393); + float diagonal = roundf(sqrtf((powf(GetDeviceCaps(screen, HORZSIZE), 2) + powf(GetDeviceCaps(screen, VERTSIZE), 2))) * 0.0393); #else // TODO: Linux implementation, without using wx - // u32 diagonal = round(sqrt((pow(wxGetDisplaySizeMM().GetWidth(), 2) + pow(wxGetDisplaySizeMM().GetHeight(), 2))) * 0.0393); + // float diagonal = roundf(sqrtf((powf(wxGetDisplaySizeMM().GetWidth(), 2) + powf(wxGetDisplaySizeMM().GetHeight(), 2))) * 0.0393); #endif if (Ini.GS3DTV.GetValue()) diff --git a/rpcs3/Emu/SysCalls/Modules/cellPngDec.cpp b/rpcs3/Emu/SysCalls/Modules/cellPngDec.cpp index 9abe3d29c8..c0d3d84d97 100644 --- a/rpcs3/Emu/SysCalls/Modules/cellPngDec.cpp +++ b/rpcs3/Emu/SysCalls/Modules/cellPngDec.cpp @@ -75,13 +75,13 @@ s32 pngDecOpen( stream->fd = 0; stream->src = *src; - switch (src->srcSelect.ToBE()) + switch (src->srcSelect) { - case se32(CELL_PNGDEC_BUFFER): + case CELL_PNGDEC_BUFFER: stream->fileSize = src->streamSize.ToLE(); break; - case se32(CELL_PNGDEC_FILE): + case CELL_PNGDEC_FILE: // Get file descriptor vm::var> fd; int ret = cellFsOpen(vm::ptr::make(src->fileName.addr()), 0, fd, vm::ptr::make(0), 0); diff --git a/rpcs3/Emu/SysCalls/Modules/cellSync.cpp b/rpcs3/Emu/SysCalls/Modules/cellSync.cpp index 4617bdc8ac..32cb8b42b4 100644 --- a/rpcs3/Emu/SysCalls/Modules/cellSync.cpp +++ b/rpcs3/Emu/SysCalls/Modules/cellSync.cpp @@ -997,7 +997,7 @@ s32 cellSyncLFQueueInitialize(vm::ptr queue, vm::ptr buffer s32 syncLFQueueGetPushPointer(vm::ptr queue, s32& pointer, u32 isBlocking, u32 useEventQueue) { - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_PPU2SPU)) + if (queue->m_direction != CELL_SYNC_QUEUE_PPU2SPU) { return CELL_SYNC_ERROR_PERM; } @@ -1124,7 +1124,7 @@ s32 _cellSyncLFQueueGetPushPointer2(vm::ptr queue, vm::ptr s32 syncLFQueueCompletePushPointer(vm::ptr queue, s32 pointer, const std::function fpSendSignal) { - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_PPU2SPU)) + if (queue->m_direction != CELL_SYNC_QUEUE_PPU2SPU) { return CELL_SYNC_ERROR_PERM; } @@ -1305,7 +1305,7 @@ s32 _cellSyncLFQueuePushBody(vm::ptr queue, vm::ptr { s32 res; - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_ANY2ANY)) + if (queue->m_direction != CELL_SYNC_QUEUE_ANY2ANY) { #ifdef PRX_DEBUG_XXX res = cb_caller, u32, u32, u64>::call(GetCurrentPPUThread(), libsre + 0x24B0, libsre_rtoc, @@ -1351,7 +1351,7 @@ s32 _cellSyncLFQueuePushBody(vm::ptr queue, vm::ptr memcpy(vm::get_ptr((u64)(queue->m_buffer.addr() & ~1ull) + size * (position >= depth ? position - depth : position)), buffer.get_ptr(), size); s32 res; - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_ANY2ANY)) + if (queue->m_direction != CELL_SYNC_QUEUE_ANY2ANY) { #ifdef PRX_DEBUG_XXX res = cb_caller, s32, u64>::call(GetCurrentPPUThread(), libsre + 0x26C0, libsre_rtoc, @@ -1376,7 +1376,7 @@ s32 _cellSyncLFQueuePushBody(vm::ptr queue, vm::ptr s32 syncLFQueueGetPopPointer(vm::ptr queue, s32& pointer, u32 isBlocking, u32, u32 useEventQueue) { - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_SPU2PPU)) + if (queue->m_direction != CELL_SYNC_QUEUE_SPU2PPU) { return CELL_SYNC_ERROR_PERM; } @@ -1503,7 +1503,7 @@ s32 _cellSyncLFQueueGetPopPointer2(vm::ptr queue, vm::ptr s32 syncLFQueueCompletePopPointer(vm::ptr queue, s32 pointer, const std::function fpSendSignal, u32 noQueueFull) { - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_SPU2PPU)) + if (queue->m_direction != CELL_SYNC_QUEUE_SPU2PPU) { return CELL_SYNC_ERROR_PERM; } @@ -1681,7 +1681,7 @@ s32 _cellSyncLFQueuePopBody(vm::ptr queue, vm::ptr buffer while (true) { s32 res; - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_ANY2ANY)) + if (queue->m_direction != CELL_SYNC_QUEUE_ANY2ANY) { #ifdef PRX_DEBUG_XXX res = cb_caller, u32, u32, u64, u64>::call(GetCurrentPPUThread(), libsre + 0x2A90, libsre_rtoc, @@ -1724,7 +1724,7 @@ s32 _cellSyncLFQueuePopBody(vm::ptr queue, vm::ptr buffer memcpy(buffer.get_ptr(), vm::get_ptr((u64)(queue->m_buffer.addr() & ~1ull) + size * (position >= depth ? position - depth : position)), size); s32 res; - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_ANY2ANY)) + if (queue->m_direction != CELL_SYNC_QUEUE_ANY2ANY) { #ifdef PRX_DEBUG_XXX res = cb_caller, s32, u64, u64>::call(GetCurrentPPUThread(), libsre + 0x2CA8, libsre_rtoc, @@ -1767,7 +1767,7 @@ s32 cellSyncLFQueueClear(vm::ptr queue) const auto push = queue->push1.read_relaxed(); s32 var1, var2; - if (queue->m_direction.ToBE() != se32(CELL_SYNC_QUEUE_ANY2ANY)) + if (queue->m_direction != CELL_SYNC_QUEUE_ANY2ANY) { var1 = var2 = (u16)queue->pop2.read_relaxed().pack; } diff --git a/rpcs3/Emu/SysCalls/Modules/libmixer.cpp b/rpcs3/Emu/SysCalls/Modules/libmixer.cpp index fb55cca939..76fae67e3f 100644 --- a/rpcs3/Emu/SysCalls/Modules/libmixer.cpp +++ b/rpcs3/Emu/SysCalls/Modules/libmixer.cpp @@ -358,7 +358,7 @@ int cellSurMixerCreate(vm::ptr config) memset(mixdata, 0, sizeof(mixdata)); if (surMixerCb) { - surMixerCb.call(cb_thread, surMixerCbArg, mixcount, 256); + surMixerCb.call(cb_thread, surMixerCbArg, (u32)mixcount, 256); } //u64 stamp1 = get_system_time(); diff --git a/rpcs3/Emu/SysCalls/Modules/sysPrxForUser.cpp b/rpcs3/Emu/SysCalls/Modules/sysPrxForUser.cpp index 61430024f0..78c7054e82 100644 --- a/rpcs3/Emu/SysCalls/Modules/sysPrxForUser.cpp +++ b/rpcs3/Emu/SysCalls/Modules/sysPrxForUser.cpp @@ -157,7 +157,7 @@ int sys_get_random_number(vm::ptr addr, u64 size) if (size > 4096) size = 4096; - for (u64 i = 0; i < size - 1; i++) + for (u32 i = 0; i < (u32)size - 1; i++) { addr[i] = rand() % 256; } diff --git a/rpcs3/Emu/SysCalls/lv2/sys_memory.cpp b/rpcs3/Emu/SysCalls/lv2/sys_memory.cpp index 02b3ae4662..45526a143b 100644 --- a/rpcs3/Emu/SysCalls/lv2/sys_memory.cpp +++ b/rpcs3/Emu/SysCalls/lv2/sys_memory.cpp @@ -154,7 +154,6 @@ s32 sys_memory_container_get_size(vm::ptr mem_info, u32 cid) return CELL_ESRCH; // HACK: Return all memory. - sys_memory_info_t info; mem_info->total_user_memory = ct->size; mem_info->available_user_memory = ct->size; return CELL_OK; diff --git a/rpcs3/Emu/SysCalls/lv2/sys_mutex.cpp b/rpcs3/Emu/SysCalls/lv2/sys_mutex.cpp index 92eff86687..f22dd97d87 100644 --- a/rpcs3/Emu/SysCalls/lv2/sys_mutex.cpp +++ b/rpcs3/Emu/SysCalls/lv2/sys_mutex.cpp @@ -218,9 +218,8 @@ s32 sys_mutex_trylock(u32 mutex_id) switch (mutex->m_mutex.trylock(tid)) { case SMR_OK: mutex->recursive = 1; t.owned_mutexes++; return CELL_OK; + default: return CELL_EBUSY; } - - return CELL_EBUSY; } s32 sys_mutex_unlock(u32 mutex_id) diff --git a/rpcs3/Emu/System.cpp b/rpcs3/Emu/System.cpp index 07475922c0..ce48b9edc5 100644 --- a/rpcs3/Emu/System.cpp +++ b/rpcs3/Emu/System.cpp @@ -240,7 +240,7 @@ void Emulator::Load() try { - if(!(is_error = !l.Analyze()) && l.GetMachine() != MACHINE_Unknown) + if(!(is_error = !l.Analyze())) { switch(l.GetMachine()) { @@ -260,6 +260,9 @@ void Emulator::Load() case MACHINE_ARM: Memory.Init(Memory_PSV); break; + + default: + throw std::string("Unknown machine!"); } is_error = !l.Load();