From 6ecf2fb3d04b5903cc8c2f288eacb4d65ee82015 Mon Sep 17 00:00:00 2001 From: eladash Date: Fri, 30 Nov 2018 21:06:48 -0800 Subject: [PATCH] rsx: default lv2 semaphore context + dma_4097 extracted from vsh --- rpcs3/Emu/RSX/rsx_decode.h | 25 +++++++++++++++++++++++++ rpcs3/Emu/RSX/rsx_methods.cpp | 30 +++++++++++++++--------------- rpcs3/Emu/RSX/rsx_methods.h | 5 +++++ 3 files changed, 45 insertions(+), 15 deletions(-) diff --git a/rpcs3/Emu/RSX/rsx_decode.h b/rpcs3/Emu/RSX/rsx_decode.h index ed229f38c7..1d01d09878 100644 --- a/rpcs3/Emu/RSX/rsx_decode.h +++ b/rpcs3/Emu/RSX/rsx_decode.h @@ -2105,6 +2105,31 @@ struct registers_decoder } }; +template<> +struct registers_decoder +{ + struct decoded_type + { + private: + union + { + u32 raw_value; + } m_data; + public: + decoded_type(u32 raw_value) { m_data.raw_value = raw_value; } + + u32 context_dma() const + { + return m_data.raw_value; + } + }; + + static std::string dump(decoded_type &&decoded_values) + { + return "NV4097 semaphore: context = " + std::to_string(decoded_values.context_dma()); + } +}; + template<> struct registers_decoder { diff --git a/rpcs3/Emu/RSX/rsx_methods.cpp b/rpcs3/Emu/RSX/rsx_methods.cpp index b658df77d8..39b6fc7b1a 100644 --- a/rpcs3/Emu/RSX/rsx_methods.cpp +++ b/rpcs3/Emu/RSX/rsx_methods.cpp @@ -172,38 +172,35 @@ namespace rsx void texture_read_semaphore_release(thread* rsx, u32 _reg, u32 arg) { // Pipeline barrier seems to be equivalent to a SHADER_READ stage barrier - - const u32 index = method_registers.semaphore_offset_4097() >> 4; // lle-gcm likes to inject system reserved semaphores, presumably for system/vsh usage // Avoid calling render to avoid any havoc(flickering) they may cause from invalid flush/write - - if (index > 63 && !rsx->do_method(NV4097_TEXTURE_READ_SEMAPHORE_RELEASE, arg)) + const u32 offset = method_registers.semaphore_offset_4097() & -16u; + if (offset > 63 * 4 && !rsx->do_method(NV4097_TEXTURE_READ_SEMAPHORE_RELEASE, arg)) { // } - auto& sema = vm::_ref(rsx->label_addr); - sema.semaphore[index].val = arg; - sema.semaphore[index].pad = 0; - sema.semaphore[index].timestamp = rsx->timestamp(); + auto& sema = vm::_ref(get_address(offset, method_registers.semaphore_context_dma_4097())); + sema.val = arg; + sema.pad = 0; + sema.timestamp = rsx->timestamp(); } void back_end_write_semaphore_release(thread* rsx, u32 _reg, u32 arg) { // Full pipeline barrier - - const u32 index = method_registers.semaphore_offset_4097() >> 4; - if (index > 63 && !rsx->do_method(NV4097_BACK_END_WRITE_SEMAPHORE_RELEASE, arg)) + const u32 offset = method_registers.semaphore_offset_4097() & -16u; + if (offset > 63 * 4 && !rsx->do_method(NV4097_BACK_END_WRITE_SEMAPHORE_RELEASE, arg)) { // } rsx->sync(); u32 val = (arg & 0xff00ff00) | ((arg & 0xff) << 16) | ((arg >> 16) & 0xff); - auto& sema = vm::_ref(rsx->label_addr); - sema.semaphore[index].val = val; - sema.semaphore[index].pad = 0; - sema.semaphore[index].timestamp = rsx->timestamp(); + auto& sema = vm::_ref(get_address(offset, method_registers.semaphore_context_dma_4097())); + sema.val = val; + sema.pad = 0; + sema.timestamp = rsx->timestamp(); } /** @@ -1262,6 +1259,9 @@ namespace rsx registers[NV4097_SET_VERTEX_TEXTURE_FORMAT + (i * 8)] = (1 << 16 /* mipmap */) | ((CELL_GCM_TEXTURE_X32_FLOAT | CELL_GCM_TEXTURE_LN | CELL_GCM_TEXTURE_NR) << 8) | (2 << 4 /* 2D */) | CELL_GCM_LOCATION_LOCAL + 1; } + registers[NV406E_SET_CONTEXT_DMA_SEMAPHORE] = CELL_GCM_CONTEXT_DMA_SEMAPHORE_R; + registers[NV4097_SET_CONTEXT_DMA_SEMAPHORE] = CELL_GCM_CONTEXT_DMA_SEMAPHORE_RW; + if (get_current_renderer()->isHLE) { // Commands injected by cellGcmInit diff --git a/rpcs3/Emu/RSX/rsx_methods.h b/rpcs3/Emu/RSX/rsx_methods.h index 6b4f3f8a6d..f36ab54337 100644 --- a/rpcs3/Emu/RSX/rsx_methods.h +++ b/rpcs3/Emu/RSX/rsx_methods.h @@ -1310,6 +1310,11 @@ namespace rsx return decode().semaphore_offset(); } + u32 semaphore_context_dma_4097() const + { + return decode().context_dma(); + } + u32 semaphore_offset_4097() const { return decode().semaphore_offset();