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cellSpursAttributeEnableSystemWorkload
This commit is contained in:
Nekotekina
parent
29c2e84fa1
commit
76418fe1b4
2 changed files with 104 additions and 40 deletions
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@ -3,6 +3,7 @@
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#include "Emu/SysCalls/Modules.h"
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#include "Emu/SysCalls/Callback.h"
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#include "Emu/SysCalls/lv2/sys_spu.h"
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#include "Emu/Cell/SPURSManager.h"
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#include "cellSpurs.h"
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@ -20,18 +21,18 @@ s64 spursInit(
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s32 nSpus,
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s32 spuPriority,
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s32 ppuPriority,
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u32 flags,
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u32 flags, // SpursAttrFlags
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const char prefix[],
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u32 prefixSize,
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u32 container,
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u32 arg11,
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u32 arg12,
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u32 arg13)
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const u8 swlPriority[],
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u32 swlMaxSpu,
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u32 swlIsPreem)
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{
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// internal function
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#ifdef PRX_DEBUG
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return cb_caller<s32,vm::ptr<CellSpurs2>, u32, u32, s32, s32, s32, u32, u32, u32, u32, u32, u32, u32>::call(GetCurrentPPUThread(), libsre + 0x74E4, libsre_rtoc,
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spurs, revision, sdkVersion, nSpus, spuPriority, ppuPriority, flags, Memory.RealToVirtualAddr(prefix), prefixSize, container, arg11, arg12, arg13);
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spurs, revision, sdkVersion, nSpus, spuPriority, ppuPriority, flags, Memory.RealToVirtualAddr(prefix), prefixSize, container, Memory.RealToVirtualAddr(swlPriority), swlMaxSpu, swlIsPreem);
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#else
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//spurs->spurs = new SPURSManager(attr);
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return CELL_OK;
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@ -53,11 +54,11 @@ s64 cellSpursInitialize(vm::ptr<CellSpurs> spurs, s32 nSpus, s32 spuPriority, s3
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nSpus,
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spuPriority,
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ppuPriority,
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exitIfNoWork ? 1 : 0,
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exitIfNoWork ? SAF_EXIT_IF_NO_WORK : SAF_NONE,
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nullptr,
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0,
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0,
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0,
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nullptr,
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0,
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0);
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#endif
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@ -90,13 +91,13 @@ s64 cellSpursInitializeWithAttribute(vm::ptr<CellSpurs> spurs, vm::ptr<const Cel
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attr->m.nSpus,
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attr->m.spuPriority,
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attr->m.ppuPriority,
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(u32)attr->m.flags | (attr->m.exitIfNoWork ? 1 : 0),
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attr->m.flags.ToLE() | (attr->m.exitIfNoWork ? SAF_EXIT_IF_NO_WORK : 0),
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attr->m.prefix,
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attr->m.prefixSize,
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attr->m.container,
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attr.addr() + 0x38,
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attr->_u32[16],
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attr->_u32[17]);
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attr->m.swlPriority,
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attr->m.swlMaxSpu,
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attr->m.swlIsPreem);
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#endif
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}
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@ -127,13 +128,13 @@ s64 cellSpursInitializeWithAttribute2(vm::ptr<CellSpurs2> spurs, vm::ptr<const C
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attr->m.nSpus,
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attr->m.spuPriority,
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attr->m.ppuPriority,
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(u32)attr->m.flags | (attr->m.exitIfNoWork ? 1 : 0) | 4,
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attr->m.flags.ToLE() | (attr->m.exitIfNoWork ? SAF_EXIT_IF_NO_WORK : 0) | 4, // +add unknown flag
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attr->m.prefix,
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attr->m.prefixSize,
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attr->m.container,
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attr.addr() + 0x38,
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attr->_u32[16],
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attr->_u32[17]);
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attr->m.swlPriority,
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attr->m.swlMaxSpu,
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attr->m.swlIsPreem);
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#endif
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}
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@ -180,13 +181,14 @@ s64 cellSpursAttributeSetMemoryContainerForSpuThread(vm::ptr<CellSpursAttribute>
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{
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return CELL_SPURS_CORE_ERROR_ALIGN;
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}
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if ((u32)attr->m.flags & 0x20000000) // check unknown flag
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if (attr->m.flags.ToLE() & SAF_SPU_TGT_EXCLUSIVE_NON_CONTEXT)
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{
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return CELL_SPURS_CORE_ERROR_STAT;
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}
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attr->_u32[11] = container;
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attr->m.flags |= 0x40000000; // set unknown flag
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attr->m.container = container;
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attr->m.flags |= SAF_SPU_MEMORY_CONTAINER_SET;
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return CELL_OK;
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#endif
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}
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@ -220,11 +222,21 @@ s64 cellSpursAttributeSetNamePrefix(vm::ptr<CellSpursAttribute> attr, vm::ptr<co
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s64 cellSpursAttributeEnableSpuPrintfIfAvailable(vm::ptr<CellSpursAttribute> attr)
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{
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#ifdef PRX_DEBUG
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cellSpurs->Warning("cellSpursAttributeEnableSpuPrintfIfAvailable(attr_addr=0x%x)", attr.addr());
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#ifdef PRX_DEBUG_XXX
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return GetCurrentPPUThread().FastCall2(libsre + 0x7150, libsre_rtoc);
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#else
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UNIMPLEMENTED_FUNC(cellSpurs);
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if (!attr)
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{
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return CELL_SPURS_CORE_ERROR_NULL_POINTER;
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}
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if (attr.addr() % 8)
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{
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return CELL_SPURS_CORE_ERROR_ALIGN;
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}
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attr->m.flags |= SAF_SPU_PRINTF_ENABLED;
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return CELL_OK;
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#endif
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}
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@ -245,45 +257,82 @@ s64 cellSpursAttributeSetSpuThreadGroupType(vm::ptr<CellSpursAttribute> attr, s3
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return CELL_SPURS_CORE_ERROR_ALIGN;
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}
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if (type == 0x18)
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if (type == SYS_SPU_THREAD_GROUP_TYPE_EXCLUSIVE_NON_CONTEXT)
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{
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if (attr->m.flags & 0x40000000) // check unknown flag
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if (attr->m.flags.ToLE() & SAF_SPU_MEMORY_CONTAINER_SET)
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{
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return CELL_SPURS_CORE_ERROR_STAT;
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}
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attr->m.flags |= 0x20000000; // set unknown flag
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return CELL_OK;
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attr->m.flags |= SAF_SPU_TGT_EXCLUSIVE_NON_CONTEXT; // set
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}
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else if (type)
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else if (type == SYS_SPU_THREAD_GROUP_TYPE_NORMAL)
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{
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attr->m.flags &= ~SAF_SPU_TGT_EXCLUSIVE_NON_CONTEXT; // clear
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}
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else
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{
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return CELL_SPURS_CORE_ERROR_INVAL;
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}
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else // if type == 0
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{
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attr->m.flags &= ~0x20000000; // clear unknown flag
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return CELL_OK;
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}
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return CELL_OK;
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#endif
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}
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s64 cellSpursAttributeEnableSystemWorkload(vm::ptr<CellSpursAttribute> attr, vm::ptr<const u8> priority, u32 maxSpu, vm::ptr<const bool> isPreemptible)
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s64 cellSpursAttributeEnableSystemWorkload(vm::ptr<CellSpursAttribute> attr, vm::ptr<const u8[8]> priority, u32 maxSpu, vm::ptr<const bool[8]> isPreemptible)
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{
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cellSpurs->Warning("cellSpursAttributeEnableSystemWorkload(attr_addr=0x%x, priority_addr=0x%x, maxSpu=%d, isPreemptible_addr=0x%x)",
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attr.addr(), priority.addr(), maxSpu, isPreemptible.addr());
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#ifdef PRX_DEBUG
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#ifdef PRX_DEBUG_XXX
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return GetCurrentPPUThread().FastCall2(libsre + 0xF410, libsre_rtoc);
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#else
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for (s32 i = 0; i < CELL_SPURS_MAX_SPU; i++)
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if (!attr)
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{
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if (priority[i] != 1 || maxSpu == 0)
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return CELL_SPURS_CORE_ERROR_NULL_POINTER;
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}
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if (attr.addr() % 8)
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{
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return CELL_SPURS_CORE_ERROR_ALIGN;
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}
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const u32 nSpus = attr->m.nSpus;
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if (!nSpus)
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{
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return CELL_SPURS_CORE_ERROR_INVAL;
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}
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for (u32 i = 0; i < nSpus; i++)
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{
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if ((*priority)[i] == 1)
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{
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cellSpurs->Error("cellSpursAttributeEnableSystemWorkload : CELL_SPURS_CORE_ERROR_INVAL");
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return CELL_SPURS_CORE_ERROR_INVAL;
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if (!maxSpu)
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{
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return CELL_SPURS_CORE_ERROR_INVAL;
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}
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if (nSpus == 1 || attr->m.exitIfNoWork)
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{
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return CELL_SPURS_CORE_ERROR_PERM;
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}
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if (attr->m.flags.ToLE() & SAF_SYSTEM_WORKLOAD_ENABLED)
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{
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return CELL_SPURS_CORE_ERROR_BUSY;
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}
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attr->m.flags |= SAF_SYSTEM_WORKLOAD_ENABLED; // set flag
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*(u64*)attr->m.swlPriority = *(u64*)*priority; // copy system workload priorities
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u32 isPreem = 0; // generate mask from isPreemptible values
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for (u32 j = 0; j < nSpus; j++)
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{
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if ((*isPreemptible)[j])
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{
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isPreem |= (1 << j);
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}
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}
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attr->m.swlMaxSpu = maxSpu; // write max spu for system workload
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attr->m.swlIsPreem = isPreem; // write isPreemptible mask
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return CELL_OK;
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}
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}
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return CELL_OK;
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return CELL_SPURS_CORE_ERROR_INVAL;
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#endif
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}
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@ -91,6 +91,17 @@ struct CellSpurs2
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SPURSManager *spurs;
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};
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enum SpursAttrFlags : u32
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{
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SAF_NONE = 0x0,
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SAF_EXIT_IF_NO_WORK = 0x1,
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SAF_SYSTEM_WORKLOAD_ENABLED = 0x02000000,
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SAF_SPU_PRINTF_ENABLED = 0x10000000,
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SAF_SPU_TGT_EXCLUSIVE_NON_CONTEXT = 0x20000000,
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SAF_SPU_MEMORY_CONTAINER_SET = 0x40000000,
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};
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struct CellSpursAttribute
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{
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static const auto align = 8;
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@ -113,9 +124,13 @@ struct CellSpursAttribute
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bool exitIfNoWork; // 0x14
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char prefix[15]; // 0x15 (not a NTS)
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be_t<u32> prefixSize; // 0x24
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be_t<u32> flags; // 0x28
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be_t<u32> flags; // 0x28 (SpursAttrFlags)
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be_t<u32> container; // 0x2C
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// ...
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be_t<u32> unk0; // 0x30
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be_t<u32> unk1; // 0x34
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u8 swlPriority[8]; // 0x38
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be_t<u32> swlMaxSpu; // 0x40
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be_t<u32> swlIsPreem; // 0x44
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} m;
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// alternative implementation
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