diff --git a/rpcs3/Emu/RSX/rsx_decode.h b/rpcs3/Emu/RSX/rsx_decode.h
index b68899ac40..c8b1681d40 100644
--- a/rpcs3/Emu/RSX/rsx_decode.h
+++ b/rpcs3/Emu/RSX/rsx_decode.h
@@ -3930,6 +3930,31 @@ struct registers_decoder<NV4097_SET_CONTEXT_DMA_REPORT>
 	}
 };
 
+template<>
+struct registers_decoder<NV4097_SET_CONTEXT_DMA_NOTIFIES>
+{
+	struct decoded_type
+	{
+	private:
+		union
+		{
+			u32 raw_value;
+		} m_data;
+	public:
+		decoded_type(u32 raw_value) { m_data.raw_value = raw_value; }
+
+		u32 context_dma_notify() const
+		{
+			return m_data.raw_value;
+		}
+	};
+
+	static std::string dump(decoded_type &&decoded_values)
+	{
+		return fmt::format("NOTIFY: context DMA = 0x%x, index=%d", decoded_values.context_dma_notify(), (decoded_values.context_dma_notify() & 7) ^ 7);
+	}
+};
+
 template<>
 struct registers_decoder<NV3089_IMAGE_IN_FORMAT>
 {
diff --git a/rpcs3/Emu/RSX/rsx_methods.cpp b/rpcs3/Emu/RSX/rsx_methods.cpp
index b40b601ddf..14c84d0831 100644
--- a/rpcs3/Emu/RSX/rsx_methods.cpp
+++ b/rpcs3/Emu/RSX/rsx_methods.cpp
@@ -169,6 +169,22 @@ namespace rsx
 			method_registers.registers[reg] = method_registers.register_previous_value;
 		}
 
+		void set_notify(thread* rsx, u32 _reg, u32 arg)
+		{
+			const u32 location = method_registers.context_dma_notify();
+			const u32 index = (location & 0x7) ^ 0x7;
+
+			if ((location & ~7) != (CELL_GCM_CONTEXT_DMA_NOTIFY_MAIN_0 & ~7))
+			{
+				// TODO: Gcm sets the default to CELL_GCM_CONTEXT_DMA_TO_MEMORY_GET_NOTIFY0
+				fmt::throw_exception("NV4097_NOTIFY: Unimplemented/invalid context = 0x%x" HERE, method_registers.context_dma_notify());
+			}
+
+			auto& notify = vm::_ref<RsxNotify>(verify(HERE, RSXIOMem.RealAddr(0xf100000 + (index * 0x40))));
+			notify.zero = 0;
+			notify.timestamp = rsx->timestamp();
+		}
+
 		void texture_read_semaphore_release(thread* rsx, u32 _reg, u32 arg)
 		{
 			// Pipeline barrier seems to be equivalent to a SHADER_READ stage barrier
@@ -2723,6 +2739,7 @@ namespace rsx
 		bind<NV4097_SET_CONTEXT_DMA_COLOR_C, nv4097::set_surface_dirty_bit>();
 		bind<NV4097_SET_CONTEXT_DMA_COLOR_D, nv4097::set_surface_dirty_bit>();
 		bind<NV4097_SET_CONTEXT_DMA_ZETA, nv4097::set_surface_dirty_bit>();
+		bind<NV4097_NOTIFY, nv4097::set_notify>();
 		bind<NV4097_SET_SURFACE_FORMAT, nv4097::set_surface_format>();
 		bind<NV4097_SET_SURFACE_PITCH_A, nv4097::set_surface_dirty_bit>();
 		bind<NV4097_SET_SURFACE_PITCH_B, nv4097::set_surface_dirty_bit>();
diff --git a/rpcs3/Emu/RSX/rsx_methods.h b/rpcs3/Emu/RSX/rsx_methods.h
index 2bf92931ac..5139280015 100644
--- a/rpcs3/Emu/RSX/rsx_methods.h
+++ b/rpcs3/Emu/RSX/rsx_methods.h
@@ -1325,6 +1325,11 @@ namespace rsx
 			return decode<NV4097_SET_CONTEXT_DMA_REPORT>().context_dma_report();
 		}
 
+		u32 context_dma_notify() const
+		{
+			return decode<NV4097_SET_CONTEXT_DMA_NOTIFIES>().context_dma_notify();
+		}
+
 		blit_engine::transfer_operation blit_engine_operation() const
 		{
 			return decode<NV3089_SET_OPERATION>().transfer_op();