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Separate segment and function addresses in PPU LLVM
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Vestral
parent
d1b047b5f1
commit
9d2acf3b1c
4 changed files with 54 additions and 37 deletions
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@ -225,13 +225,13 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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c.mov(x86::rbp, args[0]);
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c.mov(x86::edx, x86::dword_ptr(x86::rbp, ::offset32(&ppu_thread::cia))); // Load PC
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c.mov(x86::rax, x86::qword_ptr(x86::r13, x86::edx, 1, 0)); // Load call target
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c.mov(x86::rdx, x86::rax);
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c.shl(x86::rax, 16);
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c.shr(x86::rax, 16);
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c.shr(x86::rdx, 48);
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c.mov(x86::rax, x86::qword_ptr(x86::r13, x86::rdx, 1, 0)); // Load call target
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c.movabs(x86::r12, vm::g_exec_addr_seg_offset);
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c.add(x86::r12, x86::r13);
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c.shr(x86::edx, 1);
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c.mov(x86::edx, x86::word_ptr(x86::r12, x86::edx)); // Load relocation base
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c.shl(x86::edx, 13);
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c.mov(x86::r12d, x86::edx); // Load relocation base
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c.mov(x86::r12d, x86::edx); // Set relocation base
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c.movabs(x86::rbx, reinterpret_cast<u64>(&vm::g_base_addr));
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c.mov(x86::rbx, x86::qword_ptr(x86::rbx));
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@ -348,14 +348,11 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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c.ldr(call_target, arm::Mem(a64::x19, pc));
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// Compute REG_Hp
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const arm::GpX reg_hp = a64::x21;
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c.mov(reg_hp, call_target);
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c.lsr(reg_hp, reg_hp, 48);
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c.mov(reg_hp, Imm(vm::g_exec_addr_seg_offset));
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c.add(reg_hp, reg_hp, pc, arm::Shift(arm::ShiftOp::kLSR, 2));
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c.ldrh(reg_hp.w(), arm::Mem(a64::x19, reg_hp));
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c.lsl(reg_hp.w(), reg_hp.w(), 13);
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// Zero top 16 bits of call target
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c.lsl(call_target, call_target, Imm(16));
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c.lsr(call_target, call_target, Imm(16));
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// Load registers
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c.mov(a64::x22, Imm(reinterpret_cast<u64>(&vm::g_base_addr)));
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c.ldr(a64::x22, arm::Mem(a64::x22));
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@ -475,6 +472,11 @@ static inline u8* ppu_ptr(u32 addr)
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return vm::g_exec_addr + u64{addr} * 2;
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}
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static inline u8* ppu_seg_ptr(u32 addr)
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{
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return vm::g_exec_addr + vm::g_exec_addr_seg_offset + (addr >> 1);
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}
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static inline ppu_intrp_func_t ppu_read(u32 addr)
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{
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return read_from_ptr<ppu_intrp_func_t>(ppu_ptr(addr));
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@ -520,7 +522,7 @@ void ppu_recompiler_fallback(ppu_thread& ppu)
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while (true)
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{
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if (uptr func = uptr(ppu_read(ppu.cia)); (func << 16 >> 16) != reinterpret_cast<uptr>(ppu_recompiler_fallback_ghc))
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if (uptr func = uptr(ppu_read(ppu.cia)); func != reinterpret_cast<uptr>(ppu_recompiler_fallback_ghc))
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{
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// We found a recompiler function at cia, return
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break;
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@ -775,6 +777,9 @@ extern void ppu_register_range(u32 addr, u32 size)
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utils::memory_commit(ppu_ptr(addr), u64{size} * 2, utils::protection::rw);
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ensure(vm::page_protect(addr, size, 0, vm::page_executable));
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// Segment data
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utils::memory_commit(ppu_seg_ptr(addr), size >> 1, utils::protection::rw);
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if (g_cfg.core.ppu_debug)
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{
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utils::memory_commit(vm::g_stat_addr + addr, size);
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@ -787,12 +792,13 @@ extern void ppu_register_range(u32 addr, u32 size)
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if (g_cfg.core.ppu_decoder == ppu_decoder_type::llvm)
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{
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// Assume addr is the start of first segment of PRX
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const uptr entry_value = reinterpret_cast<uptr>(ppu_recompiler_fallback_ghc) | (seg_base << (32 + 3));
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write_to_ptr<uptr>(ppu_ptr(addr), entry_value);
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write_to_ptr<uptr>(ppu_ptr(addr), std::bit_cast<uptr>(ppu_recompiler_fallback_ghc));
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write_to_ptr<u16>(ppu_seg_ptr(addr), static_cast<u16>(seg_base >> 13));
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}
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else
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{
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write_to_ptr<ppu_intrp_func_t>(ppu_ptr(addr), ppu_fallback);
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write_to_ptr<u16>(ppu_seg_ptr(addr), 0);
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}
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addr += 4;
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@ -807,7 +813,7 @@ extern void ppu_register_function_at(u32 addr, u32 size, ppu_intrp_func_t ptr =
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// Initialize specific function
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if (ptr)
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{
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write_to_ptr<uptr>(ppu_ptr(addr), (reinterpret_cast<uptr>(ptr) & 0xffff'ffff'ffffu) | (uptr(ppu_read(addr)) & ~0xffff'ffff'ffffu));
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write_to_ptr<uptr>(ppu_ptr(addr), std::bit_cast<uptr>(ptr));
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return;
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}
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@ -5087,14 +5093,14 @@ bool ppu_initialize(const ppu_module<lv2_obj>& info, bool check_only, u64 file_s
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c.mov(x86::rax, x86::qword_ptr(x86::rax));
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c.mov(x86::dword_ptr(x86::rbp, ::offset32(&ppu_thread::cia)), x86::edx);
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c.mov(x86::rax, x86::qword_ptr(x86::rax, x86::rdx, 1, 0)); // Load call target
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c.mov(x86::rdx, x86::rax);
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c.shl(x86::rax, 16);
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c.shr(x86::rax, 16);
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c.shr(x86::rdx, 48);
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c.mov(x86::rcx, x86::qword_ptr(x86::rax, x86::rdx, 1, 0)); // Load call target
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c.movabs(x86::r12, vm::g_exec_addr_seg_offset);
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c.add(x86::rax, x86::r12);
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c.shr(x86::edx, 1);
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c.mov(x86::edx, x86::word_ptr(x86::rax, x86::edx)); // Load relocation base
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c.shl(x86::edx, 13);
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c.mov(x86::r12d, x86::edx); // Load relocation base
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c.jmp(x86::rax);
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c.mov(x86::r12d, x86::edx); // Set relocation base
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c.jmp(x86::rcx);
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#else
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// Load REG_Base - use absolute jump target to bypass rel jmp range limits
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// X19 contains vm::g_exec_addr
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@ -5130,14 +5136,11 @@ bool ppu_initialize(const ppu_module<lv2_obj>& info, bool check_only, u64 file_s
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// Compute REG_Hp
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const arm::GpX reg_hp = a64::x21;
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c.mov(reg_hp, call_target);
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c.lsr(reg_hp, reg_hp, 48);
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c.mov(reg_hp, Imm(vm::g_exec_addr_seg_offset));
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c.add(reg_hp, reg_hp, pc, arm::Shift(arm::ShiftOp::kLSR, 2));
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c.ldrh(reg_hp.w(), arm::Mem(exec_addr, reg_hp));
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c.lsl(reg_hp.w(), reg_hp.w(), 13);
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// Zero top 16 bits of call target
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c.lsl(call_target, call_target, 16);
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c.lsr(call_target, call_target, 16);
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// Execute LLE call
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c.br(call_target);
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#endif
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@ -5405,7 +5408,7 @@ bool ppu_initialize(const ppu_module<lv2_obj>& info, bool check_only, u64 file_s
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settings += ppu_settings::contains_symbol_resolver; // Avoid invalidating all modules for this purpose
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// Write version, hash, CPU, settings
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fmt::append(obj_name, "v6-kusa-%s-%s-%s.obj", fmt::base57(output, 16), fmt::base57(settings), jit_compiler::cpu(g_cfg.core.llvm_cpu));
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fmt::append(obj_name, "v7-kusa-%s-%s-%s.obj", fmt::base57(output, 16), fmt::base57(settings), jit_compiler::cpu(g_cfg.core.llvm_cpu));
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}
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if (cpu ? cpu->state.all_of(cpu_flag::exit) : Emu.IsStopped())
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@ -5717,7 +5720,7 @@ bool ppu_initialize(const ppu_module<lv2_obj>& info, bool check_only, u64 file_s
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for (u32 addr = info.segs[0].addr; addr < info.segs[0].addr + info.segs[0].size; addr += 4, inst_ptr++)
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{
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if (*inst_ptr == ppu_instructions::BLR() && (reinterpret_cast<uptr>(ppu_read(addr)) << 16 >> 16) == reinterpret_cast<uptr>(ppu_recompiler_fallback_ghc))
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if (*inst_ptr == ppu_instructions::BLR() && reinterpret_cast<uptr>(ppu_read(addr)) == reinterpret_cast<uptr>(ppu_recompiler_fallback_ghc))
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{
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write_to_ptr<ppu_intrp_func_t>(ppu_ptr(addr), BLR_func);
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}
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@ -411,12 +411,19 @@ Function* PPUTranslator::GetSymbolResolver(const ppu_module<lv2_obj>& info)
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const auto faddr = m_ir->CreateLoad(ptr_inst->getResultElementType(), ptr_inst);
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const auto faddr_int = m_ir->CreatePtrToInt(faddr, get_type<uptr>());
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const auto fval = m_ir->CreateOr(m_ir->CreateShl(m_seg0, 32 + 3), faddr_int);
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const auto pos = m_ir->CreateShl(m_reloc ? m_ir->CreateAdd(func_pc, m_seg0) : func_pc, 1);
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const auto pos_32 = m_reloc ? m_ir->CreateAdd(func_pc, m_seg0) : func_pc;
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const auto pos = m_ir->CreateShl(pos_32, 1);
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const auto ptr = dyn_cast<GetElementPtrInst>(m_ir->CreateGEP(get_type<u8>(), m_exec, pos));
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const auto seg_base_ptr = m_ir->CreateIntToPtr(m_ir->CreateAdd(
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m_ir->CreatePtrToInt(m_exec, get_type<u64>()), m_ir->getInt64(vm::g_exec_addr_seg_offset)), m_exec->getType());
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const auto seg_pos = m_ir->CreateLShr(pos_32, 1);
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const auto seg_ptr = dyn_cast<GetElementPtrInst>(m_ir->CreateGEP(get_type<u8>(), seg_base_ptr, seg_pos));
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const auto seg_val = m_ir->CreateTrunc(m_ir->CreateLShr(m_seg0, 13), get_type<u16>());
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// Store to jumptable
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m_ir->CreateStore(fval, ptr);
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m_ir->CreateStore(faddr_int, ptr);
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m_ir->CreateStore(seg_val, seg_ptr);
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// Increment index and branch back to loop
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const auto post_add = m_ir->CreateAdd(index_value, m_ir->getInt64(1));
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@ -605,10 +612,15 @@ void PPUTranslator::CallFunction(u64 target, Value* indirect)
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const auto pos = m_ir->CreateShl(indirect, 1);
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const auto ptr = dyn_cast<GetElementPtrInst>(m_ir->CreateGEP(get_type<u8>(), m_exec, pos));
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const auto val = m_ir->CreateLoad(get_type<u64>(), ptr);
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callee = FunctionCallee(type, m_ir->CreateIntToPtr(m_ir->CreateAnd(val, 0xffff'ffff'ffff), type->getPointerTo()));
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callee = FunctionCallee(type, m_ir->CreateIntToPtr(val, type->getPointerTo()));
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// Load new segment address
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seg0 = m_ir->CreateShl(m_ir->CreateLShr(val, 48), 13);
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const auto seg_base_ptr = m_ir->CreateIntToPtr(m_ir->CreateAdd(
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m_ir->CreatePtrToInt(m_exec, get_type<u64>()), m_ir->getInt64(vm::g_exec_addr_seg_offset)), m_exec->getType());
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const auto seg_pos = m_ir->CreateLShr(indirect, 1);
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const auto seg_ptr = dyn_cast<GetElementPtrInst>(m_ir->CreateGEP(get_type<u8>(), seg_base_ptr, seg_pos));
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const auto seg_val = m_ir->CreateZExt(m_ir->CreateLoad(get_type<u16>(), seg_ptr), get_type<u64>());
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seg0 = m_ir->CreateShl(seg_val, 13);
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}
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m_ir->SetInsertPoint(block);
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@ -47,7 +47,7 @@ namespace vm
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u8* const g_sudo_addr = g_base_addr + 0x1'0000'0000;
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// Auxiliary virtual memory for executable areas
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u8* const g_exec_addr = memory_reserve_4GiB(g_sudo_addr, 0x200000000);
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u8* const g_exec_addr = memory_reserve_4GiB(g_sudo_addr, 0x300000000);
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// Hooks for memory R/W interception (default: zero offset to some function with only ret instructions)
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u8* const g_hook_addr = memory_reserve_4GiB(g_exec_addr, 0x800000000);
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@ -34,6 +34,8 @@ namespace vm
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extern u8* const g_free_addr;
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extern u8 g_reservations[65536 / 128 * 64];
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static constexpr u64 g_exec_addr_seg_offset = 0x2'0000'0000ULL;
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struct writer_lock;
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enum memory_location_t : uint
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