diff --git a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp index 3eb75082a2..156de25f76 100644 --- a/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp +++ b/rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp @@ -2607,8 +2607,8 @@ void spu_recompiler::BI(spu_opcode_t op) else if (op.d && found->second.size() == 1 && found->second[0] == spu_branch_target(m_pos, 1)) { // Interrupts-disable pattern - c->mov(SPU_OFF_8(interrupts_enabled), 0); - return; + // c->mov(SPU_OFF_8(interrupts_enabled), 0); + // return; } c->mov(*addr, SPU_OFF_32(gpr, op.ra, &v128::_u32, 3)); diff --git a/rpcs3/Emu/Cell/SPUCommonRecompiler.cpp b/rpcs3/Emu/Cell/SPUCommonRecompiler.cpp index e11cc7a817..a8d7b93e24 100644 --- a/rpcs3/Emu/Cell/SPUCommonRecompiler.cpp +++ b/rpcs3/Emu/Cell/SPUCommonRecompiler.cpp @@ -230,14 +230,14 @@ DECLARE(spu_runtime::tr_all) = [] raw += 4; // Update block_hash (set zero): mov [r13 + spu_thread::m_block_hash], 0 - *raw++ = 0x49; - *raw++ = 0xc7; - *raw++ = 0x45; - *raw++ = ::narrow(::offset32(&spu_thread::block_hash)); - *raw++ = 0x00; - *raw++ = 0x00; - *raw++ = 0x00; - *raw++ = 0x00; + // *raw++ = 0x49; + // *raw++ = 0xc7; + // *raw++ = 0x45; + // *raw++ = ::narrow(::offset32(&spu_thread::block_hash)); + // *raw++ = 0x00; + // *raw++ = 0x00; + // *raw++ = 0x00; + // *raw++ = 0x00; // jmp [rdx + rax * 8] *raw++ = 0xff; @@ -3078,7 +3078,7 @@ spu_program spu_recompiler_base::analyse(const be_t* ls, u32 entry_point, s if (type == spu_itype::BI && target == pos + 4 && op.d) { // Disable interrupts idiom - break; + //break; } m_targets[pos].push_back(target); @@ -7754,10 +7754,10 @@ struct spu_fast : public spu_recompiler_base raw += 8; // Update block_hash: mov [r13 + spu_thread::m_block_hash], rax - *raw++ = 0x49; - *raw++ = 0x89; - *raw++ = 0x45; - *raw++ = ::narrow(::offset32(&spu_thread::block_hash)); + // *raw++ = 0x49; + // *raw++ = 0x89; + // *raw++ = 0x45; + // *raw++ = ::narrow(::offset32(&spu_thread::block_hash)); // Load PC: mov eax, [r13 + spu_thread::pc] *raw++ = 0x41; diff --git a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp index 0df3e3a854..a305274b8d 100644 --- a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp +++ b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp @@ -8051,8 +8051,8 @@ public: if (op.d && tfound != m_targets.end() && tfound->second.size() == 1 && tfound->second[0] == spu_branch_target(m_pos, 1)) { // Interrupts-disable pattern - m_ir->CreateStore(m_ir->getFalse(), spu_ptr(&spu_thread::interrupts_enabled)); - return; + // m_ir->CreateStore(m_ir->getFalse(), spu_ptr(&spu_thread::interrupts_enabled)); + // return; } if (!op.d && !op.e && tfound != m_targets.end() && tfound->second.size() > 1)