diff --git a/rpcs3/Emu/CPU/CPUTranslator.h b/rpcs3/Emu/CPU/CPUTranslator.h index 65a90b8237..96f638802f 100644 --- a/rpcs3/Emu/CPU/CPUTranslator.h +++ b/rpcs3/Emu/CPU/CPUTranslator.h @@ -2842,6 +2842,17 @@ struct fmt_unveil } }; +#ifndef _MSC_VER +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wignored-attributes" +#endif + +template <> +inline llvm::Type* cpu_translator::get_type<__m128i>() +{ + return llvm::VectorType::get(llvm::Type::getInt8Ty(m_context), 16); +} + #ifndef _MSC_VER #pragma GCC diagnostic pop #endif diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp index 1afec670b0..abed582cb3 100644 --- a/rpcs3/Emu/Cell/SPURecompiler.cpp +++ b/rpcs3/Emu/Cell/SPURecompiler.cpp @@ -6462,10 +6462,25 @@ public: set_vr(op.rt, fshl(a, zshuffle(a, 4, 0, 1, 2), b)); } + static __m128i exec_rotqby(__m128i a, u8 b) + { + alignas(32) const __m128i buf[2]{a, a}; + return _mm_loadu_si128(reinterpret_cast(reinterpret_cast(buf) + (16 - (b & 0xf)))); + } + void ROTQBY(spu_opcode_t op) { const auto a = get_vr(op.ra); const auto b = get_vr(op.rb); + + if (!m_use_ssse3) + { + value_t r; + r.value = call("spu_rotqby", &exec_rotqby, a.value, eval(extract(b, 12)).value); + set_vr(op.rt, r); + return; + } + const auto sc = build(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); const auto sh = eval((sc - zshuffle(b, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12)) & 0xf); set_vr(op.rt, pshufb(a, sh));