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Rsx: fix unknown cull faces
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parent
38a72cc6ee
commit
acf1286b49
5 changed files with 30 additions and 39 deletions
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@ -232,7 +232,7 @@ namespace rsx
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case cull_face::front: return "front";
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case cull_face::front_and_back: return "front and back";
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}
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fmt::throw_exception("Unexpected enum found" HERE);
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return "Unknown cull face value";
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}
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std::string to_string(surface_target target)
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@ -827,17 +827,6 @@ rsx::front_face rsx::to_front_face(u16 in)
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fmt::throw_exception("Unknown front face 0x%x" HERE, in);
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}
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rsx::cull_face rsx::to_cull_face(u16 in)
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{
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switch (in)
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{
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case CELL_GCM_FRONT_AND_BACK: return rsx::cull_face::front_and_back;
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case CELL_GCM_FRONT: return rsx::cull_face::front;
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case CELL_GCM_BACK: return rsx::cull_face::back;
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}
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fmt::throw_exception("Unknown cull face 0x%x" HERE, in);
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}
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enum
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{
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CELL_GCM_TRANSFER_ORIGIN_CENTER = 1,
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@ -271,15 +271,13 @@ namespace rsx
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front_face to_front_face(u16 in);
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enum class cull_face : u8
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enum class cull_face : u32
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{
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front,
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back,
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front_and_back,
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front = 0x0404, // CELL_GCM_FRONT
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back = 0x0405, // CELL_GCM_BACK
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front_and_back = 0x0408, // CELL_GCM_FRONT_AND_BACK
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};
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cull_face to_cull_face(u16 in);
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enum class user_clip_plane_op : u8
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{
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disable,
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@ -2927,14 +2927,13 @@ struct registers_decoder<NV4097_SET_CULL_FACE>
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union
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{
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u32 raw_value;
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bitfield_decoder_t<0, 32> cull_face_mode;
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} m_data;
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public:
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decoded_type(u32 raw_value) { m_data.raw_value = raw_value; }
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cull_face cull_face_mode() const
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{
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return to_cull_face(m_data.cull_face_mode);
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return static_cast<cull_face>(m_data.raw_value);
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}
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};
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@ -158,6 +158,20 @@ namespace rsx
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}
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}
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void set_cull_face(thread* rsx, u32 reg, u32 arg)
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{
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switch(arg)
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{
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case CELL_GCM_FRONT_AND_BACK: return;
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case CELL_GCM_FRONT: return;
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case CELL_GCM_BACK: return;
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default: break;
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}
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// Ignore value if unknown
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method_registers.registers[reg] = method_registers.register_previous_value;
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}
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void texture_read_semaphore_release(thread* rsx, u32 _reg, u32 arg)
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{
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// Pipeline barrier seems to be equivalent to a SHADER_READ stage barrier
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@ -381,17 +395,17 @@ namespace rsx
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}
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};
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void set_transform_program_start(thread* rsx, u32, u32)
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void set_transform_program_start(thread* rsx, u32 reg, u32)
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{
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if (method_registers.register_change_flag)
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if (method_registers.registers[reg] != method_registers.register_previous_value)
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{
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rsx->m_graphics_state |= rsx::pipeline_state::vertex_program_dirty;
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}
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}
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void set_vertex_attribute_output_mask(thread* rsx, u32, u32)
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void set_vertex_attribute_output_mask(thread* rsx, u32 reg, u32)
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{
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if (method_registers.register_change_flag)
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if (method_registers.registers[reg] != method_registers.register_previous_value)
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{
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rsx->m_graphics_state |= rsx::pipeline_state::vertex_program_dirty | rsx::pipeline_state::fragment_program_dirty;
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}
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@ -1325,16 +1339,8 @@ namespace rsx
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void rsx_state::decode(u32 reg, u32 value)
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{
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auto& old_value = registers[reg];
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if (old_value != value)
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{
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register_change_flag = true;
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old_value = value;
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}
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else
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{
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register_change_flag = false;
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}
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// Store new value and save previous
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register_previous_value = std::exchange(registers[reg], value);
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}
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bool rsx_state::test(u32 reg, u32 value) const
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@ -1747,6 +1753,7 @@ namespace rsx
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bind<NV406E_SEMAPHORE_RELEASE, nv406e::semaphore_release>();
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// NV4097
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bind<NV4097_SET_CULL_FACE, nv4097::set_cull_face>();
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bind<NV4097_TEXTURE_READ_SEMAPHORE_RELEASE, nv4097::texture_read_semaphore_release>();
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bind<NV4097_BACK_END_WRITE_SEMAPHORE_RELEASE, nv4097::back_end_write_semaphore_release>();
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bind<NV4097_SET_BEGIN_END, nv4097::set_begin_end>();
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@ -127,8 +127,9 @@ namespace rsx
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struct rsx_state
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{
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protected:
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std::array<u32, 0x10000 / 4> registers;
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public:
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std::array<u32, 0x10000 / 4> registers{};
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u32 register_previous_value;
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template<u32 opcode>
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using decoded_type = typename registers_decoder<opcode>::decoded_type;
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@ -140,7 +141,6 @@ namespace rsx
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return decoded_type<opcode>(register_value);
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}
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public:
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rsx_state &operator=(const rsx_state& in)
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{
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registers = in.registers;
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@ -159,8 +159,6 @@ namespace rsx
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draw_clause current_draw_clause;
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bool register_change_flag;
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/**
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* RSX can sources vertex attributes from 2 places:
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* 1. Immediate values passed by NV4097_SET_VERTEX_DATA*_M + ARRAY_ID write.
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