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Utils: Nuke AVX10-256 support

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- Intel recently removed 256b AVX10 from the AVX10 spec.
This commit is contained in:
Malcolm Jestadt 2025-03-21 14:05:39 -04:00
parent cd25e91321
commit bb98544675
2 changed files with 0 additions and 48 deletions
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42
rpcs3/util/sysinfo.cpp
View file

@ -278,17 +278,6 @@ bool utils::has_avx10()
#endif
}
bool utils::has_avx10_512()
{
#if defined(ARCH_X64)
// AVX10 with 512 wide vectors
static const bool g_value = has_avx10() && get_cpuid(24, 0)[2] & 0x40000;
return g_value;
#else
return false;
#endif
}
u32 utils::avx10_isa_version()
{
#if defined(ARCH_X64)
@ -310,28 +299,6 @@ u32 utils::avx10_isa_version()
#endif
}
bool utils::has_avx512_256()
{
#if defined(ARCH_X64)
// Either AVX10 or AVX512 implies support for 256-bit length AVX-512 SKL-X tier instructions
static const bool g_value = (has_avx512() || has_avx10());
return g_value;
#else
return false;
#endif
}
bool utils::has_avx512_icl_256()
{
#if defined(ARCH_X64)
// Check for AVX512_ICL or check for AVX10, together with GFNI, VAES, and VPCLMULQDQ, implies support for the same instructions that AVX-512_icl does at 256 bit length
static const bool g_value = (has_avx512_icl() || (has_avx10() && get_cpuid(7, 0)[2] & 0x00000700));
return g_value;
#else
return false;
#endif
}
bool utils::has_xop()
{
#if defined(ARCH_X64)
@ -536,15 +503,6 @@ std::string utils::get_system_info()
{
const u32 avx10_version = avx10_isa_version();
fmt::append(result, "10.%d", avx10_version);
if (has_avx10_512())
{
result += "-512";
}
else
{
result += "-256";
}
}
else if (has_avx512())
{

6
rpcs3/util/sysinfo.hpp
View file

@ -29,14 +29,8 @@ namespace utils
bool has_avx10();
bool has_avx10_512();
u32 avx10_isa_version();
bool has_avx512_256();
bool has_avx512_icl_256();
bool has_xop();
bool has_clwb();