diff --git a/rpcs3/Emu/RSX/Common/texture_cache.h b/rpcs3/Emu/RSX/Common/texture_cache.h
index 676e489967..06aa4e388f 100644
--- a/rpcs3/Emu/RSX/Common/texture_cache.h
+++ b/rpcs3/Emu/RSX/Common/texture_cache.h
@@ -2548,6 +2548,13 @@ namespace rsx
 				src_address += (src.width - src_w) * src_bpp;
 			}
 
+			const auto is_tiled = [&]()
+			{
+				auto rsxthr = rsx::get_current_renderer();
+				auto region = rsxthr->get_tiled_memory_region(utils::address_range::start_length(dst_address, dst.pitch * dst.clip_height));
+				return region.tile != nullptr;
+			}();
+
 			auto rtt_lookup = [&m_rtts, &cmd, &scale_x, &scale_y, this](u32 address, u32 width, u32 height, u32 pitch, u8 bpp, rsx::flags32_t access, bool allow_clipped) -> typename surface_store_type::surface_overlap_info
 			{
 				const auto list = m_rtts.get_merged_texture_memory_region(cmd, address, width, height, pitch, bpp, access);
@@ -2686,7 +2693,7 @@ namespace rsx
 			else
 			{
 				// Determine whether to perform this transfer on CPU or GPU (src data may not be graphical)
-				const bool is_trivial_copy = is_copy_op && !is_format_convert && !dst.swizzled;
+				const bool is_trivial_copy = is_copy_op && !is_format_convert && !dst.swizzled && !is_tiled;
 				const bool is_block_transfer = (dst_w == src_w && dst_h == src_h && (src.pitch == dst.pitch || src_h == 1));
 				const bool is_mirror_op = (dst.scale_x < 0.f || dst.scale_y < 0.f);
 
@@ -2721,6 +2728,12 @@ namespace rsx
 						if (dst.swizzled)
 						{
 							// Swizzle operation requested. Use fallback
+							if (is_tiled)
+							{
+								// Corner case
+								// FIXME: We have had hw-accelerated swizzle support for some time now
+								rsx_log.error("Swizzled write to tiled area.");
+							}
 							return false;
 						}