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rsx: Implement depth clamping

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kd-11 2017-12-29 19:57:58 +03:00
parent 4872be9de3
commit d496dbecad
4 changed files with 34 additions and 1 deletions
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2
rpcs3/Emu/RSX/GL/GLGSRender.cpp
View file

@ -1039,6 +1039,8 @@ void GLGSRender::update_draw_state()
gl_state.depth_mask(rsx::method_registers.depth_write_enabled());
gl_state.stencil_mask(rsx::method_registers.stencil_mask());
gl_state.enable(rsx::method_registers.depth_clamp_enabled(), GL_DEPTH_CLAMP);
if (gl_state.enable(rsx::method_registers.depth_test_enabled(), GL_DEPTH_TEST))
{
gl_state.depth_func(comparison_op(rsx::method_registers.depth_func()));

2
rpcs3/Emu/RSX/VK/VKGSRender.cpp
View file

@ -2243,7 +2243,7 @@ void VKGSRender::load_program(u32 vertex_count, u32 vertex_base)
properties.rs.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;
properties.rs.polygonMode = VK_POLYGON_MODE_FILL;
properties.rs.depthClampEnable = VK_FALSE;
properties.rs.depthClampEnable = rsx::method_registers.depth_clamp_enabled();
properties.rs.rasterizerDiscardEnable = VK_FALSE;
//Disabled by setting factors to 0 as needed

26
rpcs3/Emu/RSX/rsx_decode.h
View file

@ -701,6 +701,32 @@ struct registers_decoder<NV4097_SET_DEPTH_MASK>
}
};
template<>
struct registers_decoder<NV4097_SET_ZMIN_MAX_CONTROL>
{
struct decoded_type
{
private:
union
{
u32 raw_value;
bitfield_decoder_t<4, 4> depth_clamp_enabled;
} m_data;
public:
decoded_type(u32 raw_value) { m_data.raw_value = raw_value; }
bool depth_clamp_enabled() const
{
return bool(m_data.depth_clamp_enabled);
}
};
static std::string dump(decoded_type &&decoded_values)
{
return "Depth: clamp " + print_boolean(decoded_values.depth_clamp_enabled());
}
};
template<>
struct registers_decoder<NV4097_SET_ALPHA_TEST_ENABLE>
{

5
rpcs3/Emu/RSX/rsx_methods.h
View file

@ -1201,6 +1201,11 @@ namespace rsx
{
return decode<NV4097_SET_ANTI_ALIASING_CONTROL>().msaa_alpha_to_one();
}
bool depth_clamp_enabled()
{
return decode<NV4097_SET_ZMIN_MAX_CONTROL>().depth_clamp_enabled();
}
};
extern rsx_state method_registers;