diff --git a/rpcs3/Emu/ARMv7/ARMv7Decoder.cpp b/rpcs3/Emu/ARMv7/ARMv7Decoder.cpp index 90009b3987..4cfdc42fed 100644 --- a/rpcs3/Emu/ARMv7/ARMv7Decoder.cpp +++ b/rpcs3/Emu/ARMv7/ARMv7Decoder.cpp @@ -136,15 +136,6 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP2(0xff00, 0xbf00, T1, IT), - ARMv7_OP4(0xfff0, 0x0f00, 0xe850, 0x0f00, T1, LDREX), - ARMv7_OP4(0x0ff0, 0x0fff, 0x0190, 0x0f9f, A1, LDREX), - ARMv7_OP4(0xfff0, 0x0fff, 0xe8d0, 0x0f4f, T1, LDREXB), - ARMv7_OP4(0x0ff0, 0x0fff, 0x01d0, 0x0f9f, A1, LDREXB), - ARMv7_OP4(0xfff0, 0x00ff, 0xe8d0, 0x007f, T1, LDREXD), - ARMv7_OP4(0x0ff0, 0x0fff, 0x01b0, 0x0f9f, A1, LDREXD), - ARMv7_OP4(0xfff0, 0x0fff, 0xe8d0, 0x0f5f, T1, LDREXH), - ARMv7_OP4(0x0ff0, 0x0fff, 0x01f0, 0x0f9f, A1, LDREXH), - ARMv7_OP2(0xf800, 0xc800, T1, LDM), ARMv7_OP4(0xffd0, 0x2000, 0xe890, 0x0000, T2, LDM), ARMv7_OP4(0x0fd0, 0x0000, 0x0890, 0x0000, A1, LDM), @@ -181,6 +172,25 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0x0f7f, 0x00f0, 0x014f, 0x00d0, A1, LDRD_LIT), ARMv7_OP4(0x0e50, 0x0ff0, 0x0000, 0x00d0, A1, LDRD_REG), + ARMv7_OP4(0xfff0, 0x0f00, 0xe850, 0x0f00, T1, LDREX), + ARMv7_OP4(0x0ff0, 0x0fff, 0x0190, 0x0f9f, A1, LDREX), + ARMv7_OP4(0xfff0, 0x0fff, 0xe8d0, 0x0f4f, T1, LDREXB), + ARMv7_OP4(0x0ff0, 0x0fff, 0x01d0, 0x0f9f, A1, LDREXB), + ARMv7_OP4(0xfff0, 0x00ff, 0xe8d0, 0x007f, T1, LDREXD), + ARMv7_OP4(0x0ff0, 0x0fff, 0x01b0, 0x0f9f, A1, LDREXD), + ARMv7_OP4(0xfff0, 0x0fff, 0xe8d0, 0x0f5f, T1, LDREXH), + ARMv7_OP4(0x0ff0, 0x0fff, 0x01f0, 0x0f9f, A1, LDREXH), + + ARMv7_OP2(0xf800, 0x8800, T1, LDRH_IMM), + ARMv7_OP4(0xfff0, 0x0000, 0xf8b0, 0x0000, T2, LDRH_IMM), + ARMv7_OP4(0xfff0, 0x0800, 0xf830, 0x0800, T3, LDRH_IMM), + ARMv7_OP4(0x0e50, 0x00f0, 0x0050, 0x00b0, A1, LDRH_IMM), + ARMv7_OP4(0xff7f, 0x0000, 0xf83f, 0x0000, T1, LDRH_LIT), + ARMv7_OP4(0x0f7f, 0x00f0, 0x015f, 0x00b0, A1, LDRH_LIT), + ARMv7_OP2(0xfe00, 0x5a00, T1, LDRH_REG), + ARMv7_OP4(0xfff0, 0x0fc0, 0xf830, 0x0000, T2, LDRH_REG), + ARMv7_OP4(0x0e50, 0x0ff0, 0x0010, 0x00b0, A1, LDRH_REG), + ARMv7_OP4(0xfff0, 0x0000, 0xf990, 0x0000, T1, LDRSB_IMM), ARMv7_OP4(0xfff0, 0x0800, 0xf910, 0x0800, T2, LDRSB_IMM), ARMv7_OP4(0x0e50, 0x00f0, 0x0050, 0x00d0, A1, LDRSB_IMM), @@ -228,11 +238,18 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP2(0xffc0, 0x0000, T2, MOV_REG), ARMv7_OP4(0xffef, 0xf0f0, 0xea4f, 0x0000, T3, MOV_REG), ARMv7_OP4(0x0fef, 0x0ff0, 0x01a0, 0x0000, A1, MOV_REG), + ARMv7_OP4(0xfbf0, 0x8000, 0xf2c0, 0x0000, T1, MOVT), ARMv7_OP4(0x0ff0, 0x0000, 0x0340, 0x0000, A1, MOVT), + ARMv7_OP4(0xff10, 0x0010, 0xee10, 0x0010, T1, MRC_), + ARMv7_OP4(0x0f10, 0x0010, 0x0e10, 0x0010, A1, MRC_), + ARMv7_OP4(0xff10, 0x0010, 0xfe10, 0x0010, T2, MRC_), + ARMv7_OP4(0xff10, 0x0010, 0xfe10, 0x0010, A2, MRC_), + ARMv7_OP4(0xffff, 0xf0ff, 0xf3ef, 0x8000, T1, MRS), ARMv7_OP4(0x0fff, 0x0fff, 0x010f, 0x0000, A1, MRS), + ARMv7_OP4(0x0ff3, 0xf000, 0x0320, 0xf000, A1, MSR_IMM), ARMv7_OP4(0xfff0, 0xf3ff, 0xf380, 0x8000, T1, MSR_REG), ARMv7_OP4(0x0ff3, 0xfff0, 0x0120, 0xf000, A1, MSR_REG), @@ -279,22 +296,31 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf080, T1, QADD), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0100, 0x0050, A1, QADD), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf010, T1, QADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0f10, A1, QADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf010, T1, QADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0f90, A1, QADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf010, T1, QASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0f30, A1, QASX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf090, T1, QDADD), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0140, 0x0050, A1, QDADD), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf0b0, T1, QDSUB), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0160, 0x0050, A1, QDSUB), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf010, T1, QSAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0f50, A1, QSAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf0a0, T1, QSUB), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0120, 0x0050, A1, QSUB), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf010, T1, QSUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0f70, A1, QSUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf010, T1, QSUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0620, 0x0ff0, A1, QSUB8), @@ -304,9 +330,11 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP2(0xffc0, 0xba00, T1, REV), ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf080, T2, REV), ARMv7_OP4(0x0fff, 0x0ff0, 0x06bf, 0x0f30, A1, REV), + ARMv7_OP2(0xffc0, 0xba40, T1, REV16), ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf090, T2, REV16), ARMv7_OP4(0x0fff, 0x0ff0, 0x06bf, 0x0fb0, A1, REV16), + ARMv7_OP2(0xffc0, 0xbac0, T1, REVSH), ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf0b0, T2, REVSH), ARMv7_OP4(0x0fff, 0x0ff0, 0x06ff, 0x0fb0, A1, REVSH), @@ -332,8 +360,10 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf000, T1, SADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0f10, A1, SADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf000, T1, SADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0f90, A1, SADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf000, T1, SASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0f30, A1, SASX), @@ -354,70 +384,85 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf020, T1, SHADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0f10, A1, SHADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf020, T1, SHADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0f90, A1, SHADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf020, T1, SHASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0f30, A1, SHASX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf020, T1, SHSAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0f50, A1, SHSAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf020, T1, SHSUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0f70, A1, SHSUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf020, T1, SHSUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0630, 0x0ff0, A1, SHSUB8), ARMv7_OP4(0xfff0, 0x00c0, 0xfb10, 0x0000, T1, SMLA__), ARMv7_OP4(0x0ff0, 0x0090, 0x0100, 0x0080, A1, SMLA__), + ARMv7_OP4(0xfff0, 0x00e0, 0xfb20, 0x0000, T1, SMLAD), ARMv7_OP4(0x0ff0, 0x00d0, 0x0700, 0x0010, A1, SMLAD), + ARMv7_OP4(0xfff0, 0x00f0, 0xfbc0, 0x0000, T1, SMLAL), - ARMv7_OP4(0x0fe0, 0x00f0, 0x00e0, 0x0090, A1, SMLAL),//??? + ARMv7_OP4(0x0fe0, 0x00f0, 0x00e0, 0x0090, A1, SMLAL), + ARMv7_OP4(0xfff0, 0x00c0, 0xfbc0, 0x0080, T1, SMLAL__), ARMv7_OP4(0x0ff0, 0x0090, 0x0140, 0x0080, A1, SMLAL__), + ARMv7_OP4(0xfff0, 0x00e0, 0xfbc0, 0x00c0, T1, SMLALD), ARMv7_OP4(0x0ff0, 0x00d0, 0x0740, 0x0010, A1, SMLALD), + ARMv7_OP4(0xfff0, 0x00e0, 0xfb30, 0x0000, T1, SMLAW_), ARMv7_OP4(0x0ff0, 0x00b0, 0x0120, 0x0080, A1, SMLAW_), ARMv7_OP4(0xfff0, 0x00e0, 0xfb40, 0x0000, T1, SMLSD), ARMv7_OP4(0x0ff0, 0x00d0, 0x0700, 0x0050, A1, SMLSD), + ARMv7_OP4(0xfff0, 0x00e0, 0xfbd0, 0x00c0, T1, SMLSLD), ARMv7_OP4(0x0ff0, 0x00d0, 0x0740, 0x0050, A1, SMLSLD), + ARMv7_OP4(0xfff0, 0x00e0, 0xfb50, 0x0000, T1, SMMLA), ARMv7_OP4(0x0ff0, 0x00d0, 0x0750, 0x0010, A1, SMMLA), + ARMv7_OP4(0xfff0, 0x00e0, 0xfb60, 0x0000, T1, SMMLS), ARMv7_OP4(0x0ff0, 0x00d0, 0x0750, 0x00d0, A1, SMMLS), + ARMv7_OP4(0xfff0, 0xf0e0, 0xfb50, 0xf000, T1, SMMUL), ARMv7_OP4(0x0ff0, 0xf0d0, 0x0750, 0xf010, A1, SMMUL), + ARMv7_OP4(0xfff0, 0xf0e0, 0xfb20, 0xf000, T1, SMUAD), ARMv7_OP4(0x0ff0, 0xf0d0, 0x0700, 0xf010, A1, SMUAD), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfb10, 0xf000, T1, SMUL__), - ARMv7_OP4(0x0ff0, 0xf090, 0x0160, 0x0080, A1, SMUL__),//??? + ARMv7_OP4(0x0ff0, 0xf090, 0x0160, 0x0080, A1, SMUL__), + ARMv7_OP4(0xfff0, 0x00f0, 0xfb80, 0x0000, T1, SMULL), ARMv7_OP4(0x0fe0, 0x00f0, 0x00c0, 0x0090, A1, SMULL), + ARMv7_OP4(0xfff0, 0xf0e0, 0xfb30, 0xf000, T1, SMULW_), - ARMv7_OP4(0x0ff0, 0xf0b0, 0x0120, 0x00a0, A1, SMULW_),//??? + ARMv7_OP4(0x0ff0, 0xf0b0, 0x0120, 0x00a0, A1, SMULW_), + ARMv7_OP4(0xfff0, 0xf0e0, 0xfb40, 0xf000, T1, SMUSD), ARMv7_OP4(0x0ff0, 0xf0d0, 0x0700, 0xf050, A1, SMUSD), + ARMv7_OP4(0xffd0, 0x8020, 0xf300, 0x0000, T1, SSAT), ARMv7_OP4(0x0fe0, 0x0030, 0x06a0, 0x0010, A1, SSAT), + ARMv7_OP4(0xfff0, 0xf0e0, 0xf320, 0x0000, T1, SSAT16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x06a0, 0x0f30, A1, SSAT16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf000, T1, SSAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0f50, A1, SSAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf000, T1, SSUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0f70, A1, SSUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf000, T1, SSUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0610, 0x0ff0, A1, SSUB8), - ARMv7_OP4(0xfff0, 0x0000, 0xe840, 0x0000, T1, STREX), - ARMv7_OP4(0x0ff0, 0x0ff0, 0x0180, 0x0f90, A1, STREX), - ARMv7_OP4(0xfff0, 0x0ff0, 0xe8c0, 0x0f40, T1, STREXB), - ARMv7_OP4(0x0ff0, 0x0ff0, 0x01c0, 0x0f90, A1, STREXB), - ARMv7_OP4(0xfff0, 0x00f0, 0xe8c0, 0x0070, T1, STREXD), - ARMv7_OP4(0x0ff0, 0x0ff0, 0x01a0, 0x0f90, A1, STREXD), - ARMv7_OP4(0xfff0, 0x0ff0, 0xe8c0, 0x0f50, T1, STREXH), - ARMv7_OP4(0x0ff0, 0x0ff0, 0x01e0, 0x0f90, A1, STREXH), - ARMv7_OP2(0xf800, 0xc000, T1, STM), ARMv7_OP4(0xffd0, 0xa000, 0xe880, 0x0000, T2, STM), ARMv7_OP4(0x0fd0, 0x0000, 0x0880, 0x0000, A1, STM), @@ -447,6 +492,15 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0x0e50, 0x00f0, 0x0040, 0x00f0, A1, STRD_IMM), ARMv7_OP4(0x0e50, 0x0ff0, 0x0000, 0x00f0, A1, STRD_REG), + ARMv7_OP4(0xfff0, 0x0000, 0xe840, 0x0000, T1, STREX), + ARMv7_OP4(0x0ff0, 0x0ff0, 0x0180, 0x0f90, A1, STREX), + ARMv7_OP4(0xfff0, 0x0ff0, 0xe8c0, 0x0f40, T1, STREXB), + ARMv7_OP4(0x0ff0, 0x0ff0, 0x01c0, 0x0f90, A1, STREXB), + ARMv7_OP4(0xfff0, 0x00f0, 0xe8c0, 0x0070, T1, STREXD), + ARMv7_OP4(0x0ff0, 0x0ff0, 0x01a0, 0x0f90, A1, STREXD), + ARMv7_OP4(0xfff0, 0x0ff0, 0xe8c0, 0x0f50, T1, STREXH), + ARMv7_OP4(0x0ff0, 0x0ff0, 0x01e0, 0x0f90, A1, STREXH), + ARMv7_OP2(0xf800, 0x8000, T1, STRH_IMM), ARMv7_OP4(0xfff0, 0x0000, 0xf8a0, 0x0000, T2, STRH_IMM), ARMv7_OP4(0xfff0, 0x0800, 0xf820, 0x0800, T3, STRH_IMM), @@ -476,8 +530,10 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0xfff0, 0xf0c0, 0xfa40, 0xf080, T1, SXTAB), ARMv7_OP4(0x0ff0, 0x03f0, 0x06a0, 0x0070, A1, SXTAB), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfa20, 0xf080, T1, SXTAB16), ARMv7_OP4(0x0ff0, 0x03f0, 0x0680, 0x0070, A1, SXTAB16), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfa00, 0xf080, T1, SXTAH), ARMv7_OP4(0x0ff0, 0x03f0, 0x06b0, 0x0070, A1, SXTAH), @@ -509,61 +565,90 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf040, T1, UADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0f10, A1, UADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf040, T1, UADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0f90, A1, UADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf040, T1, UASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0f30, A1, UASX), + ARMv7_OP4(0xfff0, 0x8020, 0xf3c0, 0x0000, T1, UBFX), ARMv7_OP4(0x0fe0, 0x0070, 0x07e0, 0x0050, A1, UBFX), - ARMv7_OP4(0xfff0, 0xf0f0, 0xfbb0, 0xf0f0, T1, UDIV), + + ARMv7_OP4(0xfff0, 0xf0f0, 0xfbb0, 0xf0f0, T1, UDIV), // ??? + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf060, T1, UHADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0f10, A1, UHADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf060, T1, UHADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0f90, A1, UHADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf060, T1, UHASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0f30, A1, UHASX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf060, T1, UHSAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0f50, A1, UHSAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf060, T1, UHSUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0f70, A1, UHSUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf060, T1, UHSUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0670, 0x0ff0, A1, UHSUB8), + ARMv7_OP4(0xfff0, 0x00f0, 0xfbe0, 0x0060, T1, UMAAL), ARMv7_OP4(0x0ff0, 0x00f0, 0x0040, 0x0090, A1, UMAAL), + ARMv7_OP4(0xfff0, 0x00f0, 0xfbe0, 0x0000, T1, UMLAL), ARMv7_OP4(0x0fe0, 0x00f0, 0x00a0, 0x0090, A1, UMLAL), + ARMv7_OP4(0xfff0, 0x00f0, 0xfba0, 0x0000, T1, UMULL), ARMv7_OP4(0x0fe0, 0x00f0, 0x0080, 0x0090, A1, UMULL), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa90, 0xf050, T1, UQADD16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0f10, A1, UQADD16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfa80, 0xf050, T1, UQADD8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0f90, A1, UQADD8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfaa0, 0xf050, T1, UQASX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0f30, A1, UQASX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf050, T1, UQSAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0f50, A1, UQSAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf050, T1, UQSUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0f70, A1, UQSUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf050, T1, UQSUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0660, 0x0ff0, A1, UQSUB8), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfb70, 0xf000, T1, USAD8), ARMv7_OP4(0x0ff0, 0xf0f0, 0x0780, 0xf010, A1, USAD8), + ARMv7_OP4(0xfff0, 0x00f0, 0xfb70, 0x0000, T1, USADA8), ARMv7_OP4(0x0ff0, 0x00f0, 0x0780, 0x0010, A1, USADA8), + ARMv7_OP4(0xffd0, 0x8020, 0xf380, 0x0000, T1, USAT), ARMv7_OP4(0x0fe0, 0x0030, 0x06e0, 0x0010, A1, USAT), + ARMv7_OP4(0xfff0, 0xf0e0, 0xf3a0, 0x0000, T1, USAT16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x06e0, 0x0f30, A1, USAT16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfae0, 0xf040, T1, USAX), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0f50, A1, USAX), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfad0, 0xf040, T1, USUB16), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0f70, A1, USUB16), + ARMv7_OP4(0xfff0, 0xf0f0, 0xfac0, 0xf040, T1, USUB8), ARMv7_OP4(0x0ff0, 0x0ff0, 0x0650, 0x0ff0, A1, USUB8), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfa50, 0xf080, T1, UXTAB), ARMv7_OP4(0x0ff0, 0x03f0, 0x06e0, 0x0070, A1, UXTAB), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfa30, 0xf080, T1, UXTAB16), ARMv7_OP4(0x0ff0, 0x03f0, 0x06c0, 0x0070, A1, UXTAB16), + ARMv7_OP4(0xfff0, 0xf0c0, 0xfa10, 0xf080, T1, UXTAH), ARMv7_OP4(0x0ff0, 0x03f0, 0x06f0, 0x0070, A1, UXTAH), @@ -1004,11 +1089,6 @@ const ARMv7_opcode_t ARMv7_opcode_table[] = ARMv7_OP2(0xffff, 0xbf10, T1, YIELD), ARMv7_OP4(0xffff, 0xffff, 0xf3af, 0x8001, T2, YIELD), ARMv7_OP4(0x0fff, 0xffff, 0x0320, 0xf001, A1, YIELD), - - ARMv7_OP4(0xff10, 0x0010, 0xee10, 0x0010, T1, MRC_), - ARMv7_OP4(0x0f10, 0x0010, 0x0e10, 0x0010, A1, MRC_), - ARMv7_OP4(0xff10, 0x0010, 0xfe10, 0x0010, T2, MRC_), - ARMv7_OP4(0xff10, 0x0010, 0xfe10, 0x0010, A2, MRC_), }; struct ARMv7_op2_table_t