mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-04-20 11:36:13 +00:00
Merge branch 'master' into master
This commit is contained in:
Sanjay Govind
GitHub
commit
f7dd259ab4
5 changed files with 187 additions and 78 deletions
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@ -1177,6 +1177,7 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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func.size = 0x1C;
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func.blocks.emplace(func.addr, func.size);
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func.attr += ppu_attr::known_size;
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known_functions.emplace(func.addr);
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// Look for another imports to fill gaps (hack)
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auto _p2 = _ptr + 7;
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@ -1195,6 +1196,7 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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next.size = 0x1C;
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next.blocks.emplace(next.addr, next.size);
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next.attr += ppu_attr::known_size;
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known_functions.emplace(_p2.addr());
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advance(_p2, p2, 7);
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}
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@ -1213,9 +1215,8 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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// Trampoline with TOC
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const u32 target = (ptr[3] << 16) + s16(ptr[4]);
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const u32 toc_add = (ptr[1] << 16) + s16(ptr[2]);
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constexpr u32 func_size = 0x1C;
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if (target >= start && target < end && verify_ref((_ptr + 3).addr()) && target - func.addr >= func_size)
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if (target >= start && target < end && verify_ref((_ptr + 3).addr()))
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{
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auto& new_func = add_func(target, 0, func.addr);
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@ -1774,8 +1775,23 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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u32 per_instruction_bytes = 0;
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for (auto&& [_, func] : fmap)
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// Iterate by address (fmap may grow)
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for (u32 addr_next = start; addr_next != end;)
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{
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// Get next iterator
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const auto it = fmap.lower_bound(addr_next);
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if (it == fmap.end())
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{
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break;
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}
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// Save next function address as is as of this moment (ignoring added functions)
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const auto it_next = std::next(it);
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addr_next = it_next == fmap.end() ? end : it_next->first;
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const ppu_function_ext& func = it->second;
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if (func.attr & ppu_attr::no_size && entry)
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{
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// Disabled for PRX for now
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@ -1793,6 +1809,7 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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}
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per_instruction_bytes += utils::sub_saturate<u32>(lim, func.addr);
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addr_next = std::max<u32>(addr_next, lim);
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continue;
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}
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@ -1814,7 +1831,7 @@ bool ppu_module<lv2_obj>::analyse(u32 lib_toc, u32 entry, const u32 sec_end, con
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block.addr = addr;
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block.size = size;
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block.toc = func.toc;
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ppu_log.trace("Block __0x%x added (func=0x%x, size=0x%x, toc=0x%x)", block.addr, _, block.size, block.toc);
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ppu_log.trace("Block __0x%x added (func=0x%x, size=0x%x, toc=0x%x)", block.addr, it->first, block.size, block.toc);
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if (!entry && !sec_end)
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{
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@ -1652,7 +1652,7 @@ public:
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u32 elements;
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u32 dwords;
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if (m_use_avx512 && g_cfg.core.full_width_avx512)
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if (m_use_avx512)
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{
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stride = 64;
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elements = 16;
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@ -1677,94 +1677,175 @@ public:
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llvm::Value* acc = nullptr;
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for (u32 j = starta; j < end; j += stride)
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// Use a 512bit simple checksum to verify integrity if size is atleast 512b * 3
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// This code uses a 512bit vector for all hardware to ensure behavior matches.
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// The checksum path is still faster even on narrow hardware.
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if ((end - starta) >= 192 && !g_cfg.core.precise_spu_verification)
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{
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int indices[16];
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bool holes = false;
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bool data = false;
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for (u32 i = 0; i < elements; i++)
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for (u32 j = starta; j < end; j += 64)
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{
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const u32 k = j + i * 4;
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int indices[16];
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bool holes = false;
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bool data = false;
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if (k < start || k >= end || !func.data[(k - start) / 4])
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for (u32 i = 0; i < 16; i++)
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{
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indices[i] = elements;
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holes = true;
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const u32 k = j + i * 4;
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if (k < start || k >= end || !func.data[(k - start) / 4])
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{
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indices[i] = 16;
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holes = true;
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}
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else
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{
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indices[i] = i;
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data = true;
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}
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}
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else
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if (!data)
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{
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indices[i] = i;
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data = true;
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// Skip full-sized holes
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continue;
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}
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}
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if (!data)
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{
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// Skip full-sized holes
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continue;
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}
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llvm::Value* vls = nullptr;
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llvm::Value* vls = nullptr;
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// Load unaligned code block from LS
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if (m_use_avx512 && g_cfg.core.full_width_avx512)
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{
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// Load unaligned code block from LS
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vls = m_ir->CreateAlignedLoad(get_type<u32[16]>(), _ptr<u32[16]>(data_addr, j - starta), llvm::MaybeAlign{4});
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// Mask if necessary
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if (holes)
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{
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vls = m_ir->CreateShuffleVector(vls, ConstantAggregateZero::get(vls->getType()), llvm::ArrayRef(indices, 16));
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}
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acc = acc ? m_ir->CreateAdd(acc, vls) : vls;
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check_iterations++;
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}
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else if (m_use_avx)
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// Create the checksum
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u32 checksum[16] = {0};
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for (u32 j = 0; j < func.data.size(); j += 16) // Process 16 elements per iteration
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{
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vls = m_ir->CreateAlignedLoad(get_type<u32[8]>(), _ptr<u32[8]>(data_addr, j - starta), llvm::MaybeAlign{4});
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}
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else
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{
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vls = m_ir->CreateAlignedLoad(get_type<u32[4]>(), _ptr<u32[4]>(data_addr, j - starta), llvm::MaybeAlign{4});
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for (u32 i = 0; i < 16; i++)
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{
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if (j + i < func.data.size())
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{
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checksum[i] += func.data[j + i];
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}
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}
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}
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// Mask if necessary
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if (holes)
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{
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vls = m_ir->CreateShuffleVector(vls, ConstantAggregateZero::get(vls->getType()), llvm::ArrayRef(indices, elements));
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}
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auto* const_vector = ConstantDataVector::get(m_context, llvm::ArrayRef(checksum, 16));
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acc = m_ir->CreateXor(acc, const_vector);
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// Perform bitwise comparison and accumulate
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u32 words[16];
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for (u32 i = 0; i < elements; i++)
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{
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const u32 k = j + i * 4;
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words[i] = k >= start && k < end ? func.data[(k - start) / 4] : 0;
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}
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vls = m_ir->CreateXor(vls, ConstantDataVector::get(m_context, llvm::ArrayRef(words, elements)));
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acc = acc ? m_ir->CreateOr(acc, vls) : vls;
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check_iterations++;
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}
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// Pattern for PTEST
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if (m_use_avx512 && g_cfg.core.full_width_avx512)
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{
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// Pattern for PTEST
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acc = m_ir->CreateBitCast(acc, get_type<u64[8]>());
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}
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else if (m_use_avx)
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{
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acc = m_ir->CreateBitCast(acc, get_type<u64[4]>());
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llvm::Value* elem = m_ir->CreateExtractElement(acc, u64{0});
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for (u32 i = 1; i < 8; i++)
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{
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elem = m_ir->CreateOr(elem, m_ir->CreateExtractElement(acc, i));
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}
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// Compare result with zero
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const auto cond = m_ir->CreateICmpNE(elem, m_ir->getInt64(0));
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m_ir->CreateCondBr(cond, label_diff, label_body, m_md_unlikely);
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}
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else
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{
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acc = m_ir->CreateBitCast(acc, get_type<u64[2]>());
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for (u32 j = starta; j < end; j += stride)
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{
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int indices[16];
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bool holes = false;
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bool data = false;
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for (u32 i = 0; i < elements; i++)
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{
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const u32 k = j + i * 4;
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if (k < start || k >= end || !func.data[(k - start) / 4])
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{
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indices[i] = elements;
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holes = true;
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}
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else
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{
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indices[i] = i;
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data = true;
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}
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}
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if (!data)
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{
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// Skip full-sized holes
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continue;
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}
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llvm::Value* vls = nullptr;
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// Load unaligned code block from LS
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if (m_use_avx512)
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{
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vls = m_ir->CreateAlignedLoad(get_type<u32[16]>(), _ptr<u32[16]>(data_addr, j - starta), llvm::MaybeAlign{4});
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}
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else if (m_use_avx)
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{
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vls = m_ir->CreateAlignedLoad(get_type<u32[8]>(), _ptr<u32[8]>(data_addr, j - starta), llvm::MaybeAlign{4});
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}
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else
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{
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vls = m_ir->CreateAlignedLoad(get_type<u32[4]>(), _ptr<u32[4]>(data_addr, j - starta), llvm::MaybeAlign{4});
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}
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// Mask if necessary
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if (holes)
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{
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vls = m_ir->CreateShuffleVector(vls, ConstantAggregateZero::get(vls->getType()), llvm::ArrayRef(indices, elements));
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}
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// Perform bitwise comparison and accumulate
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u32 words[16];
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for (u32 i = 0; i < elements; i++)
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{
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const u32 k = j + i * 4;
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words[i] = k >= start && k < end ? func.data[(k - start) / 4] : 0;
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}
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vls = m_ir->CreateXor(vls, ConstantDataVector::get(m_context, llvm::ArrayRef(words, elements)));
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acc = acc ? m_ir->CreateOr(acc, vls) : vls;
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check_iterations++;
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}
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// Pattern for PTEST
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if (m_use_avx512)
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{
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acc = m_ir->CreateBitCast(acc, get_type<u64[8]>());
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}
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else if (m_use_avx)
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{
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acc = m_ir->CreateBitCast(acc, get_type<u64[4]>());
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}
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else
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{
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acc = m_ir->CreateBitCast(acc, get_type<u64[2]>());
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}
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llvm::Value* elem = m_ir->CreateExtractElement(acc, u64{0});
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for (u32 i = 1; i < dwords; i++)
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{
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elem = m_ir->CreateOr(elem, m_ir->CreateExtractElement(acc, i));
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}
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// Compare result with zero
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const auto cond = m_ir->CreateICmpNE(elem, m_ir->getInt64(0));
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m_ir->CreateCondBr(cond, label_diff, label_body, m_md_unlikely);
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}
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llvm::Value* elem = m_ir->CreateExtractElement(acc, u64{0});
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for (u32 i = 1; i < dwords; i++)
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{
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elem = m_ir->CreateOr(elem, m_ir->CreateExtractElement(acc, i));
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}
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// Compare result with zero
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const auto cond = m_ir->CreateICmpNE(elem, m_ir->getInt64(0));
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m_ir->CreateCondBr(cond, label_diff, label_body, m_md_unlikely);
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}
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// Increase block counter with statistics
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@ -147,7 +147,7 @@ u64 convert_to_timebased_time(u64 time)
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u64 get_timebased_time()
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{
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if (0) if (u64 freq = utils::get_tsc_freq())
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if (u64 freq = utils::get_tsc_freq())
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{
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const u64 tsc = utils::get_tsc();
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@ -207,7 +207,7 @@ void initialize_timebased_time(u64 timebased_init, bool reset)
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// Returns some relative time in microseconds, don't change this fact
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u64 get_system_time()
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{
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if (0) if (u64 freq = utils::get_tsc_freq())
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if (u64 freq = utils::get_tsc_freq())
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{
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const u64 tsc = utils::get_tsc();
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@ -68,7 +68,7 @@ struct cfg_root : cfg::node
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cfg::_enum<xfloat_accuracy> spu_xfloat_accuracy{ this, "XFloat Accuracy", xfloat_accuracy::approximate, false };
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cfg::_int<-1, 14> ppu_128_reservations_loop_max_length{ this, "Accurate PPU 128-byte Reservation Op Max Length", 0, true }; // -1: Always accurate, 0: Never accurate, 1-14: max accurate loop length
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cfg::_int<-64, 64> stub_ppu_traps{ this, "Stub PPU Traps", 0, true }; // Hack, skip PPU traps for rare cases where the trap is continueable (specify relative instructions to skip)
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cfg::_bool full_width_avx512{ this, "Full Width AVX-512", true };
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cfg::_bool precise_spu_verification{ this, "Precise SPU Verification", false }; // Disables use of xorsum based spu verification if enabled.
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cfg::_bool ppu_llvm_nj_fixup{ this, "PPU LLVM Java Mode Handling", true }; // Partially respect current Java Mode for alti-vec ops by PPU LLVM
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cfg::_bool use_accurate_dfma{ this, "Use Accurate DFMA", true }; // Enable accurate double-precision FMA for CPUs which do not support it natively
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cfg::_bool ppu_set_sat_bit{ this, "PPU Set Saturation Bit", false }; // Accuracy. If unset, completely disable saturation flag handling.
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@ -524,7 +524,7 @@ std::string utils::get_system_info()
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}
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else
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{
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fmt::append(result, " | TSC: Bad");
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fmt::append(result, " | TSC: Disabled");
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}
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if (has_avx())
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@ -772,15 +772,26 @@ static const bool s_tsc_freq_evaluated = []() -> bool
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#endif
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if (!utils::has_invariant_tsc())
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{
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return 0;
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}
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if (utils::get_cpu_brand().find("Ryzen") != umax)
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{
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return 0;
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}
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#ifdef _WIN32
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LARGE_INTEGER freq;
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if (!QueryPerformanceFrequency(&freq))
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{
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return 0;
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}
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if (freq.QuadPart <= 9'999'999)
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{
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return 0;
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}
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const ullong timer_freq = freq.QuadPart;
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#else
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@ -880,7 +891,7 @@ static const bool s_tsc_freq_evaluated = []() -> bool
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return round_tsc(res, utils::mul_saturate<u64>(utils::add_saturate<u64>(rdtsc_diff[0], rdtsc_diff[1]), utils::aligned_div(timer_freq, timer_data[1] - timer_data[0])));
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}();
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atomic_storage<u64>::release(utils::s_tsc_freq, cal_tsc);
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atomic_storage<u64>::store(utils::s_tsc_freq, cal_tsc);
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return true;
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}();
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