From fac8bcc20c1668f82f655d887367bf331c8e469a Mon Sep 17 00:00:00 2001
From: kd-11 <karokidii@gmail.com>
Date: Sat, 1 Jul 2023 01:45:46 +0300
Subject: [PATCH] rsx: Formatting and tidying changes

---
 .../GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl     |  6 +++---
 .../Program/GLSLSnippets/RSXProg/RSXVertexFetch.glsl  | 11 ++++++-----
 rpcs3/Emu/RSX/RSXThread.cpp                           |  2 +-
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl b/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl
index 01e83f3c2d..cd42b11be2 100644
--- a/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl
+++ b/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXFragmentPrologue.glsl
@@ -50,7 +50,7 @@ vec4 fetch_fog_value(const in uint mode)
 		// exponential2_abs
 		result.y = exp(-pow(4.709 * (fog_param1 * abs(fog_c.x) + fog_param0 - 1.5), 2.));
 		break;
- case FOG_LINEAR_ABS:
+	case FOG_LINEAR_ABS:
 		// linear_abs
 		result.y = fog_param1 * abs(fog_c.x) + (fog_param0 - 1.);
 		break;
@@ -65,8 +65,8 @@ vec4 fetch_fog_value(const in uint mode)
 // Purely stochastic
 bool coverage_test_passes(const in vec4 _sample)
 {
-	float random  = _rand(gl_FragCoord);
-	return (_sample.a > random);
+	float random_val = _rand(gl_FragCoord);
+	return (_sample.a > random_val);
 }
 #endif
 
diff --git a/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXVertexFetch.glsl b/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXVertexFetch.glsl
index c0be5e8786..66c4a6072b 100644
--- a/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXVertexFetch.glsl
+++ b/rpcs3/Emu/RSX/Program/GLSLSnippets/RSXProg/RSXVertexFetch.glsl
@@ -55,7 +55,7 @@ uint gen_bits(const in uint x, const in uint y, const in uint z, const in uint w
 
 uint gen_bits(const in uint x, const in uint y, const in bool swap)
 {
-	return (swap)? _set_bits(y, x, 8, 8) : _set_bits(x, y, 8, 8);
+	return (swap) ? _set_bits(y, x, 8, 8) : _set_bits(x, y, 8, 8);
 }
 
 // NOTE: (int(n) or int(n)) is broken on some NVIDIA and INTEL hardware when the sign bit is involved.
@@ -159,8 +159,8 @@ attribute_desc fetch_desc(const in int location)
 	uvec2 attrib = texelFetch(vertex_layout_stream, location + int(layout_ptr_offset)).xy;
 #else
 	// Data is packed into a ubo
-	int block = (location >> 1);
-	int sub_block = (location & 1) << 1;
+	const int block = (location >> 1);
+	const int sub_block = (location & 1) << 1;
 	uvec2 attrib = uvec2(
 		ref(input_attributes_blob[block], sub_block + 0),
 		ref(input_attributes_blob[block], sub_block + 1));
@@ -180,8 +180,9 @@ attribute_desc fetch_desc(const in int location)
 
 vec4 read_location(const in int location)
 {
+	int vertex_id;
 	attribute_desc desc = fetch_desc(location);
-	int vertex_id = _gl_VertexID - int(vertex_base_index);
+
 	if (desc.frequency == 0)
 	{
 		vertex_id = 0;
@@ -193,7 +194,7 @@ vec4 read_location(const in int location)
 	}
 	else
 	{
-		vertex_id /= int(desc.frequency); 
+		vertex_id = (_gl_VertexID - int(vertex_base_index)) / int(desc.frequency); 
 	}
 
 	if (desc.is_volatile)
diff --git a/rpcs3/Emu/RSX/RSXThread.cpp b/rpcs3/Emu/RSX/RSXThread.cpp
index 4f367fd422..12437359e0 100644
--- a/rpcs3/Emu/RSX/RSXThread.cpp
+++ b/rpcs3/Emu/RSX/RSXThread.cpp
@@ -2328,7 +2328,7 @@ namespace rsx
 						// Subpixel offset so that (X + bias) * scale will round correctly.
 						// This is done to work around fdiv precision issues in some GPUs (NVIDIA)
 						// We apply the simplification where (x + bias) * z = xz + zbias here.
-						const auto subpixel_bias = 0.01f;
+						constexpr auto subpixel_bias = 0.01f;
 						current_fragment_program.texture_params[i].bias[0] += (subpixel_bias * current_fragment_program.texture_params[i].scale[0]);
 						current_fragment_program.texture_params[i].bias[1] += (subpixel_bias * current_fragment_program.texture_params[i].scale[1]);
 						current_fragment_program.texture_params[i].bias[2] += (subpixel_bias * current_fragment_program.texture_params[i].scale[2]);