From fc3314ea967cfeb62ca815d2c1d9b76f1f589532 Mon Sep 17 00:00:00 2001 From: Vincent Lejeune Date: Sun, 2 Aug 2015 18:50:53 +0200 Subject: [PATCH 1/4] PPU/LLVM: Print PPC block before translated LLVM bytecode --- rpcs3/Emu/Cell/PPUDisAsm.h | 1 + rpcs3/Emu/Cell/PPULLVMRecompiler.cpp | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/rpcs3/Emu/Cell/PPUDisAsm.h b/rpcs3/Emu/Cell/PPUDisAsm.h index 0ad5d216c1..e490ba7c30 100644 --- a/rpcs3/Emu/Cell/PPUDisAsm.h +++ b/rpcs3/Emu/Cell/PPUDisAsm.h @@ -1,6 +1,7 @@ #pragma once #include "Emu/Cell/PPCDisAsm.h" +#include "Emu/Cell/PPUOpcodes.h" class PPUDisAsm : public PPUOpcodes diff --git a/rpcs3/Emu/Cell/PPULLVMRecompiler.cpp b/rpcs3/Emu/Cell/PPULLVMRecompiler.cpp index 4c2a142478..abbab99c02 100644 --- a/rpcs3/Emu/Cell/PPULLVMRecompiler.cpp +++ b/rpcs3/Emu/Cell/PPULLVMRecompiler.cpp @@ -1,6 +1,7 @@ #include "stdafx.h" #include "Utilities/Log.h" #include "Emu/System.h" +#include "Emu/Cell/PPUDisAsm.h" #include "Emu/Cell/PPULLVMRecompiler.h" #include "Emu/Memory/Memory.h" #include "llvm/Support/TargetSelect.h" @@ -120,6 +121,12 @@ std::pair Compiler::Compile(const std::stri m_ir_builder->SetInsertPoint(GetBasicBlockFromAddress(0)); m_ir_builder->CreateBr(GetBasicBlockFromAddress(cfg.start_address)); + // Used to decode instructions + PPUDisAsm dis_asm(CPUDisAsm_DumpMode); + dis_asm.offset = vm::get_ptr(cfg.start_address); + + m_recompilation_engine.Log() << "Recompiling block :\n\n"; + // Convert each instruction in the CFG to LLVM IR std::vector exit_instr_list; for (u32 instr_i : cfg.instruction_addresses) { @@ -130,6 +137,12 @@ std::pair Compiler::Compile(const std::stri if (instr_bb->empty()) { u32 instr = vm::ps3::read32(m_state.current_instruction_address); + + // Dump PPU opcode + dis_asm.dump_pc = m_state.current_instruction_address * 4; + (*PPU_instr::main_list)(&dis_asm, instr); + m_recompilation_engine.Log() << dis_asm.last_opcode; + Decode(instr); if (!m_state.hit_branch_instruction) m_ir_builder->CreateBr(GetBasicBlockFromAddress(m_state.current_instruction_address + 4)); @@ -210,6 +223,7 @@ std::pair Compiler::Compile(const std::stri } } + m_recompilation_engine.Log() << "LLVM bytecode:\n"; m_recompilation_engine.Log() << *m_module; std::string verify; From 09347ba92a0bdf890d486678a1b12de57c76990c Mon Sep 17 00:00:00 2001 From: Vincent Lejeune Date: Wed, 5 Aug 2015 17:25:08 +0200 Subject: [PATCH 2/4] PPU/LLVM: Fix MTOCRF instruction --- rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp b/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp index 42858493f8..2d432f17b9 100644 --- a/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp +++ b/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp @@ -2667,7 +2667,7 @@ void Compiler::MTOCRF(u32 l, u32 crm, u32 rs) { } } - cr_i32 = m_ir_builder->CreateAnd(cr_i32, ~mask); + cr_i32 = m_ir_builder->CreateAnd(cr_i32, mask); rs_i32 = m_ir_builder->CreateAnd(rs_i32, ~mask); cr_i32 = m_ir_builder->CreateOr(cr_i32, rs_i32); SetCr(cr_i32); From 98a3cbdf84e3c7e8a6ed9f6a7be2b423be867572 Mon Sep 17 00:00:00 2001 From: Danila Malyutin Date: Thu, 6 Aug 2015 03:10:14 +0300 Subject: [PATCH 3/4] Fix MTOCRF instruction to be the same as interpreter. --- rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp b/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp index 2d432f17b9..134c283035 100644 --- a/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp +++ b/rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp @@ -2660,16 +2660,16 @@ void Compiler::MTOCRF(u32 l, u32 crm, u32 rs) { for (u32 i = 0; i < 8; i++) { if (crm & (1 << i)) { - mask |= 0xF << ((7 - i) * 4); + mask |= 0xF << (i * 4); // move 0xF to the left i positions (in hex form) if (l) { break; } } } - cr_i32 = m_ir_builder->CreateAnd(cr_i32, mask); - rs_i32 = m_ir_builder->CreateAnd(rs_i32, ~mask); - cr_i32 = m_ir_builder->CreateOr(cr_i32, rs_i32); + cr_i32 = m_ir_builder->CreateAnd(cr_i32, ~mask); // null ith nibble + rs_i32 = m_ir_builder->CreateAnd(rs_i32, mask); // null everything except ith nibble + cr_i32 = m_ir_builder->CreateOr(cr_i32, rs_i32); // now ith cr nibble == ith rs nibble SetCr(cr_i32); } @@ -5314,4 +5314,4 @@ void Compiler::InitRotateMask() { } } } -#endif \ No newline at end of file +#endif From a3c22eb8368b99f93251349c65abe9a35b9f3110 Mon Sep 17 00:00:00 2001 From: Danila Malyutin Date: Thu, 6 Aug 2015 03:16:52 +0300 Subject: [PATCH 4/4] Add MTOCRF tests --- rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp b/rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp index 234266ee0e..b9e4f4eaf1 100644 --- a/rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp +++ b/rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp @@ -692,7 +692,8 @@ void Compiler::RunAllTests() { VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFE, 5, 5, 21u, 22u, 23u, 0u, 1u); VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDE, 0, 5, 7u, 8u, 9u, 0u, 0u); VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDE, 5, 5, 21u, 22u, 23u, 0u, 1u); - // TODO: MTOCRF + VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTOCRF, 0, 5, 7u, 8u, 0u); + VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTOCRF, 5, 5, 0u, 22u, 1u) VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDZE, 0, 5, 7u, 8u, 0u, 0u); VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDZE, 5, 5, 21u, 22u, 0u, 1u); VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFZE, 0, 5, 7u, 8u, 0u, 0u);