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https://github.com/shadps4-emu/shadPS4.git
synced 2025-04-20 03:24:49 +00:00
fix: lower UBO max size to account buffer cache offset (#2388)
* fix: lower UBO max size to account buffer cache offset * review comments * remove UBO size from spec and always set it to max on shader side
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parent
34a4f6e60e
commit
04fe3a79b9
14 changed files with 61 additions and 40 deletions
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@ -633,8 +633,8 @@ void EmitContext::DefineBuffers() {
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for (const auto& desc : info.buffers) {
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const auto sharp = desc.GetSharp(info);
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const bool is_storage = desc.IsStorage(sharp);
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const u32 array_size = sharp.NumDwords() != 0 ? sharp.NumDwords() : MaxUboDwords;
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const bool is_storage = desc.IsStorage(sharp, profile);
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const u32 array_size = profile.max_ubo_size >> 2;
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const auto* data_types = True(desc.used_types & IR::Type::F32) ? &F32 : &U32;
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const Id data_type = (*data_types)[1];
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const Id record_array_type{is_storage ? TypeRuntimeArray(data_type)
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@ -17,6 +17,7 @@
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#include "shader_recompiler/ir/reg.h"
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#include "shader_recompiler/ir/type.h"
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#include "shader_recompiler/params.h"
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#include "shader_recompiler/profile.h"
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#include "shader_recompiler/runtime_info.h"
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#include "video_core/amdgpu/liverpool.h"
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#include "video_core/amdgpu/resource.h"
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@ -24,8 +25,6 @@
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namespace Shader {
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static constexpr size_t NumUserDataRegs = 16;
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static constexpr size_t MaxUboSize = 65536;
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static constexpr size_t MaxUboDwords = MaxUboSize >> 2;
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enum class TextureType : u32 {
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Color1D,
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@ -50,8 +49,9 @@ struct BufferResource {
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bool is_written{};
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bool is_formatted{};
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[[nodiscard]] bool IsStorage(const AmdGpu::Buffer& buffer) const noexcept {
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return buffer.GetSize() > MaxUboSize || is_written || is_gds_buffer;
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[[nodiscard]] bool IsStorage(const AmdGpu::Buffer& buffer,
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const Profile& profile) const noexcept {
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return buffer.GetSize() > profile.max_ubo_size || is_written || is_gds_buffer;
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}
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[[nodiscard]] constexpr AmdGpu::Buffer GetSharp(const Info& info) const noexcept;
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@ -30,6 +30,7 @@ struct Profile {
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bool needs_manual_interpolation{};
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bool needs_lds_barriers{};
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u64 min_ssbo_alignment{};
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u64 max_ubo_size{};
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u32 max_viewport_width{};
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u32 max_viewport_height{};
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u32 max_shared_memory_size{};
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@ -27,7 +27,6 @@ struct BufferSpecialization {
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u32 num_format : 4;
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u32 index_stride : 2;
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u32 element_size : 2;
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u32 size = 0;
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AmdGpu::CompMapping dst_select{};
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AmdGpu::NumberConversion num_conversion{};
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@ -38,8 +37,7 @@ struct BufferSpecialization {
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(data_format == other.data_format && num_format == other.num_format &&
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dst_select == other.dst_select && num_conversion == other.num_conversion)) &&
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(!swizzle_enable ||
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(index_stride == other.index_stride && element_size == other.element_size)) &&
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(size >= other.is_storage || is_storage);
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(index_stride == other.index_stride && element_size == other.element_size));
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}
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};
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@ -87,8 +85,8 @@ struct StageSpecialization {
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boost::container::small_vector<SamplerSpecialization, 16> samplers;
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Backend::Bindings start{};
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explicit StageSpecialization(const Info& info_, RuntimeInfo runtime_info_,
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const Profile& profile_, Backend::Bindings start_)
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StageSpecialization(const Info& info_, RuntimeInfo runtime_info_, const Profile& profile_,
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Backend::Bindings start_)
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: info{&info_}, runtime_info{runtime_info_}, start{start_} {
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fetch_shader_data = Gcn::ParseFetchShader(info_);
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if (info_.stage == Stage::Vertex && fetch_shader_data &&
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@ -107,9 +105,9 @@ struct StageSpecialization {
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binding++;
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}
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ForEachSharp(binding, buffers, info->buffers,
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[](auto& spec, const auto& desc, AmdGpu::Buffer sharp) {
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[profile_](auto& spec, const auto& desc, AmdGpu::Buffer sharp) {
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spec.stride = sharp.GetStride();
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spec.is_storage = desc.IsStorage(sharp);
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spec.is_storage = desc.IsStorage(sharp, profile_);
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spec.is_formatted = desc.is_formatted;
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spec.swizzle_enable = sharp.swizzle_enable;
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if (spec.is_formatted) {
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@ -122,9 +120,6 @@ struct StageSpecialization {
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spec.index_stride = sharp.index_stride;
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spec.element_size = sharp.element_size;
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}
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if (!spec.is_storage) {
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spec.size = sharp.GetSize();
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}
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});
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ForEachSharp(binding, images, info->images,
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[](auto& spec, const auto& desc, AmdGpu::Image sharp) {
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@ -11,11 +11,12 @@
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namespace Vulkan {
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ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler_,
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DescriptorHeap& desc_heap_, vk::PipelineCache pipeline_cache,
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ComputePipelineKey compute_key_, const Shader::Info& info_,
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vk::ShaderModule module)
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: Pipeline{instance_, scheduler_, desc_heap_, pipeline_cache, true}, compute_key{compute_key_} {
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ComputePipeline::ComputePipeline(const Instance& instance, Scheduler& scheduler,
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DescriptorHeap& desc_heap, const Shader::Profile& profile,
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vk::PipelineCache pipeline_cache, ComputePipelineKey compute_key_,
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const Shader::Info& info_, vk::ShaderModule module)
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: Pipeline{instance, scheduler, desc_heap, profile, pipeline_cache, true},
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compute_key{compute_key_} {
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auto& info = stages[int(Shader::LogicalStage::Compute)];
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info = &info_;
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const auto debug_str = GetDebugString();
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@ -49,8 +50,8 @@ ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler
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const auto sharp = buffer.GetSharp(*info);
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bindings.push_back({
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.binding = binding++,
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.descriptorType = buffer.IsStorage(sharp) ? vk::DescriptorType::eStorageBuffer
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: vk::DescriptorType::eUniformBuffer,
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.descriptorType = buffer.IsStorage(sharp, profile) ? vk::DescriptorType::eStorageBuffer
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: vk::DescriptorType::eUniformBuffer,
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.descriptorCount = 1,
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.stageFlags = vk::ShaderStageFlagBits::eCompute,
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});
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@ -31,8 +31,9 @@ struct ComputePipelineKey {
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class ComputePipeline : public Pipeline {
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public:
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ComputePipeline(const Instance& instance, Scheduler& scheduler, DescriptorHeap& desc_heap,
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vk::PipelineCache pipeline_cache, ComputePipelineKey compute_key,
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const Shader::Info& info, vk::ShaderModule module);
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const Shader::Profile& profile, vk::PipelineCache pipeline_cache,
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ComputePipelineKey compute_key, const Shader::Info& info,
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vk::ShaderModule module);
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~ComputePipeline();
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private:
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@ -25,13 +25,13 @@ namespace Vulkan {
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using Shader::Backend::SPIRV::AuxShaderType;
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GraphicsPipeline::GraphicsPipeline(
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const Instance& instance_, Scheduler& scheduler_, DescriptorHeap& desc_heap_,
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const GraphicsPipelineKey& key_, vk::PipelineCache pipeline_cache,
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std::span<const Shader::Info*, MaxShaderStages> infos,
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const Instance& instance, Scheduler& scheduler, DescriptorHeap& desc_heap,
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const Shader::Profile& profile, const GraphicsPipelineKey& key_,
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vk::PipelineCache pipeline_cache, std::span<const Shader::Info*, MaxShaderStages> infos,
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std::span<const Shader::RuntimeInfo, MaxShaderStages> runtime_infos,
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std::optional<const Shader::Gcn::FetchShaderData> fetch_shader_,
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std::span<const vk::ShaderModule> modules)
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: Pipeline{instance_, scheduler_, desc_heap_, pipeline_cache}, key{key_},
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: Pipeline{instance, scheduler, desc_heap, profile, pipeline_cache}, key{key_},
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fetch_shader{std::move(fetch_shader_)} {
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const vk::Device device = instance.GetDevice();
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std::ranges::copy(infos, stages.begin());
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@ -369,8 +369,9 @@ void GraphicsPipeline::BuildDescSetLayout() {
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const auto sharp = buffer.GetSharp(*stage);
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bindings.push_back({
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.binding = binding++,
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.descriptorType = buffer.IsStorage(sharp) ? vk::DescriptorType::eStorageBuffer
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: vk::DescriptorType::eUniformBuffer,
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.descriptorType = buffer.IsStorage(sharp, profile)
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? vk::DescriptorType::eStorageBuffer
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: vk::DescriptorType::eUniformBuffer,
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.descriptorCount = 1,
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.stageFlags = gp_stage_flags,
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});
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@ -75,7 +75,8 @@ struct GraphicsPipelineKey {
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class GraphicsPipeline : public Pipeline {
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public:
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GraphicsPipeline(const Instance& instance, Scheduler& scheduler, DescriptorHeap& desc_heap,
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const GraphicsPipelineKey& key, vk::PipelineCache pipeline_cache,
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const Shader::Profile& profile, const GraphicsPipelineKey& key,
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vk::PipelineCache pipeline_cache,
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std::span<const Shader::Info*, MaxShaderStages> stages,
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std::span<const Shader::RuntimeInfo, MaxShaderStages> runtime_infos,
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std::optional<const Shader::Gcn::FetchShaderData> fetch_shader,
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@ -209,6 +209,11 @@ public:
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return properties.limits.minUniformBufferOffsetAlignment;
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}
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/// Returns the maximum size of uniform buffers.
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vk::DeviceSize UniformMaxSize() const {
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return properties.limits.maxUniformBufferRange;
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}
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/// Returns the minimum required alignment for storage buffers
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vk::DeviceSize StorageMinAlignment() const {
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return properties.limits.minStorageBufferOffsetAlignment;
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@ -254,10 +259,12 @@ public:
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return features.shaderClipDistance;
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}
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/// Returns the maximim viewport width.
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u32 GetMaxViewportWidth() const {
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return properties.limits.maxViewportDimensions[0];
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}
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/// Returns the maximum viewport height.
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u32 GetMaxViewportHeight() const {
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return properties.limits.maxViewportDimensions[1];
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}
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@ -204,6 +204,10 @@ PipelineCache::PipelineCache(const Instance& instance_, Scheduler& scheduler_,
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instance.GetDriverID() == vk::DriverId::eNvidiaProprietary,
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.needs_lds_barriers = instance.GetDriverID() == vk::DriverId::eNvidiaProprietary ||
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instance.GetDriverID() == vk::DriverId::eMoltenvk,
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// When binding a UBO, we calculate its size considering the offset in the larger buffer
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// cache underlying resource. In some cases, it may produce sizes exceeding the system
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// maximum allowed UBO range, so we need to reduce the threshold to prevent issues.
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.max_ubo_size = instance.UniformMaxSize() - instance.UniformMinAlignment(),
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.max_viewport_width = instance.GetMaxViewportWidth(),
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.max_viewport_height = instance.GetMaxViewportHeight(),
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.max_shared_memory_size = instance.MaxComputeSharedMemorySize(),
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@ -222,7 +226,7 @@ const GraphicsPipeline* PipelineCache::GetGraphicsPipeline() {
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}
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const auto [it, is_new] = graphics_pipelines.try_emplace(graphics_key);
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if (is_new) {
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it.value() = std::make_unique<GraphicsPipeline>(instance, scheduler, desc_heap,
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it.value() = std::make_unique<GraphicsPipeline>(instance, scheduler, desc_heap, profile,
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graphics_key, *pipeline_cache, infos,
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runtime_infos, fetch_shader, modules);
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if (Config::collectShadersForDebug()) {
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@ -243,8 +247,9 @@ const ComputePipeline* PipelineCache::GetComputePipeline() {
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}
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const auto [it, is_new] = compute_pipelines.try_emplace(compute_key);
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if (is_new) {
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it.value() = std::make_unique<ComputePipeline>(
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instance, scheduler, desc_heap, *pipeline_cache, compute_key, *infos[0], modules[0]);
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it.value() =
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std::make_unique<ComputePipeline>(instance, scheduler, desc_heap, profile,
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*pipeline_cache, compute_key, *infos[0], modules[0]);
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if (Config::collectShadersForDebug()) {
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auto& m = modules[0];
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module_related_pipelines[m].emplace_back(compute_key);
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@ -68,6 +68,10 @@ public:
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static std::string GetShaderName(Shader::Stage stage, u64 hash,
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std::optional<size_t> perm = {});
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auto& GetProfile() const {
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return profile;
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}
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private:
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bool RefreshGraphicsKey();
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bool RefreshComputeKey();
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@ -14,8 +14,10 @@
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namespace Vulkan {
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Pipeline::Pipeline(const Instance& instance_, Scheduler& scheduler_, DescriptorHeap& desc_heap_,
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vk::PipelineCache pipeline_cache, bool is_compute_ /*= false*/)
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: instance{instance_}, scheduler{scheduler_}, desc_heap{desc_heap_}, is_compute{is_compute_} {}
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const Shader::Profile& profile_, vk::PipelineCache pipeline_cache,
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bool is_compute_ /*= false*/)
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: instance{instance_}, scheduler{scheduler_}, desc_heap{desc_heap_}, profile{profile_},
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is_compute{is_compute_} {}
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Pipeline::~Pipeline() = default;
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@ -5,6 +5,7 @@
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#include "shader_recompiler/backend/bindings.h"
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#include "shader_recompiler/info.h"
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#include "shader_recompiler/profile.h"
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#include "video_core/renderer_vulkan/vk_common.h"
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#include "video_core/texture_cache/texture_cache.h"
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@ -26,7 +27,8 @@ class DescriptorHeap;
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class Pipeline {
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public:
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Pipeline(const Instance& instance, Scheduler& scheduler, DescriptorHeap& desc_heap,
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vk::PipelineCache pipeline_cache, bool is_compute = false);
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const Shader::Profile& profile, vk::PipelineCache pipeline_cache,
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bool is_compute = false);
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virtual ~Pipeline();
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vk::Pipeline Handle() const noexcept {
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@ -66,6 +68,7 @@ protected:
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const Instance& instance;
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Scheduler& scheduler;
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DescriptorHeap& desc_heap;
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const Shader::Profile& profile;
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vk::UniquePipeline pipeline;
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vk::UniquePipelineLayout pipeline_layout;
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vk::UniqueDescriptorSetLayout desc_layout;
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@ -554,11 +554,10 @@ void Rasterizer::BindBuffers(const Shader::Info& stage, Shader::Backend::Binding
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}
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// Second pass to re-bind buffers that were updated after binding
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auto& null_buffer = buffer_cache.GetBuffer(VideoCore::NULL_BUFFER_ID);
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for (u32 i = 0; i < buffer_bindings.size(); i++) {
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const auto& [buffer_id, vsharp] = buffer_bindings[i];
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const auto& desc = stage.buffers[i];
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const bool is_storage = desc.IsStorage(vsharp);
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const bool is_storage = desc.IsStorage(vsharp, pipeline_cache.GetProfile());
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if (!buffer_id) {
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if (desc.is_gds_buffer) {
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const auto* gds_buf = buffer_cache.GetGdsBuffer();
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@ -566,6 +565,7 @@ void Rasterizer::BindBuffers(const Shader::Info& stage, Shader::Backend::Binding
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} else if (instance.IsNullDescriptorSupported()) {
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buffer_infos.emplace_back(VK_NULL_HANDLE, 0, VK_WHOLE_SIZE);
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} else {
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auto& null_buffer = buffer_cache.GetBuffer(VideoCore::NULL_BUFFER_ID);
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buffer_infos.emplace_back(null_buffer.Handle(), 0, VK_WHOLE_SIZE);
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}
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} else {
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