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attempt fix shader comp

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microsoftv 2024-08-16 18:45:55 -04:00
parent b582f5b8eb
commit 3471051ede
6 changed files with 105 additions and 93 deletions
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47
src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
View file

@ -21,12 +21,9 @@ Id SharedAtomicU32(EmitContext& ctx, Id offset, Id value,
return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics, value);
}
Id BufferAtomicU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value,
Id BufferAtomicU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value,
Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
auto& buffer = ctx.buffers[handle];
address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
const Id pointer{ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
const Id pointer{ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, ctx.ConstU32(0U))};
const auto [scope, semantics]{AtomicArgs(ctx)};
return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics, value);
}
@ -60,50 +57,50 @@ Id EmitSharedAtomicSMin32(EmitContext& ctx, Id offset, Id value) {
return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicSMin);
}
Id EmitBufferAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicIAdd);
Id EmitBufferAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicIAdd);
}
Id EmitBufferAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicSMin);
Id EmitBufferAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicSMin);
}
Id EmitBufferAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicUMin);
Id EmitBufferAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicUMin);
}
Id EmitBufferAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicSMax);
Id EmitBufferAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicSMax);
}
Id EmitBufferAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicUMax);
Id EmitBufferAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicUMax);
}
Id EmitBufferAtomicInc32(EmitContext&, IR::Inst*, u32, Id, Id) {
Id EmitBufferAtomicInc32(EmitContext&, IR::Inst*, u32, Id) {
// TODO
UNREACHABLE_MSG("Unsupported BUFFER_ATOMIC opcode: ", IR::Opcode::BufferAtomicInc32);
}
Id EmitBufferAtomicDec32(EmitContext&, IR::Inst*, u32, Id, Id) {
Id EmitBufferAtomicDec32(EmitContext&, IR::Inst*, u32, Id) {
// TODO
UNREACHABLE_MSG("Unsupported BUFFER_ATOMIC opcode: ", IR::Opcode::BufferAtomicDec32);
}
Id EmitBufferAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicAnd);
Id EmitBufferAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicAnd);
}
Id EmitBufferAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicOr);
Id EmitBufferAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicOr);
}
Id EmitBufferAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicXor);
Id EmitBufferAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicXor);
}
Id EmitBufferAtomicExchange32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicExchange);
Id EmitBufferAtomicExchange32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value) {
return BufferAtomicU32(ctx, inst, handle, value, &Sirit::Module::OpAtomicExchange);
}
Id EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {

22
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
View file

@ -81,17 +81,17 @@ void EmitStoreBufferFormatF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id
void EmitStoreBufferFormatF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
void EmitStoreBufferFormatF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
void EmitStoreBufferU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicInc32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicDec32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicExchange32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value);
Id EmitBufferAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicInc32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicDec32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitBufferAtomicExchange32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id value);
Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp);
Id EmitGetAttributeU32(EmitContext& ctx, IR::Attribute attr, u32 comp);
void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, u32 comp);

69
src/shader_recompiler/frontend/translate/vector_memory.cpp
View file

@ -435,64 +435,79 @@ void Translator::BUFFER_STORE_FORMAT(u32 num_dwords, bool is_typed, bool is_form
}
void Translator::BUFFER_ATOMIC(u32 num_dwords, AtomicOp op, const GcnInst& inst) {
const auto& mtbuf = inst.control.mtbuf;
const auto& mubuf = inst.control.mubuf;
const IR::VectorReg vaddr{inst.src[0].code};
const IR::VectorReg vdata{inst.src[1].code};
const IR::ScalarReg sharp{inst.src[2].code * 4};
const IR::Value address = [&] -> IR::Value {
if (mtbuf.idxen && mtbuf.offen) {
const IR::ScalarReg srsrc{inst.src[2].code * 4};
const IR::Value handle =
ir.CompositeConstruct(ir.GetScalarReg(srsrc), ir.GetScalarReg(srsrc + 1),
ir.GetScalarReg(srsrc + 2), ir.GetScalarReg(srsrc + 3));
/*const IR::Value address = [&] -> IR::Value {
if (mubuf.idxen && mubuf.offen) {
return ir.CompositeConstruct(ir.GetVectorReg(vaddr), ir.GetVectorReg(vaddr + 1));
}
if (mtbuf.idxen || mtbuf.offen) {
if (mubuf.idxen || mubuf.offen) {
return ir.GetVectorReg(vaddr);
}
return {};
}();
}();*/
const IR::Value soffset{GetSrc(inst.src[3])};
ASSERT_MSG(soffset.IsImmediate() && soffset.U32() == 0, "Non immediate offset not supported");
IR::BufferInstInfo info{};
info.index_enable.Assign(mtbuf.idxen);
info.offset_enable.Assign(mtbuf.offen);
info.inst_offset.Assign(mtbuf.offset);
info.index_enable.Assign(mubuf.idxen);
info.offset_enable.Assign(mubuf.offen);
info.inst_offset.Assign(mubuf.offset);
const IR::Value handle =
ir.CompositeConstruct(ir.GetScalarReg(sharp), ir.GetScalarReg(sharp + 1),
ir.GetScalarReg(sharp + 2), ir.GetScalarReg(sharp + 3));
const IR::Value tst{GetSrc(inst.src[1])};
const IR::Value value = ir.GetVectorReg(vdata);
IR::Value value{};
const IR::VectorReg src_reg{inst.src[1].code};
switch (num_dwords) {
case 1:
value = ir.GetVectorReg<Shader::IR::F32>(src_reg);
break;
case 2:
value = ir.CompositeConstruct(ir.GetVectorReg<Shader::IR::F32>(src_reg),
ir.GetVectorReg<Shader::IR::F32>(src_reg + 1));
break;
}
const IR::Value handle{GetSrc(inst.src[2])};
const IR::Value result = [&] {
switch (op) {
case AtomicOp::Swap:
return ir.BufferAtomicExchange(handle, address, value, info);
return ir.BufferAtomicExchange(handle, value, info);
case AtomicOp::Add:
return ir.BufferAtomicIAdd(handle, address, value, info);
if (num_dwords == 1) {
return ir.BufferAtomicIAdd(handle, tst, info);
} else if (num_dwords == 2) {
// return ir.BufferAtomicFAdd(handle, final_address, value, info);
}
case AtomicOp::Smin:
return ir.BufferAtomicIMin(handle, address, value, true, info);
return ir.BufferAtomicIMin(handle, value, true, info);
case AtomicOp::Umin:
return ir.BufferAtomicIMin(handle, address, value, false, info);
return ir.BufferAtomicIMin(handle, value, false, info);
case AtomicOp::Smax:
return ir.BufferAtomicIMax(handle, address, value, true, info);
return ir.BufferAtomicIMax(handle, value, true, info);
case AtomicOp::Umax:
return ir.BufferAtomicIMax(handle, address, value, false, info);
return ir.BufferAtomicIMax(handle, value, false, info);
case AtomicOp::And:
return ir.BufferAtomicAnd(handle, address, value, info);
return ir.BufferAtomicAnd(handle, value, info);
case AtomicOp::Or:
return ir.BufferAtomicOr(handle, address, value, info);
return ir.BufferAtomicOr(handle, value, info);
case AtomicOp::Xor:
return ir.BufferAtomicXor(handle, address, value, info);
return ir.BufferAtomicXor(handle, value, info);
case AtomicOp::Inc:
return ir.BufferAtomicInc(handle, address, value, info);
return ir.BufferAtomicInc(handle, value, info);
case AtomicOp::Dec:
return ir.BufferAtomicDec(handle, address, value, info);
return ir.BufferAtomicDec(handle, value, info);
default:
UNREACHABLE();
}
}();
if (mtbuf.glc) {
ir.SetVectorReg(vdata, IR::U32{result});
if (mubuf.glc) {
ir.SetVectorReg(src_reg, IR::U32{result});
}
}

40
src/shader_recompiler/ir/ir_emitter.cpp
View file

@ -369,51 +369,51 @@ void IREmitter::StoreBuffer(int num_dwords, const Value& handle, const Value& ad
}
}
Value IREmitter::BufferAtomicIAdd(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicIAdd(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicIAdd32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicIAdd32, /*Flags{info},*/ handle, value);
}
Value IREmitter::BufferAtomicIMin(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicIMin(const Value& handle, const Value& value,
bool is_signed, BufferInstInfo info) {
return is_signed ? Inst(Opcode::BufferAtomicSMin32, Flags{info}, handle, address, value)
: Inst(Opcode::BufferAtomicUMin32, Flags{info}, handle, address, value);
return is_signed ? Inst(Opcode::BufferAtomicSMin32, Flags{info}, handle, value)
: Inst(Opcode::BufferAtomicUMin32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicIMax(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicIMax(const Value& handle, const Value& value,
bool is_signed, BufferInstInfo info) {
return is_signed ? Inst(Opcode::BufferAtomicSMax32, Flags{info}, handle, address, value)
: Inst(Opcode::BufferAtomicUMax32, Flags{info}, handle, address, value);
return is_signed ? Inst(Opcode::BufferAtomicSMax32, Flags{info}, handle, value)
: Inst(Opcode::BufferAtomicUMax32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicInc(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicInc(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicInc32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicInc32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicDec(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicDec(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicDec32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicDec32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicAnd(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicAnd(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicAnd32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicAnd32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicOr(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicOr(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicOr32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicOr32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicXor(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicXor(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicXor32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicXor32, Flags{info}, handle, value);
}
Value IREmitter::BufferAtomicExchange(const Value& handle, const Value& address, const Value& value,
Value IREmitter::BufferAtomicExchange(const Value& handle, const Value& value,
BufferInstInfo info) {
return Inst(Opcode::BufferAtomicExchange32, Flags{info}, handle, address, value);
return Inst(Opcode::BufferAtomicExchange32, Flags{info}, handle, value);
}
void IREmitter::StoreBufferFormat(int num_dwords, const Value& handle, const Value& address,

18
src/shader_recompiler/ir/ir_emitter.h
View file

@ -100,23 +100,23 @@ public:
void StoreBufferFormat(int num_dwords, const Value& handle, const Value& address,
const Value& data, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicIAdd(const Value& handle, const Value& a, const Value& b,
[[nodiscard]] Value BufferAtomicIAdd(const Value& handle, const Value& a,
BufferInstInfo info);
[[nodiscard]] Value BufferAtomicIMin(const Value& handle, const Value& a, const Value& b,
[[nodiscard]] Value BufferAtomicIMin(const Value& handle, const Value& a,
bool is_signed, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicIMax(const Value& handle, const Value& a, const Value& b,
[[nodiscard]] Value BufferAtomicIMax(const Value& handle, const Value& a,
bool is_signed, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicInc(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicInc(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicDec(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicDec(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicAnd(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicAnd(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicOr(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicOr(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicXor(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicXor(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] Value BufferAtomicExchange(const Value& handle, const Value& address,
[[nodiscard]] Value BufferAtomicExchange(const Value& handle,
const Value& value, BufferInstInfo info);
[[nodiscard]] U32 LaneId();

2
src/shader_recompiler/ir/opcodes.inc
View file

@ -96,7 +96,7 @@ OPCODE(StoreBufferFormatF32x4, Void, Opaq
OPCODE(StoreBufferU32, Void, Opaque, Opaque, U32, )
// Buffer atomic operations
OPCODE(BufferAtomicIAdd32, Opaque, Void, U32, U32, )
OPCODE(BufferAtomicIAdd32, U32, Opaque, F32, )
OPCODE(BufferAtomicSMin32, U32, U32, U32, )
OPCODE(BufferAtomicUMin32, U32, U32, U32, )
OPCODE(BufferAtomicSMax32, U32, U32, U32, )