Add S_XOR_B32 opcode (#911)

* Add S_XOR_B32

* Stub S_OR_B32
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Raven 2024-09-14 23:52:30 +08:00 committed by GitHub
parent 12a0a02e38
commit 5c5c02cb04
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2 changed files with 11 additions and 0 deletions

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@ -55,6 +55,8 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
return S_ASHR_I32(inst);
case Opcode::S_OR_B32:
return S_OR_B32(inst);
case Opcode::S_XOR_B32:
return S_XOR_B32(inst);
case Opcode::S_LSHL_B32:
return S_LSHL_B32(inst);
case Opcode::S_LSHR_B32:
@ -417,6 +419,14 @@ void Translator::S_OR_B32(const GcnInst& inst) {
ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
}
void Translator::S_XOR_B32(const GcnInst& inst) {
const IR::U32 src0{GetSrc(inst.src[0])};
const IR::U32 src1{GetSrc(inst.src[1])};
const IR::U32 result{ir.BitwiseXor(src0, src1)};
SetDst(inst.dst[0], result);
ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
}
void Translator::S_LSHR_B32(const GcnInst& inst) {
const IR::U32 src0{GetSrc(inst.src[0])};
const IR::U32 src1{GetSrc(inst.src[1])};

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@ -87,6 +87,7 @@ public:
void S_AND_B32(NegateMode negate, const GcnInst& inst);
void S_ASHR_I32(const GcnInst& inst);
void S_OR_B32(const GcnInst& inst);
void S_XOR_B32(const GcnInst& inst);
void S_LSHR_B32(const GcnInst& inst);
void S_CSELECT_B32(const GcnInst& inst);
void S_CSELECT_B64(const GcnInst& inst);