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amdgpu: gpuclock64 in write eop packet

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psucien 2024-08-10 20:56:08 +02:00
parent 96aad1c6c1
commit 5d0a30d165
1 changed files with 11 additions and 7 deletions
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18
src/video_core/amdgpu/pm4_cmds.h
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@ -282,6 +282,13 @@ enum class InterruptSelect : u32 {
IrqUndocumented = 3,
};
static u64 GetGpuClock64() {
auto now = std::chrono::high_resolution_clock::now();
auto duration = now.time_since_epoch();
auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
return static_cast<u64>(ticks);
}
struct PM4CmdEventWriteEop {
PM4Type3Header header;
union {
@ -325,6 +332,10 @@ struct PM4CmdEventWriteEop {
*Address<u64>() = DataQWord();
break;
}
case DataSelect::GpuClock64: {
*Address<u64>() = GetGpuClock64();
break;
}
case DataSelect::PerfCounter: {
*Address<u64>() = Common::FencedRDTSC();
break;
@ -652,13 +663,6 @@ struct PM4CmdReleaseMem {
return data_lo | u64(data_hi) << 32;
}
uint64_t GetGpuClock64() const {
auto now = std::chrono::high_resolution_clock::now();
auto duration = now.time_since_epoch();
auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
return static_cast<uint64_t>(ticks);
}
void SignalFence(Platform::InterruptId irq_id) const {
switch (data_sel.Value()) {
case DataSelect::Data32Low: {