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https://github.com/shadps4-emu/shadPS4.git
synced 2025-04-22 04:24:44 +00:00
add new Value variant for string literal. Use arg0 for fmt string
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parent
577af02346
commit
6722f2805a
12 changed files with 50 additions and 28 deletions
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@ -39,6 +39,8 @@ ArgType Arg(EmitContext& ctx, const IR::Value& arg) {
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return arg.ScalarReg();
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} else if constexpr (std::is_same_v<ArgType, IR::VectorReg>) {
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return arg.VectorReg();
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} else if constexpr (std::is_same_v<ArgType, const char*>) {
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return arg.StringLiteral();
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}
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}
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@ -50,12 +50,9 @@ void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) {
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throw NotImplementedException("Geometry streams");
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}
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void EmitDebugPrint(EmitContext& ctx, IR::Inst* inst, Id arg0, Id arg1, Id arg2, Id arg3, Id arg4) {
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DebugPrintFlags flags = inst->Flags<DebugPrintFlags>();
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const std::string& format_string = ctx.info.string_pool[flags.string_idx];
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Id fmt = ctx.String(format_string);
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std::array<Id, IR::NumArgsOf(IR::Opcode::DebugPrint)> fmt_args = {arg0, arg1, arg2, arg3, arg4};
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void EmitDebugPrint(EmitContext& ctx, IR::Inst* inst, Id fmt, Id arg0, Id arg1, Id arg2, Id arg3) {
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IR::DebugPrintFlags flags = inst->Flags<IR::DebugPrintFlags>();
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std::array<Id, IR::DEBUGPRINT_NUM_FORMAT_ARGS> fmt_args = {arg0, arg1, arg2, arg3};
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auto fmt_args_span = std::span<Id>(fmt_args.begin(), fmt_args.begin() + flags.num_args);
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ctx.OpDebugPrintf(fmt, fmt_args_span);
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}
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@ -73,6 +73,8 @@ Id EmitContext::Def(const IR::Value& value) {
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return ConstF32(value.F32());
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case IR::Type::F64:
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return Constant(F64[1], value.F64());
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case IR::Type::StringLiteral:
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return String(value.StringLiteral());
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default:
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throw NotImplementedException("Immediate type {}", value.Type());
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}
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@ -2,12 +2,20 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/bit_field.h"
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#include "shader_recompiler/ir/opcodes.h"
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#include "src/common/types.h"
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#pragma once
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namespace Shader::IR {
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constexpr size_t DEBUGPRINT_NUM_FORMAT_ARGS = NumArgsOf(IR::Opcode::DebugPrint) - 1;
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union DebugPrintFlags {
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u32 raw;
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BitField<0, 16, u32> string_idx;
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BitField<16, 16, u32> num_args;
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};
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// For now, only flag is the number of variadic format args actually used
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// So bitfield not really needed
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BitField<0, 32, u32> num_args;
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};
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} // namespace Shader::IR
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@ -1563,35 +1563,31 @@ void IREmitter::ImageWrite(const Value& handle, const Value& coords, const Value
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// Renderdoc accepts format specifiers, e.g. %u, listed here:
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// https://github.com/KhronosGroup/Vulkan-ValidationLayers/blob/main/docs/debug_printf.md
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//
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// fmt must be a string literal (pointer is shallow copied into a Value)
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// Example usage:
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// ir.DebugPrint("invocation xyz: (%u, %u, %u)",
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// {ir.GetVectorReg(IR::VectorReg::V0),
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// ir.GetVectorReg(IR::VectorReg::V1),
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// ir.GetVectorReg(IR::VectorReg::V2)});
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void IREmitter::DebugPrint(std::string_view format,
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boost::container::small_vector<Value, 5> format_args) {
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constexpr size_t PRINT_MAX_ARGS = NumArgsOf(IR::Opcode::DebugPrint);
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std::array<Value, PRINT_MAX_ARGS> args;
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void IREmitter::DebugPrint(const char* fmt, boost::container::small_vector<Value, 5> format_args) {
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std::array<Value, DEBUGPRINT_NUM_FORMAT_ARGS> args;
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ASSERT_MSG(format_args.size() < PRINT_MAX_ARGS, "DebugPrint only supports up to {} format args",
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PRINT_MAX_ARGS);
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ASSERT_MSG(format_args.size() < DEBUGPRINT_NUM_FORMAT_ARGS,
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"DebugPrint only supports up to {} format args", DEBUGPRINT_NUM_FORMAT_ARGS);
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for (int i = 0; i < format_args.size(); i++) {
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args[i] = format_args[i];
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}
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for (int i = format_args.size(); i < PRINT_MAX_ARGS; i++) {
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for (int i = format_args.size(); i < DEBUGPRINT_NUM_FORMAT_ARGS; i++) {
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args[i] = Inst(Opcode::Void);
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}
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Value val = Inst(Opcode::DebugPrint, args[0], args[1], args[2], args[3], args[4]);
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IR::Value fmt_val{fmt};
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DebugPrintFlags flags;
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flags.string_idx.Assign(info.string_pool.size());
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info.string_pool.emplace_back(format);
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flags.num_args.Assign(format_args.size());
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val.Inst()->SetFlags<DebugPrintFlags>(flags);
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Inst(Opcode::DebugPrint, Flags{flags}, fmt_val, args[0], args[1], args[2], args[3]);
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}
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} // namespace Shader::IR
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@ -45,7 +45,7 @@ public:
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void Epilogue();
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void Discard();
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void Discard(const U1& cond);
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void DebugPrint(std::string_view format, boost::container::small_vector<Value, 5> args);
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void DebugPrint(const char* fmt, boost::container::small_vector<Value, 5> args);
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void Barrier();
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void WorkgroupMemoryBarrier();
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@ -51,6 +51,7 @@ constexpr Type F32x4{Type::F32x4};
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constexpr Type F64x2{Type::F64x2};
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constexpr Type F64x3{Type::F64x3};
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constexpr Type F64x4{Type::F64x4};
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constexpr Type StringLiteral{Type::StringLiteral};
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constexpr OpcodeMeta META_TABLE[]{
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#define OPCODE(name_token, type_token, ...) \
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@ -14,7 +14,7 @@ OPCODE(Prologue, Void,
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OPCODE(Epilogue, Void, )
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OPCODE(Discard, Void, )
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OPCODE(DiscardCond, Void, U1, )
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OPCODE(DebugPrint, Void, Opaque, Opaque, Opaque, Opaque, Opaque, )
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OPCODE(DebugPrint, Void, StringLiteral, Opaque, Opaque, Opaque, Opaque, )
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// Constant memory operations
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OPCODE(ReadConst, U32, U32x2, U32, )
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@ -9,10 +9,9 @@ namespace Shader::IR {
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std::string NameOf(Type type) {
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static constexpr std::array names{
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"Opaque", "Label", "Reg", "Pred", "Attribute", "U1", "U8", "U16", "U32",
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"U64", "F16", "F32", "F64", "U32x2", "U32x3", "U32x4", "F16x2", "F16x3",
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"F16x4", "F32x2", "F32x3", "F32x4", "F64x2", "F64x3", "F64x4",
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};
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"Opaque", "Label", "Reg", "Pred", "Attribute", "U1", "U8", "U16", "U32",
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"U64", "F16", "F32", "F64", "U32x2", "U32x3", "U32x4", "F16x2", "F16x3",
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"F16x4", "F32x2", "F32x3", "F32x4", "F64x2", "F64x3", "F64x4", "StringLiteral"};
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const size_t bits{static_cast<size_t>(type)};
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if (bits == 0) {
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return "Void";
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@ -36,6 +36,7 @@ enum class Type {
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F64x2 = 1 << 22,
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F64x3 = 1 << 23,
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F64x4 = 1 << 24,
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StringLiteral = 1 << 25,
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};
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DECLARE_ENUM_FLAG_OPERATORS(Type)
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@ -1,6 +1,7 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <string>
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#include "shader_recompiler/ir/value.h"
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namespace Shader::IR {
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@ -27,6 +28,8 @@ Value::Value(u64 value) noexcept : type{Type::U64}, imm_u64{value} {}
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Value::Value(f64 value) noexcept : type{Type::F64}, imm_f64{value} {}
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Value::Value(const char* value) noexcept : type{Type::StringLiteral}, string_literal{value} {}
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IR::Type Value::Type() const noexcept {
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if (IsPhi()) {
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// The type of a phi node is stored in its flags
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@ -69,6 +72,8 @@ bool Value::operator==(const Value& other) const {
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case Type::U64:
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case Type::F64:
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return imm_u64 == other.imm_u64;
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case Type::StringLiteral:
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return std::string(string_literal) == other.string_literal;
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case Type::U32x2:
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case Type::U32x3:
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case Type::U32x4:
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@ -39,6 +39,7 @@ public:
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explicit Value(f32 value) noexcept;
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explicit Value(u64 value) noexcept;
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explicit Value(f64 value) noexcept;
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explicit Value(const char* value) noexcept;
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[[nodiscard]] bool IsIdentity() const noexcept;
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[[nodiscard]] bool IsPhi() const noexcept;
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@ -60,6 +61,7 @@ public:
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[[nodiscard]] f32 F32() const;
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[[nodiscard]] u64 U64() const;
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[[nodiscard]] f64 F64() const;
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[[nodiscard]] const char* StringLiteral() const;
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[[nodiscard]] bool operator==(const Value& other) const;
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[[nodiscard]] bool operator!=(const Value& other) const;
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@ -78,6 +80,7 @@ private:
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f32 imm_f32;
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u64 imm_u64;
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f64 imm_f64;
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const char* string_literal;
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};
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};
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static_assert(static_cast<u32>(IR::Type::Void) == 0, "memset relies on IR::Type being zero");
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@ -348,6 +351,14 @@ inline f64 Value::F64() const {
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return imm_f64;
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}
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inline const char* Value::StringLiteral() const {
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if (IsIdentity()) {
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return inst->Arg(0).StringLiteral();
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}
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DEBUG_ASSERT(type == Type::StringLiteral);
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return string_literal;
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}
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[[nodiscard]] inline bool IsPhi(const Inst& inst) {
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return inst.GetOpcode() == Opcode::Phi;
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}
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