diff --git a/.github/linux-appimage-qt.sh b/.github/linux-appimage-qt.sh index 203d214e3..fe77c678c 100755 --- a/.github/linux-appimage-qt.sh +++ b/.github/linux-appimage-qt.sh @@ -19,12 +19,13 @@ chmod a+x linuxdeploy-x86_64.AppImage chmod a+x linuxdeploy-plugin-qt-x86_64.AppImage chmod a+x linuxdeploy-plugin-checkrt-x86_64.sh - # Build AppImage ./linuxdeploy-x86_64.AppImage --appdir AppDir ./linuxdeploy-plugin-checkrt-x86_64.sh --appdir AppDir cp -a "$GITHUB_WORKSPACE/build/translations" AppDir/usr/bin -./linuxdeploy-x86_64.AppImage --appdir AppDir -d "$GITHUB_WORKSPACE"/.github/shadps4.desktop -e "$GITHUB_WORKSPACE"/build/shadps4 -i "$GITHUB_WORKSPACE"/.github/shadps4.png --plugin qt --output appimage +./linuxdeploy-x86_64.AppImage --appdir AppDir -d "$GITHUB_WORKSPACE"/.github/shadps4.desktop -e "$GITHUB_WORKSPACE"/build/shadps4 -i "$GITHUB_WORKSPACE"/.github/shadps4.png --plugin qt +rm AppDir/usr/plugins/multimedia/libgstreamermediaplugin.so +./linuxdeploy-x86_64.AppImage --appdir AppDir --output appimage mv Shadps4-x86_64.AppImage Shadps4-qt.AppImage diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 6f84ac330..419f2e12f 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -9,6 +9,10 @@ on: pull_request: branches: [ "*" ] +concurrency: + group: ci-${{ github.event_name }}-${{ github.ref }} + cancel-in-progress: ${{ github.event_name == 'push' }} + env: BUILD_TYPE: Release @@ -287,7 +291,7 @@ jobs: submodules: recursive - name: Install dependencies - run: sudo apt-get update && sudo apt install -y libx11-dev libxext-dev libwayland-dev libfuse2 clang build-essential + run: sudo apt-get update && sudo apt install -y libx11-dev libxext-dev libwayland-dev libfuse2 clang build-essential libasound2-dev libpulse-dev libopenal-dev - name: Cache CMake Configuration uses: actions/cache@v4 @@ -343,7 +347,7 @@ jobs: submodules: recursive - name: Install dependencies - run: sudo apt-get update && sudo apt install -y libx11-dev libxext-dev libwayland-dev libfuse2 clang build-essential qt6-base-dev qt6-tools-dev qt6-multimedia-dev + run: sudo apt-get update && sudo apt install -y libx11-dev libxext-dev libwayland-dev libfuse2 clang build-essential qt6-base-dev qt6-tools-dev qt6-multimedia-dev libasound2-dev libpulse-dev libopenal-dev - name: Cache CMake Configuration uses: actions/cache@v4 diff --git a/CMakeLists.txt b/CMakeLists.txt index c9ea15918..22d0e0a2d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -8,7 +8,7 @@ set(CMAKE_CXX_STANDARD_REQUIRED True) if(APPLE) enable_language(OBJC) - set(CMAKE_OSX_DEPLOYMENT_TARGET 11) + set(CMAKE_OSX_DEPLOYMENT_TARGET 14) endif() if (NOT CMAKE_BUILD_TYPE) @@ -338,6 +338,19 @@ set(MISC_LIBS src/core/libraries/screenshot/screenshot.cpp src/core/libraries/screenshot/screenshot.h ) +set(DEV_TOOLS src/core/devtools/layer.cpp + src/core/devtools/layer.h + src/core/devtools/gcn/gcn_context_regs.cpp + src/core/devtools/gcn/gcn_op_names.cpp + src/core/devtools/gcn/gcn_shader_regs.cpp + src/core/devtools/widget/cmd_list.cpp + src/core/devtools/widget/cmd_list.h + src/core/devtools/widget/frame_dump.cpp + src/core/devtools/widget/frame_dump.h + src/core/devtools/widget/frame_graph.cpp + src/core/devtools/widget/frame_graph.h +) + set(COMMON src/common/logging/backend.cpp src/common/logging/backend.h src/common/logging/filter.cpp @@ -449,6 +462,9 @@ set(CORE src/core/aerolib/stubs.cpp ${USBD_LIB} ${MISC_LIBS} ${DIALOGS_LIB} + ${DEV_TOOLS} + src/core/debug_state.cpp + src/core/debug_state.h src/core/linker.cpp src/core/linker.h src/core/memory.cpp @@ -623,8 +639,6 @@ set(IMGUI src/imgui/imgui_config.h src/imgui/imgui_layer.h src/imgui/imgui_std.h src/imgui/imgui_texture.h - src/imgui/layer/video_info.cpp - src/imgui/layer/video_info.h src/imgui/renderer/imgui_core.cpp src/imgui/renderer/imgui_core.h src/imgui/renderer/imgui_impl_sdl3.cpp @@ -723,7 +737,7 @@ endif() create_target_directory_groups(shadps4) -target_link_libraries(shadps4 PRIVATE magic_enum::magic_enum fmt::fmt toml11::toml11 tsl::robin_map xbyak::xbyak Tracy::TracyClient RenderDoc::API FFmpeg::ffmpeg Dear_ImGui) +target_link_libraries(shadps4 PRIVATE magic_enum::magic_enum fmt::fmt toml11::toml11 tsl::robin_map xbyak::xbyak Tracy::TracyClient RenderDoc::API FFmpeg::ffmpeg Dear_ImGui gcn) target_link_libraries(shadps4 PRIVATE Boost::headers GPUOpen::VulkanMemoryAllocator sirit Vulkan::Headers xxHash::xxhash Zydis::Zydis glslang::SPIRV glslang::glslang SDL3::SDL3 pugixml::pugixml) target_compile_definitions(shadps4 PRIVATE IMGUI_USER_CONFIG="imgui/imgui_config.h") diff --git a/README.md b/README.md index 83f59a2c1..da01833e5 100644 --- a/README.md +++ b/README.md @@ -34,7 +34,7 @@ SPDX-License-Identifier: GPL-2.0-or-later # General information -shadPS4 is an early **PlayStation 4** emulator for **Windows**, **Linux** and **macOS** written in C++. +**shadPS4** is an early **PlayStation 4** emulator for **Windows**, **Linux** and **macOS** written in C++. If you encounter problems or have doubts, do not hesitate to look at the [**Quickstart**](https://github.com/shadps4-emu/shadPS4/blob/main/documents/Quickstart/Quickstart.md). @@ -44,7 +44,7 @@ To discuss shadPS4 development, suggest ideas or to ask for help, join our [**Di To get the latest news, go to our [**X (Twitter)**](https://x.com/shadps4) or our [**website**](https://shadps4.net/). -For those who'd like to donate to the project, we now have a [Kofi page!](https://ko-fi.com/shadps4) +For those who'd like to donate to the project, we now have a [**Kofi page**](https://ko-fi.com/shadps4)! # Status @@ -72,40 +72,11 @@ Check the build instructions for [**Linux**](https://github.com/shadps4-emu/shad Check the build instructions for [**macOS**](https://github.com/shadps4-emu/shadPS4/blob/main/documents/building-macos.md). > [!IMPORTANT] -> macOS users need at least macOS 15 on Apple Silicon-based Mac devices and at least macOS 11 on Intel-based Mac devices. - -## Building status - -
-Windows - -| Windows | Build status | -|--------|--------| -|Windows SDL Build|[![Windows-sdl](https://github.com/shadps4-emu/shadPS4/actions/workflows/windows.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/windows.yml) -|Windows Qt Build|[![Windows-qt](https://github.com/shadps4-emu/shadPS4/actions/workflows/windows-qt.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/windows-qt.yml) -
- -
-Linux - -| Linux | Build status | -|--------|--------| -|Linux SDL Build|[![Linux-sdl](https://github.com/shadps4-emu/shadPS4/actions/workflows/linux.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/linux.yml) -|Linux Qt Build|[![Linux-qt](https://github.com/shadps4-emu/shadPS4/actions/workflows/linux-qt.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/linux-qt.yml) -
- -
-macOS - -| macOS | Build status | -|--------|--------| -|macOS SDL Build|[![macOS-sdl](https://github.com/shadps4-emu/shadPS4/actions/workflows/macos.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/macos.yml) -|macOS Qt Build|[![macOS-qt](https://github.com/shadps4-emu/shadPS4/actions/workflows/macos-qt.yml/badge.svg)](https://github.com/shadps4-emu/shadPS4/actions/workflows/macos-qt.yml) -
+> macOS users need at least macOS 15 on Apple Silicon-based Mac devices and at least macOS 14 on Intel-based Mac devices. # Debugging and reporting issues -For more information on how to test, debug and report issues with the emulator or games, read the [Debugging documentation](https://github.com/shadps4-emu/shadPS4/blob/main/documents/Debugging/Debugging.md). +For more information on how to test, debug and report issues with the emulator or games, read the [**Debugging documentation**](https://github.com/shadps4-emu/shadPS4/blob/main/documents/Debugging/Debugging.md). # Keyboard mapping diff --git a/REUSE.toml b/REUSE.toml index 39ea0c21d..e1a266030 100644 --- a/REUSE.toml +++ b/REUSE.toml @@ -3,16 +3,16 @@ version = 1 [[annotations]] path = [ "REUSE.toml", - "CMakeSettings.json", - ".github/FUNDING.yml", - ".github/shadps4.desktop", - ".github/shadps4.png", - ".gitmodules", - "documents/changelog.txt", - "documents/Quickstart/2.png", - "documents/Screenshots/*", - "scripts/ps4_names.txt", - "src/images/about_icon.png", + "CMakeSettings.json", + ".github/FUNDING.yml", + ".github/shadps4.desktop", + ".github/shadps4.png", + ".gitmodules", + "documents/changelog.txt", + "documents/Quickstart/2.png", + "documents/Screenshots/*", + "scripts/ps4_names.txt", + "src/images/about_icon.png", "src/images/controller_icon.png", "src/images/dump_icon.png", "src/images/exit_icon.png", @@ -26,18 +26,18 @@ path = [ "src/images/folder_icon.png", "src/images/grid_icon.png", "src/images/iconsize_icon.png", - "src/images/list_icon.png", - "src/images/list_mode_icon.png", - "src/images/pause_icon.png", - "src/images/play_icon.png", - "src/images/refresh_icon.png", - "src/images/settings_icon.png", - "src/images/stop_icon.png", - "src/images/shadPS4.icns", - "src/images/shadps4.ico", - "src/images/themes_icon.png", - "src/images/update_icon.png", - "src/shadps4.qrc", + "src/images/list_icon.png", + "src/images/list_mode_icon.png", + "src/images/pause_icon.png", + "src/images/play_icon.png", + "src/images/refresh_icon.png", + "src/images/settings_icon.png", + "src/images/stop_icon.png", + "src/images/shadPS4.icns", + "src/images/shadps4.ico", + "src/images/themes_icon.png", + "src/images/update_icon.png", + "src/shadps4.qrc", "src/shadps4.rc", ] precedence = "aggregate" @@ -73,3 +73,15 @@ path = "src/imgui/renderer/fonts/NotoSansJP-Regular.ttf" precedence = "aggregate" SPDX-FileCopyrightText = "2012 Google Inc. All Rights Reserved." SPDX-License-Identifier = "OFL-1.1" + +[[annotations]] +path = "src/imgui/renderer/fonts/ProggyVector-Regular.ttf" +precedence = "aggregate" +SPDX-FileCopyrightText = "Copyright (c) 2004, 2005 Tristan Grimmer" +SPDX-License-Identifier = "MIT" + +[[annotations]] +path = "externals/gcn/include/**" +SPDX-FileCopyrightText = "NONE" +SPDX-License-Identifier = "CC0-1.0" + diff --git a/documents/building-linux.md b/documents/building-linux.md index 622de543b..989669f4f 100644 --- a/documents/building-linux.md +++ b/documents/building-linux.md @@ -3,28 +3,28 @@ SPDX-FileCopyrightText: 2024 shadPS4 Emulator Project SPDX-License-Identifier: GPL-2.0-or-later --> -## Build shadPS4 for Linux +## Build shadPS4 for Linux ### Install the necessary tools to build shadPS4: #### Debian & Ubuntu ``` -sudo apt-get install build-essential libasound2-dev libpulse-dev libopenal-dev zlib1g-dev libedit-dev libvulkan-dev libudev-dev git libevdev-dev libsdl2-2.0 libsdl2-dev libjack-dev libsndio-dev qt6-base-dev qt6-tools-dev +sudo apt install build-essential clang git cmake libasound2-dev libpulse-dev libopenal-dev libssl-dev zlib1g-dev libedit-dev libudev-dev libevdev-dev libsdl2-dev libjack-dev libsndio-dev qt6-base-dev qt6-tools-dev qt6-multimedia-dev libvulkan-dev vulkan-validationlayers ``` #### Fedora ``` -sudo dnf install alsa-lib-devel cmake libatomic libevdev-devel libudev-devel openal-devel qt6-qtbase-devel qt6-qtbase-private-devel vulkan-devel pipewire-jack-audio-connection-kit-devel qt6-qtmultimedia-devel qt6-qtsvg-devel +sudo dnf install clang git cmake libatomic alsa-lib-devel pipewire-jack-audio-connection-kit-devel openal-devel openssl-devel libevdev-devel libudev-devel libXext-devel qt6-qtbase-devel qt6-qtbase-private-devel qt6-qtmultimedia-devel qt6-qtsvg-devel qt6-qttools-devel vulkan-devel vulkan-validation-layers ``` #### Arch Linux ``` -sudo pacman -S openal cmake vulkan-validation-layers qt6-base qt6-declarative qt6-multimedia sdl2 sndio jack2 base-devel +sudo pacman -S base-devel clang git cmake sndio jack2 openal qt6-base qt6-declarative qt6-multimedia sdl2 vulkan-validation-layers ``` #### OpenSUSE ``` -sudo zypper install git cmake libasound2 libpulse-devel openal-soft-devel zlib-devel libedit-devel vulkan-devel libudev-devel libqt6-qtbase-devel libqt6-qtmultimedia-devel libqt6-qtsvg-devel libQt6Gui-private-headers-devel libevdev-devel libsndio7_1 libjack-devel +sudo zypper install clang git cmake libasound2 libpulse-devel libsndio7 libjack-devel openal-soft-devel libopenssl-devel zlib-devel libedit-devel systemd-devel libevdev-devel qt6-base-devel qt6-multimedia-devel qt6-svg-devel qt6-linguist-devel qt6-gui-private-devel vulkan-devel vulkan-validationlayers ``` ### Cloning and compiling: @@ -34,9 +34,11 @@ git clone --recursive https://github.com/shadps4-emu/shadPS4.git cd shadPS4 ``` -Generate the build directory in the shadPS4 directory. To enable the QT GUI, pass the ```-DENABLE_QT_GUI=ON``` flag: +Generate the build directory in the shadPS4 directory. To disable the QT GUI, remove the ```-DENABLE_QT_GUI=ON``` flag: + +**Note**: Clang is the compiler used for official builds and CI. If you build with GCC, you might encounter issues—please report any you find. If you choose to use GCC, we recommend building with Clang at least once before submitting a pull request. ``` -cmake -S . -B build/ -DENABLE_QT_GUI=ON +cmake -S . -B build/ -DENABLE_QT_GUI=ON -DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++ ``` Enter the directory: diff --git a/externals/CMakeLists.txt b/externals/CMakeLists.txt index 5410f37eb..37c0f6899 100644 --- a/externals/CMakeLists.txt +++ b/externals/CMakeLists.txt @@ -182,4 +182,7 @@ add_subdirectory(tracy) # pugixml if (NOT TARGET pugixml::pugixml) add_subdirectory(pugixml) -endif() \ No newline at end of file +endif() + +# GCN Headers +add_subdirectory(gcn) \ No newline at end of file diff --git a/externals/gcn/CMakeLists.txt b/externals/gcn/CMakeLists.txt new file mode 100644 index 000000000..592f28d0d --- /dev/null +++ b/externals/gcn/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +# SPDX-License-Identifier: GPL-2.0-or-later + +project(gcn LANGUAGES CXX) + +add_library(gcn dummy.cpp) + +target_include_directories(gcn INTERFACE include) diff --git a/externals/gcn/dummy.cpp b/externals/gcn/dummy.cpp new file mode 100644 index 000000000..4fd1bb62d --- /dev/null +++ b/externals/gcn/dummy.cpp @@ -0,0 +1,2 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later diff --git a/externals/gcn/include/gcn/si_ci_vi_merged_offset.h b/externals/gcn/include/gcn/si_ci_vi_merged_offset.h new file mode 100644 index 000000000..589a58bfe --- /dev/null +++ b/externals/gcn/include/gcn/si_ci_vi_merged_offset.h @@ -0,0 +1,15339 @@ +/* + *********************************************************************************************************************** + * + * Copyright (c) 2014-2021 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************************************************************************/ + +#if !defined __SI__CI__VIoffset_HEADER +#define __SI__CI__VIoffset_HEADER + +namespace Pal +{ +namespace Gfx6 +{ +inline namespace Chip +{ + +#define SI_CI_offset_HEADER__SI__CI +constexpr unsigned int cfgADAPTER_ID = 0x000B; +constexpr unsigned int cfgADAPTER_ID_W = 0x0013; +constexpr unsigned int cfgBASE_ADDR_1 = 0x0004; +constexpr unsigned int cfgBASE_ADDR_2 = 0x0005; +constexpr unsigned int cfgBASE_ADDR_3 = 0x0006; +constexpr unsigned int cfgBASE_ADDR_4 = 0x0007; +constexpr unsigned int cfgBASE_ADDR_5 = 0x0008; +constexpr unsigned int cfgBASE_ADDR_6 = 0x0009; +constexpr unsigned int cfgBASE_CLASS = 0x0002; +constexpr unsigned int cfgBIST = 0x0003; +constexpr unsigned int cfgCACHE_LINE = 0x0003; +constexpr unsigned int cfgCAP_PTR = 0x000D; +constexpr unsigned int cfgCOMMAND = 0x0001; +constexpr unsigned int cfgDEVICE_CAP = 0x0017; +constexpr unsigned int cfgDEVICE_CAP2 = 0x001F; +constexpr unsigned int cfgDEVICE_CNTL = 0x0018; +constexpr unsigned int cfgDEVICE_CNTL2 = 0x0020; +constexpr unsigned int cfgDEVICE_ID = 0x0000; +constexpr unsigned int cfgDEVICE_STATUS = 0x0018; +constexpr unsigned int cfgDEVICE_STATUS2 = 0x0020; +constexpr unsigned int cfgHEADER = 0x0003; +constexpr unsigned int cfgINTERRUPT_LINE = 0x000F; +constexpr unsigned int cfgINTERRUPT_PIN = 0x000F; +constexpr unsigned int cfgLATENCY = 0x0003; +constexpr unsigned int cfgLINK_CAP = 0x0019; +constexpr unsigned int cfgLINK_CAP2 = 0x0021; +constexpr unsigned int cfgLINK_CNTL = 0x001A; +constexpr unsigned int cfgLINK_CNTL2 = 0x0022; +constexpr unsigned int cfgLINK_STATUS = 0x001A; +constexpr unsigned int cfgLINK_STATUS2 = 0x0022; +constexpr unsigned int cfgMAX_LATENCY = 0x000F; +constexpr unsigned int cfgMIN_GRANT = 0x000F; +constexpr unsigned int cfgMSI_CAP_LIST = 0x0028; +constexpr unsigned int cfgMSI_MSG_ADDR_HI = 0x002A; +constexpr unsigned int cfgMSI_MSG_ADDR_LO = 0x0029; +constexpr unsigned int cfgMSI_MSG_CNTL = 0x0028; +constexpr unsigned int cfgMSI_MSG_DATA = 0x002A; +constexpr unsigned int cfgMSI_MSG_DATA_64 = 0x002B; +constexpr unsigned int cfgPCIE_ACS_CAP__CI__VI = 0x00A9; +constexpr unsigned int cfgPCIE_ACS_CNTL__CI__VI = 0x00A9; +constexpr unsigned int cfgPCIE_ACS_ENH_CAP_LIST__CI__VI = 0x00A8; +constexpr unsigned int cfgPCIE_ADV_ERR_CAP_CNTL = 0x005A; +constexpr unsigned int cfgPCIE_ADV_ERR_RPT_ENH_CAP_LIST = 0x0054; +constexpr unsigned int cfgPCIE_ATS_CAP__CI__VI = 0x00AD; +constexpr unsigned int cfgPCIE_ATS_CNTL__CI__VI = 0x00AD; +constexpr unsigned int cfgPCIE_ATS_ENH_CAP_LIST__CI__VI = 0x00AC; +constexpr unsigned int cfgPCIE_BAR1_CAP__CI__VI = 0x0081; +constexpr unsigned int cfgPCIE_BAR1_CNTL__CI__VI = 0x0082; +constexpr unsigned int cfgPCIE_BAR2_CAP__CI__VI = 0x0083; +constexpr unsigned int cfgPCIE_BAR2_CNTL__CI__VI = 0x0084; +constexpr unsigned int cfgPCIE_BAR3_CAP__CI__VI = 0x0085; +constexpr unsigned int cfgPCIE_BAR3_CNTL__CI__VI = 0x0086; +constexpr unsigned int cfgPCIE_BAR4_CAP__CI__VI = 0x0087; +constexpr unsigned int cfgPCIE_BAR4_CNTL__CI__VI = 0x0088; +constexpr unsigned int cfgPCIE_BAR5_CAP__CI__VI = 0x0089; +constexpr unsigned int cfgPCIE_BAR5_CNTL__CI__VI = 0x008A; +constexpr unsigned int cfgPCIE_BAR6_CAP__CI__VI = 0x008B; +constexpr unsigned int cfgPCIE_BAR6_CNTL__CI__VI = 0x008C; +constexpr unsigned int cfgPCIE_BAR_ENH_CAP_LIST__CI__VI = 0x0080; +constexpr unsigned int cfgPCIE_CAP = 0x0016; +constexpr unsigned int cfgPCIE_CAP_LIST = 0x0016; +constexpr unsigned int cfgPCIE_CORR_ERR_MASK = 0x0059; +constexpr unsigned int cfgPCIE_CORR_ERR_STATUS = 0x0058; +constexpr unsigned int cfgPCIE_DEV_SERIAL_NUM_DW1 = 0x0051; +constexpr unsigned int cfgPCIE_DEV_SERIAL_NUM_DW2 = 0x0052; +constexpr unsigned int cfgPCIE_DEV_SERIAL_NUM_ENH_CAP_LIST = 0x0050; +constexpr unsigned int cfgPCIE_DPA_CAP__CI__VI = 0x0095; +constexpr unsigned int cfgPCIE_DPA_CNTL__CI__VI = 0x0097; +constexpr unsigned int cfgPCIE_DPA_ENH_CAP_LIST__CI__VI = 0x0094; +constexpr unsigned int cfgPCIE_DPA_LATENCY_INDICATOR__CI__VI = 0x0096; +constexpr unsigned int cfgPCIE_DPA_STATUS__CI__VI = 0x0097; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_0__CI__VI = 0x0098; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_1__CI__VI = 0x0098; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_2__CI__VI = 0x0098; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_3__CI__VI = 0x0098; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_4__CI__VI = 0x0099; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_5__CI__VI = 0x0099; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_6__CI__VI = 0x0099; +constexpr unsigned int cfgPCIE_DPA_SUBSTATE_PWR_ALLOC_7__CI__VI = 0x0099; +constexpr unsigned int cfgPCIE_HDR_LOG0 = 0x005B; +constexpr unsigned int cfgPCIE_HDR_LOG1 = 0x005C; +constexpr unsigned int cfgPCIE_HDR_LOG2 = 0x005D; +constexpr unsigned int cfgPCIE_HDR_LOG3 = 0x005E; +constexpr unsigned int cfgPCIE_LANE_0_EQUALIZATION_CNTL__CI__VI = 0x009F; +constexpr unsigned int cfgPCIE_LANE_10_EQUALIZATION_CNTL__CI__VI = 0x00A4; +constexpr unsigned int cfgPCIE_LANE_11_EQUALIZATION_CNTL__CI__VI = 0x00A4; +constexpr unsigned int cfgPCIE_LANE_12_EQUALIZATION_CNTL__CI__VI = 0x00A5; +constexpr unsigned int cfgPCIE_LANE_13_EQUALIZATION_CNTL__CI__VI = 0x00A5; +constexpr unsigned int cfgPCIE_LANE_14_EQUALIZATION_CNTL__CI__VI = 0x00A6; +constexpr unsigned int cfgPCIE_LANE_15_EQUALIZATION_CNTL__CI__VI = 0x00A6; +constexpr unsigned int cfgPCIE_LANE_1_EQUALIZATION_CNTL__CI__VI = 0x009F; +constexpr unsigned int cfgPCIE_LANE_2_EQUALIZATION_CNTL__CI__VI = 0x00A0; +constexpr unsigned int cfgPCIE_LANE_3_EQUALIZATION_CNTL__CI__VI = 0x00A0; +constexpr unsigned int cfgPCIE_LANE_4_EQUALIZATION_CNTL__CI__VI = 0x00A1; +constexpr unsigned int cfgPCIE_LANE_5_EQUALIZATION_CNTL__CI__VI = 0x00A1; +constexpr unsigned int cfgPCIE_LANE_6_EQUALIZATION_CNTL__CI__VI = 0x00A2; +constexpr unsigned int cfgPCIE_LANE_7_EQUALIZATION_CNTL__CI__VI = 0x00A2; +constexpr unsigned int cfgPCIE_LANE_8_EQUALIZATION_CNTL__CI__VI = 0x00A3; +constexpr unsigned int cfgPCIE_LANE_9_EQUALIZATION_CNTL__CI__VI = 0x00A3; +constexpr unsigned int cfgPCIE_LANE_ERROR_STATUS__CI__VI = 0x009E; +constexpr unsigned int cfgPCIE_LINK_CNTL3__CI__VI = 0x009D; +constexpr unsigned int cfgPCIE_OUTSTAND_PAGE_REQ_ALLOC__CI__VI = 0x00B3; +constexpr unsigned int cfgPCIE_OUTSTAND_PAGE_REQ_CAPACITY__CI__VI = 0x00B2; +constexpr unsigned int cfgPCIE_PAGE_REQ_CNTL__CI__VI = 0x00B1; +constexpr unsigned int cfgPCIE_PAGE_REQ_ENH_CAP_LIST__CI__VI = 0x00B0; +constexpr unsigned int cfgPCIE_PAGE_REQ_STATUS__CI__VI = 0x00B1; +constexpr unsigned int cfgPCIE_PASID_CAP__CI__VI = 0x00B5; +constexpr unsigned int cfgPCIE_PASID_CNTL__CI__VI = 0x00B5; +constexpr unsigned int cfgPCIE_PASID_ENH_CAP_LIST__CI__VI = 0x00B4; +constexpr unsigned int cfgPCIE_PORT_VC_CAP_REG1 = 0x0045; +constexpr unsigned int cfgPCIE_PORT_VC_CAP_REG2 = 0x0046; +constexpr unsigned int cfgPCIE_PORT_VC_CNTL = 0x0047; +constexpr unsigned int cfgPCIE_PORT_VC_STATUS = 0x0047; +constexpr unsigned int cfgPCIE_PWR_BUDGET_CAP__CI__VI = 0x0093; +constexpr unsigned int cfgPCIE_PWR_BUDGET_DATA_SELECT__CI__VI = 0x0091; +constexpr unsigned int cfgPCIE_PWR_BUDGET_DATA__CI__VI = 0x0092; +constexpr unsigned int cfgPCIE_PWR_BUDGET_ENH_CAP_LIST__CI__VI = 0x0090; +constexpr unsigned int cfgPCIE_SECONDARY_ENH_CAP_LIST__CI__VI = 0x009C; +constexpr unsigned int cfgPCIE_TLP_PREFIX_LOG0__CI__VI = 0x0062; +constexpr unsigned int cfgPCIE_TLP_PREFIX_LOG1__CI__VI = 0x0063; +constexpr unsigned int cfgPCIE_TLP_PREFIX_LOG2__CI__VI = 0x0064; +constexpr unsigned int cfgPCIE_TLP_PREFIX_LOG3__CI__VI = 0x0065; +constexpr unsigned int cfgPCIE_UNCORR_ERR_MASK = 0x0056; +constexpr unsigned int cfgPCIE_UNCORR_ERR_SEVERITY = 0x0057; +constexpr unsigned int cfgPCIE_UNCORR_ERR_STATUS = 0x0055; +constexpr unsigned int cfgPCIE_VC0_RESOURCE_CAP = 0x0048; +constexpr unsigned int cfgPCIE_VC0_RESOURCE_CNTL = 0x0049; +constexpr unsigned int cfgPCIE_VC0_RESOURCE_STATUS = 0x004A; +constexpr unsigned int cfgPCIE_VC1_RESOURCE_CAP = 0x004B; +constexpr unsigned int cfgPCIE_VC1_RESOURCE_CNTL = 0x004C; +constexpr unsigned int cfgPCIE_VC1_RESOURCE_STATUS = 0x004D; +constexpr unsigned int cfgPCIE_VC_ENH_CAP_LIST = 0x0044; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC1 = 0x0042; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC2 = 0x0043; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC_ENH_CAP_LIST = 0x0040; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC_HDR = 0x0041; +constexpr unsigned int cfgPMI_CAP = 0x0014; +constexpr unsigned int cfgPMI_CAP_LIST = 0x0014; +constexpr unsigned int cfgPMI_STATUS_CNTL = 0x0015; +constexpr unsigned int cfgPROG_INTERFACE = 0x0002; +constexpr unsigned int cfgREVISION_ID = 0x0002; +constexpr unsigned int cfgROM_BASE_ADDR = 0x000C; +constexpr unsigned int cfgSTATUS = 0x0001; +constexpr unsigned int cfgSUB_CLASS = 0x0002; +constexpr unsigned int cfgVENDOR_CAP_LIST__CI__VI = 0x0012; +constexpr unsigned int cfgVENDOR_ID = 0x0000; +constexpr unsigned int ioATTRDR__SI__VI = 0x00F0; +constexpr unsigned int ioATTRDW__SI__VI = 0x00F0; +constexpr unsigned int ioATTRX__SI__VI = 0x00F0; +constexpr unsigned int ioBIF_RFE_SNOOP_REG__CI__VI = 0x0027; +constexpr unsigned int ioCRTC8_DATA__SI__VI = 0x00ED; +constexpr unsigned int ioCRTC8_IDX__SI__VI = 0x00ED; +constexpr unsigned int ioDAC_DATA__SI__VI = 0x00F2; +constexpr unsigned int ioDAC_MASK__SI__VI = 0x00F1; +constexpr unsigned int ioDAC_R_INDEX__SI__VI = 0x00F1; +constexpr unsigned int ioDAC_W_INDEX__SI__VI = 0x00F2; +constexpr unsigned int ioGENENB__SI__VI = 0x00F0; +constexpr unsigned int ioGENFC_RD__SI__VI = 0x00F2; +constexpr unsigned int ioGENFC_WT__SI__VI = 0x00EE; +constexpr unsigned int ioGENMO_RD__SI__VI = 0x00F3; +constexpr unsigned int ioGENMO_WT__SI__VI = 0x00F0; +constexpr unsigned int ioGENS0__SI__VI = 0x00F0; +constexpr unsigned int ioGENS1__SI__VI = 0x00EE; +constexpr unsigned int ioGRPH8_DATA__SI__VI = 0x00F3; +constexpr unsigned int ioGRPH8_IDX__SI__VI = 0x00F3; +constexpr unsigned int ioMM_DATA = 0x0001; +constexpr unsigned int ioMM_INDEX = 0x0000; +constexpr unsigned int ioMM_INDEX_HI__CI__VI = 0x0006; +constexpr unsigned int ioPCIE_DATA_2__CI__VI = 0x000D; +constexpr unsigned int ioPCIE_DATA__CI__VI = 0x000F; +constexpr unsigned int ioPCIE_DATA__SI = 0x000D; +constexpr unsigned int ioPCIE_INDEX_2__CI__VI = 0x000C; +constexpr unsigned int ioPCIE_INDEX__CI__VI = 0x000E; +constexpr unsigned int ioPCIE_INDEX__SI = 0x000C; +constexpr unsigned int ioROM_DATA__SI = 0x002B; +constexpr unsigned int ioROM_INDEX__SI = 0x002A; +constexpr unsigned int ioSEQ8_DATA__SI__VI = 0x00F1; +constexpr unsigned int ioSEQ8_IDX__SI__VI = 0x00F1; +constexpr unsigned int ioVGA_MEM_READ_PAGE_ADDR__SI__VI = 0x0013; +constexpr unsigned int ioVGA_MEM_WRITE_PAGE_ADDR__SI__VI = 0x0012; +constexpr unsigned int mmABM_TEST_DEBUG_DATA__SI__VI = 0x169F; +constexpr unsigned int mmABM_TEST_DEBUG_INDEX__SI__VI = 0x169E; +constexpr unsigned int mmACP_CONFIG__CI = 0x0F95; +constexpr unsigned int mmAFMT_60958_0__SI = 0x1C41; +constexpr unsigned int mmAFMT_60958_1__SI = 0x1C42; +constexpr unsigned int mmAFMT_60958_2__SI = 0x1C48; +constexpr unsigned int mmAFMT_AUDIO_CRC_CONTROL__SI = 0x1C43; +constexpr unsigned int mmAFMT_AUDIO_CRC_RESULT__SI = 0x1C49; +constexpr unsigned int mmAFMT_AUDIO_INFO0__SI = 0x1C3F; +constexpr unsigned int mmAFMT_AUDIO_INFO1__SI = 0x1C40; +constexpr unsigned int mmAFMT_AUDIO_PACKET_CONTROL2__SI = 0x1C17; +constexpr unsigned int mmAFMT_AUDIO_PACKET_CONTROL__SI = 0x1C4B; +constexpr unsigned int mmAFMT_AVI_INFO0__SI = 0x1C21; +constexpr unsigned int mmAFMT_AVI_INFO1__SI = 0x1C22; +constexpr unsigned int mmAFMT_AVI_INFO2__SI = 0x1C23; +constexpr unsigned int mmAFMT_AVI_INFO3__SI = 0x1C24; +constexpr unsigned int mmAFMT_INFOFRAME_CONTROL0__SI = 0x1C4D; +constexpr unsigned int mmAFMT_ISRC1_0__SI = 0x1C18; +constexpr unsigned int mmAFMT_ISRC1_1__SI = 0x1C19; +constexpr unsigned int mmAFMT_ISRC1_2__SI = 0x1C1A; +constexpr unsigned int mmAFMT_ISRC1_3__SI = 0x1C1B; +constexpr unsigned int mmAFMT_ISRC1_4__SI = 0x1C1C; +constexpr unsigned int mmAFMT_ISRC2_0__SI = 0x1C1D; +constexpr unsigned int mmAFMT_ISRC2_1__SI = 0x1C1E; +constexpr unsigned int mmAFMT_ISRC2_2__SI = 0x1C1F; +constexpr unsigned int mmAFMT_ISRC2_3__SI = 0x1C20; +constexpr unsigned int mmAFMT_MPEG_INFO0__SI = 0x1C25; +constexpr unsigned int mmAFMT_MPEG_INFO1__SI = 0x1C26; +constexpr unsigned int mmAFMT_RAMP_CONTROL0__SI = 0x1C44; +constexpr unsigned int mmAFMT_RAMP_CONTROL1__SI = 0x1C45; +constexpr unsigned int mmAFMT_RAMP_CONTROL2__SI = 0x1C46; +constexpr unsigned int mmAFMT_RAMP_CONTROL3__SI = 0x1C47; +constexpr unsigned int mmAFMT_STATUS__SI = 0x1C4A; +constexpr unsigned int mmAFMT_VBI_PACKET_CONTROL__SI = 0x1C4C; +constexpr unsigned int mmATC_ATS_CNTL__CI__VI = 0x0CC9; +constexpr unsigned int mmATC_ATS_DEBUG__CI__VI = 0x0CCA; +constexpr unsigned int mmATC_ATS_DEFAULT_PAGE_CNTL__CI__VI = 0x0CD1; +constexpr unsigned int mmATC_ATS_DEFAULT_PAGE_LOW__CI__VI = 0x0CD0; +constexpr unsigned int mmATC_ATS_FAULT_CNTL__CI__VI = 0x0CCD; +constexpr unsigned int mmATC_ATS_FAULT_DEBUG__CI__VI = 0x0CCB; +constexpr unsigned int mmATC_ATS_FAULT_STATUS_ADDR__CI__VI = 0x0CCF; +constexpr unsigned int mmATC_ATS_FAULT_STATUS_INFO__CI__VI = 0x0CCE; +constexpr unsigned int mmATC_ATS_STATUS__CI__VI = 0x0CCC; +constexpr unsigned int mmATC_L1RD_DEBUG_TLB__CI__VI = 0x0CDE; +constexpr unsigned int mmATC_L1RD_STATUS__CI__VI = 0x0CE0; +constexpr unsigned int mmATC_L1WR_DEBUG_TLB__CI__VI = 0x0CDF; +constexpr unsigned int mmATC_L1WR_STATUS__CI__VI = 0x0CE1; +constexpr unsigned int mmATC_L1_ADDRESS_OFFSET__CI__VI = 0x0CDD; +constexpr unsigned int mmATC_L1_CNTL__CI__VI = 0x0CDC; +constexpr unsigned int mmATC_L2_CNTL2__CI__VI = 0x0CD6; +constexpr unsigned int mmATC_L2_CNTL__CI__VI = 0x0CD5; +constexpr unsigned int mmATC_L2_DEBUG2__CI__VI = 0x0CD8; +constexpr unsigned int mmATC_L2_DEBUG__CI__VI = 0x0CD7; +constexpr unsigned int mmATC_MISC_CG__CI__VI = 0x0CD4; +constexpr unsigned int mmATC_PERFCOUNTER0_CFG__CI__VI = 0x07C8; +constexpr unsigned int mmATC_PERFCOUNTER1_CFG__CI__VI = 0x07C9; +constexpr unsigned int mmATC_PERFCOUNTER2_CFG__CI__VI = 0x07CA; +constexpr unsigned int mmATC_PERFCOUNTER3_CFG__CI__VI = 0x07CB; +constexpr unsigned int mmATC_PERFCOUNTER_HI__CI__VI = 0x07AF; +constexpr unsigned int mmATC_PERFCOUNTER_LO__CI__VI = 0x07A7; +constexpr unsigned int mmATC_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D5; +constexpr unsigned int mmATC_VMID0_PASID_MAPPING__CI__VI = 0x0CE7; +constexpr unsigned int mmATC_VMID10_PASID_MAPPING__CI__VI = 0x0CF1; +constexpr unsigned int mmATC_VMID11_PASID_MAPPING__CI__VI = 0x0CF2; +constexpr unsigned int mmATC_VMID12_PASID_MAPPING__CI__VI = 0x0CF3; +constexpr unsigned int mmATC_VMID13_PASID_MAPPING__CI__VI = 0x0CF4; +constexpr unsigned int mmATC_VMID14_PASID_MAPPING__CI__VI = 0x0CF5; +constexpr unsigned int mmATC_VMID15_PASID_MAPPING__CI__VI = 0x0CF6; +constexpr unsigned int mmATC_VMID1_PASID_MAPPING__CI__VI = 0x0CE8; +constexpr unsigned int mmATC_VMID2_PASID_MAPPING__CI__VI = 0x0CE9; +constexpr unsigned int mmATC_VMID3_PASID_MAPPING__CI__VI = 0x0CEA; +constexpr unsigned int mmATC_VMID4_PASID_MAPPING__CI__VI = 0x0CEB; +constexpr unsigned int mmATC_VMID5_PASID_MAPPING__CI__VI = 0x0CEC; +constexpr unsigned int mmATC_VMID6_PASID_MAPPING__CI__VI = 0x0CED; +constexpr unsigned int mmATC_VMID7_PASID_MAPPING__CI__VI = 0x0CEE; +constexpr unsigned int mmATC_VMID8_PASID_MAPPING__CI__VI = 0x0CEF; +constexpr unsigned int mmATC_VMID9_PASID_MAPPING__CI__VI = 0x0CF0; +constexpr unsigned int mmATC_VMID_PASID_MAPPING_UPDATE_STATUS__CI__VI = 0x0CE6; +constexpr unsigned int mmATC_VM_APERTURE0_CNTL2__CI__VI = 0x0CC6; +constexpr unsigned int mmATC_VM_APERTURE0_CNTL__CI__VI = 0x0CC4; +constexpr unsigned int mmATC_VM_APERTURE0_HIGH_ADDR__CI__VI = 0x0CC2; +constexpr unsigned int mmATC_VM_APERTURE0_LOW_ADDR__CI__VI = 0x0CC0; +constexpr unsigned int mmATC_VM_APERTURE1_CNTL2__CI__VI = 0x0CC7; +constexpr unsigned int mmATC_VM_APERTURE1_CNTL__CI__VI = 0x0CC5; +constexpr unsigned int mmATC_VM_APERTURE1_HIGH_ADDR__CI__VI = 0x0CC3; +constexpr unsigned int mmATC_VM_APERTURE1_LOW_ADDR__CI__VI = 0x0CC1; +constexpr unsigned int mmATTRDR__SI__VI = 0x00F0; +constexpr unsigned int mmATTRDW__SI__VI = 0x00F0; +constexpr unsigned int mmATTRX__SI__VI = 0x00F0; +constexpr unsigned int mmAUXN_IMPCAL__SI = 0x194B; +constexpr unsigned int mmAUXP_IMPCAL__SI = 0x194A; +constexpr unsigned int mmAUX_ARB_CONTROL__SI = 0x1882; +constexpr unsigned int mmAUX_CONTROL__SI = 0x1880; +constexpr unsigned int mmAUX_DPHY_RX_CONTROL0__SI = 0x188A; +constexpr unsigned int mmAUX_DPHY_RX_CONTROL1__SI = 0x188B; +constexpr unsigned int mmAUX_DPHY_RX_STATUS__SI = 0x188D; +constexpr unsigned int mmAUX_DPHY_TX_CONTROL__SI = 0x1889; +constexpr unsigned int mmAUX_DPHY_TX_REF_CONTROL__SI = 0x1888; +constexpr unsigned int mmAUX_DPHY_TX_STATUS__SI = 0x188C; +constexpr unsigned int mmAUX_INTERRUPT_CONTROL__SI = 0x1883; +constexpr unsigned int mmAUX_LS_DATA__SI = 0x1887; +constexpr unsigned int mmAUX_LS_STATUS__SI = 0x1885; +constexpr unsigned int mmAUX_SW_CONTROL__SI = 0x1881; +constexpr unsigned int mmAUX_SW_DATA__SI = 0x1886; +constexpr unsigned int mmAUX_SW_STATUS__SI = 0x1884; +constexpr unsigned int mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER__SI = 0x17F6; +constexpr unsigned int mmAZALIA_AUDIO_DTO_CONTROL__SI = 0x173D; +constexpr unsigned int mmAZALIA_AUDIO_DTO__SI = 0x173C; +constexpr unsigned int mmAZALIA_BDL_DMA_CONTROL__SI = 0x1730; +constexpr unsigned int mmAZALIA_CORB_DMA_CONTROL__SI = 0x172F; +constexpr unsigned int mmAZALIA_CUMULATIVE_LATENCY_COUNT__SI = 0x1737; +constexpr unsigned int mmAZALIA_CUMULATIVE_REQUEST_COUNT__SI = 0x1738; +constexpr unsigned int mmAZALIA_CYCLIC_BUFFER_SYNC__SI = 0x17F7; +constexpr unsigned int mmAZALIA_DATA_DMA_CONTROL__SI = 0x1731; +constexpr unsigned int mmAZALIA_F0_CODEC_CONVERTER_CONTROL_CHANNEL_STREAM_ID__SI = 0x174F; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE__SI = 0x174C; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET__SI = 0x174D; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID__SI = 0x1750; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE__SI = 0x1742; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES__SI = 0x1745; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS__SI = 0x1744; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES__SI = 0x1743; +constexpr unsigned int mmAZALIA_F0_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE__SI = 0x174B; +constexpr unsigned int mmAZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL__SI = 0x1753; +constexpr unsigned int mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID__SI = 0x173F; +constexpr unsigned int mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID__SI = 0x173E; +constexpr unsigned int mmAZALIA_LATENCY_COUNTER_CONTROL__SI = 0x1735; +constexpr unsigned int mmAZALIA_RIRB_AND_DP_CONTROL__SI = 0x172D; +constexpr unsigned int mmAZALIA_UNDERFLOW_FILLER_SAMPLE__SI = 0x1732; +constexpr unsigned int mmAZALIA_WORSTCASE_LATENCY_COUNT__SI = 0x1736; +constexpr unsigned int mmAZ_TEST_DEBUG_DATA__SI = 0x1756; +constexpr unsigned int mmAZ_TEST_DEBUG_INDEX__SI = 0x1755; +constexpr unsigned int mmBACO_CNTL_MISC__CI__VI = 0x14DB; +constexpr unsigned int mmBACO_CNTL__CI__VI = 0x14E5; +constexpr unsigned int mmBCI_DEBUG_READ__CI__VI = 0x24EB; +constexpr unsigned int mmBCI_DEBUG_READ__SI = 0x24E3; +constexpr unsigned int mmBIF_BACO_DEBUG_LATCH__CI__VI = 0x14DC; +constexpr unsigned int mmBIF_BACO_DEBUG__CI__VI = 0x14DF; +constexpr unsigned int mmBIF_BACO_MSIC__CI = 0x1480; +constexpr unsigned int mmBIF_BUSNUM_CNTL1 = 0x1525; +constexpr unsigned int mmBIF_BUSNUM_CNTL2 = 0x152B; +constexpr unsigned int mmBIF_BUSNUM_LIST0 = 0x1526; +constexpr unsigned int mmBIF_BUSNUM_LIST1 = 0x1527; +constexpr unsigned int mmBIF_BUSY_DELAY_CNTR = 0x1529; +constexpr unsigned int mmBIF_CC_RFE_IMP_OVERRIDECNTL__CI__VI = 0x1455; +constexpr unsigned int mmBIF_CLK_PDWN_DELAY_TIMER__CI = 0x1483; +constexpr unsigned int mmBIF_CLK_PDWN_DELAY_TIMER__SI = 0x151F; +constexpr unsigned int mmBIF_DEBUG_CNTL = 0x151C; +constexpr unsigned int mmBIF_DEBUG_MUX = 0x151D; +constexpr unsigned int mmBIF_DEBUG_OUT = 0x151E; +constexpr unsigned int mmBIF_DEVFUNCNUM_LIST0__CI__VI = 0x14E8; +constexpr unsigned int mmBIF_DEVFUNCNUM_LIST1__CI__VI = 0x14E7; +constexpr unsigned int mmBIF_DOORBELL_CNTL__CI__VI = 0x14C3; +constexpr unsigned int mmBIF_FB_EN = 0x1524; +constexpr unsigned int mmBIF_FEATURES_CONTROL_MISC__CI__VI = 0x14C2; +constexpr unsigned int mmBIF_IMPCTL_CONTINUOUS_CALIBRATION_PERIOD__CI__VI = 0x1454; +constexpr unsigned int mmBIF_IMPCTL_RXCNTL__CI__VI = 0x1451; +constexpr unsigned int mmBIF_IMPCTL_SMPLCNTL__CI__VI = 0x1450; +constexpr unsigned int mmBIF_IMPCTL_TXCNTL_pd__CI__VI = 0x1452; +constexpr unsigned int mmBIF_IMPCTL_TXCNTL_pu__CI__VI = 0x1453; +constexpr unsigned int mmBIF_LNCNT_RESET__CI = 0x1488; +constexpr unsigned int mmBIF_PERFCOUNTER0_RESULT__CI__VI = 0x152D; +constexpr unsigned int mmBIF_PERFCOUNTER1_RESULT__CI__VI = 0x152E; +constexpr unsigned int mmBIF_PERFMON_CNTL__CI__VI = 0x152C; +constexpr unsigned int mmBIF_PIF_TXCLK_SWITCH_TIMER__CI = 0x1481; +constexpr unsigned int mmBIF_PWDN_COMMAND__CI__VI = 0x1444; +constexpr unsigned int mmBIF_PWDN_STATUS__CI__VI = 0x1445; +constexpr unsigned int mmBIF_RESET_CNTL__CI = 0x1486; +constexpr unsigned int mmBIF_RESET_EN__CI = 0x1482; +constexpr unsigned int mmBIF_RESET_EN__SI = 0x1511; +constexpr unsigned int mmBIF_RFE_CLIENT_SOFTRST_TRIGGER__CI__VI = 0x1442; +constexpr unsigned int mmBIF_RFE_IMPRST_CNTL__CI__VI = 0x1458; +constexpr unsigned int mmBIF_RFE_MASTER_SOFTRST_TRIGGER__CI__VI = 0x1443; +constexpr unsigned int mmBIF_RFE_MMCFG_CNTL__CI__VI = 0x144C; +constexpr unsigned int mmBIF_RFE_MST_BU_CMDSTATUS__CI__VI = 0x1446; +constexpr unsigned int mmBIF_RFE_MST_BX_CMDSTATUS__CI = 0x1448; +constexpr unsigned int mmBIF_RFE_MST_RWREG_RFEWDBIF_CMDSTATUS__CI__VI = 0x1447; +constexpr unsigned int mmBIF_RFE_MST_TMOUT_STATUS__CI__VI = 0x144B; +constexpr unsigned int mmBIF_RFE_SNOOP_REG__CI__VI = 0x0027; +constexpr unsigned int mmBIF_RFE_SOFTRST_CNTL__CI__VI = 0x1441; +constexpr unsigned int mmBIF_SCRATCH0 = 0x150E; +constexpr unsigned int mmBIF_SCRATCH1 = 0x150F; +constexpr unsigned int mmBIF_SLVARB_MODE__CI__VI = 0x14C4; +constexpr unsigned int mmBIF_SSA_DISP_LOWER__CI = 0x14D2; +constexpr unsigned int mmBIF_SSA_DISP_UPPER__CI = 0x14D3; +constexpr unsigned int mmBIF_SSA_GFX0_LOWER__CI = 0x14CA; +constexpr unsigned int mmBIF_SSA_GFX0_UPPER__CI = 0x14CB; +constexpr unsigned int mmBIF_SSA_GFX1_LOWER__CI = 0x14CC; +constexpr unsigned int mmBIF_SSA_GFX1_UPPER__CI = 0x14CD; +constexpr unsigned int mmBIF_SSA_GFX2_LOWER__CI = 0x14CE; +constexpr unsigned int mmBIF_SSA_GFX2_UPPER__CI = 0x14CF; +constexpr unsigned int mmBIF_SSA_GFX3_LOWER__CI = 0x14D0; +constexpr unsigned int mmBIF_SSA_GFX3_UPPER__CI = 0x14D1; +constexpr unsigned int mmBIF_SSA_MC_LOWER__CI = 0x14D4; +constexpr unsigned int mmBIF_SSA_MC_UPPER__CI = 0x14D5; +constexpr unsigned int mmBIF_SSA_PWR_STATUS__CI = 0x14C8; +constexpr unsigned int mmBIF_XDMA_HI__CI__VI = 0x14C1; +constexpr unsigned int mmBIF_XDMA_LO__CI__VI = 0x14C0; +constexpr unsigned int mmBIOS_SCRATCH_0 = 0x05C9; +constexpr unsigned int mmBIOS_SCRATCH_1 = 0x05CA; +constexpr unsigned int mmBIOS_SCRATCH_10 = 0x05D3; +constexpr unsigned int mmBIOS_SCRATCH_11 = 0x05D4; +constexpr unsigned int mmBIOS_SCRATCH_12 = 0x05D5; +constexpr unsigned int mmBIOS_SCRATCH_13 = 0x05D6; +constexpr unsigned int mmBIOS_SCRATCH_14 = 0x05D7; +constexpr unsigned int mmBIOS_SCRATCH_15 = 0x05D8; +constexpr unsigned int mmBIOS_SCRATCH_2 = 0x05CB; +constexpr unsigned int mmBIOS_SCRATCH_3 = 0x05CC; +constexpr unsigned int mmBIOS_SCRATCH_4 = 0x05CD; +constexpr unsigned int mmBIOS_SCRATCH_5 = 0x05CE; +constexpr unsigned int mmBIOS_SCRATCH_6 = 0x05CF; +constexpr unsigned int mmBIOS_SCRATCH_7 = 0x05D0; +constexpr unsigned int mmBIOS_SCRATCH_8 = 0x05D1; +constexpr unsigned int mmBIOS_SCRATCH_9 = 0x05D2; +constexpr unsigned int mmBL1_PWM_ABM_CNTL__SI__VI = 0x162E; +constexpr unsigned int mmBL1_PWM_AMBIENT_LIGHT_LEVEL__SI__VI = 0x1628; +constexpr unsigned int mmBL1_PWM_BL_UPDATE_SAMPLE_RATE__SI__VI = 0x162F; +constexpr unsigned int mmBL1_PWM_CURRENT_ABM_LEVEL__SI__VI = 0x162B; +constexpr unsigned int mmBL1_PWM_FINAL_DUTY_CYCLE__SI__VI = 0x162C; +constexpr unsigned int mmBL1_PWM_GRP2_REG_LOCK__SI__VI = 0x1630; +constexpr unsigned int mmBL1_PWM_MINIMUM_DUTY_CYCLE__SI__VI = 0x162D; +constexpr unsigned int mmBL1_PWM_TARGET_ABM_LEVEL__SI__VI = 0x162A; +constexpr unsigned int mmBL1_PWM_USER_LEVEL__SI__VI = 0x1629; +constexpr unsigned int mmBL_PWM_CNTL2__SI = 0x1968; +constexpr unsigned int mmBL_PWM_CNTL__SI = 0x1967; +constexpr unsigned int mmBL_PWM_GRP1_REG_LOCK__SI = 0x196A; +constexpr unsigned int mmBL_PWM_PERIOD_CNTL__SI = 0x1969; +constexpr unsigned int mmBUS_CNTL = 0x1508; +constexpr unsigned int mmBX_RESET_EN__CI__VI = 0x1514; +constexpr unsigned int mmCAPTURE_HOST_BUSNUM = 0x153C; +constexpr unsigned int mmCB_BLEND0_CONTROL = 0xA1E0; +constexpr unsigned int mmCB_BLEND1_CONTROL = 0xA1E1; +constexpr unsigned int mmCB_BLEND2_CONTROL = 0xA1E2; +constexpr unsigned int mmCB_BLEND3_CONTROL = 0xA1E3; +constexpr unsigned int mmCB_BLEND4_CONTROL = 0xA1E4; +constexpr unsigned int mmCB_BLEND5_CONTROL = 0xA1E5; +constexpr unsigned int mmCB_BLEND6_CONTROL = 0xA1E6; +constexpr unsigned int mmCB_BLEND7_CONTROL = 0xA1E7; +constexpr unsigned int mmCB_BLEND_ALPHA = 0xA108; +constexpr unsigned int mmCB_BLEND_BLUE = 0xA107; +constexpr unsigned int mmCB_BLEND_GREEN = 0xA106; +constexpr unsigned int mmCB_BLEND_RED = 0xA105; +constexpr unsigned int mmCB_CGTT_SCLK_CTRL__CI__VI = 0xF0A8; +constexpr unsigned int mmCB_CGTT_SCLK_CTRL__SI = 0x2698; +constexpr unsigned int mmCB_COLOR0_ATTRIB = 0xA31D; +constexpr unsigned int mmCB_COLOR0_BASE = 0xA318; +constexpr unsigned int mmCB_COLOR0_CLEAR_WORD0 = 0xA323; +constexpr unsigned int mmCB_COLOR0_CLEAR_WORD1 = 0xA324; +constexpr unsigned int mmCB_COLOR0_CMASK = 0xA31F; +constexpr unsigned int mmCB_COLOR0_CMASK_SLICE = 0xA320; +constexpr unsigned int mmCB_COLOR0_FMASK = 0xA321; +constexpr unsigned int mmCB_COLOR0_FMASK_SLICE = 0xA322; +constexpr unsigned int mmCB_COLOR0_INFO = 0xA31C; +constexpr unsigned int mmCB_COLOR0_PITCH = 0xA319; +constexpr unsigned int mmCB_COLOR0_SLICE = 0xA31A; +constexpr unsigned int mmCB_COLOR0_VIEW = 0xA31B; +constexpr unsigned int mmCB_COLOR1_ATTRIB = 0xA32C; +constexpr unsigned int mmCB_COLOR1_BASE = 0xA327; +constexpr unsigned int mmCB_COLOR1_CLEAR_WORD0 = 0xA332; +constexpr unsigned int mmCB_COLOR1_CLEAR_WORD1 = 0xA333; +constexpr unsigned int mmCB_COLOR1_CMASK = 0xA32E; +constexpr unsigned int mmCB_COLOR1_CMASK_SLICE = 0xA32F; +constexpr unsigned int mmCB_COLOR1_FMASK = 0xA330; +constexpr unsigned int mmCB_COLOR1_FMASK_SLICE = 0xA331; +constexpr unsigned int mmCB_COLOR1_INFO = 0xA32B; +constexpr unsigned int mmCB_COLOR1_PITCH = 0xA328; +constexpr unsigned int mmCB_COLOR1_SLICE = 0xA329; +constexpr unsigned int mmCB_COLOR1_VIEW = 0xA32A; +constexpr unsigned int mmCB_COLOR2_ATTRIB = 0xA33B; +constexpr unsigned int mmCB_COLOR2_BASE = 0xA336; +constexpr unsigned int mmCB_COLOR2_CLEAR_WORD0 = 0xA341; +constexpr unsigned int mmCB_COLOR2_CLEAR_WORD1 = 0xA342; +constexpr unsigned int mmCB_COLOR2_CMASK = 0xA33D; +constexpr unsigned int mmCB_COLOR2_CMASK_SLICE = 0xA33E; +constexpr unsigned int mmCB_COLOR2_FMASK = 0xA33F; +constexpr unsigned int mmCB_COLOR2_FMASK_SLICE = 0xA340; +constexpr unsigned int mmCB_COLOR2_INFO = 0xA33A; +constexpr unsigned int mmCB_COLOR2_PITCH = 0xA337; +constexpr unsigned int mmCB_COLOR2_SLICE = 0xA338; +constexpr unsigned int mmCB_COLOR2_VIEW = 0xA339; +constexpr unsigned int mmCB_COLOR3_ATTRIB = 0xA34A; +constexpr unsigned int mmCB_COLOR3_BASE = 0xA345; +constexpr unsigned int mmCB_COLOR3_CLEAR_WORD0 = 0xA350; +constexpr unsigned int mmCB_COLOR3_CLEAR_WORD1 = 0xA351; +constexpr unsigned int mmCB_COLOR3_CMASK = 0xA34C; +constexpr unsigned int mmCB_COLOR3_CMASK_SLICE = 0xA34D; +constexpr unsigned int mmCB_COLOR3_FMASK = 0xA34E; +constexpr unsigned int mmCB_COLOR3_FMASK_SLICE = 0xA34F; +constexpr unsigned int mmCB_COLOR3_INFO = 0xA349; +constexpr unsigned int mmCB_COLOR3_PITCH = 0xA346; +constexpr unsigned int mmCB_COLOR3_SLICE = 0xA347; +constexpr unsigned int mmCB_COLOR3_VIEW = 0xA348; +constexpr unsigned int mmCB_COLOR4_ATTRIB = 0xA359; +constexpr unsigned int mmCB_COLOR4_BASE = 0xA354; +constexpr unsigned int mmCB_COLOR4_CLEAR_WORD0 = 0xA35F; +constexpr unsigned int mmCB_COLOR4_CLEAR_WORD1 = 0xA360; +constexpr unsigned int mmCB_COLOR4_CMASK = 0xA35B; +constexpr unsigned int mmCB_COLOR4_CMASK_SLICE = 0xA35C; +constexpr unsigned int mmCB_COLOR4_FMASK = 0xA35D; +constexpr unsigned int mmCB_COLOR4_FMASK_SLICE = 0xA35E; +constexpr unsigned int mmCB_COLOR4_INFO = 0xA358; +constexpr unsigned int mmCB_COLOR4_PITCH = 0xA355; +constexpr unsigned int mmCB_COLOR4_SLICE = 0xA356; +constexpr unsigned int mmCB_COLOR4_VIEW = 0xA357; +constexpr unsigned int mmCB_COLOR5_ATTRIB = 0xA368; +constexpr unsigned int mmCB_COLOR5_BASE = 0xA363; +constexpr unsigned int mmCB_COLOR5_CLEAR_WORD0 = 0xA36E; +constexpr unsigned int mmCB_COLOR5_CLEAR_WORD1 = 0xA36F; +constexpr unsigned int mmCB_COLOR5_CMASK = 0xA36A; +constexpr unsigned int mmCB_COLOR5_CMASK_SLICE = 0xA36B; +constexpr unsigned int mmCB_COLOR5_FMASK = 0xA36C; +constexpr unsigned int mmCB_COLOR5_FMASK_SLICE = 0xA36D; +constexpr unsigned int mmCB_COLOR5_INFO = 0xA367; +constexpr unsigned int mmCB_COLOR5_PITCH = 0xA364; +constexpr unsigned int mmCB_COLOR5_SLICE = 0xA365; +constexpr unsigned int mmCB_COLOR5_VIEW = 0xA366; +constexpr unsigned int mmCB_COLOR6_ATTRIB = 0xA377; +constexpr unsigned int mmCB_COLOR6_BASE = 0xA372; +constexpr unsigned int mmCB_COLOR6_CLEAR_WORD0 = 0xA37D; +constexpr unsigned int mmCB_COLOR6_CLEAR_WORD1 = 0xA37E; +constexpr unsigned int mmCB_COLOR6_CMASK = 0xA379; +constexpr unsigned int mmCB_COLOR6_CMASK_SLICE = 0xA37A; +constexpr unsigned int mmCB_COLOR6_FMASK = 0xA37B; +constexpr unsigned int mmCB_COLOR6_FMASK_SLICE = 0xA37C; +constexpr unsigned int mmCB_COLOR6_INFO = 0xA376; +constexpr unsigned int mmCB_COLOR6_PITCH = 0xA373; +constexpr unsigned int mmCB_COLOR6_SLICE = 0xA374; +constexpr unsigned int mmCB_COLOR6_VIEW = 0xA375; +constexpr unsigned int mmCB_COLOR7_ATTRIB = 0xA386; +constexpr unsigned int mmCB_COLOR7_BASE = 0xA381; +constexpr unsigned int mmCB_COLOR7_CLEAR_WORD0 = 0xA38C; +constexpr unsigned int mmCB_COLOR7_CLEAR_WORD1 = 0xA38D; +constexpr unsigned int mmCB_COLOR7_CMASK = 0xA388; +constexpr unsigned int mmCB_COLOR7_CMASK_SLICE = 0xA389; +constexpr unsigned int mmCB_COLOR7_FMASK = 0xA38A; +constexpr unsigned int mmCB_COLOR7_FMASK_SLICE = 0xA38B; +constexpr unsigned int mmCB_COLOR7_INFO = 0xA385; +constexpr unsigned int mmCB_COLOR7_PITCH = 0xA382; +constexpr unsigned int mmCB_COLOR7_SLICE = 0xA383; +constexpr unsigned int mmCB_COLOR7_VIEW = 0xA384; +constexpr unsigned int mmCB_COLOR_CONTROL = 0xA202; +constexpr unsigned int mmCB_DEBUG_BUS_1 = 0x2699; +constexpr unsigned int mmCB_DEBUG_BUS_13 = 0x26A5; +constexpr unsigned int mmCB_DEBUG_BUS_14 = 0x26A6; +constexpr unsigned int mmCB_DEBUG_BUS_15 = 0x26A7; +constexpr unsigned int mmCB_DEBUG_BUS_16 = 0x26A8; +constexpr unsigned int mmCB_DEBUG_BUS_17 = 0x26A9; +constexpr unsigned int mmCB_DEBUG_BUS_18 = 0x26AA; +constexpr unsigned int mmCB_DEBUG_BUS_2 = 0x269A; +constexpr unsigned int mmCB_HW_CONTROL = 0x2684; +constexpr unsigned int mmCB_HW_CONTROL_1 = 0x2685; +constexpr unsigned int mmCB_HW_CONTROL_2 = 0x2686; +constexpr unsigned int mmCB_HW_CONTROL_3__CI__VI = 0x2683; +constexpr unsigned int mmCB_PERFCOUNTER0_HI__CI__VI = 0xD407; +constexpr unsigned int mmCB_PERFCOUNTER0_HI__SI = 0x2691; +constexpr unsigned int mmCB_PERFCOUNTER0_LO__CI__VI = 0xD406; +constexpr unsigned int mmCB_PERFCOUNTER0_LO__SI = 0x2690; +constexpr unsigned int mmCB_PERFCOUNTER0_SELECT0__SI = 0x2688; +constexpr unsigned int mmCB_PERFCOUNTER0_SELECT1__CI__VI = 0xDC02; +constexpr unsigned int mmCB_PERFCOUNTER0_SELECT1__SI = 0x2689; +constexpr unsigned int mmCB_PERFCOUNTER0_SELECT__CI__VI = 0xDC01; +constexpr unsigned int mmCB_PERFCOUNTER1_HI__CI__VI = 0xD409; +constexpr unsigned int mmCB_PERFCOUNTER1_HI__SI = 0x2693; +constexpr unsigned int mmCB_PERFCOUNTER1_LO__CI__VI = 0xD408; +constexpr unsigned int mmCB_PERFCOUNTER1_LO__SI = 0x2692; +constexpr unsigned int mmCB_PERFCOUNTER1_SELECT0__SI = 0x268A; +constexpr unsigned int mmCB_PERFCOUNTER1_SELECT1__SI = 0x268B; +constexpr unsigned int mmCB_PERFCOUNTER1_SELECT__CI__VI = 0xDC03; +constexpr unsigned int mmCB_PERFCOUNTER2_HI__CI__VI = 0xD40B; +constexpr unsigned int mmCB_PERFCOUNTER2_HI__SI = 0x2695; +constexpr unsigned int mmCB_PERFCOUNTER2_LO__CI__VI = 0xD40A; +constexpr unsigned int mmCB_PERFCOUNTER2_LO__SI = 0x2694; +constexpr unsigned int mmCB_PERFCOUNTER2_SELECT0__SI = 0x268C; +constexpr unsigned int mmCB_PERFCOUNTER2_SELECT1__SI = 0x268D; +constexpr unsigned int mmCB_PERFCOUNTER2_SELECT__CI__VI = 0xDC04; +constexpr unsigned int mmCB_PERFCOUNTER3_HI__CI__VI = 0xD40D; +constexpr unsigned int mmCB_PERFCOUNTER3_HI__SI = 0x2697; +constexpr unsigned int mmCB_PERFCOUNTER3_LO__CI__VI = 0xD40C; +constexpr unsigned int mmCB_PERFCOUNTER3_LO__SI = 0x2696; +constexpr unsigned int mmCB_PERFCOUNTER3_SELECT0__SI = 0x268E; +constexpr unsigned int mmCB_PERFCOUNTER3_SELECT1__SI = 0x268F; +constexpr unsigned int mmCB_PERFCOUNTER3_SELECT__CI__VI = 0xDC05; +constexpr unsigned int mmCB_PERFCOUNTER_FILTER__CI__VI = 0xDC00; +constexpr unsigned int mmCB_SHADER_MASK = 0xA08F; +constexpr unsigned int mmCB_TARGET_MASK = 0xA08E; +constexpr unsigned int mmCC_DRM_ID_STRAPS = 0x1559; +constexpr unsigned int mmCC_GC_EDC_CONFIG__CI__VI = 0x3098; +constexpr unsigned int mmCC_GC_PRIM_CONFIG__CI__VI = 0x2240; +constexpr unsigned int mmCC_GC_SHADER_ARRAY_CONFIG = 0x226F; +constexpr unsigned int mmCC_MC_MAX_CHANNEL = 0x096E; +constexpr unsigned int mmCC_RB_BACKEND_DISABLE = 0x263D; +constexpr unsigned int mmCC_RB_DAISY_CHAIN = 0x2641; +constexpr unsigned int mmCC_RB_REDUNDANCY = 0x263C; +constexpr unsigned int mmCC_SQC_BANK_DISABLE = 0x2307; +constexpr unsigned int mmCC_SYS_RB_BACKEND_DISABLE = 0x03A0; +constexpr unsigned int mmCC_SYS_RB_REDUNDANCY = 0x039F; +constexpr unsigned int mmCGTS_CU0_LDS_SQ_CTRL_REG__CI__VI = 0xF009; +constexpr unsigned int mmCGTS_CU0_SP0_CTRL_REG__CI__VI = 0xF008; +constexpr unsigned int mmCGTS_CU0_SP1_CTRL_REG__CI__VI = 0xF00B; +constexpr unsigned int mmCGTS_CU0_TA_SQC_CTRL_REG__CI__VI = 0xF00A; +constexpr unsigned int mmCGTS_CU0_TD_TCP_CTRL_REG__CI__VI = 0xF00C; +constexpr unsigned int mmCGTS_CU10_LDS_SQ_CTRL_REG__CI__VI = 0xF03B; +constexpr unsigned int mmCGTS_CU10_SP0_CTRL_REG__CI__VI = 0xF03A; +constexpr unsigned int mmCGTS_CU10_SP1_CTRL_REG__CI__VI = 0xF03D; +constexpr unsigned int mmCGTS_CU10_TA_CTRL_REG__CI__VI = 0xF03C; +constexpr unsigned int mmCGTS_CU10_TD_TCP_CTRL_REG__CI__VI = 0xF03E; +constexpr unsigned int mmCGTS_CU11_LDS_SQ_CTRL_REG__CI__VI = 0xF040; +constexpr unsigned int mmCGTS_CU11_SP0_CTRL_REG__CI__VI = 0xF03F; +constexpr unsigned int mmCGTS_CU11_SP1_CTRL_REG__CI__VI = 0xF042; +constexpr unsigned int mmCGTS_CU11_TA_CTRL_REG__CI__VI = 0xF041; +constexpr unsigned int mmCGTS_CU11_TD_TCP_CTRL_REG__CI__VI = 0xF043; +constexpr unsigned int mmCGTS_CU12_LDS_SQ_CTRL_REG__CI__VI = 0xF045; +constexpr unsigned int mmCGTS_CU12_SP0_CTRL_REG__CI__VI = 0xF044; +constexpr unsigned int mmCGTS_CU12_SP1_CTRL_REG__CI__VI = 0xF047; +constexpr unsigned int mmCGTS_CU12_TA_SQC_CTRL_REG__CI__VI = 0xF046; +constexpr unsigned int mmCGTS_CU12_TD_TCP_CTRL_REG__CI__VI = 0xF048; +constexpr unsigned int mmCGTS_CU13_LDS_SQ_CTRL_REG__CI__VI = 0xF04A; +constexpr unsigned int mmCGTS_CU13_SP0_CTRL_REG__CI__VI = 0xF049; +constexpr unsigned int mmCGTS_CU13_SP1_CTRL_REG__CI__VI = 0xF04C; +constexpr unsigned int mmCGTS_CU13_TA_CTRL_REG__CI__VI = 0xF04B; +constexpr unsigned int mmCGTS_CU13_TD_TCP_CTRL_REG__CI__VI = 0xF04D; +constexpr unsigned int mmCGTS_CU14_LDS_SQ_CTRL_REG__CI__VI = 0xF04F; +constexpr unsigned int mmCGTS_CU14_SP0_CTRL_REG__CI__VI = 0xF04E; +constexpr unsigned int mmCGTS_CU14_SP1_CTRL_REG__CI__VI = 0xF051; +constexpr unsigned int mmCGTS_CU14_TA_CTRL_REG__CI__VI = 0xF050; +constexpr unsigned int mmCGTS_CU14_TD_TCP_CTRL_REG__CI__VI = 0xF052; +constexpr unsigned int mmCGTS_CU15_LDS_SQ_CTRL_REG__CI__VI = 0xF054; +constexpr unsigned int mmCGTS_CU15_SP0_CTRL_REG__CI__VI = 0xF053; +constexpr unsigned int mmCGTS_CU15_SP1_CTRL_REG__CI__VI = 0xF056; +constexpr unsigned int mmCGTS_CU15_TA_CTRL_REG__CI__VI = 0xF055; +constexpr unsigned int mmCGTS_CU15_TD_TCP_CTRL_REG__CI__VI = 0xF057; +constexpr unsigned int mmCGTS_CU1_LDS_SQ_CTRL_REG__CI__VI = 0xF00E; +constexpr unsigned int mmCGTS_CU1_SP0_CTRL_REG__CI__VI = 0xF00D; +constexpr unsigned int mmCGTS_CU1_SP1_CTRL_REG__CI__VI = 0xF010; +constexpr unsigned int mmCGTS_CU1_TA_CTRL_REG__CI__VI = 0xF00F; +constexpr unsigned int mmCGTS_CU1_TD_TCP_CTRL_REG__CI__VI = 0xF011; +constexpr unsigned int mmCGTS_CU2_LDS_SQ_CTRL_REG__CI__VI = 0xF013; +constexpr unsigned int mmCGTS_CU2_SP0_CTRL_REG__CI__VI = 0xF012; +constexpr unsigned int mmCGTS_CU2_SP1_CTRL_REG__CI__VI = 0xF015; +constexpr unsigned int mmCGTS_CU2_TA_CTRL_REG__CI__VI = 0xF014; +constexpr unsigned int mmCGTS_CU2_TD_TCP_CTRL_REG__CI__VI = 0xF016; +constexpr unsigned int mmCGTS_CU3_LDS_SQ_CTRL_REG__CI__VI = 0xF018; +constexpr unsigned int mmCGTS_CU3_SP0_CTRL_REG__CI__VI = 0xF017; +constexpr unsigned int mmCGTS_CU3_SP1_CTRL_REG__CI__VI = 0xF01A; +constexpr unsigned int mmCGTS_CU3_TA_CTRL_REG__CI__VI = 0xF019; +constexpr unsigned int mmCGTS_CU3_TD_TCP_CTRL_REG__CI__VI = 0xF01B; +constexpr unsigned int mmCGTS_CU4_LDS_SQ_CTRL_REG__CI__VI = 0xF01D; +constexpr unsigned int mmCGTS_CU4_SP0_CTRL_REG__CI__VI = 0xF01C; +constexpr unsigned int mmCGTS_CU4_SP1_CTRL_REG__CI__VI = 0xF01F; +constexpr unsigned int mmCGTS_CU4_TA_SQC_CTRL_REG__CI__VI = 0xF01E; +constexpr unsigned int mmCGTS_CU4_TD_TCP_CTRL_REG__CI__VI = 0xF020; +constexpr unsigned int mmCGTS_CU5_LDS_SQ_CTRL_REG__CI__VI = 0xF022; +constexpr unsigned int mmCGTS_CU5_SP0_CTRL_REG__CI__VI = 0xF021; +constexpr unsigned int mmCGTS_CU5_SP1_CTRL_REG__CI__VI = 0xF024; +constexpr unsigned int mmCGTS_CU5_TA_CTRL_REG__CI__VI = 0xF023; +constexpr unsigned int mmCGTS_CU5_TD_TCP_CTRL_REG__CI__VI = 0xF025; +constexpr unsigned int mmCGTS_CU6_LDS_SQ_CTRL_REG__CI__VI = 0xF027; +constexpr unsigned int mmCGTS_CU6_SP0_CTRL_REG__CI__VI = 0xF026; +constexpr unsigned int mmCGTS_CU6_SP1_CTRL_REG__CI__VI = 0xF029; +constexpr unsigned int mmCGTS_CU6_TA_CTRL_REG__CI__VI = 0xF028; +constexpr unsigned int mmCGTS_CU6_TD_TCP_CTRL_REG__CI__VI = 0xF02A; +constexpr unsigned int mmCGTS_CU7_LDS_SQ_CTRL_REG__CI__VI = 0xF02C; +constexpr unsigned int mmCGTS_CU7_SP0_CTRL_REG__CI__VI = 0xF02B; +constexpr unsigned int mmCGTS_CU7_SP1_CTRL_REG__CI__VI = 0xF02E; +constexpr unsigned int mmCGTS_CU7_TA_CTRL_REG__CI__VI = 0xF02D; +constexpr unsigned int mmCGTS_CU7_TD_TCP_CTRL_REG__CI__VI = 0xF02F; +constexpr unsigned int mmCGTS_CU8_LDS_SQ_CTRL_REG__CI__VI = 0xF031; +constexpr unsigned int mmCGTS_CU8_SP0_CTRL_REG__CI__VI = 0xF030; +constexpr unsigned int mmCGTS_CU8_SP1_CTRL_REG__CI__VI = 0xF033; +constexpr unsigned int mmCGTS_CU8_TA_SQC_CTRL_REG__CI__VI = 0xF032; +constexpr unsigned int mmCGTS_CU8_TD_TCP_CTRL_REG__CI__VI = 0xF034; +constexpr unsigned int mmCGTS_CU9_LDS_SQ_CTRL_REG__CI__VI = 0xF036; +constexpr unsigned int mmCGTS_CU9_SP0_CTRL_REG__CI__VI = 0xF035; +constexpr unsigned int mmCGTS_CU9_SP1_CTRL_REG__CI__VI = 0xF038; +constexpr unsigned int mmCGTS_CU9_TA_CTRL_REG__CI__VI = 0xF037; +constexpr unsigned int mmCGTS_CU9_TD_TCP_CTRL_REG__CI__VI = 0xF039; +constexpr unsigned int mmCGTS_RD_CTRL_REG__CI__VI = 0xF001; +constexpr unsigned int mmCGTS_RD_CTRL_REG__SI = 0x2455; +constexpr unsigned int mmCGTS_RD_REG__CI__VI = 0xF002; +constexpr unsigned int mmCGTS_RD_REG__SI = 0x2456; +constexpr unsigned int mmCGTS_SM_CTRL_REG__CI__VI = 0xF000; +constexpr unsigned int mmCGTS_SM_CTRL_REG__SI = 0x2454; +constexpr unsigned int mmCGTS_TCC_DISABLE__CI__VI = 0xF003; +constexpr unsigned int mmCGTS_TCC_DISABLE__SI = 0x2452; +constexpr unsigned int mmCGTS_USER_TCC_DISABLE__CI__VI = 0xF004; +constexpr unsigned int mmCGTS_USER_TCC_DISABLE__SI = 0x2453; +constexpr unsigned int mmCGTT_BCI_CLK_CTRL__CI__VI = 0xF082; +constexpr unsigned int mmCGTT_BCI_CLK_CTRL__SI = 0x24A9; +constexpr unsigned int mmCGTT_CPC_CLK_CTRL__CI__VI = 0xF0B2; +constexpr unsigned int mmCGTT_CPF_CLK_CTRL__CI__VI = 0xF0B1; +constexpr unsigned int mmCGTT_CP_CLK_CTRL__CI__VI = 0xF0B0; +constexpr unsigned int mmCGTT_CP_CLK_CTRL__SI = 0x3059; +constexpr unsigned int mmCGTT_GDS_CLK_CTRL__CI__VI = 0xF0A0; +constexpr unsigned int mmCGTT_GDS_CLK_CTRL__SI = 0x25DD; +constexpr unsigned int mmCGTT_IA_CLK_CTRL__CI__VI = 0xF085; +constexpr unsigned int mmCGTT_IA_CLK_CTRL__SI = 0x2261; +constexpr unsigned int mmCGTT_PA_CLK_CTRL__CI__VI = 0xF088; +constexpr unsigned int mmCGTT_PA_CLK_CTRL__SI = 0x2286; +constexpr unsigned int mmCGTT_PC_CLK_CTRL__CI__VI = 0xF081; +constexpr unsigned int mmCGTT_PC_CLK_CTRL__SI = 0x24A8; +constexpr unsigned int mmCGTT_RLC_CLK_CTRL__CI__VI = 0xF0B8; +constexpr unsigned int mmCGTT_RLC_CLK_CTRL__SI = 0x30E0; +constexpr unsigned int mmCGTT_ROM_CLK_CTRL0__SI = 0x0583; +constexpr unsigned int mmCGTT_SC_CLK_CTRL__CI__VI = 0xF089; +constexpr unsigned int mmCGTT_SC_CLK_CTRL__SI = 0x22CA; +constexpr unsigned int mmCGTT_SPI_CLK_CTRL__CI__VI = 0xF080; +constexpr unsigned int mmCGTT_SPI_CLK_CTRL__SI = 0x2451; +constexpr unsigned int mmCGTT_SQG_CLK_CTRL__CI__VI = 0xF08D; +constexpr unsigned int mmCGTT_SQG_CLK_CTRL__SI = 0x2363; +constexpr unsigned int mmCGTT_SQ_CLK_CTRL__CI__VI = 0xF08C; +constexpr unsigned int mmCGTT_SQ_CLK_CTRL__SI = 0x2362; +constexpr unsigned int mmCGTT_SX_CLK_CTRL0__CI__VI = 0xF094; +constexpr unsigned int mmCGTT_SX_CLK_CTRL0__SI = 0x240C; +constexpr unsigned int mmCGTT_SX_CLK_CTRL1__CI__VI = 0xF095; +constexpr unsigned int mmCGTT_SX_CLK_CTRL1__SI = 0x240D; +constexpr unsigned int mmCGTT_SX_CLK_CTRL2__CI__VI = 0xF096; +constexpr unsigned int mmCGTT_SX_CLK_CTRL2__SI = 0x240E; +constexpr unsigned int mmCGTT_SX_CLK_CTRL3__CI__VI = 0xF097; +constexpr unsigned int mmCGTT_SX_CLK_CTRL3__SI = 0x240F; +constexpr unsigned int mmCGTT_SX_CLK_CTRL4__CI__VI = 0xF098; +constexpr unsigned int mmCGTT_SX_CLK_CTRL4__SI = 0x2410; +constexpr unsigned int mmCGTT_TCI_CLK_CTRL__CI__VI = 0xF09F; +constexpr unsigned int mmCGTT_TCI_CLK_CTRL__SI = 0x2B60; +constexpr unsigned int mmCGTT_TCP_CLK_CTRL__CI__VI = 0xF09E; +constexpr unsigned int mmCGTT_TCP_CLK_CTRL__SI = 0x2B15; +constexpr unsigned int mmCGTT_VGT_CLK_CTRL__CI__VI = 0xF084; +constexpr unsigned int mmCGTT_VGT_CLK_CTRL__SI = 0x225F; +constexpr unsigned int mmCGTT_WD_CLK_CTRL__CI__VI = 0xF086; +constexpr unsigned int mmCG_CLKPIN_CNTL__SI = 0x0198; +constexpr unsigned int mmCG_DISPLAY_GAP_CNTL__SI = 0x020A; +constexpr unsigned int mmCG_FDO_CTRL0__SI = 0x01D5; +constexpr unsigned int mmCG_FDO_CTRL1__SI = 0x01D6; +constexpr unsigned int mmCG_FDO_CTRL2__SI = 0x01D7; +constexpr unsigned int mmCG_FPS_CNT__CI = 0x0194; +constexpr unsigned int mmCG_FREQ_TRAN_VOTING__SI = 0x01EF; +constexpr unsigned int mmCG_MULT_THERMAL_CTRL__SI = 0x01C4; +constexpr unsigned int mmCG_MULT_THERMAL_STATUS__SI = 0x01C5; +constexpr unsigned int mmCG_SPLL_FUNC_CNTL_2__SI = 0x0181; +constexpr unsigned int mmCG_SPLL_FUNC_CNTL_3__SI = 0x0182; +constexpr unsigned int mmCG_SPLL_FUNC_CNTL_4__SI = 0x0183; +constexpr unsigned int mmCG_SPLL_FUNC_CNTL_5__SI = 0x0184; +constexpr unsigned int mmCG_SPLL_FUNC_CNTL__SI = 0x0180; +constexpr unsigned int mmCG_SPLL_SPREAD_SPECTRUM_2__SI = 0x0189; +constexpr unsigned int mmCG_SPLL_SPREAD_SPECTRUM__SI = 0x0188; +constexpr unsigned int mmCG_STATIC_SCREEN_PARAMETER__SI = 0x0203; +constexpr unsigned int mmCG_TACH_CTRL__SI = 0x01DC; +constexpr unsigned int mmCG_TACH_STATUS__SI = 0x01DD; +constexpr unsigned int mmCG_THERMAL_CTRL__SI = 0x01C0; +constexpr unsigned int mmCG_THERMAL_INT__SI = 0x01C2; +constexpr unsigned int mmCG_THERMAL_STATUS__SI = 0x01C1; +constexpr unsigned int mmCG_ULV_PARAMETER__SI = 0x021F; +constexpr unsigned int mmCHUB_ATC_PERFCOUNTER0_CFG__CI__VI = 0x07D8; +constexpr unsigned int mmCHUB_ATC_PERFCOUNTER1_CFG__CI__VI = 0x07D9; +constexpr unsigned int mmCHUB_ATC_PERFCOUNTER_HI__CI__VI = 0x07D7; +constexpr unsigned int mmCHUB_ATC_PERFCOUNTER_LO__CI__VI = 0x07D6; +constexpr unsigned int mmCHUB_ATC_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07DA; +constexpr unsigned int mmCLKREQB_PAD_CNTL__CI__VI = 0x1521; +constexpr unsigned int mmCOHER_DEST_BASE_0 = 0xA092; +constexpr unsigned int mmCOHER_DEST_BASE_1 = 0xA093; +constexpr unsigned int mmCOHER_DEST_BASE_2 = 0xA07E; +constexpr unsigned int mmCOHER_DEST_BASE_3 = 0xA07F; +constexpr unsigned int mmCOHER_DEST_BASE_HI_0__CI__VI = 0xA07A; +constexpr unsigned int mmCOHER_DEST_BASE_HI_1__CI__VI = 0xA07B; +constexpr unsigned int mmCOHER_DEST_BASE_HI_2__CI__VI = 0xA07C; +constexpr unsigned int mmCOHER_DEST_BASE_HI_3__CI__VI = 0xA07D; +constexpr unsigned int mmCOMPUTE_DIM_X = 0x2E01; +constexpr unsigned int mmCOMPUTE_DIM_Y = 0x2E02; +constexpr unsigned int mmCOMPUTE_DIM_Z = 0x2E03; +constexpr unsigned int mmCOMPUTE_DISPATCH_INITIATOR = 0x2E00; +constexpr unsigned int mmCOMPUTE_MISC_RESERVED__CI__VI = 0x2E1F; +constexpr unsigned int mmCOMPUTE_NUM_THREAD_X = 0x2E07; +constexpr unsigned int mmCOMPUTE_NUM_THREAD_Y = 0x2E08; +constexpr unsigned int mmCOMPUTE_NUM_THREAD_Z = 0x2E09; +constexpr unsigned int mmCOMPUTE_PERFCOUNT_ENABLE__CI__VI = 0x2E0B; +constexpr unsigned int mmCOMPUTE_PGM_HI = 0x2E0D; +constexpr unsigned int mmCOMPUTE_PGM_LO = 0x2E0C; +constexpr unsigned int mmCOMPUTE_PGM_RSRC1 = 0x2E12; +constexpr unsigned int mmCOMPUTE_PGM_RSRC2 = 0x2E13; +constexpr unsigned int mmCOMPUTE_PIPELINESTAT_ENABLE__CI__VI = 0x2E0A; +constexpr unsigned int mmCOMPUTE_RESOURCE_LIMITS = 0x2E15; +constexpr unsigned int mmCOMPUTE_RESTART_X__CI__VI = 0x2E1B; +constexpr unsigned int mmCOMPUTE_RESTART_Y__CI__VI = 0x2E1C; +constexpr unsigned int mmCOMPUTE_RESTART_Z__CI__VI = 0x2E1D; +constexpr unsigned int mmCOMPUTE_START_X = 0x2E04; +constexpr unsigned int mmCOMPUTE_START_Y = 0x2E05; +constexpr unsigned int mmCOMPUTE_START_Z = 0x2E06; +constexpr unsigned int mmCOMPUTE_STATIC_THREAD_MGMT_SE0 = 0x2E16; +constexpr unsigned int mmCOMPUTE_STATIC_THREAD_MGMT_SE1 = 0x2E17; +constexpr unsigned int mmCOMPUTE_STATIC_THREAD_MGMT_SE2__CI__VI = 0x2E19; +constexpr unsigned int mmCOMPUTE_STATIC_THREAD_MGMT_SE3__CI__VI = 0x2E1A; +constexpr unsigned int mmCOMPUTE_TBA_HI = 0x2E0F; +constexpr unsigned int mmCOMPUTE_TBA_LO = 0x2E0E; +constexpr unsigned int mmCOMPUTE_THREAD_TRACE_ENABLE__CI__VI = 0x2E1E; +constexpr unsigned int mmCOMPUTE_TMA_HI = 0x2E11; +constexpr unsigned int mmCOMPUTE_TMA_LO = 0x2E10; +constexpr unsigned int mmCOMPUTE_TMPRING_SIZE = 0x2E18; +constexpr unsigned int mmCOMPUTE_USER_DATA_0 = 0x2E40; +constexpr unsigned int mmCOMPUTE_USER_DATA_1 = 0x2E41; +constexpr unsigned int mmCOMPUTE_USER_DATA_10 = 0x2E4A; +constexpr unsigned int mmCOMPUTE_USER_DATA_11 = 0x2E4B; +constexpr unsigned int mmCOMPUTE_USER_DATA_12 = 0x2E4C; +constexpr unsigned int mmCOMPUTE_USER_DATA_13 = 0x2E4D; +constexpr unsigned int mmCOMPUTE_USER_DATA_14 = 0x2E4E; +constexpr unsigned int mmCOMPUTE_USER_DATA_15 = 0x2E4F; +constexpr unsigned int mmCOMPUTE_USER_DATA_2 = 0x2E42; +constexpr unsigned int mmCOMPUTE_USER_DATA_3 = 0x2E43; +constexpr unsigned int mmCOMPUTE_USER_DATA_4 = 0x2E44; +constexpr unsigned int mmCOMPUTE_USER_DATA_5 = 0x2E45; +constexpr unsigned int mmCOMPUTE_USER_DATA_6 = 0x2E46; +constexpr unsigned int mmCOMPUTE_USER_DATA_7 = 0x2E47; +constexpr unsigned int mmCOMPUTE_USER_DATA_8 = 0x2E48; +constexpr unsigned int mmCOMPUTE_USER_DATA_9 = 0x2E49; +constexpr unsigned int mmCOMPUTE_VMID = 0x2E14; +constexpr unsigned int mmCONFIG_APER_SIZE = 0x150C; +constexpr unsigned int mmCONFIG_CNTL = 0x1509; +constexpr unsigned int mmCONFIG_F0_BASE = 0x150B; +constexpr unsigned int mmCONFIG_MEMSIZE = 0x150A; +constexpr unsigned int mmCONFIG_REG_APER_SIZE = 0x150D; +constexpr unsigned int mmCPC1_CONFIG__CI = 0x0F97; +constexpr unsigned int mmCPC2_CONFIG__CI = 0x0F98; +constexpr unsigned int mmCPC_INT_CNTL__CI__VI = 0x30B4; +constexpr unsigned int mmCPC_INT_CNTX_ID__CI__VI = 0x30B7; +constexpr unsigned int mmCPC_INT_STATUS__CI__VI = 0x30B5; +constexpr unsigned int mmCPC_PERFCOUNTER0_HI__CI__VI = 0xD007; +constexpr unsigned int mmCPC_PERFCOUNTER0_LO__CI__VI = 0xD006; +constexpr unsigned int mmCPC_PERFCOUNTER0_SELECT1__CI__VI = 0xD804; +constexpr unsigned int mmCPC_PERFCOUNTER0_SELECT__CI__VI = 0xD809; +constexpr unsigned int mmCPC_PERFCOUNTER1_HI__CI__VI = 0xD005; +constexpr unsigned int mmCPC_PERFCOUNTER1_LO__CI__VI = 0xD004; +constexpr unsigned int mmCPC_PERFCOUNTER1_SELECT__CI__VI = 0xD803; +constexpr unsigned int mmCPF_PERFCOUNTER0_HI__CI__VI = 0xD00B; +constexpr unsigned int mmCPF_PERFCOUNTER0_LO__CI__VI = 0xD00A; +constexpr unsigned int mmCPF_PERFCOUNTER0_SELECT1__CI__VI = 0xD806; +constexpr unsigned int mmCPF_PERFCOUNTER0_SELECT__CI__VI = 0xD807; +constexpr unsigned int mmCPF_PERFCOUNTER1_HI__CI__VI = 0xD009; +constexpr unsigned int mmCPF_PERFCOUNTER1_LO__CI__VI = 0xD008; +constexpr unsigned int mmCPF_PERFCOUNTER1_SELECT__CI__VI = 0xD805; +constexpr unsigned int mmCPG_CONFIG__CI = 0x0F96; +constexpr unsigned int mmCPG_PERFCOUNTER0_HI__CI__VI = 0xD003; +constexpr unsigned int mmCPG_PERFCOUNTER0_LO__CI__VI = 0xD002; +constexpr unsigned int mmCPG_PERFCOUNTER0_SELECT1__CI__VI = 0xD801; +constexpr unsigned int mmCPG_PERFCOUNTER0_SELECT__CI__VI = 0xD802; +constexpr unsigned int mmCPG_PERFCOUNTER1_HI__CI__VI = 0xD001; +constexpr unsigned int mmCPG_PERFCOUNTER1_LO__CI__VI = 0xD000; +constexpr unsigned int mmCPG_PERFCOUNTER1_SELECT__CI__VI = 0xD800; +constexpr unsigned int mmCP_APPEND_ADDR_HI__CI__VI = 0xC059; +constexpr unsigned int mmCP_APPEND_ADDR_HI__SI = 0x2159; +constexpr unsigned int mmCP_APPEND_ADDR_LO__CI__VI = 0xC058; +constexpr unsigned int mmCP_APPEND_ADDR_LO__SI = 0x2158; +constexpr unsigned int mmCP_APPEND_DATA__CI__VI = 0xC05A; +constexpr unsigned int mmCP_APPEND_DATA__SI = 0x215A; +constexpr unsigned int mmCP_APPEND_LAST_CS_FENCE__CI__VI = 0xC05B; +constexpr unsigned int mmCP_APPEND_LAST_CS_FENCE__SI = 0x215B; +constexpr unsigned int mmCP_APPEND_LAST_PS_FENCE__CI__VI = 0xC05C; +constexpr unsigned int mmCP_APPEND_LAST_PS_FENCE__SI = 0x215C; +constexpr unsigned int mmCP_ATOMIC_PREOP_HI__CI__VI = 0xC05E; +constexpr unsigned int mmCP_ATOMIC_PREOP_HI__SI = 0x215E; +constexpr unsigned int mmCP_ATOMIC_PREOP_LO__CI__VI = 0xC05D; +constexpr unsigned int mmCP_ATOMIC_PREOP_LO__SI = 0x215D; +constexpr unsigned int mmCP_BUSY_STAT = 0x219F; +constexpr unsigned int mmCP_CEQ1_AVAIL = 0x21E6; +constexpr unsigned int mmCP_CEQ2_AVAIL = 0x21E7; +constexpr unsigned int mmCP_CE_COMPARE_COUNT__CI__VI = 0x20C0; +constexpr unsigned int mmCP_CE_COUNTER__CI__VI = 0xC09A; +constexpr unsigned int mmCP_CE_DE_COUNT__CI__VI = 0x20C1; +constexpr unsigned int mmCP_CE_HEADER_DUMP = 0x21A4; +constexpr unsigned int mmCP_CE_IB1_BASE_HI__CI__VI = 0xC0C7; +constexpr unsigned int mmCP_CE_IB1_BASE_HI__SI = 0x21C7; +constexpr unsigned int mmCP_CE_IB1_BASE_LO__CI__VI = 0xC0C6; +constexpr unsigned int mmCP_CE_IB1_BASE_LO__SI = 0x21C6; +constexpr unsigned int mmCP_CE_IB1_BUFSZ__CI__VI = 0xC0C8; +constexpr unsigned int mmCP_CE_IB1_BUFSZ__SI = 0x21C8; +constexpr unsigned int mmCP_CE_IB1_OFFSET__CI__VI = 0xC098; +constexpr unsigned int mmCP_CE_IB2_BASE_HI__CI__VI = 0xC0CA; +constexpr unsigned int mmCP_CE_IB2_BASE_HI__SI = 0x21CA; +constexpr unsigned int mmCP_CE_IB2_BASE_LO__CI__VI = 0xC0C9; +constexpr unsigned int mmCP_CE_IB2_BASE_LO__SI = 0x21C9; +constexpr unsigned int mmCP_CE_IB2_BUFSZ__CI__VI = 0xC0CB; +constexpr unsigned int mmCP_CE_IB2_BUFSZ__SI = 0x21CB; +constexpr unsigned int mmCP_CE_IB2_OFFSET__CI__VI = 0xC099; +constexpr unsigned int mmCP_CE_INIT_BASE_HI__CI__VI = 0xC0C4; +constexpr unsigned int mmCP_CE_INIT_BASE_HI__SI = 0x21C4; +constexpr unsigned int mmCP_CE_INIT_BASE_LO__CI__VI = 0xC0C3; +constexpr unsigned int mmCP_CE_INIT_BASE_LO__SI = 0x21C3; +constexpr unsigned int mmCP_CE_INIT_BUFSZ__CI__VI = 0xC0C5; +constexpr unsigned int mmCP_CE_INIT_BUFSZ__SI = 0x21C5; +constexpr unsigned int mmCP_CE_INTR_ROUTINE_START__CI__VI = 0x30A8; +constexpr unsigned int mmCP_CE_PRGRM_CNTR_START__CI__VI = 0x30A3; +constexpr unsigned int mmCP_CE_ROQ_IB1_STAT = 0x21E9; +constexpr unsigned int mmCP_CE_ROQ_IB2_STAT = 0x21EA; +constexpr unsigned int mmCP_CE_ROQ_RB_STAT = 0x21E8; +constexpr unsigned int mmCP_CMD_DATA = 0x21DF; +constexpr unsigned int mmCP_CMD_INDEX = 0x21DE; +constexpr unsigned int mmCP_CNTX_STAT = 0x21B8; +constexpr unsigned int mmCP_COHER_BASE_HI__CI__VI = 0xC079; +constexpr unsigned int mmCP_COHER_BASE__CI__VI = 0xC07E; +constexpr unsigned int mmCP_COHER_BASE__SI = 0x217E; +constexpr unsigned int mmCP_COHER_CNTL__CI__VI = 0xC07C; +constexpr unsigned int mmCP_COHER_CNTL__SI = 0x217C; +constexpr unsigned int mmCP_COHER_SIZE_HI__CI__VI = 0xC08C; +constexpr unsigned int mmCP_COHER_SIZE__CI__VI = 0xC07D; +constexpr unsigned int mmCP_COHER_SIZE__SI = 0x217D; +constexpr unsigned int mmCP_COHER_START_DELAY__CI__VI = 0xC07B; +constexpr unsigned int mmCP_COHER_START_DELAY__SI = 0x217B; +constexpr unsigned int mmCP_COHER_STATUS__CI__VI = 0xC07F; +constexpr unsigned int mmCP_COHER_STATUS__SI = 0x217F; +constexpr unsigned int mmCP_CONFIG__SI = 0x0F92; +constexpr unsigned int mmCP_CONTEXT_CNTL__CI__VI = 0x30AD; +constexpr unsigned int mmCP_CPC_BUSY_STAT__CI__VI = 0x2085; +constexpr unsigned int mmCP_CPC_GRBM_FREE_COUNT__CI__VI = 0x208B; +constexpr unsigned int mmCP_CPC_HALT_HYST_COUNT__CI__VI = 0x20A7; +constexpr unsigned int mmCP_CPC_MC_CNTL__CI = 0x208A; +constexpr unsigned int mmCP_CPC_SCRATCH_DATA__CI__VI = 0x2091; +constexpr unsigned int mmCP_CPC_SCRATCH_INDEX__CI__VI = 0x2090; +constexpr unsigned int mmCP_CPC_STALLED_STAT1__CI__VI = 0x2086; +constexpr unsigned int mmCP_CPC_STATUS__CI__VI = 0x2084; +constexpr unsigned int mmCP_CPF_BUSY_STAT__CI__VI = 0x2088; +constexpr unsigned int mmCP_CPF_STALLED_STAT1__CI__VI = 0x2089; +constexpr unsigned int mmCP_CPF_STATUS__CI__VI = 0x2087; +constexpr unsigned int mmCP_CSF_CNTL = 0x21B5; +constexpr unsigned int mmCP_CSF_STAT = 0x21B4; +constexpr unsigned int mmCP_DEBUG = 0x307F; +constexpr unsigned int mmCP_DEVICE_ID__CI__VI = 0x304B; +constexpr unsigned int mmCP_DE_CE_COUNT__CI__VI = 0x20C2; +constexpr unsigned int mmCP_DE_DE_COUNT__CI__VI = 0x20C4; +constexpr unsigned int mmCP_DE_LAST_INVAL_COUNT__CI__VI = 0x20C3; +constexpr unsigned int mmCP_DFY_ADDR_HI__CI__VI = 0x3022; +constexpr unsigned int mmCP_DFY_ADDR_LO__CI__VI = 0x3023; +constexpr unsigned int mmCP_DFY_CNTL__CI__VI = 0x3020; +constexpr unsigned int mmCP_DFY_DATA_0__CI__VI = 0x3024; +constexpr unsigned int mmCP_DFY_DATA_10__CI__VI = 0x302E; +constexpr unsigned int mmCP_DFY_DATA_11__CI__VI = 0x302F; +constexpr unsigned int mmCP_DFY_DATA_12__CI__VI = 0x3030; +constexpr unsigned int mmCP_DFY_DATA_13__CI__VI = 0x3031; +constexpr unsigned int mmCP_DFY_DATA_14__CI__VI = 0x3032; +constexpr unsigned int mmCP_DFY_DATA_15__CI__VI = 0x3033; +constexpr unsigned int mmCP_DFY_DATA_1__CI__VI = 0x3025; +constexpr unsigned int mmCP_DFY_DATA_2__CI__VI = 0x3026; +constexpr unsigned int mmCP_DFY_DATA_3__CI__VI = 0x3027; +constexpr unsigned int mmCP_DFY_DATA_4__CI__VI = 0x3028; +constexpr unsigned int mmCP_DFY_DATA_5__CI__VI = 0x3029; +constexpr unsigned int mmCP_DFY_DATA_6__CI__VI = 0x302A; +constexpr unsigned int mmCP_DFY_DATA_7__CI__VI = 0x302B; +constexpr unsigned int mmCP_DFY_DATA_8__CI__VI = 0x302C; +constexpr unsigned int mmCP_DFY_DATA_9__CI__VI = 0x302D; +constexpr unsigned int mmCP_DFY_STAT__CI__VI = 0x3021; +constexpr unsigned int mmCP_DMA_CNTL__CI__VI = 0xC08A; +constexpr unsigned int mmCP_DMA_CNTL__SI = 0x218A; +constexpr unsigned int mmCP_DMA_ME_COMMAND__CI__VI = 0xC084; +constexpr unsigned int mmCP_DMA_ME_COMMAND__SI = 0x2184; +constexpr unsigned int mmCP_DMA_ME_CONTROL__CI__VI = 0xC078; +constexpr unsigned int mmCP_DMA_ME_DST_ADDR_HI__CI__VI = 0xC083; +constexpr unsigned int mmCP_DMA_ME_DST_ADDR_HI__SI = 0x2183; +constexpr unsigned int mmCP_DMA_ME_DST_ADDR__CI__VI = 0xC082; +constexpr unsigned int mmCP_DMA_ME_DST_ADDR__SI = 0x2182; +constexpr unsigned int mmCP_DMA_ME_SRC_ADDR_HI__CI__VI = 0xC081; +constexpr unsigned int mmCP_DMA_ME_SRC_ADDR_HI__SI = 0x2181; +constexpr unsigned int mmCP_DMA_ME_SRC_ADDR__CI__VI = 0xC080; +constexpr unsigned int mmCP_DMA_ME_SRC_ADDR__SI = 0x2180; +constexpr unsigned int mmCP_DMA_PFP_COMMAND__CI__VI = 0xC089; +constexpr unsigned int mmCP_DMA_PFP_COMMAND__SI = 0x2189; +constexpr unsigned int mmCP_DMA_PFP_CONTROL__CI__VI = 0xC077; +constexpr unsigned int mmCP_DMA_PFP_DST_ADDR_HI__CI__VI = 0xC088; +constexpr unsigned int mmCP_DMA_PFP_DST_ADDR_HI__SI = 0x2188; +constexpr unsigned int mmCP_DMA_PFP_DST_ADDR__CI__VI = 0xC087; +constexpr unsigned int mmCP_DMA_PFP_DST_ADDR__SI = 0x2187; +constexpr unsigned int mmCP_DMA_PFP_SRC_ADDR_HI__CI__VI = 0xC086; +constexpr unsigned int mmCP_DMA_PFP_SRC_ADDR_HI__SI = 0x2186; +constexpr unsigned int mmCP_DMA_PFP_SRC_ADDR__CI__VI = 0xC085; +constexpr unsigned int mmCP_DMA_PFP_SRC_ADDR__SI = 0x2185; +constexpr unsigned int mmCP_DMA_READ_TAGS__CI__VI = 0xC08B; +constexpr unsigned int mmCP_DMA_READ_TAGS__SI = 0x218B; +constexpr unsigned int mmCP_ECC_FIRSTOCCURRENCE = 0x307A; +constexpr unsigned int mmCP_ECC_FIRSTOCCURRENCE_RING0 = 0x307B; +constexpr unsigned int mmCP_ECC_FIRSTOCCURRENCE_RING1 = 0x307C; +constexpr unsigned int mmCP_ECC_FIRSTOCCURRENCE_RING2 = 0x307D; +constexpr unsigned int mmCP_ENDIAN_SWAP__CI__VI = 0x3050; +constexpr unsigned int mmCP_EOP_DONE_ADDR_HI__CI__VI = 0xC001; +constexpr unsigned int mmCP_EOP_DONE_ADDR_HI__SI = 0x2101; +constexpr unsigned int mmCP_EOP_DONE_ADDR_LO__CI__VI = 0xC000; +constexpr unsigned int mmCP_EOP_DONE_ADDR_LO__SI = 0x2100; +constexpr unsigned int mmCP_EOP_DONE_DATA_CNTL__CI__VI = 0xC0D6; +constexpr unsigned int mmCP_EOP_DONE_DATA_HI__CI__VI = 0xC003; +constexpr unsigned int mmCP_EOP_DONE_DATA_HI__SI = 0x2103; +constexpr unsigned int mmCP_EOP_DONE_DATA_LO__CI__VI = 0xC002; +constexpr unsigned int mmCP_EOP_DONE_DATA_LO__SI = 0x2102; +constexpr unsigned int mmCP_EOP_DONE_EVENT_CNTL__CI__VI = 0xC0D5; +constexpr unsigned int mmCP_EOP_LAST_FENCE_HI__CI__VI = 0xC005; +constexpr unsigned int mmCP_EOP_LAST_FENCE_HI__SI = 0x2105; +constexpr unsigned int mmCP_EOP_LAST_FENCE_LO__CI__VI = 0xC004; +constexpr unsigned int mmCP_EOP_LAST_FENCE_LO__SI = 0x2104; +constexpr unsigned int mmCP_FETCHER_SOURCE__CI = 0x3082; +constexpr unsigned int mmCP_GDS_ATOMIC0_PREOP_HI__CI__VI = 0xC060; +constexpr unsigned int mmCP_GDS_ATOMIC0_PREOP_HI__SI = 0x2160; +constexpr unsigned int mmCP_GDS_ATOMIC0_PREOP_LO__CI__VI = 0xC05F; +constexpr unsigned int mmCP_GDS_ATOMIC0_PREOP_LO__SI = 0x215F; +constexpr unsigned int mmCP_GDS_ATOMIC1_PREOP_HI__CI__VI = 0xC062; +constexpr unsigned int mmCP_GDS_ATOMIC1_PREOP_HI__SI = 0x2162; +constexpr unsigned int mmCP_GDS_ATOMIC1_PREOP_LO__CI__VI = 0xC061; +constexpr unsigned int mmCP_GDS_ATOMIC1_PREOP_LO__SI = 0x2161; +constexpr unsigned int mmCP_GRBM_FREE_COUNT = 0x21A3; +constexpr unsigned int mmCP_HPD_EOP_BASE_ADDR_HI__CI = 0x3242; +constexpr unsigned int mmCP_HPD_EOP_BASE_ADDR__CI = 0x3241; +constexpr unsigned int mmCP_HPD_EOP_CONTROL__CI = 0x3244; +constexpr unsigned int mmCP_HPD_EOP_VMID__CI = 0x3243; +constexpr unsigned int mmCP_HPD_ROQ_OFFSETS__CI__VI = 0x3240; +constexpr unsigned int mmCP_HQD_ACTIVE__CI__VI = 0x3247; +constexpr unsigned int mmCP_HQD_ATOMIC0_PREOP_HI__CI__VI = 0x3262; +constexpr unsigned int mmCP_HQD_ATOMIC0_PREOP_LO__CI__VI = 0x3261; +constexpr unsigned int mmCP_HQD_ATOMIC1_PREOP_HI__CI__VI = 0x3264; +constexpr unsigned int mmCP_HQD_ATOMIC1_PREOP_LO__CI__VI = 0x3263; +constexpr unsigned int mmCP_HQD_DEQUEUE_REQUEST__CI__VI = 0x325D; +constexpr unsigned int mmCP_HQD_DMA_OFFLOAD__CI__VI = 0x325E; +constexpr unsigned int mmCP_HQD_HQ_SCHEDULER0__CI__VI = 0x3265; +constexpr unsigned int mmCP_HQD_HQ_SCHEDULER1__CI__VI = 0x3266; +constexpr unsigned int mmCP_HQD_IB_BASE_ADDR_HI__CI__VI = 0x3258; +constexpr unsigned int mmCP_HQD_IB_BASE_ADDR__CI__VI = 0x3257; +constexpr unsigned int mmCP_HQD_IB_CONTROL__CI__VI = 0x325A; +constexpr unsigned int mmCP_HQD_IB_RPTR__CI__VI = 0x3259; +constexpr unsigned int mmCP_HQD_IQ_RPTR__CI__VI = 0x325C; +constexpr unsigned int mmCP_HQD_IQ_TIMER__CI__VI = 0x325B; +constexpr unsigned int mmCP_HQD_MSG_TYPE__CI__VI = 0x3260; +constexpr unsigned int mmCP_HQD_PERSISTENT_STATE__CI__VI = 0x3249; +constexpr unsigned int mmCP_HQD_PIPE_PRIORITY__CI__VI = 0x324A; +constexpr unsigned int mmCP_HQD_PQ_BASE_HI__CI__VI = 0x324E; +constexpr unsigned int mmCP_HQD_PQ_BASE__CI__VI = 0x324D; +constexpr unsigned int mmCP_HQD_PQ_CONTROL__CI__VI = 0x3256; +constexpr unsigned int mmCP_HQD_PQ_DOORBELL_CONTROL__CI__VI = 0x3254; +constexpr unsigned int mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI__CI__VI = 0x3251; +constexpr unsigned int mmCP_HQD_PQ_RPTR_REPORT_ADDR__CI__VI = 0x3250; +constexpr unsigned int mmCP_HQD_PQ_RPTR__CI__VI = 0x324F; +constexpr unsigned int mmCP_HQD_PQ_WPTR_POLL_ADDR_HI__CI__VI = 0x3253; +constexpr unsigned int mmCP_HQD_PQ_WPTR_POLL_ADDR__CI__VI = 0x3252; +constexpr unsigned int mmCP_HQD_PQ_WPTR__CI__VI = 0x3255; +constexpr unsigned int mmCP_HQD_QUANTUM__CI__VI = 0x324C; +constexpr unsigned int mmCP_HQD_QUEUE_PRIORITY__CI__VI = 0x324B; +constexpr unsigned int mmCP_HQD_SEMA_CMD__CI__VI = 0x325F; +constexpr unsigned int mmCP_HQD_VMID__CI__VI = 0x3248; +constexpr unsigned int mmCP_IB1_BASE_HI__CI__VI = 0xC0CD; +constexpr unsigned int mmCP_IB1_BASE_HI__SI = 0x21CD; +constexpr unsigned int mmCP_IB1_BASE_LO__CI__VI = 0xC0CC; +constexpr unsigned int mmCP_IB1_BASE_LO__SI = 0x21CC; +constexpr unsigned int mmCP_IB1_BUFSZ__CI__VI = 0xC0CE; +constexpr unsigned int mmCP_IB1_BUFSZ__SI = 0x21CE; +constexpr unsigned int mmCP_IB1_OFFSET__CI__VI = 0xC092; +constexpr unsigned int mmCP_IB1_OFFSET__SI = 0x2192; +constexpr unsigned int mmCP_IB1_PREAMBLE_BEGIN__CI__VI = 0xC094; +constexpr unsigned int mmCP_IB1_PREAMBLE_BEGIN__SI = 0x2194; +constexpr unsigned int mmCP_IB1_PREAMBLE_END__CI__VI = 0xC095; +constexpr unsigned int mmCP_IB1_PREAMBLE_END__SI = 0x2195; +constexpr unsigned int mmCP_IB2_BASE_HI__CI__VI = 0xC0D0; +constexpr unsigned int mmCP_IB2_BASE_HI__SI = 0x21D0; +constexpr unsigned int mmCP_IB2_BASE_LO__CI__VI = 0xC0CF; +constexpr unsigned int mmCP_IB2_BASE_LO__SI = 0x21CF; +constexpr unsigned int mmCP_IB2_BUFSZ__CI__VI = 0xC0D1; +constexpr unsigned int mmCP_IB2_BUFSZ__SI = 0x21D1; +constexpr unsigned int mmCP_IB2_OFFSET__CI__VI = 0xC093; +constexpr unsigned int mmCP_IB2_OFFSET__SI = 0x2193; +constexpr unsigned int mmCP_IB2_PREAMBLE_BEGIN__CI__VI = 0xC096; +constexpr unsigned int mmCP_IB2_PREAMBLE_BEGIN__SI = 0x2196; +constexpr unsigned int mmCP_IB2_PREAMBLE_END__CI__VI = 0xC097; +constexpr unsigned int mmCP_IB2_PREAMBLE_END__SI = 0x2197; +constexpr unsigned int mmCP_INT_CNTL = 0x3049; +constexpr unsigned int mmCP_INT_CNTL_RING0 = 0x306A; +constexpr unsigned int mmCP_INT_CNTL_RING1 = 0x306B; +constexpr unsigned int mmCP_INT_CNTL_RING2 = 0x306C; +constexpr unsigned int mmCP_INT_STATUS = 0x304A; +constexpr unsigned int mmCP_INT_STATUS_RING0 = 0x306D; +constexpr unsigned int mmCP_INT_STATUS_RING1 = 0x306E; +constexpr unsigned int mmCP_INT_STATUS_RING2 = 0x306F; +constexpr unsigned int mmCP_INT_STAT_DEBUG = 0x21F7; +constexpr unsigned int mmCP_IQ_WAIT_TIME1__CI__VI = 0x30AF; +constexpr unsigned int mmCP_IQ_WAIT_TIME2__CI__VI = 0x30B0; +constexpr unsigned int mmCP_MAX_CONTEXT__CI__VI = 0x30AE; +constexpr unsigned int mmCP_MC_PACK_DELAY_CNT__SI__CI = 0x21A7; +constexpr unsigned int mmCP_MC_TAG_CNTL__CI = 0x21A8; +constexpr unsigned int mmCP_MC_TAG_DATA__CI = 0x21A9; +constexpr unsigned int mmCP_ME0_PIPE0_PRIORITY__CI__VI = 0x304D; +constexpr unsigned int mmCP_ME0_PIPE0_VMID__CI__VI = 0x3052; +constexpr unsigned int mmCP_ME0_PIPE1_PRIORITY__CI__VI = 0x304E; +constexpr unsigned int mmCP_ME0_PIPE1_VMID__CI__VI = 0x3053; +constexpr unsigned int mmCP_ME0_PIPE2_PRIORITY__CI__VI = 0x304F; +constexpr unsigned int mmCP_ME0_PIPE_PRIORITY_CNTS__CI__VI = 0x304C; +constexpr unsigned int mmCP_ME1_INT_STAT_DEBUG__CI__VI = 0x3095; +constexpr unsigned int mmCP_ME1_PIPE0_INT_CNTL__CI__VI = 0x3085; +constexpr unsigned int mmCP_ME1_PIPE0_INT_STATUS__CI__VI = 0x308D; +constexpr unsigned int mmCP_ME1_PIPE0_PRIORITY__CI__VI = 0x309A; +constexpr unsigned int mmCP_ME1_PIPE1_INT_CNTL__CI__VI = 0x3086; +constexpr unsigned int mmCP_ME1_PIPE1_INT_STATUS__CI__VI = 0x308E; +constexpr unsigned int mmCP_ME1_PIPE1_PRIORITY__CI__VI = 0x309B; +constexpr unsigned int mmCP_ME1_PIPE2_INT_CNTL__CI__VI = 0x3087; +constexpr unsigned int mmCP_ME1_PIPE2_INT_STATUS__CI__VI = 0x308F; +constexpr unsigned int mmCP_ME1_PIPE2_PRIORITY__CI__VI = 0x309C; +constexpr unsigned int mmCP_ME1_PIPE3_INT_CNTL__CI__VI = 0x3088; +constexpr unsigned int mmCP_ME1_PIPE3_INT_STATUS__CI__VI = 0x3090; +constexpr unsigned int mmCP_ME1_PIPE3_PRIORITY__CI__VI = 0x309D; +constexpr unsigned int mmCP_ME1_PIPE_PRIORITY_CNTS__CI__VI = 0x3099; +constexpr unsigned int mmCP_ME2_INT_STAT_DEBUG__CI__VI = 0x3096; +constexpr unsigned int mmCP_ME2_PIPE0_INT_CNTL__CI__VI = 0x3089; +constexpr unsigned int mmCP_ME2_PIPE0_INT_STATUS__CI__VI = 0x3091; +constexpr unsigned int mmCP_ME2_PIPE0_PRIORITY__CI__VI = 0x309F; +constexpr unsigned int mmCP_ME2_PIPE1_INT_CNTL__CI__VI = 0x308A; +constexpr unsigned int mmCP_ME2_PIPE1_INT_STATUS__CI__VI = 0x3092; +constexpr unsigned int mmCP_ME2_PIPE1_PRIORITY__CI__VI = 0x30A0; +constexpr unsigned int mmCP_ME2_PIPE2_INT_CNTL__CI__VI = 0x308B; +constexpr unsigned int mmCP_ME2_PIPE2_INT_STATUS__CI__VI = 0x3093; +constexpr unsigned int mmCP_ME2_PIPE2_PRIORITY__CI__VI = 0x30A1; +constexpr unsigned int mmCP_ME2_PIPE3_INT_CNTL__CI__VI = 0x308C; +constexpr unsigned int mmCP_ME2_PIPE3_INT_STATUS__CI__VI = 0x3094; +constexpr unsigned int mmCP_ME2_PIPE3_PRIORITY__CI__VI = 0x30A2; +constexpr unsigned int mmCP_ME2_PIPE_PRIORITY_CNTS__CI__VI = 0x309E; +constexpr unsigned int mmCP_MEC1_INTR_ROUTINE_START__CI__VI = 0x30AB; +constexpr unsigned int mmCP_MEC1_PRGRM_CNTR_START__CI__VI = 0x30A6; +constexpr unsigned int mmCP_MEC2_INTR_ROUTINE_START__CI__VI = 0x30AC; +constexpr unsigned int mmCP_MEC2_PRGRM_CNTR_START__CI__VI = 0x30A7; +constexpr unsigned int mmCP_MEC_CNTL__CI__VI = 0x208D; +constexpr unsigned int mmCP_MEC_ME1_HEADER_DUMP__CI__VI = 0x208E; +constexpr unsigned int mmCP_MEC_ME1_UCODE_ADDR__CI = 0x305C; +constexpr unsigned int mmCP_MEC_ME1_UCODE_DATA__CI = 0x305D; +constexpr unsigned int mmCP_MEC_ME2_HEADER_DUMP__CI__VI = 0x208F; +constexpr unsigned int mmCP_MEC_ME2_UCODE_ADDR__CI = 0x305E; +constexpr unsigned int mmCP_MEC_ME2_UCODE_DATA__CI = 0x305F; +constexpr unsigned int mmCP_MEM_SLP_CNTL = 0x3079; +constexpr unsigned int mmCP_MEQ_AVAIL = 0x21DD; +constexpr unsigned int mmCP_MEQ_STAT = 0x21E5; +constexpr unsigned int mmCP_MEQ_STQ_THRESHOLD__CI__VI = 0x21BD; +constexpr unsigned int mmCP_MEQ_THRESHOLDS = 0x21D9; +constexpr unsigned int mmCP_ME_ATOMIC_PREOP_HI__CI__VI = 0xC05E; +constexpr unsigned int mmCP_ME_ATOMIC_PREOP_LO__CI__VI = 0xC05D; +constexpr unsigned int mmCP_ME_CNTL = 0x21B6; +constexpr unsigned int mmCP_ME_GDS_ATOMIC0_PREOP_HI__CI__VI = 0xC060; +constexpr unsigned int mmCP_ME_GDS_ATOMIC0_PREOP_LO__CI__VI = 0xC05F; +constexpr unsigned int mmCP_ME_GDS_ATOMIC1_PREOP_HI__CI__VI = 0xC062; +constexpr unsigned int mmCP_ME_GDS_ATOMIC1_PREOP_LO__CI__VI = 0xC061; +constexpr unsigned int mmCP_ME_HEADER_DUMP = 0x21A1; +constexpr unsigned int mmCP_ME_INTR_ROUTINE_START__CI__VI = 0x30AA; +constexpr unsigned int mmCP_ME_MC_RADDR_HI__CI__VI = 0xC06E; +constexpr unsigned int mmCP_ME_MC_RADDR_HI__SI = 0x216E; +constexpr unsigned int mmCP_ME_MC_RADDR_LO__CI__VI = 0xC06D; +constexpr unsigned int mmCP_ME_MC_RADDR_LO__SI = 0x216D; +constexpr unsigned int mmCP_ME_MC_WADDR_HI__CI__VI = 0xC06A; +constexpr unsigned int mmCP_ME_MC_WADDR_HI__SI = 0x216A; +constexpr unsigned int mmCP_ME_MC_WADDR_LO__CI__VI = 0xC069; +constexpr unsigned int mmCP_ME_MC_WADDR_LO__SI = 0x2169; +constexpr unsigned int mmCP_ME_MC_WDATA_HI__CI__VI = 0xC06C; +constexpr unsigned int mmCP_ME_MC_WDATA_HI__SI = 0x216C; +constexpr unsigned int mmCP_ME_MC_WDATA_LO__CI__VI = 0xC06B; +constexpr unsigned int mmCP_ME_MC_WDATA_LO__SI = 0x216B; +constexpr unsigned int mmCP_ME_PREEMPTION = 0x21B9; +constexpr unsigned int mmCP_ME_PRGRM_CNTR_START__CI__VI = 0x30A5; +constexpr unsigned int mmCP_MQD_BASE_ADDR_HI__CI__VI = 0x3246; +constexpr unsigned int mmCP_MQD_BASE_ADDR__CI__VI = 0x3245; +constexpr unsigned int mmCP_MQD_CONTROL__CI__VI = 0x3267; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT0_HI__CI__VI = 0xC00B; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT0_HI__SI = 0x210B; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT0_LO__CI__VI = 0xC00A; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT0_LO__SI = 0x210A; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT1_HI__CI__VI = 0xC00F; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT1_HI__SI = 0x210F; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT1_LO__CI__VI = 0xC00E; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT1_LO__SI = 0x210E; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT2_HI__CI__VI = 0xC013; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT2_HI__SI = 0x2113; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT2_LO__CI__VI = 0xC012; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT2_LO__SI = 0x2112; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT3_HI__CI__VI = 0xC017; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT3_HI__SI = 0x2117; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT3_LO__CI__VI = 0xC016; +constexpr unsigned int mmCP_NUM_PRIM_NEEDED_COUNT3_LO__SI = 0x2116; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT0_HI__CI__VI = 0xC009; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT0_HI__SI = 0x2109; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT0_LO__CI__VI = 0xC008; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT0_LO__SI = 0x2108; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT1_HI__CI__VI = 0xC00D; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT1_HI__SI = 0x210D; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT1_LO__CI__VI = 0xC00C; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT1_LO__SI = 0x210C; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT2_HI__CI__VI = 0xC011; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT2_HI__SI = 0x2111; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT2_LO__CI__VI = 0xC010; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT2_LO__SI = 0x2110; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT3_HI__CI__VI = 0xC015; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT3_HI__SI = 0x2115; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT3_LO__CI__VI = 0xC014; +constexpr unsigned int mmCP_NUM_PRIM_WRITTEN_COUNT3_LO__SI = 0x2114; +constexpr unsigned int mmCP_PA_CINVOC_COUNT_HI__CI__VI = 0xC029; +constexpr unsigned int mmCP_PA_CINVOC_COUNT_HI__SI = 0x2129; +constexpr unsigned int mmCP_PA_CINVOC_COUNT_LO__CI__VI = 0xC028; +constexpr unsigned int mmCP_PA_CINVOC_COUNT_LO__SI = 0x2128; +constexpr unsigned int mmCP_PA_CPRIM_COUNT_HI__CI__VI = 0xC02B; +constexpr unsigned int mmCP_PA_CPRIM_COUNT_HI__SI = 0x212B; +constexpr unsigned int mmCP_PA_CPRIM_COUNT_LO__CI__VI = 0xC02A; +constexpr unsigned int mmCP_PA_CPRIM_COUNT_LO__SI = 0x212A; +constexpr unsigned int mmCP_PERFCOUNTER_HI__SI = 0x21FE; +constexpr unsigned int mmCP_PERFCOUNTER_LO__SI = 0x21FD; +constexpr unsigned int mmCP_PERFCOUNTER_SELECT__SI = 0x21FC; +constexpr unsigned int mmCP_PERFMON_CNTL__CI__VI = 0xD808; +constexpr unsigned int mmCP_PERFMON_CNTL__SI = 0x21FF; +constexpr unsigned int mmCP_PERFMON_CNTX_CNTL = 0xA0D8; +constexpr unsigned int mmCP_PFP_ATOMIC_PREOP_HI__CI__VI = 0xC053; +constexpr unsigned int mmCP_PFP_ATOMIC_PREOP_LO__CI__VI = 0xC052; +constexpr unsigned int mmCP_PFP_GDS_ATOMIC0_PREOP_HI__CI__VI = 0xC055; +constexpr unsigned int mmCP_PFP_GDS_ATOMIC0_PREOP_LO__CI__VI = 0xC054; +constexpr unsigned int mmCP_PFP_GDS_ATOMIC1_PREOP_HI__CI__VI = 0xC057; +constexpr unsigned int mmCP_PFP_GDS_ATOMIC1_PREOP_LO__CI__VI = 0xC056; +constexpr unsigned int mmCP_PFP_HEADER_DUMP = 0x21A2; +constexpr unsigned int mmCP_PFP_IB_CONTROL__CI__VI = 0xC08D; +constexpr unsigned int mmCP_PFP_IB_CONTROL__SI = 0x218D; +constexpr unsigned int mmCP_PFP_INTR_ROUTINE_START__CI__VI = 0x30A9; +constexpr unsigned int mmCP_PFP_LOAD_CONTROL__CI__VI = 0xC08E; +constexpr unsigned int mmCP_PFP_LOAD_CONTROL__SI = 0x218E; +constexpr unsigned int mmCP_PFP_PRGRM_CNTR_START__CI__VI = 0x30A4; +constexpr unsigned int mmCP_PIPEID__CI__VI = 0xA0D9; +constexpr unsigned int mmCP_PIPE_STATS_ADDR_HI__CI__VI = 0xC019; +constexpr unsigned int mmCP_PIPE_STATS_ADDR_HI__SI = 0x2119; +constexpr unsigned int mmCP_PIPE_STATS_ADDR_LO__CI__VI = 0xC018; +constexpr unsigned int mmCP_PIPE_STATS_ADDR_LO__SI = 0x2118; +constexpr unsigned int mmCP_PQ_WPTR_POLL_CNTL1__CI__VI = 0x3084; +constexpr unsigned int mmCP_PQ_WPTR_POLL_CNTL__CI__VI = 0x3083; +constexpr unsigned int mmCP_PRT_LOD_STATS_CNTL0__CI__VI = 0x20AD; +constexpr unsigned int mmCP_PRT_LOD_STATS_CNTL1__CI__VI = 0x20AE; +constexpr unsigned int mmCP_PRT_LOD_STATS_CNTL2__CI__VI = 0x20AF; +constexpr unsigned int mmCP_PWR_CNTL = 0x3078; +constexpr unsigned int mmCP_QUEUE_THRESHOLDS = 0x21D8; +constexpr unsigned int mmCP_RB0_BASE = 0x3040; +constexpr unsigned int mmCP_RB0_BASE_HI__CI__VI = 0x30B1; +constexpr unsigned int mmCP_RB0_CNTL = 0x3041; +constexpr unsigned int mmCP_RB0_RPTR = 0x21C0; +constexpr unsigned int mmCP_RB0_RPTR_ADDR = 0x3043; +constexpr unsigned int mmCP_RB0_RPTR_ADDR_HI = 0x3044; +constexpr unsigned int mmCP_RB0_WPTR = 0x3045; +constexpr unsigned int mmCP_RB1_BASE = 0x3060; +constexpr unsigned int mmCP_RB1_BASE_HI__CI__VI = 0x30B2; +constexpr unsigned int mmCP_RB1_CNTL = 0x3061; +constexpr unsigned int mmCP_RB1_RPTR = 0x21BF; +constexpr unsigned int mmCP_RB1_RPTR_ADDR = 0x3062; +constexpr unsigned int mmCP_RB1_RPTR_ADDR_HI = 0x3063; +constexpr unsigned int mmCP_RB1_WPTR = 0x3064; +constexpr unsigned int mmCP_RB2_BASE = 0x3065; +constexpr unsigned int mmCP_RB2_CNTL = 0x3066; +constexpr unsigned int mmCP_RB2_RPTR = 0x21BE; +constexpr unsigned int mmCP_RB2_RPTR_ADDR = 0x3067; +constexpr unsigned int mmCP_RB2_RPTR_ADDR_HI = 0x3068; +constexpr unsigned int mmCP_RB2_WPTR = 0x3069; +constexpr unsigned int mmCP_RB_BASE = 0x3040; +constexpr unsigned int mmCP_RB_CNTL = 0x3041; +constexpr unsigned int mmCP_RB_OFFSET__CI__VI = 0xC091; +constexpr unsigned int mmCP_RB_OFFSET__SI = 0x2191; +constexpr unsigned int mmCP_RB_RPTR = 0x21C0; +constexpr unsigned int mmCP_RB_RPTR_ADDR = 0x3043; +constexpr unsigned int mmCP_RB_RPTR_ADDR_HI = 0x3044; +constexpr unsigned int mmCP_RB_RPTR_WR = 0x3042; +constexpr unsigned int mmCP_RB_VMID = 0x3051; +constexpr unsigned int mmCP_RB_WPTR = 0x3045; +constexpr unsigned int mmCP_RB_WPTR_DELAY = 0x21C1; +constexpr unsigned int mmCP_RB_WPTR_POLL_ADDR_HI = 0x3047; +constexpr unsigned int mmCP_RB_WPTR_POLL_ADDR_LO = 0x3046; +constexpr unsigned int mmCP_RB_WPTR_POLL_CNTL = 0x21C2; +constexpr unsigned int mmCP_RING0_PRIORITY = 0x304D; +constexpr unsigned int mmCP_RING1_PRIORITY = 0x304E; +constexpr unsigned int mmCP_RING2_PRIORITY = 0x304F; +constexpr unsigned int mmCP_RINGID = 0xA0D9; +constexpr unsigned int mmCP_RING_PRIORITY_CNTS = 0x304C; +constexpr unsigned int mmCP_ROQ1_THRESHOLDS = 0x21D5; +constexpr unsigned int mmCP_ROQ2_AVAIL = 0x21DC; +constexpr unsigned int mmCP_ROQ2_THRESHOLDS = 0x21D6; +constexpr unsigned int mmCP_ROQ_AVAIL = 0x21DA; +constexpr unsigned int mmCP_ROQ_IB1_STAT = 0x21E1; +constexpr unsigned int mmCP_ROQ_IB2_STAT = 0x21E2; +constexpr unsigned int mmCP_ROQ_RB_STAT = 0x21E0; +constexpr unsigned int mmCP_ROQ_THRESHOLDS__CI__VI = 0x21BC; +constexpr unsigned int mmCP_SCRATCH_DATA__CI__VI = 0xC090; +constexpr unsigned int mmCP_SCRATCH_DATA__SI = 0x2190; +constexpr unsigned int mmCP_SCRATCH_INDEX__CI__VI = 0xC08F; +constexpr unsigned int mmCP_SCRATCH_INDEX__SI = 0x218F; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT0_HI__CI__VI = 0xC02D; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT0_HI__SI = 0x212D; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT0_LO__CI__VI = 0xC02C; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT0_LO__SI = 0x212C; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT1_HI__CI__VI = 0xC02F; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT1_HI__SI = 0x212F; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT1_LO__CI__VI = 0xC02E; +constexpr unsigned int mmCP_SC_PSINVOC_COUNT1_LO__SI = 0x212E; +constexpr unsigned int mmCP_SEM_WAIT_TIMER__CI__VI = 0xC06F; +constexpr unsigned int mmCP_SEM_WAIT_TIMER__SI = 0x216F; +constexpr unsigned int mmCP_SIG_SEM_ADDR_HI__CI__VI = 0xC071; +constexpr unsigned int mmCP_SIG_SEM_ADDR_HI__SI = 0x2171; +constexpr unsigned int mmCP_SIG_SEM_ADDR_LO__CI__VI = 0xC070; +constexpr unsigned int mmCP_SIG_SEM_ADDR_LO__SI = 0x2170; +constexpr unsigned int mmCP_STALLED_STAT1 = 0x219D; +constexpr unsigned int mmCP_STALLED_STAT2 = 0x219E; +constexpr unsigned int mmCP_STALLED_STAT3 = 0x219C; +constexpr unsigned int mmCP_STAT = 0x21A0; +constexpr unsigned int mmCP_STQ_AVAIL = 0x21DB; +constexpr unsigned int mmCP_STQ_STAT = 0x21E3; +constexpr unsigned int mmCP_STQ_THRESHOLDS = 0x21D7; +constexpr unsigned int mmCP_STQ_WR_STAT__CI__VI = 0x21E4; +constexpr unsigned int mmCP_STREAM_OUT_ADDR_HI__CI__VI = 0xC007; +constexpr unsigned int mmCP_STREAM_OUT_ADDR_HI__SI = 0x2107; +constexpr unsigned int mmCP_STREAM_OUT_ADDR_LO__CI__VI = 0xC006; +constexpr unsigned int mmCP_STREAM_OUT_ADDR_LO__SI = 0x2106; +constexpr unsigned int mmCP_STRMOUT_CNTL__CI__VI = 0xC03F; +constexpr unsigned int mmCP_STRMOUT_CNTL__SI = 0x213F; +constexpr unsigned int mmCP_ST_BASE_HI__CI__VI = 0xC0D3; +constexpr unsigned int mmCP_ST_BASE_HI__SI = 0x21D3; +constexpr unsigned int mmCP_ST_BASE_LO__CI__VI = 0xC0D2; +constexpr unsigned int mmCP_ST_BASE_LO__SI = 0x21D2; +constexpr unsigned int mmCP_ST_BUFSZ__CI__VI = 0xC0D4; +constexpr unsigned int mmCP_ST_BUFSZ__SI = 0x21D4; +constexpr unsigned int mmCP_VGT_CSINVOC_COUNT_HI__CI__VI = 0xC031; +constexpr unsigned int mmCP_VGT_CSINVOC_COUNT_HI__SI = 0x2131; +constexpr unsigned int mmCP_VGT_CSINVOC_COUNT_LO__CI__VI = 0xC030; +constexpr unsigned int mmCP_VGT_CSINVOC_COUNT_LO__SI = 0x2130; +constexpr unsigned int mmCP_VGT_DSINVOC_COUNT_HI__CI__VI = 0xC027; +constexpr unsigned int mmCP_VGT_DSINVOC_COUNT_HI__SI = 0x2127; +constexpr unsigned int mmCP_VGT_DSINVOC_COUNT_LO__CI__VI = 0xC026; +constexpr unsigned int mmCP_VGT_DSINVOC_COUNT_LO__SI = 0x2126; +constexpr unsigned int mmCP_VGT_GSINVOC_COUNT_HI__CI__VI = 0xC023; +constexpr unsigned int mmCP_VGT_GSINVOC_COUNT_HI__SI = 0x2123; +constexpr unsigned int mmCP_VGT_GSINVOC_COUNT_LO__CI__VI = 0xC022; +constexpr unsigned int mmCP_VGT_GSINVOC_COUNT_LO__SI = 0x2122; +constexpr unsigned int mmCP_VGT_GSPRIM_COUNT_HI__CI__VI = 0xC01F; +constexpr unsigned int mmCP_VGT_GSPRIM_COUNT_HI__SI = 0x211F; +constexpr unsigned int mmCP_VGT_GSPRIM_COUNT_LO__CI__VI = 0xC01E; +constexpr unsigned int mmCP_VGT_GSPRIM_COUNT_LO__SI = 0x211E; +constexpr unsigned int mmCP_VGT_HSINVOC_COUNT_HI__CI__VI = 0xC025; +constexpr unsigned int mmCP_VGT_HSINVOC_COUNT_HI__SI = 0x2125; +constexpr unsigned int mmCP_VGT_HSINVOC_COUNT_LO__CI__VI = 0xC024; +constexpr unsigned int mmCP_VGT_HSINVOC_COUNT_LO__SI = 0x2124; +constexpr unsigned int mmCP_VGT_IAPRIM_COUNT_HI__CI__VI = 0xC01D; +constexpr unsigned int mmCP_VGT_IAPRIM_COUNT_HI__SI = 0x211D; +constexpr unsigned int mmCP_VGT_IAPRIM_COUNT_LO__CI__VI = 0xC01C; +constexpr unsigned int mmCP_VGT_IAPRIM_COUNT_LO__SI = 0x211C; +constexpr unsigned int mmCP_VGT_IAVERT_COUNT_HI__CI__VI = 0xC01B; +constexpr unsigned int mmCP_VGT_IAVERT_COUNT_HI__SI = 0x211B; +constexpr unsigned int mmCP_VGT_IAVERT_COUNT_LO__CI__VI = 0xC01A; +constexpr unsigned int mmCP_VGT_IAVERT_COUNT_LO__SI = 0x211A; +constexpr unsigned int mmCP_VGT_VSINVOC_COUNT_HI__CI__VI = 0xC021; +constexpr unsigned int mmCP_VGT_VSINVOC_COUNT_HI__SI = 0x2121; +constexpr unsigned int mmCP_VGT_VSINVOC_COUNT_LO__CI__VI = 0xC020; +constexpr unsigned int mmCP_VGT_VSINVOC_COUNT_LO__SI = 0x2120; +constexpr unsigned int mmCP_VMID = 0xA0DA; +constexpr unsigned int mmCP_VMID_PREEMPT__CI__VI = 0x30B6; +constexpr unsigned int mmCP_VMID_RESET__CI__VI = 0x30B3; +constexpr unsigned int mmCP_WAIT_REG_MEM_TIMEOUT__CI__VI = 0xC074; +constexpr unsigned int mmCP_WAIT_REG_MEM_TIMEOUT__SI = 0x2174; +constexpr unsigned int mmCP_WAIT_SEM_ADDR_HI__CI__VI = 0xC076; +constexpr unsigned int mmCP_WAIT_SEM_ADDR_HI__SI = 0x2176; +constexpr unsigned int mmCP_WAIT_SEM_ADDR_LO__CI__VI = 0xC075; +constexpr unsigned int mmCP_WAIT_SEM_ADDR_LO__SI = 0x2175; +constexpr unsigned int mmCRTC0_CRTC_ALLOW_STOP_OFF_V_CNT__SI__VI = 0x1BC3; +constexpr unsigned int mmCRTC0_CRTC_BLACK_COLOR__SI = 0x1BA2; +constexpr unsigned int mmCRTC0_CRTC_BLANK_CONTROL = 0x1B9D; +constexpr unsigned int mmCRTC0_CRTC_BLANK_DATA_COLOR__SI = 0x1BA1; +constexpr unsigned int mmCRTC0_CRTC_CONTROL__SI__VI = 0x1B9C; +constexpr unsigned int mmCRTC0_CRTC_COUNT_CONTROL__SI__VI = 0x1BA9; +constexpr unsigned int mmCRTC0_CRTC_COUNT_RESET__SI__VI = 0x1BAA; +constexpr unsigned int mmCRTC0_CRTC_DOUBLE_BUFFER_CONTROL__SI__VI = 0x1BB6; +constexpr unsigned int mmCRTC0_CRTC_DTMTEST_CNTL__SI__VI = 0x1B92; +constexpr unsigned int mmCRTC0_CRTC_DTMTEST_STATUS_POSITION__SI__VI = 0x1B93; +constexpr unsigned int mmCRTC0_CRTC_FLOW_CONTROL__SI__VI = 0x1B99; +constexpr unsigned int mmCRTC0_CRTC_FORCE_COUNT_NOW_CNTL__SI__VI = 0x1B98; +constexpr unsigned int mmCRTC0_CRTC_H_BLANK_START_END__SI__VI = 0x1B81; +constexpr unsigned int mmCRTC0_CRTC_H_SYNC_A_CNTL__SI__VI = 0x1B83; +constexpr unsigned int mmCRTC0_CRTC_H_SYNC_A__SI__VI = 0x1B82; +constexpr unsigned int mmCRTC0_CRTC_H_SYNC_B_CNTL__SI__VI = 0x1B85; +constexpr unsigned int mmCRTC0_CRTC_H_SYNC_B__SI__VI = 0x1B84; +constexpr unsigned int mmCRTC0_CRTC_H_TOTAL__SI__VI = 0x1B80; +constexpr unsigned int mmCRTC0_CRTC_INTERLACE_CONTROL__SI__VI = 0x1B9E; +constexpr unsigned int mmCRTC0_CRTC_INTERLACE_STATUS__SI__VI = 0x1B9F; +constexpr unsigned int mmCRTC0_CRTC_INTERRUPT_CONTROL__SI__VI = 0x1BB4; +constexpr unsigned int mmCRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI__VI = 0x1BAB; +constexpr unsigned int mmCRTC0_CRTC_MASTER_EN__SI__VI = 0x1BC2; +constexpr unsigned int mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI__VI = 0x1BC0; +constexpr unsigned int mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT__SI__VI = 0x1BBF; +constexpr unsigned int mmCRTC0_CRTC_MVP_STATUS__SI__VI = 0x1BC1; +constexpr unsigned int mmCRTC0_CRTC_NOM_VERT_POSITION__SI__VI = 0x1BA5; +constexpr unsigned int mmCRTC0_CRTC_OVERSCAN_COLOR__SI = 0x1BA0; +constexpr unsigned int mmCRTC0_CRTC_PIXEL_DATA_READBACK__SI = 0x1B9A; +constexpr unsigned int mmCRTC0_CRTC_SNAPSHOT_CONTROL__SI__VI = 0x1BB0; +constexpr unsigned int mmCRTC0_CRTC_SNAPSHOT_FRAME__SI__VI = 0x1BB2; +constexpr unsigned int mmCRTC0_CRTC_SNAPSHOT_POSITION__SI__VI = 0x1BB1; +constexpr unsigned int mmCRTC0_CRTC_SNAPSHOT_STATUS__SI__VI = 0x1BAF; +constexpr unsigned int mmCRTC0_CRTC_START_LINE_CONTROL__SI__VI = 0x1BB3; +constexpr unsigned int mmCRTC0_CRTC_STATUS = 0x1BA3; +constexpr unsigned int mmCRTC0_CRTC_STATUS_FRAME_COUNT__SI__VI = 0x1BA6; +constexpr unsigned int mmCRTC0_CRTC_STATUS_HV_COUNT__SI__VI = 0x1BA8; +constexpr unsigned int mmCRTC0_CRTC_STATUS_POSITION = 0x1BA4; +constexpr unsigned int mmCRTC0_CRTC_STATUS_VF_COUNT__SI__VI = 0x1BA7; +constexpr unsigned int mmCRTC0_CRTC_STEREO_CONTROL__SI__VI = 0x1BAE; +constexpr unsigned int mmCRTC0_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x1B9B; +constexpr unsigned int mmCRTC0_CRTC_STEREO_STATUS__SI__VI = 0x1BAD; +constexpr unsigned int mmCRTC0_CRTC_TEST_DEBUG_DATA__SI__VI = 0x1BC7; +constexpr unsigned int mmCRTC0_CRTC_TEST_DEBUG_INDEX__SI__VI = 0x1BC6; +constexpr unsigned int mmCRTC0_CRTC_TEST_PATTERN_COLOR__SI__VI = 0x1BBC; +constexpr unsigned int mmCRTC0_CRTC_TEST_PATTERN_CONTROL__SI__VI = 0x1BBA; +constexpr unsigned int mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS__SI__VI = 0x1BBB; +constexpr unsigned int mmCRTC0_CRTC_TRIGA_CNTL__SI__VI = 0x1B94; +constexpr unsigned int mmCRTC0_CRTC_TRIGA_MANUAL_TRIG__SI__VI = 0x1B95; +constexpr unsigned int mmCRTC0_CRTC_TRIGB_CNTL__SI__VI = 0x1B96; +constexpr unsigned int mmCRTC0_CRTC_TRIGB_MANUAL_TRIG__SI__VI = 0x1B97; +constexpr unsigned int mmCRTC0_CRTC_UPDATE_LOCK__SI__VI = 0x1BB5; +constexpr unsigned int mmCRTC0_CRTC_VBI_END__SI__VI = 0x1B86; +constexpr unsigned int mmCRTC0_CRTC_VERT_SYNC_CONTROL__SI__VI = 0x1BAC; +constexpr unsigned int mmCRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI__VI = 0x1BB7; +constexpr unsigned int mmCRTC0_CRTC_VSYNC_NOM_INT_STATUS__SI__VI = 0x1B8C; +constexpr unsigned int mmCRTC0_CRTC_V_BLANK_START_END__SI__VI = 0x1B8D; +constexpr unsigned int mmCRTC0_CRTC_V_SYNC_A_CNTL__SI__VI = 0x1B8F; +constexpr unsigned int mmCRTC0_CRTC_V_SYNC_A__SI__VI = 0x1B8E; +constexpr unsigned int mmCRTC0_CRTC_V_SYNC_B_CNTL__SI__VI = 0x1B91; +constexpr unsigned int mmCRTC0_CRTC_V_SYNC_B__SI__VI = 0x1B90; +constexpr unsigned int mmCRTC0_CRTC_V_TOTAL_CONTROL__SI__VI = 0x1B8A; +constexpr unsigned int mmCRTC0_CRTC_V_TOTAL_INT_STATUS__SI__VI = 0x1B8B; +constexpr unsigned int mmCRTC0_CRTC_V_TOTAL_MAX__SI__VI = 0x1B89; +constexpr unsigned int mmCRTC0_CRTC_V_TOTAL_MIN__SI__VI = 0x1B88; +constexpr unsigned int mmCRTC0_CRTC_V_TOTAL__SI__VI = 0x1B87; +constexpr unsigned int mmCRTC0_CRTC_V_UPDATE_INT_STATUS__SI__VI = 0x1BC4; +constexpr unsigned int mmCRTC0_MASTER_UPDATE_LOCK__SI__VI = 0x1BBD; +constexpr unsigned int mmCRTC0_MASTER_UPDATE_MODE = 0x1BBE; +constexpr unsigned int mmCRTC0_PIXEL_RATE_CNTL__SI = 0x0120; +constexpr unsigned int mmCRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__SI = 0x1EC3; +constexpr unsigned int mmCRTC1_CRTC_BLACK_COLOR__SI = 0x1EA2; +constexpr unsigned int mmCRTC1_CRTC_BLANK_DATA_COLOR__SI = 0x1EA1; +constexpr unsigned int mmCRTC1_CRTC_CONTROL__SI = 0x1E9C; +constexpr unsigned int mmCRTC1_CRTC_COUNT_CONTROL__SI = 0x1EA9; +constexpr unsigned int mmCRTC1_CRTC_COUNT_RESET__SI = 0x1EAA; +constexpr unsigned int mmCRTC1_CRTC_DOUBLE_BUFFER_CONTROL__SI = 0x1EB6; +constexpr unsigned int mmCRTC1_CRTC_DTMTEST_CNTL__SI = 0x1E92; +constexpr unsigned int mmCRTC1_CRTC_DTMTEST_STATUS_POSITION__SI = 0x1E93; +constexpr unsigned int mmCRTC1_CRTC_FLOW_CONTROL__SI = 0x1E99; +constexpr unsigned int mmCRTC1_CRTC_FORCE_COUNT_NOW_CNTL__SI = 0x1E98; +constexpr unsigned int mmCRTC1_CRTC_H_BLANK_START_END__SI = 0x1E81; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_A_CNTL__SI = 0x1E83; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_A__SI = 0x1E82; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_B_CNTL__SI = 0x1E85; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_B__SI = 0x1E84; +constexpr unsigned int mmCRTC1_CRTC_H_TOTAL__SI = 0x1E80; +constexpr unsigned int mmCRTC1_CRTC_INTERLACE_CONTROL__SI = 0x1E9E; +constexpr unsigned int mmCRTC1_CRTC_INTERLACE_STATUS__SI = 0x1E9F; +constexpr unsigned int mmCRTC1_CRTC_INTERRUPT_CONTROL__SI = 0x1EB4; +constexpr unsigned int mmCRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI = 0x1EAB; +constexpr unsigned int mmCRTC1_CRTC_MASTER_EN__SI = 0x1EC2; +constexpr unsigned int mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI = 0x1EC0; +constexpr unsigned int mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT__SI = 0x1EBF; +constexpr unsigned int mmCRTC1_CRTC_MVP_STATUS__SI = 0x1EC1; +constexpr unsigned int mmCRTC1_CRTC_NOM_VERT_POSITION__SI = 0x1EA5; +constexpr unsigned int mmCRTC1_CRTC_OVERSCAN_COLOR__SI = 0x1EA0; +constexpr unsigned int mmCRTC1_CRTC_PIXEL_DATA_READBACK__SI = 0x1E9A; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_CONTROL__SI = 0x1EB0; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_FRAME__SI = 0x1EB2; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_POSITION__SI = 0x1EB1; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_STATUS__SI = 0x1EAF; +constexpr unsigned int mmCRTC1_CRTC_START_LINE_CONTROL__SI = 0x1EB3; +constexpr unsigned int mmCRTC1_CRTC_STATUS_FRAME_COUNT__SI = 0x1EA6; +constexpr unsigned int mmCRTC1_CRTC_STATUS_HV_COUNT__SI = 0x1EA8; +constexpr unsigned int mmCRTC1_CRTC_STATUS_VF_COUNT__SI = 0x1EA7; +constexpr unsigned int mmCRTC1_CRTC_STEREO_CONTROL__SI = 0x1EAE; +constexpr unsigned int mmCRTC1_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x1E9B; +constexpr unsigned int mmCRTC1_CRTC_STEREO_STATUS__SI = 0x1EAD; +constexpr unsigned int mmCRTC1_CRTC_TEST_DEBUG_DATA__SI = 0x1EC7; +constexpr unsigned int mmCRTC1_CRTC_TEST_DEBUG_INDEX__SI = 0x1EC6; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_COLOR__SI = 0x1EBC; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_CONTROL__SI = 0x1EBA; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_PARAMETERS__SI = 0x1EBB; +constexpr unsigned int mmCRTC1_CRTC_TRIGA_CNTL__SI = 0x1E94; +constexpr unsigned int mmCRTC1_CRTC_TRIGA_MANUAL_TRIG__SI = 0x1E95; +constexpr unsigned int mmCRTC1_CRTC_TRIGB_CNTL__SI = 0x1E96; +constexpr unsigned int mmCRTC1_CRTC_TRIGB_MANUAL_TRIG__SI = 0x1E97; +constexpr unsigned int mmCRTC1_CRTC_UPDATE_LOCK__SI = 0x1EB5; +constexpr unsigned int mmCRTC1_CRTC_VBI_END__SI = 0x1E86; +constexpr unsigned int mmCRTC1_CRTC_VERT_SYNC_CONTROL__SI = 0x1EAC; +constexpr unsigned int mmCRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI = 0x1EB7; +constexpr unsigned int mmCRTC1_CRTC_VSYNC_NOM_INT_STATUS__SI = 0x1E8C; +constexpr unsigned int mmCRTC1_CRTC_V_BLANK_START_END__SI = 0x1E8D; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_A_CNTL__SI = 0x1E8F; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_A__SI = 0x1E8E; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_B_CNTL__SI = 0x1E91; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_B__SI = 0x1E90; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_CONTROL__SI = 0x1E8A; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_INT_STATUS__SI = 0x1E8B; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_MAX__SI = 0x1E89; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_MIN__SI = 0x1E88; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL__SI = 0x1E87; +constexpr unsigned int mmCRTC1_CRTC_V_UPDATE_INT_STATUS__SI = 0x1EC4; +constexpr unsigned int mmCRTC1_MASTER_UPDATE_LOCK__SI = 0x1EBD; +constexpr unsigned int mmCRTC1_PIXEL_RATE_CNTL__SI = 0x0121; +constexpr unsigned int mmCRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__SI = 0x41C3; +constexpr unsigned int mmCRTC2_CRTC_BLACK_COLOR__SI = 0x41A2; +constexpr unsigned int mmCRTC2_CRTC_BLANK_DATA_COLOR__SI = 0x41A1; +constexpr unsigned int mmCRTC2_CRTC_CONTROL__SI = 0x419C; +constexpr unsigned int mmCRTC2_CRTC_COUNT_CONTROL__SI = 0x41A9; +constexpr unsigned int mmCRTC2_CRTC_COUNT_RESET__SI = 0x41AA; +constexpr unsigned int mmCRTC2_CRTC_DOUBLE_BUFFER_CONTROL__SI = 0x41B6; +constexpr unsigned int mmCRTC2_CRTC_DTMTEST_CNTL__SI = 0x4192; +constexpr unsigned int mmCRTC2_CRTC_DTMTEST_STATUS_POSITION__SI = 0x4193; +constexpr unsigned int mmCRTC2_CRTC_FLOW_CONTROL__SI = 0x4199; +constexpr unsigned int mmCRTC2_CRTC_FORCE_COUNT_NOW_CNTL__SI = 0x4198; +constexpr unsigned int mmCRTC2_CRTC_H_BLANK_START_END__SI = 0x4181; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_A_CNTL__SI = 0x4183; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_A__SI = 0x4182; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_B_CNTL__SI = 0x4185; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_B__SI = 0x4184; +constexpr unsigned int mmCRTC2_CRTC_H_TOTAL__SI = 0x4180; +constexpr unsigned int mmCRTC2_CRTC_INTERLACE_CONTROL__SI = 0x419E; +constexpr unsigned int mmCRTC2_CRTC_INTERLACE_STATUS__SI = 0x419F; +constexpr unsigned int mmCRTC2_CRTC_INTERRUPT_CONTROL__SI = 0x41B4; +constexpr unsigned int mmCRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI = 0x41AB; +constexpr unsigned int mmCRTC2_CRTC_MASTER_EN__SI = 0x41C2; +constexpr unsigned int mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI = 0x41C0; +constexpr unsigned int mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT__SI = 0x41BF; +constexpr unsigned int mmCRTC2_CRTC_MVP_STATUS__SI = 0x41C1; +constexpr unsigned int mmCRTC2_CRTC_NOM_VERT_POSITION__SI = 0x41A5; +constexpr unsigned int mmCRTC2_CRTC_OVERSCAN_COLOR__SI = 0x41A0; +constexpr unsigned int mmCRTC2_CRTC_PIXEL_DATA_READBACK__SI = 0x419A; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_CONTROL__SI = 0x41B0; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_FRAME__SI = 0x41B2; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_POSITION__SI = 0x41B1; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_STATUS__SI = 0x41AF; +constexpr unsigned int mmCRTC2_CRTC_START_LINE_CONTROL__SI = 0x41B3; +constexpr unsigned int mmCRTC2_CRTC_STATUS_FRAME_COUNT__SI = 0x41A6; +constexpr unsigned int mmCRTC2_CRTC_STATUS_HV_COUNT__SI = 0x41A8; +constexpr unsigned int mmCRTC2_CRTC_STATUS_VF_COUNT__SI = 0x41A7; +constexpr unsigned int mmCRTC2_CRTC_STEREO_CONTROL__SI = 0x41AE; +constexpr unsigned int mmCRTC2_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x419B; +constexpr unsigned int mmCRTC2_CRTC_STEREO_STATUS__SI = 0x41AD; +constexpr unsigned int mmCRTC2_CRTC_TEST_DEBUG_DATA__SI = 0x41C7; +constexpr unsigned int mmCRTC2_CRTC_TEST_DEBUG_INDEX__SI = 0x41C6; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_COLOR__SI = 0x41BC; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_CONTROL__SI = 0x41BA; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_PARAMETERS__SI = 0x41BB; +constexpr unsigned int mmCRTC2_CRTC_TRIGA_CNTL__SI = 0x4194; +constexpr unsigned int mmCRTC2_CRTC_TRIGA_MANUAL_TRIG__SI = 0x4195; +constexpr unsigned int mmCRTC2_CRTC_TRIGB_CNTL__SI = 0x4196; +constexpr unsigned int mmCRTC2_CRTC_TRIGB_MANUAL_TRIG__SI = 0x4197; +constexpr unsigned int mmCRTC2_CRTC_UPDATE_LOCK__SI = 0x41B5; +constexpr unsigned int mmCRTC2_CRTC_VBI_END__SI = 0x4186; +constexpr unsigned int mmCRTC2_CRTC_VERT_SYNC_CONTROL__SI = 0x41AC; +constexpr unsigned int mmCRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI = 0x41B7; +constexpr unsigned int mmCRTC2_CRTC_VSYNC_NOM_INT_STATUS__SI = 0x418C; +constexpr unsigned int mmCRTC2_CRTC_V_BLANK_START_END__SI = 0x418D; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_A_CNTL__SI = 0x418F; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_A__SI = 0x418E; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_B_CNTL__SI = 0x4191; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_B__SI = 0x4190; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_CONTROL__SI = 0x418A; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_INT_STATUS__SI = 0x418B; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_MAX__SI = 0x4189; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_MIN__SI = 0x4188; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL__SI = 0x4187; +constexpr unsigned int mmCRTC2_CRTC_V_UPDATE_INT_STATUS__SI = 0x41C4; +constexpr unsigned int mmCRTC2_MASTER_UPDATE_LOCK__SI = 0x41BD; +constexpr unsigned int mmCRTC2_PIXEL_RATE_CNTL__SI = 0x0122; +constexpr unsigned int mmCRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__SI = 0x44C3; +constexpr unsigned int mmCRTC3_CRTC_BLACK_COLOR__SI = 0x44A2; +constexpr unsigned int mmCRTC3_CRTC_BLANK_DATA_COLOR__SI = 0x44A1; +constexpr unsigned int mmCRTC3_CRTC_CONTROL__SI = 0x449C; +constexpr unsigned int mmCRTC3_CRTC_COUNT_CONTROL__SI = 0x44A9; +constexpr unsigned int mmCRTC3_CRTC_COUNT_RESET__SI = 0x44AA; +constexpr unsigned int mmCRTC3_CRTC_DOUBLE_BUFFER_CONTROL__SI = 0x44B6; +constexpr unsigned int mmCRTC3_CRTC_DTMTEST_CNTL__SI = 0x4492; +constexpr unsigned int mmCRTC3_CRTC_DTMTEST_STATUS_POSITION__SI = 0x4493; +constexpr unsigned int mmCRTC3_CRTC_FLOW_CONTROL__SI = 0x4499; +constexpr unsigned int mmCRTC3_CRTC_FORCE_COUNT_NOW_CNTL__SI = 0x4498; +constexpr unsigned int mmCRTC3_CRTC_H_BLANK_START_END__SI = 0x4481; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_A_CNTL__SI = 0x4483; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_A__SI = 0x4482; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_B_CNTL__SI = 0x4485; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_B__SI = 0x4484; +constexpr unsigned int mmCRTC3_CRTC_H_TOTAL__SI = 0x4480; +constexpr unsigned int mmCRTC3_CRTC_INTERLACE_CONTROL__SI = 0x449E; +constexpr unsigned int mmCRTC3_CRTC_INTERLACE_STATUS__SI = 0x449F; +constexpr unsigned int mmCRTC3_CRTC_INTERRUPT_CONTROL__SI = 0x44B4; +constexpr unsigned int mmCRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI = 0x44AB; +constexpr unsigned int mmCRTC3_CRTC_MASTER_EN__SI = 0x44C2; +constexpr unsigned int mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI = 0x44C0; +constexpr unsigned int mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT__SI = 0x44BF; +constexpr unsigned int mmCRTC3_CRTC_MVP_STATUS__SI = 0x44C1; +constexpr unsigned int mmCRTC3_CRTC_NOM_VERT_POSITION__SI = 0x44A5; +constexpr unsigned int mmCRTC3_CRTC_OVERSCAN_COLOR__SI = 0x44A0; +constexpr unsigned int mmCRTC3_CRTC_PIXEL_DATA_READBACK__SI = 0x449A; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_CONTROL__SI = 0x44B0; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_FRAME__SI = 0x44B2; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_POSITION__SI = 0x44B1; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_STATUS__SI = 0x44AF; +constexpr unsigned int mmCRTC3_CRTC_START_LINE_CONTROL__SI = 0x44B3; +constexpr unsigned int mmCRTC3_CRTC_STATUS_FRAME_COUNT__SI = 0x44A6; +constexpr unsigned int mmCRTC3_CRTC_STATUS_HV_COUNT__SI = 0x44A8; +constexpr unsigned int mmCRTC3_CRTC_STATUS_VF_COUNT__SI = 0x44A7; +constexpr unsigned int mmCRTC3_CRTC_STEREO_CONTROL__SI = 0x44AE; +constexpr unsigned int mmCRTC3_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x449B; +constexpr unsigned int mmCRTC3_CRTC_STEREO_STATUS__SI = 0x44AD; +constexpr unsigned int mmCRTC3_CRTC_TEST_DEBUG_DATA__SI = 0x44C7; +constexpr unsigned int mmCRTC3_CRTC_TEST_DEBUG_INDEX__SI = 0x44C6; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_COLOR__SI = 0x44BC; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_CONTROL__SI = 0x44BA; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_PARAMETERS__SI = 0x44BB; +constexpr unsigned int mmCRTC3_CRTC_TRIGA_CNTL__SI = 0x4494; +constexpr unsigned int mmCRTC3_CRTC_TRIGA_MANUAL_TRIG__SI = 0x4495; +constexpr unsigned int mmCRTC3_CRTC_TRIGB_CNTL__SI = 0x4496; +constexpr unsigned int mmCRTC3_CRTC_TRIGB_MANUAL_TRIG__SI = 0x4497; +constexpr unsigned int mmCRTC3_CRTC_UPDATE_LOCK__SI = 0x44B5; +constexpr unsigned int mmCRTC3_CRTC_VBI_END__SI = 0x4486; +constexpr unsigned int mmCRTC3_CRTC_VERT_SYNC_CONTROL__SI = 0x44AC; +constexpr unsigned int mmCRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI = 0x44B7; +constexpr unsigned int mmCRTC3_CRTC_VSYNC_NOM_INT_STATUS__SI = 0x448C; +constexpr unsigned int mmCRTC3_CRTC_V_BLANK_START_END__SI = 0x448D; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_A_CNTL__SI = 0x448F; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_A__SI = 0x448E; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_B_CNTL__SI = 0x4491; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_B__SI = 0x4490; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_CONTROL__SI = 0x448A; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_INT_STATUS__SI = 0x448B; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_MAX__SI = 0x4489; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_MIN__SI = 0x4488; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL__SI = 0x4487; +constexpr unsigned int mmCRTC3_CRTC_V_UPDATE_INT_STATUS__SI = 0x44C4; +constexpr unsigned int mmCRTC3_MASTER_UPDATE_LOCK__SI = 0x44BD; +constexpr unsigned int mmCRTC3_PIXEL_RATE_CNTL__SI = 0x0123; +constexpr unsigned int mmCRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__SI = 0x47C3; +constexpr unsigned int mmCRTC4_CRTC_BLACK_COLOR__SI = 0x47A2; +constexpr unsigned int mmCRTC4_CRTC_BLANK_DATA_COLOR__SI = 0x47A1; +constexpr unsigned int mmCRTC4_CRTC_CONTROL__SI = 0x479C; +constexpr unsigned int mmCRTC4_CRTC_COUNT_CONTROL__SI = 0x47A9; +constexpr unsigned int mmCRTC4_CRTC_COUNT_RESET__SI = 0x47AA; +constexpr unsigned int mmCRTC4_CRTC_DOUBLE_BUFFER_CONTROL__SI = 0x47B6; +constexpr unsigned int mmCRTC4_CRTC_DTMTEST_CNTL__SI = 0x4792; +constexpr unsigned int mmCRTC4_CRTC_DTMTEST_STATUS_POSITION__SI = 0x4793; +constexpr unsigned int mmCRTC4_CRTC_FLOW_CONTROL__SI = 0x4799; +constexpr unsigned int mmCRTC4_CRTC_FORCE_COUNT_NOW_CNTL__SI = 0x4798; +constexpr unsigned int mmCRTC4_CRTC_H_BLANK_START_END__SI = 0x4781; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_A_CNTL__SI = 0x4783; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_A__SI = 0x4782; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_B_CNTL__SI = 0x4785; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_B__SI = 0x4784; +constexpr unsigned int mmCRTC4_CRTC_H_TOTAL__SI = 0x4780; +constexpr unsigned int mmCRTC4_CRTC_INTERLACE_CONTROL__SI = 0x479E; +constexpr unsigned int mmCRTC4_CRTC_INTERLACE_STATUS__SI = 0x479F; +constexpr unsigned int mmCRTC4_CRTC_INTERRUPT_CONTROL__SI = 0x47B4; +constexpr unsigned int mmCRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI = 0x47AB; +constexpr unsigned int mmCRTC4_CRTC_MASTER_EN__SI = 0x47C2; +constexpr unsigned int mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI = 0x47C0; +constexpr unsigned int mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT__SI = 0x47BF; +constexpr unsigned int mmCRTC4_CRTC_MVP_STATUS__SI = 0x47C1; +constexpr unsigned int mmCRTC4_CRTC_NOM_VERT_POSITION__SI = 0x47A5; +constexpr unsigned int mmCRTC4_CRTC_OVERSCAN_COLOR__SI = 0x47A0; +constexpr unsigned int mmCRTC4_CRTC_PIXEL_DATA_READBACK__SI = 0x479A; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_CONTROL__SI = 0x47B0; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_FRAME__SI = 0x47B2; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_POSITION__SI = 0x47B1; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_STATUS__SI = 0x47AF; +constexpr unsigned int mmCRTC4_CRTC_START_LINE_CONTROL__SI = 0x47B3; +constexpr unsigned int mmCRTC4_CRTC_STATUS_FRAME_COUNT__SI = 0x47A6; +constexpr unsigned int mmCRTC4_CRTC_STATUS_HV_COUNT__SI = 0x47A8; +constexpr unsigned int mmCRTC4_CRTC_STATUS_VF_COUNT__SI = 0x47A7; +constexpr unsigned int mmCRTC4_CRTC_STEREO_CONTROL__SI = 0x47AE; +constexpr unsigned int mmCRTC4_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x479B; +constexpr unsigned int mmCRTC4_CRTC_STEREO_STATUS__SI = 0x47AD; +constexpr unsigned int mmCRTC4_CRTC_TEST_DEBUG_DATA__SI = 0x47C7; +constexpr unsigned int mmCRTC4_CRTC_TEST_DEBUG_INDEX__SI = 0x47C6; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_COLOR__SI = 0x47BC; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_CONTROL__SI = 0x47BA; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_PARAMETERS__SI = 0x47BB; +constexpr unsigned int mmCRTC4_CRTC_TRIGA_CNTL__SI = 0x4794; +constexpr unsigned int mmCRTC4_CRTC_TRIGA_MANUAL_TRIG__SI = 0x4795; +constexpr unsigned int mmCRTC4_CRTC_TRIGB_CNTL__SI = 0x4796; +constexpr unsigned int mmCRTC4_CRTC_TRIGB_MANUAL_TRIG__SI = 0x4797; +constexpr unsigned int mmCRTC4_CRTC_UPDATE_LOCK__SI = 0x47B5; +constexpr unsigned int mmCRTC4_CRTC_VBI_END__SI = 0x4786; +constexpr unsigned int mmCRTC4_CRTC_VERT_SYNC_CONTROL__SI = 0x47AC; +constexpr unsigned int mmCRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI = 0x47B7; +constexpr unsigned int mmCRTC4_CRTC_VSYNC_NOM_INT_STATUS__SI = 0x478C; +constexpr unsigned int mmCRTC4_CRTC_V_BLANK_START_END__SI = 0x478D; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_A_CNTL__SI = 0x478F; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_A__SI = 0x478E; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_B_CNTL__SI = 0x4791; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_B__SI = 0x4790; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_CONTROL__SI = 0x478A; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_INT_STATUS__SI = 0x478B; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_MAX__SI = 0x4789; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_MIN__SI = 0x4788; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL__SI = 0x4787; +constexpr unsigned int mmCRTC4_CRTC_V_UPDATE_INT_STATUS__SI = 0x47C4; +constexpr unsigned int mmCRTC4_MASTER_UPDATE_LOCK__SI = 0x47BD; +constexpr unsigned int mmCRTC4_PIXEL_RATE_CNTL__SI = 0x0124; +constexpr unsigned int mmCRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__SI = 0x4AC3; +constexpr unsigned int mmCRTC5_CRTC_BLACK_COLOR__SI = 0x4AA2; +constexpr unsigned int mmCRTC5_CRTC_BLANK_DATA_COLOR__SI = 0x4AA1; +constexpr unsigned int mmCRTC5_CRTC_CONTROL__SI = 0x4A9C; +constexpr unsigned int mmCRTC5_CRTC_COUNT_CONTROL__SI = 0x4AA9; +constexpr unsigned int mmCRTC5_CRTC_COUNT_RESET__SI = 0x4AAA; +constexpr unsigned int mmCRTC5_CRTC_DOUBLE_BUFFER_CONTROL__SI = 0x4AB6; +constexpr unsigned int mmCRTC5_CRTC_DTMTEST_CNTL__SI = 0x4A92; +constexpr unsigned int mmCRTC5_CRTC_DTMTEST_STATUS_POSITION__SI = 0x4A93; +constexpr unsigned int mmCRTC5_CRTC_FLOW_CONTROL__SI = 0x4A99; +constexpr unsigned int mmCRTC5_CRTC_FORCE_COUNT_NOW_CNTL__SI = 0x4A98; +constexpr unsigned int mmCRTC5_CRTC_H_BLANK_START_END__SI = 0x4A81; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_A_CNTL__SI = 0x4A83; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_A__SI = 0x4A82; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_B_CNTL__SI = 0x4A85; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_B__SI = 0x4A84; +constexpr unsigned int mmCRTC5_CRTC_H_TOTAL__SI = 0x4A80; +constexpr unsigned int mmCRTC5_CRTC_INTERLACE_CONTROL__SI = 0x4A9E; +constexpr unsigned int mmCRTC5_CRTC_INTERLACE_STATUS__SI = 0x4A9F; +constexpr unsigned int mmCRTC5_CRTC_INTERRUPT_CONTROL__SI = 0x4AB4; +constexpr unsigned int mmCRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI = 0x4AAB; +constexpr unsigned int mmCRTC5_CRTC_MASTER_EN__SI = 0x4AC2; +constexpr unsigned int mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI = 0x4AC0; +constexpr unsigned int mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT__SI = 0x4ABF; +constexpr unsigned int mmCRTC5_CRTC_MVP_STATUS__SI = 0x4AC1; +constexpr unsigned int mmCRTC5_CRTC_NOM_VERT_POSITION__SI = 0x4AA5; +constexpr unsigned int mmCRTC5_CRTC_OVERSCAN_COLOR__SI = 0x4AA0; +constexpr unsigned int mmCRTC5_CRTC_PIXEL_DATA_READBACK__SI = 0x4A9A; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_CONTROL__SI = 0x4AB0; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_FRAME__SI = 0x4AB2; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_POSITION__SI = 0x4AB1; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_STATUS__SI = 0x4AAF; +constexpr unsigned int mmCRTC5_CRTC_START_LINE_CONTROL__SI = 0x4AB3; +constexpr unsigned int mmCRTC5_CRTC_STATUS_FRAME_COUNT__SI = 0x4AA6; +constexpr unsigned int mmCRTC5_CRTC_STATUS_HV_COUNT__SI = 0x4AA8; +constexpr unsigned int mmCRTC5_CRTC_STATUS_VF_COUNT__SI = 0x4AA7; +constexpr unsigned int mmCRTC5_CRTC_STEREO_CONTROL__SI = 0x4AAE; +constexpr unsigned int mmCRTC5_CRTC_STEREO_FORCE_NEXT_EYE__SI = 0x4A9B; +constexpr unsigned int mmCRTC5_CRTC_STEREO_STATUS__SI = 0x4AAD; +constexpr unsigned int mmCRTC5_CRTC_TEST_DEBUG_DATA__SI = 0x4AC7; +constexpr unsigned int mmCRTC5_CRTC_TEST_DEBUG_INDEX__SI = 0x4AC6; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_COLOR__SI = 0x4ABC; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_CONTROL__SI = 0x4ABA; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_PARAMETERS__SI = 0x4ABB; +constexpr unsigned int mmCRTC5_CRTC_TRIGA_CNTL__SI = 0x4A94; +constexpr unsigned int mmCRTC5_CRTC_TRIGA_MANUAL_TRIG__SI = 0x4A95; +constexpr unsigned int mmCRTC5_CRTC_TRIGB_CNTL__SI = 0x4A96; +constexpr unsigned int mmCRTC5_CRTC_TRIGB_MANUAL_TRIG__SI = 0x4A97; +constexpr unsigned int mmCRTC5_CRTC_UPDATE_LOCK__SI = 0x4AB5; +constexpr unsigned int mmCRTC5_CRTC_VBI_END__SI = 0x4A86; +constexpr unsigned int mmCRTC5_CRTC_VERT_SYNC_CONTROL__SI = 0x4AAC; +constexpr unsigned int mmCRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE__SI = 0x4AB7; +constexpr unsigned int mmCRTC5_CRTC_VSYNC_NOM_INT_STATUS__SI = 0x4A8C; +constexpr unsigned int mmCRTC5_CRTC_V_BLANK_START_END__SI = 0x4A8D; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_A_CNTL__SI = 0x4A8F; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_A__SI = 0x4A8E; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_B_CNTL__SI = 0x4A91; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_B__SI = 0x4A90; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_CONTROL__SI = 0x4A8A; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_INT_STATUS__SI = 0x4A8B; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_MAX__SI = 0x4A89; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_MIN__SI = 0x4A88; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL__SI = 0x4A87; +constexpr unsigned int mmCRTC5_CRTC_V_UPDATE_INT_STATUS__SI = 0x4AC4; +constexpr unsigned int mmCRTC5_MASTER_UPDATE_LOCK__SI = 0x4ABD; +constexpr unsigned int mmCRTC5_PIXEL_RATE_CNTL__SI = 0x0125; +constexpr unsigned int mmCRTC8_DATA__SI__VI = 0x00ED; +constexpr unsigned int mmCRTC8_IDX__SI__VI = 0x00ED; +constexpr unsigned int mmCRTC_ALLOW_STOP_OFF_V_CNT__SI__VI = 0x1BC3; +constexpr unsigned int mmCRTC_BLACK_COLOR__SI = 0x1BA2; +constexpr unsigned int mmCRTC_BLANK_CONTROL = 0x1B9D; +constexpr unsigned int mmCRTC_BLANK_DATA_COLOR__SI = 0x1BA1; +constexpr unsigned int mmCRTC_CONTROL__SI__VI = 0x1B9C; +constexpr unsigned int mmCRTC_COUNT_CONTROL__SI__VI = 0x1BA9; +constexpr unsigned int mmCRTC_COUNT_RESET__SI__VI = 0x1BAA; +constexpr unsigned int mmCRTC_DOUBLE_BUFFER_CONTROL__SI__VI = 0x1BB6; +constexpr unsigned int mmCRTC_DTMTEST_CNTL__SI__VI = 0x1B92; +constexpr unsigned int mmCRTC_DTMTEST_STATUS_POSITION__SI__VI = 0x1B93; +constexpr unsigned int mmCRTC_FLOW_CONTROL__SI__VI = 0x1B99; +constexpr unsigned int mmCRTC_FORCE_COUNT_NOW_CNTL__SI__VI = 0x1B98; +constexpr unsigned int mmCRTC_H_BLANK_START_END__SI__VI = 0x1B81; +constexpr unsigned int mmCRTC_H_SYNC_A_CNTL__SI__VI = 0x1B83; +constexpr unsigned int mmCRTC_H_SYNC_A__SI__VI = 0x1B82; +constexpr unsigned int mmCRTC_H_SYNC_B_CNTL__SI__VI = 0x1B85; +constexpr unsigned int mmCRTC_H_SYNC_B__SI__VI = 0x1B84; +constexpr unsigned int mmCRTC_H_TOTAL__SI__VI = 0x1B80; +constexpr unsigned int mmCRTC_INTERLACE_CONTROL__SI__VI = 0x1B9E; +constexpr unsigned int mmCRTC_INTERLACE_STATUS__SI__VI = 0x1B9F; +constexpr unsigned int mmCRTC_INTERRUPT_CONTROL__SI__VI = 0x1BB4; +constexpr unsigned int mmCRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__SI__VI = 0x1BAB; +constexpr unsigned int mmCRTC_MASTER_EN__SI__VI = 0x1BC2; +constexpr unsigned int mmCRTC_MVP_INBAND_CNTL_INSERT_TIMER__SI__VI = 0x1BC0; +constexpr unsigned int mmCRTC_MVP_INBAND_CNTL_INSERT__SI__VI = 0x1BBF; +constexpr unsigned int mmCRTC_MVP_STATUS__SI__VI = 0x1BC1; +constexpr unsigned int mmCRTC_NOM_VERT_POSITION__SI__VI = 0x1BA5; +constexpr unsigned int mmCRTC_OVERSCAN_COLOR__SI = 0x1BA0; +constexpr unsigned int mmCRTC_PIXEL_DATA_READBACK__SI = 0x1B9A; +constexpr unsigned int mmCRTC_SNAPSHOT_CONTROL__SI__VI = 0x1BB0; +constexpr unsigned int mmCRTC_SNAPSHOT_FRAME__SI__VI = 0x1BB2; +constexpr unsigned int mmCRTC_SNAPSHOT_POSITION__SI__VI = 0x1BB1; +constexpr unsigned int mmCRTC_SNAPSHOT_STATUS__SI__VI = 0x1BAF; +constexpr unsigned int mmCRTC_START_LINE_CONTROL__SI__VI = 0x1BB3; +constexpr unsigned int mmCRTC_STATUS = 0x1BA3; +constexpr unsigned int mmCRTC_STATUS_FRAME_COUNT__SI__VI = 0x1BA6; +constexpr unsigned int mmCRTC_STATUS_HV_COUNT__SI__VI = 0x1BA8; +constexpr unsigned int mmCRTC_STATUS_POSITION__SI__VI = 0x1BA4; +constexpr unsigned int mmCRTC_STATUS_VF_COUNT__SI__VI = 0x1BA7; +constexpr unsigned int mmCRTC_STEREO_CONTROL__SI__VI = 0x1BAE; +constexpr unsigned int mmCRTC_STEREO_FORCE_NEXT_EYE__SI = 0x1B9B; +constexpr unsigned int mmCRTC_STEREO_STATUS__SI__VI = 0x1BAD; +constexpr unsigned int mmCRTC_TEST_DEBUG_DATA__SI__VI = 0x1BC7; +constexpr unsigned int mmCRTC_TEST_DEBUG_INDEX__SI__VI = 0x1BC6; +constexpr unsigned int mmCRTC_TEST_PATTERN_COLOR__SI__VI = 0x1BBC; +constexpr unsigned int mmCRTC_TEST_PATTERN_CONTROL__SI__VI = 0x1BBA; +constexpr unsigned int mmCRTC_TEST_PATTERN_PARAMETERS__SI__VI = 0x1BBB; +constexpr unsigned int mmCRTC_TRIGA_CNTL__SI__VI = 0x1B94; +constexpr unsigned int mmCRTC_TRIGA_MANUAL_TRIG__SI__VI = 0x1B95; +constexpr unsigned int mmCRTC_TRIGB_CNTL__SI__VI = 0x1B96; +constexpr unsigned int mmCRTC_TRIGB_MANUAL_TRIG__SI__VI = 0x1B97; +constexpr unsigned int mmCRTC_UPDATE_LOCK__SI__VI = 0x1BB5; +constexpr unsigned int mmCRTC_VBI_END__SI__VI = 0x1B86; +constexpr unsigned int mmCRTC_VERT_SYNC_CONTROL__SI__VI = 0x1BAC; +constexpr unsigned int mmCRTC_VGA_PARAMETER_CAPTURE_MODE__SI__VI = 0x1BB7; +constexpr unsigned int mmCRTC_VSYNC_NOM_INT_STATUS__SI__VI = 0x1B8C; +constexpr unsigned int mmCRTC_V_BLANK_START_END__SI__VI = 0x1B8D; +constexpr unsigned int mmCRTC_V_SYNC_A_CNTL__SI__VI = 0x1B8F; +constexpr unsigned int mmCRTC_V_SYNC_A__SI__VI = 0x1B8E; +constexpr unsigned int mmCRTC_V_SYNC_B_CNTL__SI__VI = 0x1B91; +constexpr unsigned int mmCRTC_V_SYNC_B__SI__VI = 0x1B90; +constexpr unsigned int mmCRTC_V_TOTAL_CONTROL__SI__VI = 0x1B8A; +constexpr unsigned int mmCRTC_V_TOTAL_INT_STATUS__SI__VI = 0x1B8B; +constexpr unsigned int mmCRTC_V_TOTAL_MAX__SI__VI = 0x1B89; +constexpr unsigned int mmCRTC_V_TOTAL_MIN__SI__VI = 0x1B88; +constexpr unsigned int mmCRTC_V_TOTAL__SI__VI = 0x1B87; +constexpr unsigned int mmCRTC_V_UPDATE_INT_STATUS__SI__VI = 0x1BC4; +constexpr unsigned int mmCS_COPY_STATE = 0xA1F3; +constexpr unsigned int mmCUR_COLOR1__SI__VI = 0x1A6C; +constexpr unsigned int mmCUR_COLOR2__SI__VI = 0x1A6D; +constexpr unsigned int mmCUR_CONTROL__SI__VI = 0x1A66; +constexpr unsigned int mmCUR_HOT_SPOT__SI__VI = 0x1A6B; +constexpr unsigned int mmCUR_POSITION__SI__VI = 0x1A6A; +constexpr unsigned int mmCUR_SIZE__SI__VI = 0x1A68; +constexpr unsigned int mmCUR_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A69; +constexpr unsigned int mmCUR_SURFACE_ADDRESS__SI__VI = 0x1A67; +constexpr unsigned int mmCUR_UPDATE__SI__VI = 0x1A6E; +constexpr unsigned int mmD1VGA_CONTROL__SI__VI = 0x00CC; +constexpr unsigned int mmD2VGA_CONTROL__SI__VI = 0x00CE; +constexpr unsigned int mmD3VGA_CONTROL__SI__VI = 0x00F8; +constexpr unsigned int mmD4VGA_CONTROL__SI__VI = 0x00F9; +constexpr unsigned int mmD5VGA_CONTROL__SI__VI = 0x00FA; +constexpr unsigned int mmD6VGA_CONTROL__SI__VI = 0x00FB; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL2__SI = 0x19AF; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL3__SI = 0x19B0; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL__SI = 0x19AE; +constexpr unsigned int mmDAC_AUTODETECT_INT_CONTROL__SI = 0x19B2; +constexpr unsigned int mmDAC_AUTODETECT_STATUS__SI = 0x19B1; +constexpr unsigned int mmDAC_COMPARATOR_ENABLE__SI = 0x19B7; +constexpr unsigned int mmDAC_COMPARATOR_OUTPUT__SI = 0x19B8; +constexpr unsigned int mmDAC_CONTROL__SI = 0x19B6; +constexpr unsigned int mmDAC_CRC_CONTROL__SI = 0x19A7; +constexpr unsigned int mmDAC_CRC_EN__SI = 0x19A6; +constexpr unsigned int mmDAC_CRC_SIG_CONTROL_MASK__SI = 0x19A9; +constexpr unsigned int mmDAC_CRC_SIG_CONTROL__SI = 0x19AB; +constexpr unsigned int mmDAC_CRC_SIG_RGB_MASK__SI = 0x19A8; +constexpr unsigned int mmDAC_CRC_SIG_RGB__SI = 0x19AA; +constexpr unsigned int mmDAC_DATA__SI__VI = 0x00F2; +constexpr unsigned int mmDAC_DFT_CONFIG__SI = 0x19BA; +constexpr unsigned int mmDAC_ENABLE__SI = 0x19A4; +constexpr unsigned int mmDAC_FORCE_DATA__SI = 0x19B4; +constexpr unsigned int mmDAC_FORCE_OUTPUT_CNTL__SI = 0x19B3; +constexpr unsigned int mmDAC_MACRO_CNTL__SI = 0x1939; +constexpr unsigned int mmDAC_MASK__SI__VI = 0x00F1; +constexpr unsigned int mmDAC_POWERDOWN__SI = 0x19B5; +constexpr unsigned int mmDAC_PWR_CNTL__SI = 0x19B9; +constexpr unsigned int mmDAC_R_INDEX__SI__VI = 0x00F1; +constexpr unsigned int mmDAC_SOURCE_SELECT__SI = 0x19A5; +constexpr unsigned int mmDAC_STEREOSYNC_SELECT__SI = 0x19AD; +constexpr unsigned int mmDAC_SYNC_TRISTATE_CONTROL__SI = 0x19AC; +constexpr unsigned int mmDAC_W_INDEX__SI__VI = 0x00F2; +constexpr unsigned int mmDATA_FORMAT__SI = 0x1AC0; +constexpr unsigned int mmDBG_BYPASS_SRBM_ACCESS__CI = 0x14EB; +constexpr unsigned int mmDB_ALPHA_TO_MASK = 0xA2DC; +constexpr unsigned int mmDB_CGTT_CLK_CTRL_0__CI__VI = 0xF0A4; +constexpr unsigned int mmDB_CGTT_CLK_CTRL_0__SI = 0x261A; +constexpr unsigned int mmDB_COUNT_CONTROL = 0xA001; +constexpr unsigned int mmDB_CREDIT_LIMIT = 0x2614; +constexpr unsigned int mmDB_DEBUG = 0x260C; +constexpr unsigned int mmDB_DEBUG2 = 0x260D; +constexpr unsigned int mmDB_DEBUG3 = 0x260E; +constexpr unsigned int mmDB_DEBUG4 = 0x260F; +constexpr unsigned int mmDB_DEPTH_BOUNDS_MAX = 0xA009; +constexpr unsigned int mmDB_DEPTH_BOUNDS_MIN = 0xA008; +constexpr unsigned int mmDB_DEPTH_CLEAR = 0xA00B; +constexpr unsigned int mmDB_DEPTH_CONTROL = 0xA200; +constexpr unsigned int mmDB_DEPTH_INFO = 0xA00F; +constexpr unsigned int mmDB_DEPTH_SIZE = 0xA016; +constexpr unsigned int mmDB_DEPTH_SLICE = 0xA017; +constexpr unsigned int mmDB_DEPTH_VIEW = 0xA002; +constexpr unsigned int mmDB_EQAA = 0xA201; +constexpr unsigned int mmDB_FIFO_DEPTH1 = 0x2618; +constexpr unsigned int mmDB_FIFO_DEPTH2 = 0x2619; +constexpr unsigned int mmDB_FREE_CACHELINES = 0x2617; +constexpr unsigned int mmDB_HTILE_DATA_BASE = 0xA005; +constexpr unsigned int mmDB_HTILE_SURFACE = 0xA2AF; +constexpr unsigned int mmDB_OCCLUSION_COUNT0_HI__CI__VI = 0xC3C1; +constexpr unsigned int mmDB_OCCLUSION_COUNT0_LOW__CI__VI = 0xC3C0; +constexpr unsigned int mmDB_OCCLUSION_COUNT1_HI__CI__VI = 0xC3C3; +constexpr unsigned int mmDB_OCCLUSION_COUNT1_LOW__CI__VI = 0xC3C2; +constexpr unsigned int mmDB_OCCLUSION_COUNT2_HI__CI__VI = 0xC3C5; +constexpr unsigned int mmDB_OCCLUSION_COUNT2_LOW__CI__VI = 0xC3C4; +constexpr unsigned int mmDB_OCCLUSION_COUNT3_HI__CI__VI = 0xC3C7; +constexpr unsigned int mmDB_OCCLUSION_COUNT3_LOW__CI__VI = 0xC3C6; +constexpr unsigned int mmDB_PERFCOUNTER0_HI__CI__VI = 0xD441; +constexpr unsigned int mmDB_PERFCOUNTER0_HI__SI = 0x2602; +constexpr unsigned int mmDB_PERFCOUNTER0_LO__CI__VI = 0xD440; +constexpr unsigned int mmDB_PERFCOUNTER0_LO__SI = 0x2601; +constexpr unsigned int mmDB_PERFCOUNTER0_SELECT1__CI__VI = 0xDC41; +constexpr unsigned int mmDB_PERFCOUNTER0_SELECT__CI__VI = 0xDC40; +constexpr unsigned int mmDB_PERFCOUNTER0_SELECT__SI = 0x2600; +constexpr unsigned int mmDB_PERFCOUNTER1_HI__CI__VI = 0xD443; +constexpr unsigned int mmDB_PERFCOUNTER1_HI__SI = 0x2605; +constexpr unsigned int mmDB_PERFCOUNTER1_LO__CI__VI = 0xD442; +constexpr unsigned int mmDB_PERFCOUNTER1_LO__SI = 0x2604; +constexpr unsigned int mmDB_PERFCOUNTER1_SELECT1__CI__VI = 0xDC43; +constexpr unsigned int mmDB_PERFCOUNTER1_SELECT__CI__VI = 0xDC42; +constexpr unsigned int mmDB_PERFCOUNTER1_SELECT__SI = 0x2603; +constexpr unsigned int mmDB_PERFCOUNTER2_HI__CI__VI = 0xD445; +constexpr unsigned int mmDB_PERFCOUNTER2_HI__SI = 0x2608; +constexpr unsigned int mmDB_PERFCOUNTER2_LO__CI__VI = 0xD444; +constexpr unsigned int mmDB_PERFCOUNTER2_LO__SI = 0x2607; +constexpr unsigned int mmDB_PERFCOUNTER2_SELECT__CI__VI = 0xDC44; +constexpr unsigned int mmDB_PERFCOUNTER2_SELECT__SI = 0x2606; +constexpr unsigned int mmDB_PERFCOUNTER3_HI__CI__VI = 0xD447; +constexpr unsigned int mmDB_PERFCOUNTER3_HI__SI = 0x260B; +constexpr unsigned int mmDB_PERFCOUNTER3_LO__CI__VI = 0xD446; +constexpr unsigned int mmDB_PERFCOUNTER3_LO__SI = 0x260A; +constexpr unsigned int mmDB_PERFCOUNTER3_SELECT__CI__VI = 0xDC46; +constexpr unsigned int mmDB_PERFCOUNTER3_SELECT__SI = 0x2609; +constexpr unsigned int mmDB_PRELOAD_CONTROL = 0xA2B2; +constexpr unsigned int mmDB_READ_DEBUG_0 = 0x2620; +constexpr unsigned int mmDB_READ_DEBUG_1 = 0x2621; +constexpr unsigned int mmDB_READ_DEBUG_2 = 0x2622; +constexpr unsigned int mmDB_READ_DEBUG_3 = 0x2623; +constexpr unsigned int mmDB_READ_DEBUG_4 = 0x2624; +constexpr unsigned int mmDB_READ_DEBUG_5 = 0x2625; +constexpr unsigned int mmDB_READ_DEBUG_6 = 0x2626; +constexpr unsigned int mmDB_READ_DEBUG_7 = 0x2627; +constexpr unsigned int mmDB_READ_DEBUG_8 = 0x2628; +constexpr unsigned int mmDB_READ_DEBUG_9 = 0x2629; +constexpr unsigned int mmDB_READ_DEBUG_A = 0x262A; +constexpr unsigned int mmDB_READ_DEBUG_B = 0x262B; +constexpr unsigned int mmDB_READ_DEBUG_C = 0x262C; +constexpr unsigned int mmDB_READ_DEBUG_D = 0x262D; +constexpr unsigned int mmDB_READ_DEBUG_E = 0x262E; +constexpr unsigned int mmDB_READ_DEBUG_F = 0x262F; +constexpr unsigned int mmDB_RENDER_CONTROL = 0xA000; +constexpr unsigned int mmDB_RENDER_OVERRIDE = 0xA003; +constexpr unsigned int mmDB_RENDER_OVERRIDE2 = 0xA004; +constexpr unsigned int mmDB_RING_CONTROL__CI__VI = 0x261B; +constexpr unsigned int mmDB_SHADER_CONTROL = 0xA203; +constexpr unsigned int mmDB_SRESULTS_COMPARE_STATE0 = 0xA2B0; +constexpr unsigned int mmDB_SRESULTS_COMPARE_STATE1 = 0xA2B1; +constexpr unsigned int mmDB_STENCILREFMASK = 0xA10C; +constexpr unsigned int mmDB_STENCILREFMASK_BF = 0xA10D; +constexpr unsigned int mmDB_STENCIL_CLEAR = 0xA00A; +constexpr unsigned int mmDB_STENCIL_CONTROL = 0xA10B; +constexpr unsigned int mmDB_STENCIL_INFO = 0xA011; +constexpr unsigned int mmDB_STENCIL_READ_BASE = 0xA013; +constexpr unsigned int mmDB_STENCIL_WRITE_BASE = 0xA015; +constexpr unsigned int mmDB_SUBTILE_CONTROL = 0x2616; +constexpr unsigned int mmDB_WATERMARKS = 0x2615; +constexpr unsigned int mmDB_ZPASS_COUNT_HI__CI__VI = 0xC3FF; +constexpr unsigned int mmDB_ZPASS_COUNT_HI__SI = 0x261D; +constexpr unsigned int mmDB_ZPASS_COUNT_LOW__CI__VI = 0xC3FE; +constexpr unsigned int mmDB_ZPASS_COUNT_LOW__SI = 0x261C; +constexpr unsigned int mmDB_Z_INFO = 0xA010; +constexpr unsigned int mmDB_Z_READ_BASE = 0xA012; +constexpr unsigned int mmDB_Z_WRITE_BASE = 0xA014; +constexpr unsigned int mmDCCG_AUDIO_DTO0_MODULE__SI = 0x0154; +constexpr unsigned int mmDCCG_AUDIO_DTO0_PHASE__SI = 0x0153; +constexpr unsigned int mmDCCG_GATE_DISABLE_CNTL__SI = 0x011F; +constexpr unsigned int mmDCCG_TEST_CLK_SEL__SI = 0x0147; +constexpr unsigned int mmDCCG_TEST_DEBUG_DATA__SI = 0x0159; +constexpr unsigned int mmDCCG_TEST_DEBUG_INDEX__SI = 0x0158; +constexpr unsigned int mmDCCG_VPCLK_CNTL__SI = 0x015E; +constexpr unsigned int mmDCDEBUG_BUS_CLK1_SEL__SI = 0x1860; +constexpr unsigned int mmDCDEBUG_BUS_CLK2_SEL__SI = 0x1861; +constexpr unsigned int mmDCDEBUG_BUS_CLK3_SEL__SI = 0x1862; +constexpr unsigned int mmDCDEBUG_BUS_CLK4_SEL__SI = 0x1863; +constexpr unsigned int mmDCDEBUG_OUT_CNTL__SI = 0x186B; +constexpr unsigned int mmDCDEBUG_OUT_PIN_OVERRIDE__SI = 0x186A; +constexpr unsigned int mmDCIO_DEBUG__SI = 0x196F; +constexpr unsigned int mmDCIO_IMPCAL_CNTL_AB__SI = 0x194C; +constexpr unsigned int mmDCIO_IMPCAL_CNTL_CD__SI = 0x194F; +constexpr unsigned int mmDCIO_IMPCAL_CNTL_EF__SI = 0x1952; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x1984; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_REG_TEST_OUTPUT__SI = 0x1986; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x1990; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_REG_TEST_OUTPUT__SI = 0x1992; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x199C; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_REG_TEST_OUTPUT__SI = 0x199E; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x19C4; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_REG_TEST_OUTPUT__SI = 0x19C6; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x19D0; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_REG_TEST_OUTPUT__SI = 0x19D2; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_DATA_SYNCHRONIZATION__SI = 0x19DC; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_REG_TEST_OUTPUT__SI = 0x19DE; +constexpr unsigned int mmDCI_TEST_DEBUG_DATA__SI = 0x0321; +constexpr unsigned int mmDCI_TEST_DEBUG_INDEX__SI = 0x0320; +constexpr unsigned int mmDCP0_CUR_COLOR1__SI__VI = 0x1A6C; +constexpr unsigned int mmDCP0_CUR_COLOR2__SI__VI = 0x1A6D; +constexpr unsigned int mmDCP0_CUR_CONTROL__SI__VI = 0x1A66; +constexpr unsigned int mmDCP0_CUR_HOT_SPOT__SI__VI = 0x1A6B; +constexpr unsigned int mmDCP0_CUR_POSITION__SI__VI = 0x1A6A; +constexpr unsigned int mmDCP0_CUR_SIZE__SI__VI = 0x1A68; +constexpr unsigned int mmDCP0_CUR_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A69; +constexpr unsigned int mmDCP0_CUR_SURFACE_ADDRESS__SI__VI = 0x1A67; +constexpr unsigned int mmDCP0_CUR_UPDATE__SI__VI = 0x1A6E; +constexpr unsigned int mmDCP0_DCP_CRC_CONTROL__SI__VI = 0x1A87; +constexpr unsigned int mmDCP0_DCP_CRC_CURRENT__SI__VI = 0x1A89; +constexpr unsigned int mmDCP0_DCP_CRC_LAST__SI__VI = 0x1A8B; +constexpr unsigned int mmDCP0_DCP_CRC_MASK__SI__VI = 0x1A88; +constexpr unsigned int mmDCP0_DCP_DEBUG__SI__VI = 0x1A8D; +constexpr unsigned int mmDCP0_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI__VI = 0x1A91; +constexpr unsigned int mmDCP0_DCP_TEST_DEBUG_DATA__SI__VI = 0x1A96; +constexpr unsigned int mmDCP0_DCP_TEST_DEBUG_INDEX__SI__VI = 0x1A95; +constexpr unsigned int mmDCP0_DC_LUT_30_COLOR__SI__VI = 0x1A7C; +constexpr unsigned int mmDCP0_DC_LUT_AUTOFILL__SI__VI = 0x1A7F; +constexpr unsigned int mmDCP0_DC_LUT_BLACK_OFFSET_BLUE__SI__VI = 0x1A81; +constexpr unsigned int mmDCP0_DC_LUT_BLACK_OFFSET_GREEN__SI__VI = 0x1A82; +constexpr unsigned int mmDCP0_DC_LUT_BLACK_OFFSET_RED__SI__VI = 0x1A83; +constexpr unsigned int mmDCP0_DC_LUT_CONTROL__SI__VI = 0x1A80; +constexpr unsigned int mmDCP0_DC_LUT_PWL_DATA__SI__VI = 0x1A7B; +constexpr unsigned int mmDCP0_DC_LUT_RW_INDEX__SI__VI = 0x1A79; +constexpr unsigned int mmDCP0_DC_LUT_RW_MODE__SI__VI = 0x1A78; +constexpr unsigned int mmDCP0_DC_LUT_SEQ_COLOR__SI__VI = 0x1A7A; +constexpr unsigned int mmDCP0_DC_LUT_WHITE_OFFSET_BLUE__SI__VI = 0x1A84; +constexpr unsigned int mmDCP0_DC_LUT_WHITE_OFFSET_GREEN__SI__VI = 0x1A85; +constexpr unsigned int mmDCP0_DC_LUT_WHITE_OFFSET_RED__SI__VI = 0x1A86; +constexpr unsigned int mmDCP0_DC_LUT_WRITE_EN_MASK__SI__VI = 0x1A7E; +constexpr unsigned int mmDCP0_GRPH_COMPRESS_PITCH__SI__VI = 0x1A1A; +constexpr unsigned int mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A1B; +constexpr unsigned int mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS__SI__VI = 0x1A19; +constexpr unsigned int mmDCP0_GRPH_CONTROL = 0x1A01; +constexpr unsigned int mmDCP0_GRPH_DFQ_CONTROL__SI__VI = 0x1A14; +constexpr unsigned int mmDCP0_GRPH_DFQ_STATUS__SI__VI = 0x1A15; +constexpr unsigned int mmDCP0_GRPH_ENABLE__SI__VI = 0x1A00; +constexpr unsigned int mmDCP0_GRPH_FLIP_CONTROL = 0x1A12; +constexpr unsigned int mmDCP0_GRPH_INTERRUPT_CONTROL__SI__VI = 0x1A17; +constexpr unsigned int mmDCP0_GRPH_INTERRUPT_STATUS__SI__VI = 0x1A16; +constexpr unsigned int mmDCP0_GRPH_LUT_10BIT_BYPASS__SI__VI = 0x1A02; +constexpr unsigned int mmDCP0_GRPH_PITCH = 0x1A06; +constexpr unsigned int mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS = 0x1A04; +constexpr unsigned int mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH = 0x1A07; +constexpr unsigned int mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A08; +constexpr unsigned int mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS__SI__VI = 0x1A05; +constexpr unsigned int mmDCP0_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI__VI = 0x1A18; +constexpr unsigned int mmDCP0_GRPH_SURFACE_ADDRESS_INUSE__SI__VI = 0x1A13; +constexpr unsigned int mmDCP0_GRPH_SURFACE_OFFSET_X__SI__VI = 0x1A09; +constexpr unsigned int mmDCP0_GRPH_SURFACE_OFFSET_Y__SI__VI = 0x1A0A; +constexpr unsigned int mmDCP0_GRPH_SWAP_CNTL__SI__VI = 0x1A03; +constexpr unsigned int mmDCP0_GRPH_UPDATE = 0x1A11; +constexpr unsigned int mmDCP0_GRPH_X_END__SI__VI = 0x1A0D; +constexpr unsigned int mmDCP0_GRPH_X_START__SI__VI = 0x1A0B; +constexpr unsigned int mmDCP0_GRPH_Y_END__SI__VI = 0x1A0E; +constexpr unsigned int mmDCP0_GRPH_Y_START__SI__VI = 0x1A0C; +constexpr unsigned int mmDCP0_OVLSCL_EDGE_PIXEL_CNTL__SI__VI = 0x1A2C; +constexpr unsigned int mmDCP0_OVL_CONTROL1__SI__VI = 0x1A1D; +constexpr unsigned int mmDCP0_OVL_CONTROL2__SI__VI = 0x1A1E; +constexpr unsigned int mmDCP0_OVL_DFQ_CONTROL__SI__VI = 0x1A29; +constexpr unsigned int mmDCP0_OVL_DFQ_STATUS__SI__VI = 0x1A2A; +constexpr unsigned int mmDCP0_OVL_ENABLE__SI__VI = 0x1A1C; +constexpr unsigned int mmDCP0_OVL_END__SI__VI = 0x1A26; +constexpr unsigned int mmDCP0_OVL_PITCH__SI__VI = 0x1A21; +constexpr unsigned int mmDCP0_OVL_START__SI__VI = 0x1A25; +constexpr unsigned int mmDCP0_OVL_SURFACE_ADDRESS = 0x1A20; +constexpr unsigned int mmDCP0_OVL_SURFACE_ADDRESS_HIGH = 0x1A22; +constexpr unsigned int mmDCP0_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI__VI = 0x1A2B; +constexpr unsigned int mmDCP0_OVL_SURFACE_ADDRESS_INUSE__SI__VI = 0x1A28; +constexpr unsigned int mmDCP0_OVL_SURFACE_OFFSET_X__SI__VI = 0x1A23; +constexpr unsigned int mmDCP0_OVL_SURFACE_OFFSET_Y__SI__VI = 0x1A24; +constexpr unsigned int mmDCP0_OVL_SWAP_CNTL__SI__VI = 0x1A1F; +constexpr unsigned int mmDCP0_OVL_UPDATE__SI__VI = 0x1A27; +constexpr unsigned int mmDCP1_CUR_COLOR1__SI = 0x1D6C; +constexpr unsigned int mmDCP1_CUR_COLOR2__SI = 0x1D6D; +constexpr unsigned int mmDCP1_CUR_CONTROL__SI = 0x1D66; +constexpr unsigned int mmDCP1_CUR_HOT_SPOT__SI = 0x1D6B; +constexpr unsigned int mmDCP1_CUR_POSITION__SI = 0x1D6A; +constexpr unsigned int mmDCP1_CUR_SIZE__SI = 0x1D68; +constexpr unsigned int mmDCP1_CUR_SURFACE_ADDRESS_HIGH__SI = 0x1D69; +constexpr unsigned int mmDCP1_CUR_SURFACE_ADDRESS__SI = 0x1D67; +constexpr unsigned int mmDCP1_CUR_UPDATE__SI = 0x1D6E; +constexpr unsigned int mmDCP1_DCP_CRC_CONTROL__SI = 0x1D87; +constexpr unsigned int mmDCP1_DCP_CRC_CURRENT__SI = 0x1D89; +constexpr unsigned int mmDCP1_DCP_CRC_LAST__SI = 0x1D8B; +constexpr unsigned int mmDCP1_DCP_CRC_MASK__SI = 0x1D88; +constexpr unsigned int mmDCP1_DCP_DEBUG__SI = 0x1D8D; +constexpr unsigned int mmDCP1_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI = 0x1D91; +constexpr unsigned int mmDCP1_DCP_TEST_DEBUG_DATA__SI = 0x1D96; +constexpr unsigned int mmDCP1_DCP_TEST_DEBUG_INDEX__SI = 0x1D95; +constexpr unsigned int mmDCP1_DC_LUT_30_COLOR__SI = 0x1D7C; +constexpr unsigned int mmDCP1_DC_LUT_AUTOFILL__SI = 0x1D7F; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_BLUE__SI = 0x1D81; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_GREEN__SI = 0x1D82; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_RED__SI = 0x1D83; +constexpr unsigned int mmDCP1_DC_LUT_CONTROL__SI = 0x1D80; +constexpr unsigned int mmDCP1_DC_LUT_PWL_DATA__SI = 0x1D7B; +constexpr unsigned int mmDCP1_DC_LUT_RW_INDEX__SI = 0x1D79; +constexpr unsigned int mmDCP1_DC_LUT_RW_MODE__SI = 0x1D78; +constexpr unsigned int mmDCP1_DC_LUT_SEQ_COLOR__SI = 0x1D7A; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_BLUE__SI = 0x1D84; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_GREEN__SI = 0x1D85; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_RED__SI = 0x1D86; +constexpr unsigned int mmDCP1_DC_LUT_WRITE_EN_MASK__SI = 0x1D7E; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_PITCH__SI = 0x1D1A; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI = 0x1D1B; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS__SI = 0x1D19; +constexpr unsigned int mmDCP1_GRPH_DFQ_CONTROL__SI = 0x1D14; +constexpr unsigned int mmDCP1_GRPH_DFQ_STATUS__SI = 0x1D15; +constexpr unsigned int mmDCP1_GRPH_ENABLE__SI = 0x1D00; +constexpr unsigned int mmDCP1_GRPH_INTERRUPT_CONTROL__SI = 0x1D17; +constexpr unsigned int mmDCP1_GRPH_INTERRUPT_STATUS__SI = 0x1D16; +constexpr unsigned int mmDCP1_GRPH_LUT_10BIT_BYPASS__SI = 0x1D02; +constexpr unsigned int mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI = 0x1D07; +constexpr unsigned int mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI = 0x1D08; +constexpr unsigned int mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS__SI = 0x1D05; +constexpr unsigned int mmDCP1_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x1D18; +constexpr unsigned int mmDCP1_GRPH_SURFACE_ADDRESS_INUSE__SI = 0x1D13; +constexpr unsigned int mmDCP1_GRPH_SURFACE_OFFSET_X__SI = 0x1D09; +constexpr unsigned int mmDCP1_GRPH_SURFACE_OFFSET_Y__SI = 0x1D0A; +constexpr unsigned int mmDCP1_GRPH_SWAP_CNTL__SI = 0x1D03; +constexpr unsigned int mmDCP1_GRPH_X_END__SI = 0x1D0D; +constexpr unsigned int mmDCP1_GRPH_X_START__SI = 0x1D0B; +constexpr unsigned int mmDCP1_GRPH_Y_END__SI = 0x1D0E; +constexpr unsigned int mmDCP1_GRPH_Y_START__SI = 0x1D0C; +constexpr unsigned int mmDCP1_OVLSCL_EDGE_PIXEL_CNTL__SI = 0x1D2C; +constexpr unsigned int mmDCP1_OVL_CONTROL1__SI = 0x1D1D; +constexpr unsigned int mmDCP1_OVL_CONTROL2__SI = 0x1D1E; +constexpr unsigned int mmDCP1_OVL_DFQ_CONTROL__SI = 0x1D29; +constexpr unsigned int mmDCP1_OVL_DFQ_STATUS__SI = 0x1D2A; +constexpr unsigned int mmDCP1_OVL_ENABLE__SI = 0x1D1C; +constexpr unsigned int mmDCP1_OVL_END__SI = 0x1D26; +constexpr unsigned int mmDCP1_OVL_PITCH__SI = 0x1D21; +constexpr unsigned int mmDCP1_OVL_START__SI = 0x1D25; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x1D2B; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_HIGH__SI = 0x1D22; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_INUSE__SI = 0x1D28; +constexpr unsigned int mmDCP1_OVL_SURFACE_OFFSET_X__SI = 0x1D23; +constexpr unsigned int mmDCP1_OVL_SURFACE_OFFSET_Y__SI = 0x1D24; +constexpr unsigned int mmDCP1_OVL_SWAP_CNTL__SI = 0x1D1F; +constexpr unsigned int mmDCP1_OVL_UPDATE__SI = 0x1D27; +constexpr unsigned int mmDCP2_CUR_COLOR1__SI = 0x406C; +constexpr unsigned int mmDCP2_CUR_COLOR2__SI = 0x406D; +constexpr unsigned int mmDCP2_CUR_CONTROL__SI = 0x4066; +constexpr unsigned int mmDCP2_CUR_HOT_SPOT__SI = 0x406B; +constexpr unsigned int mmDCP2_CUR_POSITION__SI = 0x406A; +constexpr unsigned int mmDCP2_CUR_SIZE__SI = 0x4068; +constexpr unsigned int mmDCP2_CUR_SURFACE_ADDRESS_HIGH__SI = 0x4069; +constexpr unsigned int mmDCP2_CUR_SURFACE_ADDRESS__SI = 0x4067; +constexpr unsigned int mmDCP2_CUR_UPDATE__SI = 0x406E; +constexpr unsigned int mmDCP2_DCP_CRC_CONTROL__SI = 0x4087; +constexpr unsigned int mmDCP2_DCP_CRC_CURRENT__SI = 0x4089; +constexpr unsigned int mmDCP2_DCP_CRC_LAST__SI = 0x408B; +constexpr unsigned int mmDCP2_DCP_CRC_MASK__SI = 0x4088; +constexpr unsigned int mmDCP2_DCP_DEBUG__SI = 0x408D; +constexpr unsigned int mmDCP2_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI = 0x4091; +constexpr unsigned int mmDCP2_DCP_TEST_DEBUG_DATA__SI = 0x4096; +constexpr unsigned int mmDCP2_DCP_TEST_DEBUG_INDEX__SI = 0x4095; +constexpr unsigned int mmDCP2_DC_LUT_30_COLOR__SI = 0x407C; +constexpr unsigned int mmDCP2_DC_LUT_AUTOFILL__SI = 0x407F; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_BLUE__SI = 0x4081; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_GREEN__SI = 0x4082; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_RED__SI = 0x4083; +constexpr unsigned int mmDCP2_DC_LUT_CONTROL__SI = 0x4080; +constexpr unsigned int mmDCP2_DC_LUT_PWL_DATA__SI = 0x407B; +constexpr unsigned int mmDCP2_DC_LUT_RW_INDEX__SI = 0x4079; +constexpr unsigned int mmDCP2_DC_LUT_RW_MODE__SI = 0x4078; +constexpr unsigned int mmDCP2_DC_LUT_SEQ_COLOR__SI = 0x407A; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_BLUE__SI = 0x4084; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_GREEN__SI = 0x4085; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_RED__SI = 0x4086; +constexpr unsigned int mmDCP2_DC_LUT_WRITE_EN_MASK__SI = 0x407E; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_PITCH__SI = 0x401A; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI = 0x401B; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS__SI = 0x4019; +constexpr unsigned int mmDCP2_GRPH_DFQ_CONTROL__SI = 0x4014; +constexpr unsigned int mmDCP2_GRPH_DFQ_STATUS__SI = 0x4015; +constexpr unsigned int mmDCP2_GRPH_ENABLE__SI = 0x4000; +constexpr unsigned int mmDCP2_GRPH_INTERRUPT_CONTROL__SI = 0x4017; +constexpr unsigned int mmDCP2_GRPH_INTERRUPT_STATUS__SI = 0x4016; +constexpr unsigned int mmDCP2_GRPH_LUT_10BIT_BYPASS__SI = 0x4002; +constexpr unsigned int mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI = 0x4007; +constexpr unsigned int mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI = 0x4008; +constexpr unsigned int mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS__SI = 0x4005; +constexpr unsigned int mmDCP2_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x4018; +constexpr unsigned int mmDCP2_GRPH_SURFACE_ADDRESS_INUSE__SI = 0x4013; +constexpr unsigned int mmDCP2_GRPH_SURFACE_OFFSET_X__SI = 0x4009; +constexpr unsigned int mmDCP2_GRPH_SURFACE_OFFSET_Y__SI = 0x400A; +constexpr unsigned int mmDCP2_GRPH_SWAP_CNTL__SI = 0x4003; +constexpr unsigned int mmDCP2_GRPH_X_END__SI = 0x400D; +constexpr unsigned int mmDCP2_GRPH_X_START__SI = 0x400B; +constexpr unsigned int mmDCP2_GRPH_Y_END__SI = 0x400E; +constexpr unsigned int mmDCP2_GRPH_Y_START__SI = 0x400C; +constexpr unsigned int mmDCP2_OVLSCL_EDGE_PIXEL_CNTL__SI = 0x402C; +constexpr unsigned int mmDCP2_OVL_CONTROL1__SI = 0x401D; +constexpr unsigned int mmDCP2_OVL_CONTROL2__SI = 0x401E; +constexpr unsigned int mmDCP2_OVL_DFQ_CONTROL__SI = 0x4029; +constexpr unsigned int mmDCP2_OVL_DFQ_STATUS__SI = 0x402A; +constexpr unsigned int mmDCP2_OVL_ENABLE__SI = 0x401C; +constexpr unsigned int mmDCP2_OVL_END__SI = 0x4026; +constexpr unsigned int mmDCP2_OVL_PITCH__SI = 0x4021; +constexpr unsigned int mmDCP2_OVL_START__SI = 0x4025; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x402B; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_HIGH__SI = 0x4022; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_INUSE__SI = 0x4028; +constexpr unsigned int mmDCP2_OVL_SURFACE_OFFSET_X__SI = 0x4023; +constexpr unsigned int mmDCP2_OVL_SURFACE_OFFSET_Y__SI = 0x4024; +constexpr unsigned int mmDCP2_OVL_SWAP_CNTL__SI = 0x401F; +constexpr unsigned int mmDCP2_OVL_UPDATE__SI = 0x4027; +constexpr unsigned int mmDCP3_CUR_COLOR1__SI = 0x436C; +constexpr unsigned int mmDCP3_CUR_COLOR2__SI = 0x436D; +constexpr unsigned int mmDCP3_CUR_CONTROL__SI = 0x4366; +constexpr unsigned int mmDCP3_CUR_HOT_SPOT__SI = 0x436B; +constexpr unsigned int mmDCP3_CUR_POSITION__SI = 0x436A; +constexpr unsigned int mmDCP3_CUR_SIZE__SI = 0x4368; +constexpr unsigned int mmDCP3_CUR_SURFACE_ADDRESS_HIGH__SI = 0x4369; +constexpr unsigned int mmDCP3_CUR_SURFACE_ADDRESS__SI = 0x4367; +constexpr unsigned int mmDCP3_CUR_UPDATE__SI = 0x436E; +constexpr unsigned int mmDCP3_DCP_CRC_CONTROL__SI = 0x4387; +constexpr unsigned int mmDCP3_DCP_CRC_CURRENT__SI = 0x4389; +constexpr unsigned int mmDCP3_DCP_CRC_LAST__SI = 0x438B; +constexpr unsigned int mmDCP3_DCP_CRC_MASK__SI = 0x4388; +constexpr unsigned int mmDCP3_DCP_DEBUG__SI = 0x438D; +constexpr unsigned int mmDCP3_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI = 0x4391; +constexpr unsigned int mmDCP3_DCP_TEST_DEBUG_DATA__SI = 0x4396; +constexpr unsigned int mmDCP3_DCP_TEST_DEBUG_INDEX__SI = 0x4395; +constexpr unsigned int mmDCP3_DC_LUT_30_COLOR__SI = 0x437C; +constexpr unsigned int mmDCP3_DC_LUT_AUTOFILL__SI = 0x437F; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_BLUE__SI = 0x4381; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_GREEN__SI = 0x4382; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_RED__SI = 0x4383; +constexpr unsigned int mmDCP3_DC_LUT_CONTROL__SI = 0x4380; +constexpr unsigned int mmDCP3_DC_LUT_PWL_DATA__SI = 0x437B; +constexpr unsigned int mmDCP3_DC_LUT_RW_INDEX__SI = 0x4379; +constexpr unsigned int mmDCP3_DC_LUT_RW_MODE__SI = 0x4378; +constexpr unsigned int mmDCP3_DC_LUT_SEQ_COLOR__SI = 0x437A; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_BLUE__SI = 0x4384; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_GREEN__SI = 0x4385; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_RED__SI = 0x4386; +constexpr unsigned int mmDCP3_DC_LUT_WRITE_EN_MASK__SI = 0x437E; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_PITCH__SI = 0x431A; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI = 0x431B; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS__SI = 0x4319; +constexpr unsigned int mmDCP3_GRPH_DFQ_CONTROL__SI = 0x4314; +constexpr unsigned int mmDCP3_GRPH_DFQ_STATUS__SI = 0x4315; +constexpr unsigned int mmDCP3_GRPH_ENABLE__SI = 0x4300; +constexpr unsigned int mmDCP3_GRPH_INTERRUPT_CONTROL__SI = 0x4317; +constexpr unsigned int mmDCP3_GRPH_INTERRUPT_STATUS__SI = 0x4316; +constexpr unsigned int mmDCP3_GRPH_LUT_10BIT_BYPASS__SI = 0x4302; +constexpr unsigned int mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI = 0x4307; +constexpr unsigned int mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI = 0x4308; +constexpr unsigned int mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS__SI = 0x4305; +constexpr unsigned int mmDCP3_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x4318; +constexpr unsigned int mmDCP3_GRPH_SURFACE_ADDRESS_INUSE__SI = 0x4313; +constexpr unsigned int mmDCP3_GRPH_SURFACE_OFFSET_X__SI = 0x4309; +constexpr unsigned int mmDCP3_GRPH_SURFACE_OFFSET_Y__SI = 0x430A; +constexpr unsigned int mmDCP3_GRPH_SWAP_CNTL__SI = 0x4303; +constexpr unsigned int mmDCP3_GRPH_X_END__SI = 0x430D; +constexpr unsigned int mmDCP3_GRPH_X_START__SI = 0x430B; +constexpr unsigned int mmDCP3_GRPH_Y_END__SI = 0x430E; +constexpr unsigned int mmDCP3_GRPH_Y_START__SI = 0x430C; +constexpr unsigned int mmDCP3_OVLSCL_EDGE_PIXEL_CNTL__SI = 0x432C; +constexpr unsigned int mmDCP3_OVL_CONTROL1__SI = 0x431D; +constexpr unsigned int mmDCP3_OVL_CONTROL2__SI = 0x431E; +constexpr unsigned int mmDCP3_OVL_DFQ_CONTROL__SI = 0x4329; +constexpr unsigned int mmDCP3_OVL_DFQ_STATUS__SI = 0x432A; +constexpr unsigned int mmDCP3_OVL_ENABLE__SI = 0x431C; +constexpr unsigned int mmDCP3_OVL_END__SI = 0x4326; +constexpr unsigned int mmDCP3_OVL_PITCH__SI = 0x4321; +constexpr unsigned int mmDCP3_OVL_START__SI = 0x4325; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x432B; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_HIGH__SI = 0x4322; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_INUSE__SI = 0x4328; +constexpr unsigned int mmDCP3_OVL_SURFACE_OFFSET_X__SI = 0x4323; +constexpr unsigned int mmDCP3_OVL_SURFACE_OFFSET_Y__SI = 0x4324; +constexpr unsigned int mmDCP3_OVL_SWAP_CNTL__SI = 0x431F; +constexpr unsigned int mmDCP3_OVL_UPDATE__SI = 0x4327; +constexpr unsigned int mmDCP4_CUR_COLOR1__SI = 0x466C; +constexpr unsigned int mmDCP4_CUR_COLOR2__SI = 0x466D; +constexpr unsigned int mmDCP4_CUR_CONTROL__SI = 0x4666; +constexpr unsigned int mmDCP4_CUR_HOT_SPOT__SI = 0x466B; +constexpr unsigned int mmDCP4_CUR_POSITION__SI = 0x466A; +constexpr unsigned int mmDCP4_CUR_SIZE__SI = 0x4668; +constexpr unsigned int mmDCP4_CUR_SURFACE_ADDRESS_HIGH__SI = 0x4669; +constexpr unsigned int mmDCP4_CUR_SURFACE_ADDRESS__SI = 0x4667; +constexpr unsigned int mmDCP4_CUR_UPDATE__SI = 0x466E; +constexpr unsigned int mmDCP4_DCP_CRC_CONTROL__SI = 0x4687; +constexpr unsigned int mmDCP4_DCP_CRC_CURRENT__SI = 0x4689; +constexpr unsigned int mmDCP4_DCP_CRC_LAST__SI = 0x468B; +constexpr unsigned int mmDCP4_DCP_CRC_MASK__SI = 0x4688; +constexpr unsigned int mmDCP4_DCP_DEBUG__SI = 0x468D; +constexpr unsigned int mmDCP4_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI = 0x4691; +constexpr unsigned int mmDCP4_DCP_TEST_DEBUG_DATA__SI = 0x4696; +constexpr unsigned int mmDCP4_DCP_TEST_DEBUG_INDEX__SI = 0x4695; +constexpr unsigned int mmDCP4_DC_LUT_30_COLOR__SI = 0x467C; +constexpr unsigned int mmDCP4_DC_LUT_AUTOFILL__SI = 0x467F; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_BLUE__SI = 0x4681; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_GREEN__SI = 0x4682; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_RED__SI = 0x4683; +constexpr unsigned int mmDCP4_DC_LUT_CONTROL__SI = 0x4680; +constexpr unsigned int mmDCP4_DC_LUT_PWL_DATA__SI = 0x467B; +constexpr unsigned int mmDCP4_DC_LUT_RW_INDEX__SI = 0x4679; +constexpr unsigned int mmDCP4_DC_LUT_RW_MODE__SI = 0x4678; +constexpr unsigned int mmDCP4_DC_LUT_SEQ_COLOR__SI = 0x467A; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_BLUE__SI = 0x4684; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_GREEN__SI = 0x4685; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_RED__SI = 0x4686; +constexpr unsigned int mmDCP4_DC_LUT_WRITE_EN_MASK__SI = 0x467E; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_PITCH__SI = 0x461A; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI = 0x461B; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS__SI = 0x4619; +constexpr unsigned int mmDCP4_GRPH_DFQ_CONTROL__SI = 0x4614; +constexpr unsigned int mmDCP4_GRPH_DFQ_STATUS__SI = 0x4615; +constexpr unsigned int mmDCP4_GRPH_ENABLE__SI = 0x4600; +constexpr unsigned int mmDCP4_GRPH_INTERRUPT_CONTROL__SI = 0x4617; +constexpr unsigned int mmDCP4_GRPH_INTERRUPT_STATUS__SI = 0x4616; +constexpr unsigned int mmDCP4_GRPH_LUT_10BIT_BYPASS__SI = 0x4602; +constexpr unsigned int mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI = 0x4607; +constexpr unsigned int mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI = 0x4608; +constexpr unsigned int mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS__SI = 0x4605; +constexpr unsigned int mmDCP4_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x4618; +constexpr unsigned int mmDCP4_GRPH_SURFACE_ADDRESS_INUSE__SI = 0x4613; +constexpr unsigned int mmDCP4_GRPH_SURFACE_OFFSET_X__SI = 0x4609; +constexpr unsigned int mmDCP4_GRPH_SURFACE_OFFSET_Y__SI = 0x460A; +constexpr unsigned int mmDCP4_GRPH_SWAP_CNTL__SI = 0x4603; +constexpr unsigned int mmDCP4_GRPH_X_END__SI = 0x460D; +constexpr unsigned int mmDCP4_GRPH_X_START__SI = 0x460B; +constexpr unsigned int mmDCP4_GRPH_Y_END__SI = 0x460E; +constexpr unsigned int mmDCP4_GRPH_Y_START__SI = 0x460C; +constexpr unsigned int mmDCP4_OVLSCL_EDGE_PIXEL_CNTL__SI = 0x462C; +constexpr unsigned int mmDCP4_OVL_CONTROL1__SI = 0x461D; +constexpr unsigned int mmDCP4_OVL_CONTROL2__SI = 0x461E; +constexpr unsigned int mmDCP4_OVL_DFQ_CONTROL__SI = 0x4629; +constexpr unsigned int mmDCP4_OVL_DFQ_STATUS__SI = 0x462A; +constexpr unsigned int mmDCP4_OVL_ENABLE__SI = 0x461C; +constexpr unsigned int mmDCP4_OVL_END__SI = 0x4626; +constexpr unsigned int mmDCP4_OVL_PITCH__SI = 0x4621; +constexpr unsigned int mmDCP4_OVL_START__SI = 0x4625; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x462B; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_HIGH__SI = 0x4622; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_INUSE__SI = 0x4628; +constexpr unsigned int mmDCP4_OVL_SURFACE_OFFSET_X__SI = 0x4623; +constexpr unsigned int mmDCP4_OVL_SURFACE_OFFSET_Y__SI = 0x4624; +constexpr unsigned int mmDCP4_OVL_SWAP_CNTL__SI = 0x461F; +constexpr unsigned int mmDCP4_OVL_UPDATE__SI = 0x4627; +constexpr unsigned int mmDCP5_CUR_COLOR1__SI = 0x496C; +constexpr unsigned int mmDCP5_CUR_COLOR2__SI = 0x496D; +constexpr unsigned int mmDCP5_CUR_CONTROL__SI = 0x4966; +constexpr unsigned int mmDCP5_CUR_HOT_SPOT__SI = 0x496B; +constexpr unsigned int mmDCP5_CUR_POSITION__SI = 0x496A; +constexpr unsigned int mmDCP5_CUR_SIZE__SI = 0x4968; +constexpr unsigned int mmDCP5_CUR_SURFACE_ADDRESS_HIGH__SI = 0x4969; +constexpr unsigned int mmDCP5_CUR_SURFACE_ADDRESS__SI = 0x4967; +constexpr unsigned int mmDCP5_CUR_UPDATE__SI = 0x496E; +constexpr unsigned int mmDCP5_DCP_CRC_CONTROL__SI = 0x4987; +constexpr unsigned int mmDCP5_DCP_CRC_CURRENT__SI = 0x4989; +constexpr unsigned int mmDCP5_DCP_CRC_LAST__SI = 0x498B; +constexpr unsigned int mmDCP5_DCP_CRC_MASK__SI = 0x4988; +constexpr unsigned int mmDCP5_DCP_DEBUG__SI = 0x498D; +constexpr unsigned int mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK__SI = 0x4991; +constexpr unsigned int mmDCP5_DCP_TEST_DEBUG_DATA__SI = 0x4996; +constexpr unsigned int mmDCP5_DCP_TEST_DEBUG_INDEX__SI = 0x4995; +constexpr unsigned int mmDCP5_DC_LUT_30_COLOR__SI = 0x497C; +constexpr unsigned int mmDCP5_DC_LUT_AUTOFILL__SI = 0x497F; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_BLUE__SI = 0x4981; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_GREEN__SI = 0x4982; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_RED__SI = 0x4983; +constexpr unsigned int mmDCP5_DC_LUT_CONTROL__SI = 0x4980; +constexpr unsigned int mmDCP5_DC_LUT_PWL_DATA__SI = 0x497B; +constexpr unsigned int mmDCP5_DC_LUT_RW_INDEX__SI = 0x4979; +constexpr unsigned int mmDCP5_DC_LUT_RW_MODE__SI = 0x4978; +constexpr unsigned int mmDCP5_DC_LUT_SEQ_COLOR__SI = 0x497A; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_BLUE__SI = 0x4984; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_GREEN__SI = 0x4985; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_RED__SI = 0x4986; +constexpr unsigned int mmDCP5_DC_LUT_WRITE_EN_MASK__SI = 0x497E; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_PITCH__SI = 0x491A; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI = 0x491B; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS__SI = 0x4919; +constexpr unsigned int mmDCP5_GRPH_DFQ_CONTROL__SI = 0x4914; +constexpr unsigned int mmDCP5_GRPH_DFQ_STATUS__SI = 0x4915; +constexpr unsigned int mmDCP5_GRPH_ENABLE__SI = 0x4900; +constexpr unsigned int mmDCP5_GRPH_INTERRUPT_CONTROL__SI = 0x4917; +constexpr unsigned int mmDCP5_GRPH_INTERRUPT_STATUS__SI = 0x4916; +constexpr unsigned int mmDCP5_GRPH_LUT_10BIT_BYPASS__SI = 0x4902; +constexpr unsigned int mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI = 0x4907; +constexpr unsigned int mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI = 0x4908; +constexpr unsigned int mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS__SI = 0x4905; +constexpr unsigned int mmDCP5_GRPH_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x4918; +constexpr unsigned int mmDCP5_GRPH_SURFACE_ADDRESS_INUSE__SI = 0x4913; +constexpr unsigned int mmDCP5_GRPH_SURFACE_OFFSET_X__SI = 0x4909; +constexpr unsigned int mmDCP5_GRPH_SURFACE_OFFSET_Y__SI = 0x490A; +constexpr unsigned int mmDCP5_GRPH_SWAP_CNTL__SI = 0x4903; +constexpr unsigned int mmDCP5_GRPH_X_END__SI = 0x490D; +constexpr unsigned int mmDCP5_GRPH_X_START__SI = 0x490B; +constexpr unsigned int mmDCP5_GRPH_Y_END__SI = 0x490E; +constexpr unsigned int mmDCP5_GRPH_Y_START__SI = 0x490C; +constexpr unsigned int mmDCP5_OVLSCL_EDGE_PIXEL_CNTL__SI = 0x492C; +constexpr unsigned int mmDCP5_OVL_CONTROL1__SI = 0x491D; +constexpr unsigned int mmDCP5_OVL_CONTROL2__SI = 0x491E; +constexpr unsigned int mmDCP5_OVL_DFQ_CONTROL__SI = 0x4929; +constexpr unsigned int mmDCP5_OVL_DFQ_STATUS__SI = 0x492A; +constexpr unsigned int mmDCP5_OVL_ENABLE__SI = 0x491C; +constexpr unsigned int mmDCP5_OVL_END__SI = 0x4926; +constexpr unsigned int mmDCP5_OVL_PITCH__SI = 0x4921; +constexpr unsigned int mmDCP5_OVL_START__SI = 0x4925; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_HIGH_INUSE__SI = 0x492B; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_HIGH__SI = 0x4922; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_INUSE__SI = 0x4928; +constexpr unsigned int mmDCP5_OVL_SURFACE_OFFSET_X__SI = 0x4923; +constexpr unsigned int mmDCP5_OVL_SURFACE_OFFSET_Y__SI = 0x4924; +constexpr unsigned int mmDCP5_OVL_SWAP_CNTL__SI = 0x491F; +constexpr unsigned int mmDCP5_OVL_UPDATE__SI = 0x4927; +constexpr unsigned int mmDCP_CRC_CONTROL__SI__VI = 0x1A87; +constexpr unsigned int mmDCP_CRC_CURRENT__SI__VI = 0x1A89; +constexpr unsigned int mmDCP_CRC_LAST__SI__VI = 0x1A8B; +constexpr unsigned int mmDCP_CRC_MASK__SI__VI = 0x1A88; +constexpr unsigned int mmDCP_DEBUG__SI__VI = 0x1A8D; +constexpr unsigned int mmDCP_LB_DATA_GAP_BETWEEN_CHUNK__SI__VI = 0x1A91; +constexpr unsigned int mmDCP_TEST_DEBUG_DATA__SI__VI = 0x1A96; +constexpr unsigned int mmDCP_TEST_DEBUG_INDEX__SI__VI = 0x1A95; +constexpr unsigned int mmDC_ABM1_ACE_CNTL_MISC__SI__VI = 0x1641; +constexpr unsigned int mmDC_ABM1_ACE_OFFSET_SLOPE_0__SI__VI = 0x163A; +constexpr unsigned int mmDC_ABM1_ACE_OFFSET_SLOPE_1__SI__VI = 0x163B; +constexpr unsigned int mmDC_ABM1_ACE_OFFSET_SLOPE_2__SI__VI = 0x163C; +constexpr unsigned int mmDC_ABM1_ACE_OFFSET_SLOPE_3__SI__VI = 0x163D; +constexpr unsigned int mmDC_ABM1_ACE_OFFSET_SLOPE_4__SI__VI = 0x163E; +constexpr unsigned int mmDC_ABM1_ACE_THRES_12__SI__VI = 0x163F; +constexpr unsigned int mmDC_ABM1_ACE_THRES_34__SI__VI = 0x1640; +constexpr unsigned int mmDC_ABM1_BL_MASTER_LOCK__SI__VI = 0x169C; +constexpr unsigned int mmDC_ABM1_CNTL__SI__VI = 0x1638; +constexpr unsigned int mmDC_ABM1_DEBUG_MISC__SI__VI = 0x1649; +constexpr unsigned int mmDC_ABM1_HGLS_REG_READ_PROGRESS__SI__VI = 0x164A; +constexpr unsigned int mmDC_ABM1_HG_BIN_17_24_SHIFT_INDEX__SI__VI = 0x1659; +constexpr unsigned int mmDC_ABM1_HG_BIN_1_32_SHIFT_FLAG__SI__VI = 0x1656; +constexpr unsigned int mmDC_ABM1_HG_BIN_1_8_SHIFT_INDEX__SI__VI = 0x1657; +constexpr unsigned int mmDC_ABM1_HG_BIN_25_32_SHIFT_INDEX__SI__VI = 0x165A; +constexpr unsigned int mmDC_ABM1_HG_BIN_9_16_SHIFT_INDEX__SI__VI = 0x1658; +constexpr unsigned int mmDC_ABM1_HG_MISC_CTRL__SI__VI = 0x164B; +constexpr unsigned int mmDC_ABM1_HG_RESULT_10__SI__VI = 0x1664; +constexpr unsigned int mmDC_ABM1_HG_RESULT_11__SI__VI = 0x1665; +constexpr unsigned int mmDC_ABM1_HG_RESULT_12__SI__VI = 0x1666; +constexpr unsigned int mmDC_ABM1_HG_RESULT_13__SI__VI = 0x1667; +constexpr unsigned int mmDC_ABM1_HG_RESULT_14__SI__VI = 0x1668; +constexpr unsigned int mmDC_ABM1_HG_RESULT_15__SI__VI = 0x1669; +constexpr unsigned int mmDC_ABM1_HG_RESULT_16__SI__VI = 0x166A; +constexpr unsigned int mmDC_ABM1_HG_RESULT_17__SI__VI = 0x166B; +constexpr unsigned int mmDC_ABM1_HG_RESULT_18__SI__VI = 0x166C; +constexpr unsigned int mmDC_ABM1_HG_RESULT_19__SI__VI = 0x166D; +constexpr unsigned int mmDC_ABM1_HG_RESULT_1__SI__VI = 0x165B; +constexpr unsigned int mmDC_ABM1_HG_RESULT_20__SI__VI = 0x166E; +constexpr unsigned int mmDC_ABM1_HG_RESULT_21__SI__VI = 0x166F; +constexpr unsigned int mmDC_ABM1_HG_RESULT_22__SI__VI = 0x1670; +constexpr unsigned int mmDC_ABM1_HG_RESULT_23__SI__VI = 0x1671; +constexpr unsigned int mmDC_ABM1_HG_RESULT_24__SI__VI = 0x1672; +constexpr unsigned int mmDC_ABM1_HG_RESULT_2__SI__VI = 0x165C; +constexpr unsigned int mmDC_ABM1_HG_RESULT_3__SI__VI = 0x165D; +constexpr unsigned int mmDC_ABM1_HG_RESULT_4__SI__VI = 0x165E; +constexpr unsigned int mmDC_ABM1_HG_RESULT_5__SI__VI = 0x165F; +constexpr unsigned int mmDC_ABM1_HG_RESULT_6__SI__VI = 0x1660; +constexpr unsigned int mmDC_ABM1_HG_RESULT_7__SI__VI = 0x1661; +constexpr unsigned int mmDC_ABM1_HG_RESULT_8__SI__VI = 0x1662; +constexpr unsigned int mmDC_ABM1_HG_RESULT_9__SI__VI = 0x1663; +constexpr unsigned int mmDC_ABM1_HG_SAMPLE_RATE__SI__VI = 0x1654; +constexpr unsigned int mmDC_ABM1_IPCSC_COEFF_SEL__SI__VI = 0x1639; +constexpr unsigned int mmDC_ABM1_LS_FILTERED_MIN_MAX_LUMA__SI__VI = 0x164E; +constexpr unsigned int mmDC_ABM1_LS_MAX_PIXEL_VALUE_COUNT__SI__VI = 0x1653; +constexpr unsigned int mmDC_ABM1_LS_MIN_MAX_LUMA__SI__VI = 0x164D; +constexpr unsigned int mmDC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES__SI__VI = 0x1651; +constexpr unsigned int mmDC_ABM1_LS_MIN_PIXEL_VALUE_COUNT__SI__VI = 0x1652; +constexpr unsigned int mmDC_ABM1_LS_OVR_SCAN_BIN__SI__VI = 0x1650; +constexpr unsigned int mmDC_ABM1_LS_PIXEL_COUNT__SI__VI = 0x164F; +constexpr unsigned int mmDC_ABM1_LS_SAMPLE_RATE__SI__VI = 0x1655; +constexpr unsigned int mmDC_ABM1_LS_SUM_OF_LUMA__SI__VI = 0x164C; +constexpr unsigned int mmDC_DMCU_SCRATCH__SI__VI = 0x1618; +constexpr unsigned int mmDC_GENERICA__SI = 0x1900; +constexpr unsigned int mmDC_GENERICB__SI = 0x1901; +constexpr unsigned int mmDC_GPIO_DDC1_A__SI = 0x190D; +constexpr unsigned int mmDC_GPIO_DDC1_EN__SI = 0x190E; +constexpr unsigned int mmDC_GPIO_DDC1_MASK__SI = 0x190C; +constexpr unsigned int mmDC_GPIO_DDC1_Y__SI = 0x190F; +constexpr unsigned int mmDC_GPIO_DDC2_A__SI = 0x1911; +constexpr unsigned int mmDC_GPIO_DDC2_EN__SI = 0x1912; +constexpr unsigned int mmDC_GPIO_DDC2_MASK__SI = 0x1910; +constexpr unsigned int mmDC_GPIO_DDC2_Y__SI = 0x1913; +constexpr unsigned int mmDC_GPIO_DDC3_A__SI = 0x1915; +constexpr unsigned int mmDC_GPIO_DDC3_EN__SI = 0x1916; +constexpr unsigned int mmDC_GPIO_DDC3_MASK__SI = 0x1914; +constexpr unsigned int mmDC_GPIO_DDC3_Y__SI = 0x1917; +constexpr unsigned int mmDC_GPIO_DDC4_A__SI = 0x1919; +constexpr unsigned int mmDC_GPIO_DDC4_EN__SI = 0x191A; +constexpr unsigned int mmDC_GPIO_DDC4_MASK__SI = 0x1918; +constexpr unsigned int mmDC_GPIO_DDC4_Y__SI = 0x191B; +constexpr unsigned int mmDC_GPIO_DDC5_A__SI = 0x191D; +constexpr unsigned int mmDC_GPIO_DDC5_EN__SI = 0x191E; +constexpr unsigned int mmDC_GPIO_DDC5_MASK__SI = 0x191C; +constexpr unsigned int mmDC_GPIO_DDC5_Y__SI = 0x191F; +constexpr unsigned int mmDC_GPIO_DDC6_A__SI = 0x1921; +constexpr unsigned int mmDC_GPIO_DDC6_EN__SI = 0x1922; +constexpr unsigned int mmDC_GPIO_DDC6_MASK__SI = 0x1920; +constexpr unsigned int mmDC_GPIO_DDC6_Y__SI = 0x1923; +constexpr unsigned int mmDC_GPIO_DEBUG__SI = 0x1946; +constexpr unsigned int mmDC_GPIO_DVODATA_A__SI = 0x1909; +constexpr unsigned int mmDC_GPIO_DVODATA_EN__SI = 0x190A; +constexpr unsigned int mmDC_GPIO_DVODATA_MASK__SI = 0x1908; +constexpr unsigned int mmDC_GPIO_DVODATA_Y__SI = 0x190B; +constexpr unsigned int mmDC_GPIO_GENERIC_A__SI = 0x1905; +constexpr unsigned int mmDC_GPIO_GENERIC_EN__SI = 0x1906; +constexpr unsigned int mmDC_GPIO_GENERIC_MASK__SI = 0x1904; +constexpr unsigned int mmDC_GPIO_GENERIC_Y__SI = 0x1907; +constexpr unsigned int mmDC_GPIO_HPD_A__SI = 0x192D; +constexpr unsigned int mmDC_GPIO_HPD_EN__SI = 0x192E; +constexpr unsigned int mmDC_GPIO_HPD_MASK__SI = 0x192C; +constexpr unsigned int mmDC_GPIO_HPD_Y__SI = 0x192F; +constexpr unsigned int mmDC_GPIO_PAD_STRENGTH_1__SI = 0x1944; +constexpr unsigned int mmDC_GPIO_PAD_STRENGTH_2__SI = 0x1945; +constexpr unsigned int mmDC_GPIO_PWRSEQ_A__SI = 0x1941; +constexpr unsigned int mmDC_GPIO_PWRSEQ_EN__SI = 0x1942; +constexpr unsigned int mmDC_GPIO_PWRSEQ_MASK__SI = 0x1940; +constexpr unsigned int mmDC_GPIO_PWRSEQ_Y__SI = 0x1943; +constexpr unsigned int mmDC_GPIO_SYNCA_A__SI = 0x1925; +constexpr unsigned int mmDC_GPIO_SYNCA_EN__SI = 0x1926; +constexpr unsigned int mmDC_GPIO_SYNCA_MASK__SI = 0x1924; +constexpr unsigned int mmDC_GPIO_SYNCA_Y__SI = 0x1927; +constexpr unsigned int mmDC_GPU_TIMER_READ_CNTL__SI = 0x1972; +constexpr unsigned int mmDC_GPU_TIMER_READ__SI = 0x1971; +constexpr unsigned int mmDC_GPU_TIMER_START_POSITION__SI = 0x1970; +constexpr unsigned int mmDC_HPD1_CONTROL__SI = 0x1809; +constexpr unsigned int mmDC_HPD1_INT_CONTROL__SI = 0x1808; +constexpr unsigned int mmDC_HPD1_INT_STATUS__SI = 0x1807; +constexpr unsigned int mmDC_HPD2_CONTROL__SI = 0x180C; +constexpr unsigned int mmDC_HPD2_INT_CONTROL__SI = 0x180B; +constexpr unsigned int mmDC_HPD2_INT_STATUS__SI = 0x180A; +constexpr unsigned int mmDC_HPD3_CONTROL__SI = 0x180F; +constexpr unsigned int mmDC_HPD3_INT_CONTROL__SI = 0x180E; +constexpr unsigned int mmDC_HPD3_INT_STATUS__SI = 0x180D; +constexpr unsigned int mmDC_HPD4_CONTROL__SI = 0x1812; +constexpr unsigned int mmDC_HPD4_INT_CONTROL__SI = 0x1811; +constexpr unsigned int mmDC_HPD4_INT_STATUS__SI = 0x1810; +constexpr unsigned int mmDC_HPD5_CONTROL__SI = 0x1815; +constexpr unsigned int mmDC_HPD5_INT_CONTROL__SI = 0x1814; +constexpr unsigned int mmDC_HPD5_INT_STATUS__SI = 0x1813; +constexpr unsigned int mmDC_HPD6_CONTROL__SI = 0x1818; +constexpr unsigned int mmDC_HPD6_INT_CONTROL__SI = 0x1817; +constexpr unsigned int mmDC_HPD6_INT_STATUS__SI = 0x1816; +constexpr unsigned int mmDC_I2C_ARBITRATION__SI = 0x181A; +constexpr unsigned int mmDC_I2C_CONTROL__SI = 0x1819; +constexpr unsigned int mmDC_I2C_DATA__SI = 0x1833; +constexpr unsigned int mmDC_I2C_DDC1_HW_STATUS__SI = 0x181D; +constexpr unsigned int mmDC_I2C_DDC1_SETUP__SI = 0x1824; +constexpr unsigned int mmDC_I2C_DDC1_SPEED__SI = 0x1823; +constexpr unsigned int mmDC_I2C_DDC2_HW_STATUS__SI = 0x181E; +constexpr unsigned int mmDC_I2C_DDC2_SETUP__SI = 0x1826; +constexpr unsigned int mmDC_I2C_DDC2_SPEED__SI = 0x1825; +constexpr unsigned int mmDC_I2C_DDC3_HW_STATUS__SI = 0x181F; +constexpr unsigned int mmDC_I2C_DDC3_SETUP__SI = 0x1828; +constexpr unsigned int mmDC_I2C_DDC3_SPEED__SI = 0x1827; +constexpr unsigned int mmDC_I2C_DDC4_HW_STATUS__SI = 0x1820; +constexpr unsigned int mmDC_I2C_DDC4_SETUP__SI = 0x182A; +constexpr unsigned int mmDC_I2C_DDC4_SPEED__SI = 0x1829; +constexpr unsigned int mmDC_I2C_DDC5_HW_STATUS__SI = 0x1821; +constexpr unsigned int mmDC_I2C_DDC5_SETUP__SI = 0x182C; +constexpr unsigned int mmDC_I2C_DDC5_SPEED__SI = 0x182B; +constexpr unsigned int mmDC_I2C_DDC6_HW_STATUS__SI = 0x1822; +constexpr unsigned int mmDC_I2C_DDC6_SETUP__SI = 0x182E; +constexpr unsigned int mmDC_I2C_DDC6_SPEED__SI = 0x182D; +constexpr unsigned int mmDC_I2C_INTERRUPT_CONTROL__SI = 0x181B; +constexpr unsigned int mmDC_I2C_SW_STATUS__SI = 0x181C; +constexpr unsigned int mmDC_I2C_TRANSACTION0__SI = 0x182F; +constexpr unsigned int mmDC_I2C_TRANSACTION1__SI = 0x1830; +constexpr unsigned int mmDC_I2C_TRANSACTION2__SI = 0x1831; +constexpr unsigned int mmDC_I2C_TRANSACTION3__SI = 0x1832; +constexpr unsigned int mmDC_LUT_30_COLOR__SI__VI = 0x1A7C; +constexpr unsigned int mmDC_LUT_AUTOFILL__SI__VI = 0x1A7F; +constexpr unsigned int mmDC_LUT_BLACK_OFFSET_BLUE__SI__VI = 0x1A81; +constexpr unsigned int mmDC_LUT_BLACK_OFFSET_GREEN__SI__VI = 0x1A82; +constexpr unsigned int mmDC_LUT_BLACK_OFFSET_RED__SI__VI = 0x1A83; +constexpr unsigned int mmDC_LUT_CONTROL__SI__VI = 0x1A80; +constexpr unsigned int mmDC_LUT_PWL_DATA__SI__VI = 0x1A7B; +constexpr unsigned int mmDC_LUT_RW_INDEX__SI__VI = 0x1A79; +constexpr unsigned int mmDC_LUT_RW_MODE__SI__VI = 0x1A78; +constexpr unsigned int mmDC_LUT_SEQ_COLOR__SI__VI = 0x1A7A; +constexpr unsigned int mmDC_LUT_WHITE_OFFSET_BLUE__SI__VI = 0x1A84; +constexpr unsigned int mmDC_LUT_WHITE_OFFSET_GREEN__SI__VI = 0x1A85; +constexpr unsigned int mmDC_LUT_WHITE_OFFSET_RED__SI__VI = 0x1A86; +constexpr unsigned int mmDC_LUT_WRITE_EN_MASK__SI__VI = 0x1A7E; +constexpr unsigned int mmDC_MVP_LB_CONTROL__SI = 0x1ADB; +constexpr unsigned int mmDC_PAD_EXTERN_SIG__SI = 0x1902; +constexpr unsigned int mmDC_PINSTRAPS__SI = 0x1954; +constexpr unsigned int mmDC_REF_CLK_CNTL__SI = 0x1903; +constexpr unsigned int mmDC_TEST_DEBUG_DATA__SI = 0x186D; +constexpr unsigned int mmDC_TEST_DEBUG_INDEX__SI = 0x186C; +constexpr unsigned int mmDEBUG_DATA = 0x203D; +constexpr unsigned int mmDEBUG_INDEX = 0x203C; +constexpr unsigned int mmDENTIST_DISPCLK_CNTL__SI = 0x015F; +constexpr unsigned int mmDESKTOP_HEIGHT__SI = 0x1AC1; +constexpr unsigned int mmDIDT_IND_DATA__CI__VI = 0x3281; +constexpr unsigned int mmDIDT_IND_INDEX__CI__VI = 0x3280; +constexpr unsigned int mmDIG0_AFMT_60958_0__SI = 0x1C41; +constexpr unsigned int mmDIG0_AFMT_60958_1__SI = 0x1C42; +constexpr unsigned int mmDIG0_AFMT_60958_2__SI = 0x1C48; +constexpr unsigned int mmDIG0_AFMT_AUDIO_CRC_CONTROL__SI = 0x1C43; +constexpr unsigned int mmDIG0_AFMT_AUDIO_CRC_RESULT__SI = 0x1C49; +constexpr unsigned int mmDIG0_AFMT_AUDIO_INFO0__SI = 0x1C3F; +constexpr unsigned int mmDIG0_AFMT_AUDIO_INFO1__SI = 0x1C40; +constexpr unsigned int mmDIG0_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x1C17; +constexpr unsigned int mmDIG0_AFMT_AUDIO_PACKET_CONTROL__SI = 0x1C4B; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO0__SI = 0x1C21; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO1__SI = 0x1C22; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO2__SI = 0x1C23; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO3__SI = 0x1C24; +constexpr unsigned int mmDIG0_AFMT_INFOFRAME_CONTROL0__SI = 0x1C4D; +constexpr unsigned int mmDIG0_AFMT_ISRC1_0__SI = 0x1C18; +constexpr unsigned int mmDIG0_AFMT_ISRC1_1__SI = 0x1C19; +constexpr unsigned int mmDIG0_AFMT_ISRC1_2__SI = 0x1C1A; +constexpr unsigned int mmDIG0_AFMT_ISRC1_3__SI = 0x1C1B; +constexpr unsigned int mmDIG0_AFMT_ISRC1_4__SI = 0x1C1C; +constexpr unsigned int mmDIG0_AFMT_ISRC2_0__SI = 0x1C1D; +constexpr unsigned int mmDIG0_AFMT_ISRC2_1__SI = 0x1C1E; +constexpr unsigned int mmDIG0_AFMT_ISRC2_2__SI = 0x1C1F; +constexpr unsigned int mmDIG0_AFMT_ISRC2_3__SI = 0x1C20; +constexpr unsigned int mmDIG0_AFMT_MPEG_INFO0__SI = 0x1C25; +constexpr unsigned int mmDIG0_AFMT_MPEG_INFO1__SI = 0x1C26; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL0__SI = 0x1C44; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL1__SI = 0x1C45; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL2__SI = 0x1C46; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL3__SI = 0x1C47; +constexpr unsigned int mmDIG0_AFMT_STATUS__SI = 0x1C4A; +constexpr unsigned int mmDIG0_AFMT_VBI_PACKET_CONTROL__SI = 0x1C4C; +constexpr unsigned int mmDIG0_DIG_CLOCK_PATTERN__SI = 0x1C03; +constexpr unsigned int mmDIG0_DIG_OUTPUT_CRC_CNTL__SI = 0x1C01; +constexpr unsigned int mmDIG0_DIG_OUTPUT_CRC_RESULT__SI = 0x1C02; +constexpr unsigned int mmDIG0_DIG_RANDOM_PATTERN_SEED__SI = 0x1C05; +constexpr unsigned int mmDIG0_DIG_TEST_PATTERN__SI = 0x1C04; +constexpr unsigned int mmDIG0_HDMI_ACR_32_0__SI = 0x1C37; +constexpr unsigned int mmDIG0_HDMI_ACR_32_1__SI = 0x1C38; +constexpr unsigned int mmDIG0_HDMI_ACR_44_0__SI = 0x1C39; +constexpr unsigned int mmDIG0_HDMI_ACR_44_1__SI = 0x1C3A; +constexpr unsigned int mmDIG0_HDMI_ACR_48_0__SI = 0x1C3B; +constexpr unsigned int mmDIG0_HDMI_ACR_48_1__SI = 0x1C3C; +constexpr unsigned int mmDIG0_HDMI_ACR_PACKET_CONTROL__SI = 0x1C0F; +constexpr unsigned int mmDIG0_HDMI_ACR_STATUS_0__SI = 0x1C3D; +constexpr unsigned int mmDIG0_HDMI_ACR_STATUS_1__SI = 0x1C3E; +constexpr unsigned int mmDIG0_HDMI_AUDIO_PACKET_CONTROL__SI = 0x1C0E; +constexpr unsigned int mmDIG0_HDMI_CONTROL__SI = 0x1C0C; +constexpr unsigned int mmDIG0_HDMI_GC__SI = 0x1C16; +constexpr unsigned int mmDIG0_HDMI_GENERIC_PACKET_CONTROL__SI = 0x1C13; +constexpr unsigned int mmDIG0_HDMI_INFOFRAME_CONTROL0__SI = 0x1C11; +constexpr unsigned int mmDIG0_HDMI_INFOFRAME_CONTROL1__SI = 0x1C12; +constexpr unsigned int mmDIG0_HDMI_STATUS__SI = 0x1C0D; +constexpr unsigned int mmDIG0_HDMI_VBI_PACKET_CONTROL__SI = 0x1C10; +constexpr unsigned int mmDIG0_LVDS_DATA_CNTL__SI = 0x1C8C; +constexpr unsigned int mmDIG0_TMDS_CNTL__SI = 0x1C7C; +constexpr unsigned int mmDIG0_TMDS_CONTROL0_FEEDBACK__SI = 0x1C7E; +constexpr unsigned int mmDIG0_TMDS_CONTROL_CHAR__SI = 0x1C7D; +constexpr unsigned int mmDIG0_TMDS_CTL0_1_GEN_CNTL__SI = 0x1C86; +constexpr unsigned int mmDIG0_TMDS_CTL2_3_GEN_CNTL__SI = 0x1C87; +constexpr unsigned int mmDIG0_TMDS_CTL_BITS__SI = 0x1C83; +constexpr unsigned int mmDIG0_TMDS_DCBALANCER_CONTROL__SI = 0x1C84; +constexpr unsigned int mmDIG0_TMDS_DEBUG__SI = 0x1C82; +constexpr unsigned int mmDIG0_TMDS_STEREOSYNC_CTL_SEL__SI = 0x1C7F; +constexpr unsigned int mmDIG0_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x1C80; +constexpr unsigned int mmDIG0_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x1C81; +constexpr unsigned int mmDIG1_AFMT_60958_0__SI = 0x1F41; +constexpr unsigned int mmDIG1_AFMT_60958_1__SI = 0x1F42; +constexpr unsigned int mmDIG1_AFMT_60958_2__SI = 0x1F48; +constexpr unsigned int mmDIG1_AFMT_AUDIO_CRC_CONTROL__SI = 0x1F43; +constexpr unsigned int mmDIG1_AFMT_AUDIO_CRC_RESULT__SI = 0x1F49; +constexpr unsigned int mmDIG1_AFMT_AUDIO_INFO0__SI = 0x1F3F; +constexpr unsigned int mmDIG1_AFMT_AUDIO_INFO1__SI = 0x1F40; +constexpr unsigned int mmDIG1_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x1F17; +constexpr unsigned int mmDIG1_AFMT_AUDIO_PACKET_CONTROL__SI = 0x1F4B; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO0__SI = 0x1F21; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO1__SI = 0x1F22; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO2__SI = 0x1F23; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO3__SI = 0x1F24; +constexpr unsigned int mmDIG1_AFMT_INFOFRAME_CONTROL0__SI = 0x1F4D; +constexpr unsigned int mmDIG1_AFMT_ISRC1_0__SI = 0x1F18; +constexpr unsigned int mmDIG1_AFMT_ISRC1_1__SI = 0x1F19; +constexpr unsigned int mmDIG1_AFMT_ISRC1_2__SI = 0x1F1A; +constexpr unsigned int mmDIG1_AFMT_ISRC1_3__SI = 0x1F1B; +constexpr unsigned int mmDIG1_AFMT_ISRC1_4__SI = 0x1F1C; +constexpr unsigned int mmDIG1_AFMT_ISRC2_0__SI = 0x1F1D; +constexpr unsigned int mmDIG1_AFMT_ISRC2_1__SI = 0x1F1E; +constexpr unsigned int mmDIG1_AFMT_ISRC2_2__SI = 0x1F1F; +constexpr unsigned int mmDIG1_AFMT_ISRC2_3__SI = 0x1F20; +constexpr unsigned int mmDIG1_AFMT_MPEG_INFO0__SI = 0x1F25; +constexpr unsigned int mmDIG1_AFMT_MPEG_INFO1__SI = 0x1F26; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL0__SI = 0x1F44; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL1__SI = 0x1F45; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL2__SI = 0x1F46; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL3__SI = 0x1F47; +constexpr unsigned int mmDIG1_AFMT_STATUS__SI = 0x1F4A; +constexpr unsigned int mmDIG1_AFMT_VBI_PACKET_CONTROL__SI = 0x1F4C; +constexpr unsigned int mmDIG1_DIG_CLOCK_PATTERN__SI = 0x1F03; +constexpr unsigned int mmDIG1_DIG_OUTPUT_CRC_CNTL__SI = 0x1F01; +constexpr unsigned int mmDIG1_DIG_OUTPUT_CRC_RESULT__SI = 0x1F02; +constexpr unsigned int mmDIG1_DIG_RANDOM_PATTERN_SEED__SI = 0x1F05; +constexpr unsigned int mmDIG1_DIG_TEST_PATTERN__SI = 0x1F04; +constexpr unsigned int mmDIG1_HDMI_ACR_32_0__SI = 0x1F37; +constexpr unsigned int mmDIG1_HDMI_ACR_32_1__SI = 0x1F38; +constexpr unsigned int mmDIG1_HDMI_ACR_44_0__SI = 0x1F39; +constexpr unsigned int mmDIG1_HDMI_ACR_44_1__SI = 0x1F3A; +constexpr unsigned int mmDIG1_HDMI_ACR_48_0__SI = 0x1F3B; +constexpr unsigned int mmDIG1_HDMI_ACR_48_1__SI = 0x1F3C; +constexpr unsigned int mmDIG1_HDMI_ACR_PACKET_CONTROL__SI = 0x1F0F; +constexpr unsigned int mmDIG1_HDMI_ACR_STATUS_0__SI = 0x1F3D; +constexpr unsigned int mmDIG1_HDMI_ACR_STATUS_1__SI = 0x1F3E; +constexpr unsigned int mmDIG1_HDMI_AUDIO_PACKET_CONTROL__SI = 0x1F0E; +constexpr unsigned int mmDIG1_HDMI_CONTROL__SI = 0x1F0C; +constexpr unsigned int mmDIG1_HDMI_GC__SI = 0x1F16; +constexpr unsigned int mmDIG1_HDMI_GENERIC_PACKET_CONTROL__SI = 0x1F13; +constexpr unsigned int mmDIG1_HDMI_INFOFRAME_CONTROL0__SI = 0x1F11; +constexpr unsigned int mmDIG1_HDMI_INFOFRAME_CONTROL1__SI = 0x1F12; +constexpr unsigned int mmDIG1_HDMI_STATUS__SI = 0x1F0D; +constexpr unsigned int mmDIG1_HDMI_VBI_PACKET_CONTROL__SI = 0x1F10; +constexpr unsigned int mmDIG1_LVDS_DATA_CNTL__SI = 0x1F8C; +constexpr unsigned int mmDIG1_TMDS_CNTL__SI = 0x1F7C; +constexpr unsigned int mmDIG1_TMDS_CONTROL0_FEEDBACK__SI = 0x1F7E; +constexpr unsigned int mmDIG1_TMDS_CONTROL_CHAR__SI = 0x1F7D; +constexpr unsigned int mmDIG1_TMDS_CTL0_1_GEN_CNTL__SI = 0x1F86; +constexpr unsigned int mmDIG1_TMDS_CTL2_3_GEN_CNTL__SI = 0x1F87; +constexpr unsigned int mmDIG1_TMDS_CTL_BITS__SI = 0x1F83; +constexpr unsigned int mmDIG1_TMDS_DCBALANCER_CONTROL__SI = 0x1F84; +constexpr unsigned int mmDIG1_TMDS_DEBUG__SI = 0x1F82; +constexpr unsigned int mmDIG1_TMDS_STEREOSYNC_CTL_SEL__SI = 0x1F7F; +constexpr unsigned int mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x1F80; +constexpr unsigned int mmDIG1_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x1F81; +constexpr unsigned int mmDIG2_AFMT_60958_0__SI = 0x4241; +constexpr unsigned int mmDIG2_AFMT_60958_1__SI = 0x4242; +constexpr unsigned int mmDIG2_AFMT_60958_2__SI = 0x4248; +constexpr unsigned int mmDIG2_AFMT_AUDIO_CRC_CONTROL__SI = 0x4243; +constexpr unsigned int mmDIG2_AFMT_AUDIO_CRC_RESULT__SI = 0x4249; +constexpr unsigned int mmDIG2_AFMT_AUDIO_INFO0__SI = 0x423F; +constexpr unsigned int mmDIG2_AFMT_AUDIO_INFO1__SI = 0x4240; +constexpr unsigned int mmDIG2_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x4217; +constexpr unsigned int mmDIG2_AFMT_AUDIO_PACKET_CONTROL__SI = 0x424B; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO0__SI = 0x4221; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO1__SI = 0x4222; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO2__SI = 0x4223; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO3__SI = 0x4224; +constexpr unsigned int mmDIG2_AFMT_INFOFRAME_CONTROL0__SI = 0x424D; +constexpr unsigned int mmDIG2_AFMT_ISRC1_0__SI = 0x4218; +constexpr unsigned int mmDIG2_AFMT_ISRC1_1__SI = 0x4219; +constexpr unsigned int mmDIG2_AFMT_ISRC1_2__SI = 0x421A; +constexpr unsigned int mmDIG2_AFMT_ISRC1_3__SI = 0x421B; +constexpr unsigned int mmDIG2_AFMT_ISRC1_4__SI = 0x421C; +constexpr unsigned int mmDIG2_AFMT_ISRC2_0__SI = 0x421D; +constexpr unsigned int mmDIG2_AFMT_ISRC2_1__SI = 0x421E; +constexpr unsigned int mmDIG2_AFMT_ISRC2_2__SI = 0x421F; +constexpr unsigned int mmDIG2_AFMT_ISRC2_3__SI = 0x4220; +constexpr unsigned int mmDIG2_AFMT_MPEG_INFO0__SI = 0x4225; +constexpr unsigned int mmDIG2_AFMT_MPEG_INFO1__SI = 0x4226; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL0__SI = 0x4244; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL1__SI = 0x4245; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL2__SI = 0x4246; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL3__SI = 0x4247; +constexpr unsigned int mmDIG2_AFMT_STATUS__SI = 0x424A; +constexpr unsigned int mmDIG2_AFMT_VBI_PACKET_CONTROL__SI = 0x424C; +constexpr unsigned int mmDIG2_DIG_CLOCK_PATTERN__SI = 0x4203; +constexpr unsigned int mmDIG2_DIG_OUTPUT_CRC_CNTL__SI = 0x4201; +constexpr unsigned int mmDIG2_DIG_OUTPUT_CRC_RESULT__SI = 0x4202; +constexpr unsigned int mmDIG2_DIG_RANDOM_PATTERN_SEED__SI = 0x4205; +constexpr unsigned int mmDIG2_DIG_TEST_PATTERN__SI = 0x4204; +constexpr unsigned int mmDIG2_HDMI_ACR_32_0__SI = 0x4237; +constexpr unsigned int mmDIG2_HDMI_ACR_32_1__SI = 0x4238; +constexpr unsigned int mmDIG2_HDMI_ACR_44_0__SI = 0x4239; +constexpr unsigned int mmDIG2_HDMI_ACR_44_1__SI = 0x423A; +constexpr unsigned int mmDIG2_HDMI_ACR_48_0__SI = 0x423B; +constexpr unsigned int mmDIG2_HDMI_ACR_48_1__SI = 0x423C; +constexpr unsigned int mmDIG2_HDMI_ACR_PACKET_CONTROL__SI = 0x420F; +constexpr unsigned int mmDIG2_HDMI_ACR_STATUS_0__SI = 0x423D; +constexpr unsigned int mmDIG2_HDMI_ACR_STATUS_1__SI = 0x423E; +constexpr unsigned int mmDIG2_HDMI_AUDIO_PACKET_CONTROL__SI = 0x420E; +constexpr unsigned int mmDIG2_HDMI_CONTROL__SI = 0x420C; +constexpr unsigned int mmDIG2_HDMI_GC__SI = 0x4216; +constexpr unsigned int mmDIG2_HDMI_GENERIC_PACKET_CONTROL__SI = 0x4213; +constexpr unsigned int mmDIG2_HDMI_INFOFRAME_CONTROL0__SI = 0x4211; +constexpr unsigned int mmDIG2_HDMI_INFOFRAME_CONTROL1__SI = 0x4212; +constexpr unsigned int mmDIG2_HDMI_STATUS__SI = 0x420D; +constexpr unsigned int mmDIG2_HDMI_VBI_PACKET_CONTROL__SI = 0x4210; +constexpr unsigned int mmDIG2_LVDS_DATA_CNTL__SI = 0x428C; +constexpr unsigned int mmDIG2_TMDS_CNTL__SI = 0x427C; +constexpr unsigned int mmDIG2_TMDS_CONTROL0_FEEDBACK__SI = 0x427E; +constexpr unsigned int mmDIG2_TMDS_CONTROL_CHAR__SI = 0x427D; +constexpr unsigned int mmDIG2_TMDS_CTL0_1_GEN_CNTL__SI = 0x4286; +constexpr unsigned int mmDIG2_TMDS_CTL2_3_GEN_CNTL__SI = 0x4287; +constexpr unsigned int mmDIG2_TMDS_CTL_BITS__SI = 0x4283; +constexpr unsigned int mmDIG2_TMDS_DCBALANCER_CONTROL__SI = 0x4284; +constexpr unsigned int mmDIG2_TMDS_DEBUG__SI = 0x4282; +constexpr unsigned int mmDIG2_TMDS_STEREOSYNC_CTL_SEL__SI = 0x427F; +constexpr unsigned int mmDIG2_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x4280; +constexpr unsigned int mmDIG2_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x4281; +constexpr unsigned int mmDIG3_AFMT_60958_0__SI = 0x4541; +constexpr unsigned int mmDIG3_AFMT_60958_1__SI = 0x4542; +constexpr unsigned int mmDIG3_AFMT_60958_2__SI = 0x4548; +constexpr unsigned int mmDIG3_AFMT_AUDIO_CRC_CONTROL__SI = 0x4543; +constexpr unsigned int mmDIG3_AFMT_AUDIO_CRC_RESULT__SI = 0x4549; +constexpr unsigned int mmDIG3_AFMT_AUDIO_INFO0__SI = 0x453F; +constexpr unsigned int mmDIG3_AFMT_AUDIO_INFO1__SI = 0x4540; +constexpr unsigned int mmDIG3_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x4517; +constexpr unsigned int mmDIG3_AFMT_AUDIO_PACKET_CONTROL__SI = 0x454B; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO0__SI = 0x4521; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO1__SI = 0x4522; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO2__SI = 0x4523; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO3__SI = 0x4524; +constexpr unsigned int mmDIG3_AFMT_INFOFRAME_CONTROL0__SI = 0x454D; +constexpr unsigned int mmDIG3_AFMT_ISRC1_0__SI = 0x4518; +constexpr unsigned int mmDIG3_AFMT_ISRC1_1__SI = 0x4519; +constexpr unsigned int mmDIG3_AFMT_ISRC1_2__SI = 0x451A; +constexpr unsigned int mmDIG3_AFMT_ISRC1_3__SI = 0x451B; +constexpr unsigned int mmDIG3_AFMT_ISRC1_4__SI = 0x451C; +constexpr unsigned int mmDIG3_AFMT_ISRC2_0__SI = 0x451D; +constexpr unsigned int mmDIG3_AFMT_ISRC2_1__SI = 0x451E; +constexpr unsigned int mmDIG3_AFMT_ISRC2_2__SI = 0x451F; +constexpr unsigned int mmDIG3_AFMT_ISRC2_3__SI = 0x4520; +constexpr unsigned int mmDIG3_AFMT_MPEG_INFO0__SI = 0x4525; +constexpr unsigned int mmDIG3_AFMT_MPEG_INFO1__SI = 0x4526; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL0__SI = 0x4544; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL1__SI = 0x4545; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL2__SI = 0x4546; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL3__SI = 0x4547; +constexpr unsigned int mmDIG3_AFMT_STATUS__SI = 0x454A; +constexpr unsigned int mmDIG3_AFMT_VBI_PACKET_CONTROL__SI = 0x454C; +constexpr unsigned int mmDIG3_DIG_CLOCK_PATTERN__SI = 0x4503; +constexpr unsigned int mmDIG3_DIG_OUTPUT_CRC_CNTL__SI = 0x4501; +constexpr unsigned int mmDIG3_DIG_OUTPUT_CRC_RESULT__SI = 0x4502; +constexpr unsigned int mmDIG3_DIG_RANDOM_PATTERN_SEED__SI = 0x4505; +constexpr unsigned int mmDIG3_DIG_TEST_PATTERN__SI = 0x4504; +constexpr unsigned int mmDIG3_HDMI_ACR_32_0__SI = 0x4537; +constexpr unsigned int mmDIG3_HDMI_ACR_32_1__SI = 0x4538; +constexpr unsigned int mmDIG3_HDMI_ACR_44_0__SI = 0x4539; +constexpr unsigned int mmDIG3_HDMI_ACR_44_1__SI = 0x453A; +constexpr unsigned int mmDIG3_HDMI_ACR_48_0__SI = 0x453B; +constexpr unsigned int mmDIG3_HDMI_ACR_48_1__SI = 0x453C; +constexpr unsigned int mmDIG3_HDMI_ACR_PACKET_CONTROL__SI = 0x450F; +constexpr unsigned int mmDIG3_HDMI_ACR_STATUS_0__SI = 0x453D; +constexpr unsigned int mmDIG3_HDMI_ACR_STATUS_1__SI = 0x453E; +constexpr unsigned int mmDIG3_HDMI_AUDIO_PACKET_CONTROL__SI = 0x450E; +constexpr unsigned int mmDIG3_HDMI_CONTROL__SI = 0x450C; +constexpr unsigned int mmDIG3_HDMI_GC__SI = 0x4516; +constexpr unsigned int mmDIG3_HDMI_GENERIC_PACKET_CONTROL__SI = 0x4513; +constexpr unsigned int mmDIG3_HDMI_INFOFRAME_CONTROL0__SI = 0x4511; +constexpr unsigned int mmDIG3_HDMI_INFOFRAME_CONTROL1__SI = 0x4512; +constexpr unsigned int mmDIG3_HDMI_STATUS__SI = 0x450D; +constexpr unsigned int mmDIG3_HDMI_VBI_PACKET_CONTROL__SI = 0x4510; +constexpr unsigned int mmDIG3_LVDS_DATA_CNTL__SI = 0x458C; +constexpr unsigned int mmDIG3_TMDS_CNTL__SI = 0x457C; +constexpr unsigned int mmDIG3_TMDS_CONTROL0_FEEDBACK__SI = 0x457E; +constexpr unsigned int mmDIG3_TMDS_CONTROL_CHAR__SI = 0x457D; +constexpr unsigned int mmDIG3_TMDS_CTL0_1_GEN_CNTL__SI = 0x4586; +constexpr unsigned int mmDIG3_TMDS_CTL2_3_GEN_CNTL__SI = 0x4587; +constexpr unsigned int mmDIG3_TMDS_CTL_BITS__SI = 0x4583; +constexpr unsigned int mmDIG3_TMDS_DCBALANCER_CONTROL__SI = 0x4584; +constexpr unsigned int mmDIG3_TMDS_DEBUG__SI = 0x4582; +constexpr unsigned int mmDIG3_TMDS_STEREOSYNC_CTL_SEL__SI = 0x457F; +constexpr unsigned int mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x4580; +constexpr unsigned int mmDIG3_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x4581; +constexpr unsigned int mmDIG4_AFMT_60958_0__SI = 0x4841; +constexpr unsigned int mmDIG4_AFMT_60958_1__SI = 0x4842; +constexpr unsigned int mmDIG4_AFMT_60958_2__SI = 0x4848; +constexpr unsigned int mmDIG4_AFMT_AUDIO_CRC_CONTROL__SI = 0x4843; +constexpr unsigned int mmDIG4_AFMT_AUDIO_CRC_RESULT__SI = 0x4849; +constexpr unsigned int mmDIG4_AFMT_AUDIO_INFO0__SI = 0x483F; +constexpr unsigned int mmDIG4_AFMT_AUDIO_INFO1__SI = 0x4840; +constexpr unsigned int mmDIG4_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x4817; +constexpr unsigned int mmDIG4_AFMT_AUDIO_PACKET_CONTROL__SI = 0x484B; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO0__SI = 0x4821; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO1__SI = 0x4822; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO2__SI = 0x4823; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO3__SI = 0x4824; +constexpr unsigned int mmDIG4_AFMT_INFOFRAME_CONTROL0__SI = 0x484D; +constexpr unsigned int mmDIG4_AFMT_ISRC1_0__SI = 0x4818; +constexpr unsigned int mmDIG4_AFMT_ISRC1_1__SI = 0x4819; +constexpr unsigned int mmDIG4_AFMT_ISRC1_2__SI = 0x481A; +constexpr unsigned int mmDIG4_AFMT_ISRC1_3__SI = 0x481B; +constexpr unsigned int mmDIG4_AFMT_ISRC1_4__SI = 0x481C; +constexpr unsigned int mmDIG4_AFMT_ISRC2_0__SI = 0x481D; +constexpr unsigned int mmDIG4_AFMT_ISRC2_1__SI = 0x481E; +constexpr unsigned int mmDIG4_AFMT_ISRC2_2__SI = 0x481F; +constexpr unsigned int mmDIG4_AFMT_ISRC2_3__SI = 0x4820; +constexpr unsigned int mmDIG4_AFMT_MPEG_INFO0__SI = 0x4825; +constexpr unsigned int mmDIG4_AFMT_MPEG_INFO1__SI = 0x4826; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL0__SI = 0x4844; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL1__SI = 0x4845; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL2__SI = 0x4846; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL3__SI = 0x4847; +constexpr unsigned int mmDIG4_AFMT_STATUS__SI = 0x484A; +constexpr unsigned int mmDIG4_AFMT_VBI_PACKET_CONTROL__SI = 0x484C; +constexpr unsigned int mmDIG4_DIG_CLOCK_PATTERN__SI = 0x4803; +constexpr unsigned int mmDIG4_DIG_OUTPUT_CRC_CNTL__SI = 0x4801; +constexpr unsigned int mmDIG4_DIG_OUTPUT_CRC_RESULT__SI = 0x4802; +constexpr unsigned int mmDIG4_DIG_RANDOM_PATTERN_SEED__SI = 0x4805; +constexpr unsigned int mmDIG4_DIG_TEST_PATTERN__SI = 0x4804; +constexpr unsigned int mmDIG4_HDMI_ACR_32_0__SI = 0x4837; +constexpr unsigned int mmDIG4_HDMI_ACR_32_1__SI = 0x4838; +constexpr unsigned int mmDIG4_HDMI_ACR_44_0__SI = 0x4839; +constexpr unsigned int mmDIG4_HDMI_ACR_44_1__SI = 0x483A; +constexpr unsigned int mmDIG4_HDMI_ACR_48_0__SI = 0x483B; +constexpr unsigned int mmDIG4_HDMI_ACR_48_1__SI = 0x483C; +constexpr unsigned int mmDIG4_HDMI_ACR_PACKET_CONTROL__SI = 0x480F; +constexpr unsigned int mmDIG4_HDMI_ACR_STATUS_0__SI = 0x483D; +constexpr unsigned int mmDIG4_HDMI_ACR_STATUS_1__SI = 0x483E; +constexpr unsigned int mmDIG4_HDMI_AUDIO_PACKET_CONTROL__SI = 0x480E; +constexpr unsigned int mmDIG4_HDMI_CONTROL__SI = 0x480C; +constexpr unsigned int mmDIG4_HDMI_GC__SI = 0x4816; +constexpr unsigned int mmDIG4_HDMI_GENERIC_PACKET_CONTROL__SI = 0x4813; +constexpr unsigned int mmDIG4_HDMI_INFOFRAME_CONTROL0__SI = 0x4811; +constexpr unsigned int mmDIG4_HDMI_INFOFRAME_CONTROL1__SI = 0x4812; +constexpr unsigned int mmDIG4_HDMI_STATUS__SI = 0x480D; +constexpr unsigned int mmDIG4_HDMI_VBI_PACKET_CONTROL__SI = 0x4810; +constexpr unsigned int mmDIG4_LVDS_DATA_CNTL__SI = 0x488C; +constexpr unsigned int mmDIG4_TMDS_CNTL__SI = 0x487C; +constexpr unsigned int mmDIG4_TMDS_CONTROL0_FEEDBACK__SI = 0x487E; +constexpr unsigned int mmDIG4_TMDS_CONTROL_CHAR__SI = 0x487D; +constexpr unsigned int mmDIG4_TMDS_CTL0_1_GEN_CNTL__SI = 0x4886; +constexpr unsigned int mmDIG4_TMDS_CTL2_3_GEN_CNTL__SI = 0x4887; +constexpr unsigned int mmDIG4_TMDS_CTL_BITS__SI = 0x4883; +constexpr unsigned int mmDIG4_TMDS_DCBALANCER_CONTROL__SI = 0x4884; +constexpr unsigned int mmDIG4_TMDS_DEBUG__SI = 0x4882; +constexpr unsigned int mmDIG4_TMDS_STEREOSYNC_CTL_SEL__SI = 0x487F; +constexpr unsigned int mmDIG4_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x4880; +constexpr unsigned int mmDIG4_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x4881; +constexpr unsigned int mmDIG5_AFMT_60958_0__SI = 0x4B41; +constexpr unsigned int mmDIG5_AFMT_60958_1__SI = 0x4B42; +constexpr unsigned int mmDIG5_AFMT_60958_2__SI = 0x4B48; +constexpr unsigned int mmDIG5_AFMT_AUDIO_CRC_CONTROL__SI = 0x4B43; +constexpr unsigned int mmDIG5_AFMT_AUDIO_CRC_RESULT__SI = 0x4B49; +constexpr unsigned int mmDIG5_AFMT_AUDIO_INFO0__SI = 0x4B3F; +constexpr unsigned int mmDIG5_AFMT_AUDIO_INFO1__SI = 0x4B40; +constexpr unsigned int mmDIG5_AFMT_AUDIO_PACKET_CONTROL2__SI = 0x4B17; +constexpr unsigned int mmDIG5_AFMT_AUDIO_PACKET_CONTROL__SI = 0x4B4B; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO0__SI = 0x4B21; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO1__SI = 0x4B22; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO2__SI = 0x4B23; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO3__SI = 0x4B24; +constexpr unsigned int mmDIG5_AFMT_INFOFRAME_CONTROL0__SI = 0x4B4D; +constexpr unsigned int mmDIG5_AFMT_ISRC1_0__SI = 0x4B18; +constexpr unsigned int mmDIG5_AFMT_ISRC1_1__SI = 0x4B19; +constexpr unsigned int mmDIG5_AFMT_ISRC1_2__SI = 0x4B1A; +constexpr unsigned int mmDIG5_AFMT_ISRC1_3__SI = 0x4B1B; +constexpr unsigned int mmDIG5_AFMT_ISRC1_4__SI = 0x4B1C; +constexpr unsigned int mmDIG5_AFMT_ISRC2_0__SI = 0x4B1D; +constexpr unsigned int mmDIG5_AFMT_ISRC2_1__SI = 0x4B1E; +constexpr unsigned int mmDIG5_AFMT_ISRC2_2__SI = 0x4B1F; +constexpr unsigned int mmDIG5_AFMT_ISRC2_3__SI = 0x4B20; +constexpr unsigned int mmDIG5_AFMT_MPEG_INFO0__SI = 0x4B25; +constexpr unsigned int mmDIG5_AFMT_MPEG_INFO1__SI = 0x4B26; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL0__SI = 0x4B44; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL1__SI = 0x4B45; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL2__SI = 0x4B46; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL3__SI = 0x4B47; +constexpr unsigned int mmDIG5_AFMT_STATUS__SI = 0x4B4A; +constexpr unsigned int mmDIG5_AFMT_VBI_PACKET_CONTROL__SI = 0x4B4C; +constexpr unsigned int mmDIG5_DIG_CLOCK_PATTERN__SI = 0x4B03; +constexpr unsigned int mmDIG5_DIG_OUTPUT_CRC_CNTL__SI = 0x4B01; +constexpr unsigned int mmDIG5_DIG_OUTPUT_CRC_RESULT__SI = 0x4B02; +constexpr unsigned int mmDIG5_DIG_RANDOM_PATTERN_SEED__SI = 0x4B05; +constexpr unsigned int mmDIG5_DIG_TEST_PATTERN__SI = 0x4B04; +constexpr unsigned int mmDIG5_HDMI_ACR_32_0__SI = 0x4B37; +constexpr unsigned int mmDIG5_HDMI_ACR_32_1__SI = 0x4B38; +constexpr unsigned int mmDIG5_HDMI_ACR_44_0__SI = 0x4B39; +constexpr unsigned int mmDIG5_HDMI_ACR_44_1__SI = 0x4B3A; +constexpr unsigned int mmDIG5_HDMI_ACR_48_0__SI = 0x4B3B; +constexpr unsigned int mmDIG5_HDMI_ACR_48_1__SI = 0x4B3C; +constexpr unsigned int mmDIG5_HDMI_ACR_PACKET_CONTROL__SI = 0x4B0F; +constexpr unsigned int mmDIG5_HDMI_ACR_STATUS_0__SI = 0x4B3D; +constexpr unsigned int mmDIG5_HDMI_ACR_STATUS_1__SI = 0x4B3E; +constexpr unsigned int mmDIG5_HDMI_AUDIO_PACKET_CONTROL__SI = 0x4B0E; +constexpr unsigned int mmDIG5_HDMI_CONTROL__SI = 0x4B0C; +constexpr unsigned int mmDIG5_HDMI_GC__SI = 0x4B16; +constexpr unsigned int mmDIG5_HDMI_GENERIC_PACKET_CONTROL__SI = 0x4B13; +constexpr unsigned int mmDIG5_HDMI_INFOFRAME_CONTROL0__SI = 0x4B11; +constexpr unsigned int mmDIG5_HDMI_INFOFRAME_CONTROL1__SI = 0x4B12; +constexpr unsigned int mmDIG5_HDMI_STATUS__SI = 0x4B0D; +constexpr unsigned int mmDIG5_HDMI_VBI_PACKET_CONTROL__SI = 0x4B10; +constexpr unsigned int mmDIG5_LVDS_DATA_CNTL__SI = 0x4B8C; +constexpr unsigned int mmDIG5_TMDS_CNTL__SI = 0x4B7C; +constexpr unsigned int mmDIG5_TMDS_CONTROL0_FEEDBACK__SI = 0x4B7E; +constexpr unsigned int mmDIG5_TMDS_CONTROL_CHAR__SI = 0x4B7D; +constexpr unsigned int mmDIG5_TMDS_CTL0_1_GEN_CNTL__SI = 0x4B86; +constexpr unsigned int mmDIG5_TMDS_CTL2_3_GEN_CNTL__SI = 0x4B87; +constexpr unsigned int mmDIG5_TMDS_CTL_BITS__SI = 0x4B83; +constexpr unsigned int mmDIG5_TMDS_DCBALANCER_CONTROL__SI = 0x4B84; +constexpr unsigned int mmDIG5_TMDS_DEBUG__SI = 0x4B82; +constexpr unsigned int mmDIG5_TMDS_STEREOSYNC_CTL_SEL__SI = 0x4B7F; +constexpr unsigned int mmDIG5_TMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x4B80; +constexpr unsigned int mmDIG5_TMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x4B81; +constexpr unsigned int mmDIG_CLOCK_PATTERN__SI = 0x1C03; +constexpr unsigned int mmDIG_OUTPUT_CRC_CNTL__SI = 0x1C01; +constexpr unsigned int mmDIG_OUTPUT_CRC_RESULT__SI = 0x1C02; +constexpr unsigned int mmDIG_RANDOM_PATTERN_SEED__SI = 0x1C05; +constexpr unsigned int mmDIG_TEST_PATTERN__SI = 0x1C04; +constexpr unsigned int mmDISPCLK_CGTT_BLK_CTRL_REG__SI = 0x0128; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE2__SI = 0x183F; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE__SI = 0x183E; +constexpr unsigned int mmDISP_INTERRUPT_STATUS__SI = 0x183D; +constexpr unsigned int mmDISP_TIMER_CONTROL__SI = 0x1842; +constexpr unsigned int mmDLL_CNTL__SI__CI = 0x0AE9; +constexpr unsigned int mmDMCU_CTRL__SI__VI = 0x1600; +constexpr unsigned int mmDMCU_ERAM_RD_CTRL__SI__VI = 0x160B; +constexpr unsigned int mmDMCU_ERAM_RD_DATA__SI__VI = 0x160C; +constexpr unsigned int mmDMCU_ERAM_WR_CTRL__SI__VI = 0x1609; +constexpr unsigned int mmDMCU_ERAM_WR_DATA__SI__VI = 0x160A; +constexpr unsigned int mmDMCU_EVENT_TRIGGER__SI__VI = 0x1611; +constexpr unsigned int mmDMCU_FW_CHECKSUM_SMPL_BYTE_POS__SI__VI = 0x161A; +constexpr unsigned int mmDMCU_FW_CS_HI__SI__VI = 0x1606; +constexpr unsigned int mmDMCU_FW_CS_LO__SI__VI = 0x1607; +constexpr unsigned int mmDMCU_FW_END_ADDR__SI__VI = 0x1604; +constexpr unsigned int mmDMCU_FW_ISR_START_ADDR__SI__VI = 0x1605; +constexpr unsigned int mmDMCU_FW_START_ADDR__SI__VI = 0x1603; +constexpr unsigned int mmDMCU_INTERRUPT_STATUS__SI__VI = 0x1614; +constexpr unsigned int mmDMCU_INTERRUPT_TO_HOST_EN_MASK__SI__VI = 0x1615; +constexpr unsigned int mmDMCU_INTERRUPT_TO_UC_EN_MASK__SI__VI = 0x1616; +constexpr unsigned int mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL__SI__VI = 0x1617; +constexpr unsigned int mmDMCU_INT_CNT__SI__VI = 0x1619; +constexpr unsigned int mmDMCU_IRAM_RD_CTRL__SI__VI = 0x160F; +constexpr unsigned int mmDMCU_IRAM_RD_DATA__SI__VI = 0x1610; +constexpr unsigned int mmDMCU_IRAM_WR_CTRL__SI__VI = 0x160D; +constexpr unsigned int mmDMCU_IRAM_WR_DATA__SI__VI = 0x160E; +constexpr unsigned int mmDMCU_PC_START_ADDR__SI__VI = 0x1602; +constexpr unsigned int mmDMCU_RAM_ACCESS_CTRL__SI__VI = 0x1608; +constexpr unsigned int mmDMCU_STATUS__SI__VI = 0x1601; +constexpr unsigned int mmDMCU_TEST_DEBUG_DATA__SI__VI = 0x1627; +constexpr unsigned int mmDMCU_TEST_DEBUG_INDEX__SI__VI = 0x1626; +constexpr unsigned int mmDMCU_UC_INTERNAL_INT_STATUS__SI__VI = 0x1612; +constexpr unsigned int mmDMIF_ARBITRATION_CONTROL__SI__VI = 0x02F9; +constexpr unsigned int mmDMIF_CONTROL__SI__VI = 0x02F6; +constexpr unsigned int mmDMIF_HW_DEBUG__SI__VI = 0x02F8; +constexpr unsigned int mmDMIF_STATUS__SI__VI = 0x02F7; +constexpr unsigned int mmDMIF_TEST_DEBUG_DATA__SI = 0x0313; +constexpr unsigned int mmDMIF_TEST_DEBUG_INDEX__SI = 0x0312; +constexpr unsigned int mmDOUT_POWER_MANAGEMENT_CNTL__SI = 0x1841; +constexpr unsigned int mmDOUT_SCRATCH0__SI = 0x1844; +constexpr unsigned int mmDOUT_SCRATCH1__SI = 0x1845; +constexpr unsigned int mmDOUT_SCRATCH2__SI = 0x1846; +constexpr unsigned int mmDOUT_SCRATCH3__SI = 0x1847; +constexpr unsigned int mmDOUT_SCRATCH4__SI = 0x1848; +constexpr unsigned int mmDOUT_SCRATCH5__SI = 0x1849; +constexpr unsigned int mmDOUT_SCRATCH6__SI = 0x184A; +constexpr unsigned int mmDOUT_SCRATCH7__SI = 0x184B; +constexpr unsigned int mmDOUT_TEST_DEBUG_DATA__SI = 0x184E; +constexpr unsigned int mmDOUT_TEST_DEBUG_INDEX__SI = 0x184D; +constexpr unsigned int mmDP0_DP_CONFIG__SI = 0x1CC2; +constexpr unsigned int mmDP0_DP_DPHY_8B10B_CNTL__SI = 0x1CD3; +constexpr unsigned int mmDP0_DP_DPHY_CNTL__SI = 0x1CD0; +constexpr unsigned int mmDP0_DP_DPHY_CRC_CNTL__SI = 0x1CD7; +constexpr unsigned int mmDP0_DP_DPHY_CRC_EN__SI = 0x1CD6; +constexpr unsigned int mmDP0_DP_DPHY_CRC_RESULT__SI = 0x1CD8; +constexpr unsigned int mmDP0_DP_DPHY_FAST_TRAINING__SI = 0x1CCE; +constexpr unsigned int mmDP0_DP_DPHY_PRBS_CNTL__SI = 0x1CD4; +constexpr unsigned int mmDP0_DP_DPHY_SYM__SI = 0x1CD2; +constexpr unsigned int mmDP0_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x1CD1; +constexpr unsigned int mmDP0_DP_LINK_CNTL__SI = 0x1CC0; +constexpr unsigned int mmDP0_DP_PIXEL_FORMAT__SI = 0x1CC1; +constexpr unsigned int mmDP0_DP_SEC_AUD_M_READBACK__SI = 0x1CA8; +constexpr unsigned int mmDP0_DP_SEC_AUD_M__SI = 0x1CA7; +constexpr unsigned int mmDP0_DP_SEC_AUD_N_READBACK__SI = 0x1CA6; +constexpr unsigned int mmDP0_DP_SEC_AUD_N__SI = 0x1CA5; +constexpr unsigned int mmDP0_DP_SEC_CNTL__SI = 0x1CA0; +constexpr unsigned int mmDP0_DP_SEC_FRAMING1__SI = 0x1CA1; +constexpr unsigned int mmDP0_DP_SEC_FRAMING2__SI = 0x1CA2; +constexpr unsigned int mmDP0_DP_SEC_FRAMING3__SI = 0x1CA3; +constexpr unsigned int mmDP0_DP_SEC_FRAMING4__SI = 0x1CA4; +constexpr unsigned int mmDP0_DP_SEC_PACKET_CNTL__SI = 0x1CAA; +constexpr unsigned int mmDP0_DP_SEC_TIMESTAMP__SI = 0x1CA9; +constexpr unsigned int mmDP0_DP_STEER_FIFO__SI = 0x1CC4; +constexpr unsigned int mmDP0_DP_TEST_DEBUG_DATA__SI = 0x1CFD; +constexpr unsigned int mmDP0_DP_TEST_DEBUG_INDEX__SI = 0x1CFC; +constexpr unsigned int mmDP0_DP_VID_INTERRUPT_CNTL__SI = 0x1CCF; +constexpr unsigned int mmDP0_DP_VID_MSA_VBID__SI = 0x1CCD; +constexpr unsigned int mmDP0_DP_VID_M__SI = 0x1CCB; +constexpr unsigned int mmDP0_DP_VID_N__SI = 0x1CCA; +constexpr unsigned int mmDP0_DP_VID_STREAM_CNTL__SI = 0x1CC3; +constexpr unsigned int mmDP0_DP_VID_TIMING__SI = 0x1CC9; +constexpr unsigned int mmDP1_DP_CONFIG__SI = 0x1FC2; +constexpr unsigned int mmDP1_DP_DPHY_8B10B_CNTL__SI = 0x1FD3; +constexpr unsigned int mmDP1_DP_DPHY_CNTL__SI = 0x1FD0; +constexpr unsigned int mmDP1_DP_DPHY_CRC_CNTL__SI = 0x1FD7; +constexpr unsigned int mmDP1_DP_DPHY_CRC_EN__SI = 0x1FD6; +constexpr unsigned int mmDP1_DP_DPHY_CRC_RESULT__SI = 0x1FD8; +constexpr unsigned int mmDP1_DP_DPHY_FAST_TRAINING__SI = 0x1FCE; +constexpr unsigned int mmDP1_DP_DPHY_PRBS_CNTL__SI = 0x1FD4; +constexpr unsigned int mmDP1_DP_DPHY_SYM__SI = 0x1FD2; +constexpr unsigned int mmDP1_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x1FD1; +constexpr unsigned int mmDP1_DP_LINK_CNTL__SI = 0x1FC0; +constexpr unsigned int mmDP1_DP_PIXEL_FORMAT__SI = 0x1FC1; +constexpr unsigned int mmDP1_DP_SEC_AUD_M_READBACK__SI = 0x1FA8; +constexpr unsigned int mmDP1_DP_SEC_AUD_M__SI = 0x1FA7; +constexpr unsigned int mmDP1_DP_SEC_AUD_N_READBACK__SI = 0x1FA6; +constexpr unsigned int mmDP1_DP_SEC_AUD_N__SI = 0x1FA5; +constexpr unsigned int mmDP1_DP_SEC_CNTL__SI = 0x1FA0; +constexpr unsigned int mmDP1_DP_SEC_FRAMING1__SI = 0x1FA1; +constexpr unsigned int mmDP1_DP_SEC_FRAMING2__SI = 0x1FA2; +constexpr unsigned int mmDP1_DP_SEC_FRAMING3__SI = 0x1FA3; +constexpr unsigned int mmDP1_DP_SEC_FRAMING4__SI = 0x1FA4; +constexpr unsigned int mmDP1_DP_SEC_PACKET_CNTL__SI = 0x1FAA; +constexpr unsigned int mmDP1_DP_SEC_TIMESTAMP__SI = 0x1FA9; +constexpr unsigned int mmDP1_DP_STEER_FIFO__SI = 0x1FC4; +constexpr unsigned int mmDP1_DP_TEST_DEBUG_DATA__SI = 0x1FFD; +constexpr unsigned int mmDP1_DP_TEST_DEBUG_INDEX__SI = 0x1FFC; +constexpr unsigned int mmDP1_DP_VID_INTERRUPT_CNTL__SI = 0x1FCF; +constexpr unsigned int mmDP1_DP_VID_MSA_VBID__SI = 0x1FCD; +constexpr unsigned int mmDP1_DP_VID_M__SI = 0x1FCB; +constexpr unsigned int mmDP1_DP_VID_N__SI = 0x1FCA; +constexpr unsigned int mmDP1_DP_VID_STREAM_CNTL__SI = 0x1FC3; +constexpr unsigned int mmDP1_DP_VID_TIMING__SI = 0x1FC9; +constexpr unsigned int mmDP2_DP_CONFIG__SI = 0x42C2; +constexpr unsigned int mmDP2_DP_DPHY_8B10B_CNTL__SI = 0x42D3; +constexpr unsigned int mmDP2_DP_DPHY_CNTL__SI = 0x42D0; +constexpr unsigned int mmDP2_DP_DPHY_CRC_CNTL__SI = 0x42D7; +constexpr unsigned int mmDP2_DP_DPHY_CRC_EN__SI = 0x42D6; +constexpr unsigned int mmDP2_DP_DPHY_CRC_RESULT__SI = 0x42D8; +constexpr unsigned int mmDP2_DP_DPHY_FAST_TRAINING__SI = 0x42CE; +constexpr unsigned int mmDP2_DP_DPHY_PRBS_CNTL__SI = 0x42D4; +constexpr unsigned int mmDP2_DP_DPHY_SYM__SI = 0x42D2; +constexpr unsigned int mmDP2_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x42D1; +constexpr unsigned int mmDP2_DP_LINK_CNTL__SI = 0x42C0; +constexpr unsigned int mmDP2_DP_PIXEL_FORMAT__SI = 0x42C1; +constexpr unsigned int mmDP2_DP_SEC_AUD_M_READBACK__SI = 0x42A8; +constexpr unsigned int mmDP2_DP_SEC_AUD_M__SI = 0x42A7; +constexpr unsigned int mmDP2_DP_SEC_AUD_N_READBACK__SI = 0x42A6; +constexpr unsigned int mmDP2_DP_SEC_AUD_N__SI = 0x42A5; +constexpr unsigned int mmDP2_DP_SEC_CNTL__SI = 0x42A0; +constexpr unsigned int mmDP2_DP_SEC_FRAMING1__SI = 0x42A1; +constexpr unsigned int mmDP2_DP_SEC_FRAMING2__SI = 0x42A2; +constexpr unsigned int mmDP2_DP_SEC_FRAMING3__SI = 0x42A3; +constexpr unsigned int mmDP2_DP_SEC_FRAMING4__SI = 0x42A4; +constexpr unsigned int mmDP2_DP_SEC_PACKET_CNTL__SI = 0x42AA; +constexpr unsigned int mmDP2_DP_SEC_TIMESTAMP__SI = 0x42A9; +constexpr unsigned int mmDP2_DP_STEER_FIFO__SI = 0x42C4; +constexpr unsigned int mmDP2_DP_TEST_DEBUG_DATA__SI = 0x42FD; +constexpr unsigned int mmDP2_DP_TEST_DEBUG_INDEX__SI = 0x42FC; +constexpr unsigned int mmDP2_DP_VID_INTERRUPT_CNTL__SI = 0x42CF; +constexpr unsigned int mmDP2_DP_VID_MSA_VBID__SI = 0x42CD; +constexpr unsigned int mmDP2_DP_VID_M__SI = 0x42CB; +constexpr unsigned int mmDP2_DP_VID_N__SI = 0x42CA; +constexpr unsigned int mmDP2_DP_VID_STREAM_CNTL__SI = 0x42C3; +constexpr unsigned int mmDP2_DP_VID_TIMING__SI = 0x42C9; +constexpr unsigned int mmDP3_DP_CONFIG__SI = 0x45C2; +constexpr unsigned int mmDP3_DP_DPHY_8B10B_CNTL__SI = 0x45D3; +constexpr unsigned int mmDP3_DP_DPHY_CNTL__SI = 0x45D0; +constexpr unsigned int mmDP3_DP_DPHY_CRC_CNTL__SI = 0x45D7; +constexpr unsigned int mmDP3_DP_DPHY_CRC_EN__SI = 0x45D6; +constexpr unsigned int mmDP3_DP_DPHY_CRC_RESULT__SI = 0x45D8; +constexpr unsigned int mmDP3_DP_DPHY_FAST_TRAINING__SI = 0x45CE; +constexpr unsigned int mmDP3_DP_DPHY_PRBS_CNTL__SI = 0x45D4; +constexpr unsigned int mmDP3_DP_DPHY_SYM__SI = 0x45D2; +constexpr unsigned int mmDP3_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x45D1; +constexpr unsigned int mmDP3_DP_LINK_CNTL__SI = 0x45C0; +constexpr unsigned int mmDP3_DP_PIXEL_FORMAT__SI = 0x45C1; +constexpr unsigned int mmDP3_DP_SEC_AUD_M_READBACK__SI = 0x45A8; +constexpr unsigned int mmDP3_DP_SEC_AUD_M__SI = 0x45A7; +constexpr unsigned int mmDP3_DP_SEC_AUD_N_READBACK__SI = 0x45A6; +constexpr unsigned int mmDP3_DP_SEC_AUD_N__SI = 0x45A5; +constexpr unsigned int mmDP3_DP_SEC_CNTL__SI = 0x45A0; +constexpr unsigned int mmDP3_DP_SEC_FRAMING1__SI = 0x45A1; +constexpr unsigned int mmDP3_DP_SEC_FRAMING2__SI = 0x45A2; +constexpr unsigned int mmDP3_DP_SEC_FRAMING3__SI = 0x45A3; +constexpr unsigned int mmDP3_DP_SEC_FRAMING4__SI = 0x45A4; +constexpr unsigned int mmDP3_DP_SEC_PACKET_CNTL__SI = 0x45AA; +constexpr unsigned int mmDP3_DP_SEC_TIMESTAMP__SI = 0x45A9; +constexpr unsigned int mmDP3_DP_STEER_FIFO__SI = 0x45C4; +constexpr unsigned int mmDP3_DP_TEST_DEBUG_DATA__SI = 0x45FD; +constexpr unsigned int mmDP3_DP_TEST_DEBUG_INDEX__SI = 0x45FC; +constexpr unsigned int mmDP3_DP_VID_INTERRUPT_CNTL__SI = 0x45CF; +constexpr unsigned int mmDP3_DP_VID_MSA_VBID__SI = 0x45CD; +constexpr unsigned int mmDP3_DP_VID_M__SI = 0x45CB; +constexpr unsigned int mmDP3_DP_VID_N__SI = 0x45CA; +constexpr unsigned int mmDP3_DP_VID_STREAM_CNTL__SI = 0x45C3; +constexpr unsigned int mmDP3_DP_VID_TIMING__SI = 0x45C9; +constexpr unsigned int mmDP4_DP_CONFIG__SI = 0x48C2; +constexpr unsigned int mmDP4_DP_DPHY_8B10B_CNTL__SI = 0x48D3; +constexpr unsigned int mmDP4_DP_DPHY_CNTL__SI = 0x48D0; +constexpr unsigned int mmDP4_DP_DPHY_CRC_CNTL__SI = 0x48D7; +constexpr unsigned int mmDP4_DP_DPHY_CRC_EN__SI = 0x48D6; +constexpr unsigned int mmDP4_DP_DPHY_CRC_RESULT__SI = 0x48D8; +constexpr unsigned int mmDP4_DP_DPHY_FAST_TRAINING__SI = 0x48CE; +constexpr unsigned int mmDP4_DP_DPHY_PRBS_CNTL__SI = 0x48D4; +constexpr unsigned int mmDP4_DP_DPHY_SYM__SI = 0x48D2; +constexpr unsigned int mmDP4_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x48D1; +constexpr unsigned int mmDP4_DP_LINK_CNTL__SI = 0x48C0; +constexpr unsigned int mmDP4_DP_PIXEL_FORMAT__SI = 0x48C1; +constexpr unsigned int mmDP4_DP_SEC_AUD_M_READBACK__SI = 0x48A8; +constexpr unsigned int mmDP4_DP_SEC_AUD_M__SI = 0x48A7; +constexpr unsigned int mmDP4_DP_SEC_AUD_N_READBACK__SI = 0x48A6; +constexpr unsigned int mmDP4_DP_SEC_AUD_N__SI = 0x48A5; +constexpr unsigned int mmDP4_DP_SEC_CNTL__SI = 0x48A0; +constexpr unsigned int mmDP4_DP_SEC_FRAMING1__SI = 0x48A1; +constexpr unsigned int mmDP4_DP_SEC_FRAMING2__SI = 0x48A2; +constexpr unsigned int mmDP4_DP_SEC_FRAMING3__SI = 0x48A3; +constexpr unsigned int mmDP4_DP_SEC_FRAMING4__SI = 0x48A4; +constexpr unsigned int mmDP4_DP_SEC_PACKET_CNTL__SI = 0x48AA; +constexpr unsigned int mmDP4_DP_SEC_TIMESTAMP__SI = 0x48A9; +constexpr unsigned int mmDP4_DP_STEER_FIFO__SI = 0x48C4; +constexpr unsigned int mmDP4_DP_TEST_DEBUG_DATA__SI = 0x48FD; +constexpr unsigned int mmDP4_DP_TEST_DEBUG_INDEX__SI = 0x48FC; +constexpr unsigned int mmDP4_DP_VID_INTERRUPT_CNTL__SI = 0x48CF; +constexpr unsigned int mmDP4_DP_VID_MSA_VBID__SI = 0x48CD; +constexpr unsigned int mmDP4_DP_VID_M__SI = 0x48CB; +constexpr unsigned int mmDP4_DP_VID_N__SI = 0x48CA; +constexpr unsigned int mmDP4_DP_VID_STREAM_CNTL__SI = 0x48C3; +constexpr unsigned int mmDP4_DP_VID_TIMING__SI = 0x48C9; +constexpr unsigned int mmDP5_DP_CONFIG__SI = 0x4BC2; +constexpr unsigned int mmDP5_DP_DPHY_8B10B_CNTL__SI = 0x4BD3; +constexpr unsigned int mmDP5_DP_DPHY_CNTL__SI = 0x4BD0; +constexpr unsigned int mmDP5_DP_DPHY_CRC_CNTL__SI = 0x4BD7; +constexpr unsigned int mmDP5_DP_DPHY_CRC_EN__SI = 0x4BD6; +constexpr unsigned int mmDP5_DP_DPHY_CRC_RESULT__SI = 0x4BD8; +constexpr unsigned int mmDP5_DP_DPHY_FAST_TRAINING__SI = 0x4BCE; +constexpr unsigned int mmDP5_DP_DPHY_PRBS_CNTL__SI = 0x4BD4; +constexpr unsigned int mmDP5_DP_DPHY_SYM__SI = 0x4BD2; +constexpr unsigned int mmDP5_DP_DPHY_TRAINING_PATTERN_SEL__SI = 0x4BD1; +constexpr unsigned int mmDP5_DP_LINK_CNTL__SI = 0x4BC0; +constexpr unsigned int mmDP5_DP_PIXEL_FORMAT__SI = 0x4BC1; +constexpr unsigned int mmDP5_DP_SEC_AUD_M_READBACK__SI = 0x4BA8; +constexpr unsigned int mmDP5_DP_SEC_AUD_M__SI = 0x4BA7; +constexpr unsigned int mmDP5_DP_SEC_AUD_N_READBACK__SI = 0x4BA6; +constexpr unsigned int mmDP5_DP_SEC_AUD_N__SI = 0x4BA5; +constexpr unsigned int mmDP5_DP_SEC_CNTL__SI = 0x4BA0; +constexpr unsigned int mmDP5_DP_SEC_FRAMING1__SI = 0x4BA1; +constexpr unsigned int mmDP5_DP_SEC_FRAMING2__SI = 0x4BA2; +constexpr unsigned int mmDP5_DP_SEC_FRAMING3__SI = 0x4BA3; +constexpr unsigned int mmDP5_DP_SEC_FRAMING4__SI = 0x4BA4; +constexpr unsigned int mmDP5_DP_SEC_PACKET_CNTL__SI = 0x4BAA; +constexpr unsigned int mmDP5_DP_SEC_TIMESTAMP__SI = 0x4BA9; +constexpr unsigned int mmDP5_DP_STEER_FIFO__SI = 0x4BC4; +constexpr unsigned int mmDP5_DP_TEST_DEBUG_DATA__SI = 0x4BFD; +constexpr unsigned int mmDP5_DP_TEST_DEBUG_INDEX__SI = 0x4BFC; +constexpr unsigned int mmDP5_DP_VID_INTERRUPT_CNTL__SI = 0x4BCF; +constexpr unsigned int mmDP5_DP_VID_MSA_VBID__SI = 0x4BCD; +constexpr unsigned int mmDP5_DP_VID_M__SI = 0x4BCB; +constexpr unsigned int mmDP5_DP_VID_N__SI = 0x4BCA; +constexpr unsigned int mmDP5_DP_VID_STREAM_CNTL__SI = 0x4BC3; +constexpr unsigned int mmDP5_DP_VID_TIMING__SI = 0x4BC9; +constexpr unsigned int mmDP_AUX0_AUX_ARB_CONTROL__SI = 0x1882; +constexpr unsigned int mmDP_AUX0_AUX_CONTROL__SI = 0x1880; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_CONTROL0__SI = 0x188A; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_CONTROL1__SI = 0x188B; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_STATUS__SI = 0x188D; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_CONTROL__SI = 0x1889; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL__SI = 0x1888; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_STATUS__SI = 0x188C; +constexpr unsigned int mmDP_AUX0_AUX_INTERRUPT_CONTROL__SI = 0x1883; +constexpr unsigned int mmDP_AUX0_AUX_LS_DATA__SI = 0x1887; +constexpr unsigned int mmDP_AUX0_AUX_LS_STATUS__SI = 0x1885; +constexpr unsigned int mmDP_AUX0_AUX_SW_CONTROL__SI = 0x1881; +constexpr unsigned int mmDP_AUX0_AUX_SW_DATA__SI = 0x1886; +constexpr unsigned int mmDP_AUX0_AUX_SW_STATUS__SI = 0x1884; +constexpr unsigned int mmDP_AUX1_AUX_ARB_CONTROL__SI = 0x1896; +constexpr unsigned int mmDP_AUX1_AUX_CONTROL__SI = 0x1894; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_CONTROL0__SI = 0x189E; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_CONTROL1__SI = 0x189F; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_STATUS__SI = 0x18A1; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_CONTROL__SI = 0x189D; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_REF_CONTROL__SI = 0x189C; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_STATUS__SI = 0x18A0; +constexpr unsigned int mmDP_AUX1_AUX_INTERRUPT_CONTROL__SI = 0x1897; +constexpr unsigned int mmDP_AUX1_AUX_LS_DATA__SI = 0x189B; +constexpr unsigned int mmDP_AUX1_AUX_LS_STATUS__SI = 0x1899; +constexpr unsigned int mmDP_AUX1_AUX_SW_CONTROL__SI = 0x1895; +constexpr unsigned int mmDP_AUX1_AUX_SW_DATA__SI = 0x189A; +constexpr unsigned int mmDP_AUX1_AUX_SW_STATUS__SI = 0x1898; +constexpr unsigned int mmDP_AUX2_AUX_ARB_CONTROL__SI = 0x18AA; +constexpr unsigned int mmDP_AUX2_AUX_CONTROL__SI = 0x18A8; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_CONTROL0__SI = 0x18B2; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_CONTROL1__SI = 0x18B3; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_STATUS__SI = 0x18B5; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_CONTROL__SI = 0x18B1; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_REF_CONTROL__SI = 0x18B0; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_STATUS__SI = 0x18B4; +constexpr unsigned int mmDP_AUX2_AUX_INTERRUPT_CONTROL__SI = 0x18AB; +constexpr unsigned int mmDP_AUX2_AUX_LS_DATA__SI = 0x18AF; +constexpr unsigned int mmDP_AUX2_AUX_LS_STATUS__SI = 0x18AD; +constexpr unsigned int mmDP_AUX2_AUX_SW_CONTROL__SI = 0x18A9; +constexpr unsigned int mmDP_AUX2_AUX_SW_DATA__SI = 0x18AE; +constexpr unsigned int mmDP_AUX2_AUX_SW_STATUS__SI = 0x18AC; +constexpr unsigned int mmDP_AUX3_AUX_ARB_CONTROL__SI = 0x18C2; +constexpr unsigned int mmDP_AUX3_AUX_CONTROL__SI = 0x18C0; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_CONTROL0__SI = 0x18CA; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_CONTROL1__SI = 0x18CB; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_STATUS__SI = 0x18CD; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_CONTROL__SI = 0x18C9; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_REF_CONTROL__SI = 0x18C8; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_STATUS__SI = 0x18CC; +constexpr unsigned int mmDP_AUX3_AUX_INTERRUPT_CONTROL__SI = 0x18C3; +constexpr unsigned int mmDP_AUX3_AUX_LS_DATA__SI = 0x18C7; +constexpr unsigned int mmDP_AUX3_AUX_LS_STATUS__SI = 0x18C5; +constexpr unsigned int mmDP_AUX3_AUX_SW_CONTROL__SI = 0x18C1; +constexpr unsigned int mmDP_AUX3_AUX_SW_DATA__SI = 0x18C6; +constexpr unsigned int mmDP_AUX3_AUX_SW_STATUS__SI = 0x18C4; +constexpr unsigned int mmDP_AUX4_AUX_ARB_CONTROL__SI = 0x18D6; +constexpr unsigned int mmDP_AUX4_AUX_CONTROL__SI = 0x18D4; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_CONTROL0__SI = 0x18DE; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_CONTROL1__SI = 0x18DF; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_STATUS__SI = 0x18E1; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_CONTROL__SI = 0x18DD; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_REF_CONTROL__SI = 0x18DC; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_STATUS__SI = 0x18E0; +constexpr unsigned int mmDP_AUX4_AUX_INTERRUPT_CONTROL__SI = 0x18D7; +constexpr unsigned int mmDP_AUX4_AUX_LS_DATA__SI = 0x18DB; +constexpr unsigned int mmDP_AUX4_AUX_LS_STATUS__SI = 0x18D9; +constexpr unsigned int mmDP_AUX4_AUX_SW_CONTROL__SI = 0x18D5; +constexpr unsigned int mmDP_AUX4_AUX_SW_DATA__SI = 0x18DA; +constexpr unsigned int mmDP_AUX4_AUX_SW_STATUS__SI = 0x18D8; +constexpr unsigned int mmDP_AUX5_AUX_ARB_CONTROL__SI = 0x18EA; +constexpr unsigned int mmDP_AUX5_AUX_CONTROL__SI = 0x18E8; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_CONTROL0__SI = 0x18F2; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_CONTROL1__SI = 0x18F3; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_STATUS__SI = 0x18F5; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_CONTROL__SI = 0x18F1; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_REF_CONTROL__SI = 0x18F0; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_STATUS__SI = 0x18F4; +constexpr unsigned int mmDP_AUX5_AUX_INTERRUPT_CONTROL__SI = 0x18EB; +constexpr unsigned int mmDP_AUX5_AUX_LS_DATA__SI = 0x18EF; +constexpr unsigned int mmDP_AUX5_AUX_LS_STATUS__SI = 0x18ED; +constexpr unsigned int mmDP_AUX5_AUX_SW_CONTROL__SI = 0x18E9; +constexpr unsigned int mmDP_AUX5_AUX_SW_DATA__SI = 0x18EE; +constexpr unsigned int mmDP_AUX5_AUX_SW_STATUS__SI = 0x18EC; +constexpr unsigned int mmDP_CONFIG__SI = 0x1CC2; +constexpr unsigned int mmDP_DPHY_8B10B_CNTL__SI = 0x1CD3; +constexpr unsigned int mmDP_DPHY_CNTL__SI = 0x1CD0; +constexpr unsigned int mmDP_DPHY_CRC_CNTL__SI = 0x1CD7; +constexpr unsigned int mmDP_DPHY_CRC_EN__SI = 0x1CD6; +constexpr unsigned int mmDP_DPHY_CRC_RESULT__SI = 0x1CD8; +constexpr unsigned int mmDP_DPHY_FAST_TRAINING__SI = 0x1CCE; +constexpr unsigned int mmDP_DPHY_PRBS_CNTL__SI = 0x1CD4; +constexpr unsigned int mmDP_DPHY_SYM__SI = 0x1CD2; +constexpr unsigned int mmDP_DPHY_TRAINING_PATTERN_SEL__SI = 0x1CD1; +constexpr unsigned int mmDP_DTO0_MODULO__SI = 0x0171; +constexpr unsigned int mmDP_DTO0_PHASE__SI = 0x0170; +constexpr unsigned int mmDP_DTO1_MODULO__SI = 0x0173; +constexpr unsigned int mmDP_DTO1_PHASE__SI = 0x0172; +constexpr unsigned int mmDP_DTO2_MODULO__SI = 0x0175; +constexpr unsigned int mmDP_DTO2_PHASE__SI = 0x0174; +constexpr unsigned int mmDP_DTO3_MODULO__SI = 0x0177; +constexpr unsigned int mmDP_DTO3_PHASE__SI = 0x0176; +constexpr unsigned int mmDP_DTO4_MODULO__SI = 0x0179; +constexpr unsigned int mmDP_DTO4_PHASE__SI = 0x0178; +constexpr unsigned int mmDP_DTO5_MODULO__SI = 0x017B; +constexpr unsigned int mmDP_DTO5_PHASE__SI = 0x017A; +constexpr unsigned int mmDP_LINK_CNTL__SI = 0x1CC0; +constexpr unsigned int mmDP_PIXEL_FORMAT__SI = 0x1CC1; +constexpr unsigned int mmDP_SEC_AUD_M_READBACK__SI = 0x1CA8; +constexpr unsigned int mmDP_SEC_AUD_M__SI = 0x1CA7; +constexpr unsigned int mmDP_SEC_AUD_N_READBACK__SI = 0x1CA6; +constexpr unsigned int mmDP_SEC_AUD_N__SI = 0x1CA5; +constexpr unsigned int mmDP_SEC_CNTL__SI = 0x1CA0; +constexpr unsigned int mmDP_SEC_FRAMING1__SI = 0x1CA1; +constexpr unsigned int mmDP_SEC_FRAMING2__SI = 0x1CA2; +constexpr unsigned int mmDP_SEC_FRAMING3__SI = 0x1CA3; +constexpr unsigned int mmDP_SEC_FRAMING4__SI = 0x1CA4; +constexpr unsigned int mmDP_SEC_PACKET_CNTL__SI = 0x1CAA; +constexpr unsigned int mmDP_SEC_TIMESTAMP__SI = 0x1CA9; +constexpr unsigned int mmDP_STEER_FIFO__SI = 0x1CC4; +constexpr unsigned int mmDP_TEST_DEBUG_DATA__SI = 0x1CFD; +constexpr unsigned int mmDP_TEST_DEBUG_INDEX__SI = 0x1CFC; +constexpr unsigned int mmDP_VID_INTERRUPT_CNTL__SI = 0x1CCF; +constexpr unsigned int mmDP_VID_MSA_VBID__SI = 0x1CCD; +constexpr unsigned int mmDP_VID_M__SI = 0x1CCB; +constexpr unsigned int mmDP_VID_N__SI = 0x1CCA; +constexpr unsigned int mmDP_VID_STREAM_CNTL__SI = 0x1CC3; +constexpr unsigned int mmDP_VID_TIMING__SI = 0x1CC9; +constexpr unsigned int mmDVOACLKC_CNTL__SI = 0x014E; +constexpr unsigned int mmDVOACLKC_MVP_CNTL__SI = 0x014D; +constexpr unsigned int mmDVOACLKD_CNTL__SI = 0x014C; +constexpr unsigned int mmDVO_CONTROL__SI = 0x185B; +constexpr unsigned int mmDVO_CRC2_SIG_MASK__SI = 0x185D; +constexpr unsigned int mmDVO_CRC2_SIG_RESULT__SI = 0x185E; +constexpr unsigned int mmDVO_CRC_EN__SI = 0x185C; +constexpr unsigned int mmDVO_ENABLE__SI = 0x1858; +constexpr unsigned int mmDVO_OUTPUT__SI = 0x185A; +constexpr unsigned int mmDVO_SOURCE_SELECT__SI = 0x1859; +constexpr unsigned int mmDVO_STRENGTH_CONTROL__SI = 0x195D; +constexpr unsigned int mmEXT_OVERSCAN_LEFT_RIGHT__SI__VI = 0x1B5E; +constexpr unsigned int mmEXT_OVERSCAN_TOP_BOTTOM__SI__VI = 0x1B5F; +constexpr unsigned int mmFBC_CLIENT_REGION_MASK__SI = 0x16EB; +constexpr unsigned int mmFBC_CNTL__SI = 0x16D0; +constexpr unsigned int mmFBC_COMP_CNTL__SI = 0x16D4; +constexpr unsigned int mmFBC_COMP_MODE__SI = 0x16D5; +constexpr unsigned int mmFBC_CSM_REGION_OFFSET_01__SI = 0x16E9; +constexpr unsigned int mmFBC_CSM_REGION_OFFSET_23__SI = 0x16EA; +constexpr unsigned int mmFBC_DEBUG0__SI = 0x16D6; +constexpr unsigned int mmFBC_DEBUG1__SI = 0x16D7; +constexpr unsigned int mmFBC_DEBUG2__SI = 0x16D8; +constexpr unsigned int mmFBC_DEBUG_COMP__SI = 0x16EC; +constexpr unsigned int mmFBC_DEBUG_CSR_RDATA__SI = 0x16EE; +constexpr unsigned int mmFBC_DEBUG_CSR_WDATA__SI = 0x16EF; +constexpr unsigned int mmFBC_DEBUG_CSR__SI = 0x16ED; +constexpr unsigned int mmFBC_IDLE_FORCE_CLEAR_MASK__SI = 0x16D2; +constexpr unsigned int mmFBC_IDLE_MASK__SI = 0x16D1; +constexpr unsigned int mmFBC_IND_LUT0__SI = 0x16D9; +constexpr unsigned int mmFBC_IND_LUT10__SI = 0x16E3; +constexpr unsigned int mmFBC_IND_LUT11__SI = 0x16E4; +constexpr unsigned int mmFBC_IND_LUT12__SI = 0x16E5; +constexpr unsigned int mmFBC_IND_LUT13__SI = 0x16E6; +constexpr unsigned int mmFBC_IND_LUT14__SI = 0x16E7; +constexpr unsigned int mmFBC_IND_LUT15__SI = 0x16E8; +constexpr unsigned int mmFBC_IND_LUT1__SI = 0x16DA; +constexpr unsigned int mmFBC_IND_LUT2__SI = 0x16DB; +constexpr unsigned int mmFBC_IND_LUT3__SI = 0x16DC; +constexpr unsigned int mmFBC_IND_LUT4__SI = 0x16DD; +constexpr unsigned int mmFBC_IND_LUT5__SI = 0x16DE; +constexpr unsigned int mmFBC_IND_LUT6__SI = 0x16DF; +constexpr unsigned int mmFBC_IND_LUT7__SI = 0x16E0; +constexpr unsigned int mmFBC_IND_LUT8__SI = 0x16E1; +constexpr unsigned int mmFBC_IND_LUT9__SI = 0x16E2; +constexpr unsigned int mmFBC_MISC__SI = 0x16F0; +constexpr unsigned int mmFBC_START_STOP_DELAY__SI = 0x16D3; +constexpr unsigned int mmFBC_TEST_DEBUG_DATA__SI = 0x16F5; +constexpr unsigned int mmFBC_TEST_DEBUG_INDEX__SI = 0x16F4; +constexpr unsigned int mmFMT0_FMT_BIT_DEPTH_CONTROL__SI__VI = 0x1BF2; +constexpr unsigned int mmFMT0_FMT_CLAMP_CNTL__SI__VI = 0x1BF9; +constexpr unsigned int mmFMT0_FMT_CONTROL__SI__VI = 0x1BEE; +constexpr unsigned int mmFMT0_FMT_CRC_CNTL__SI__VI = 0x1BFA; +constexpr unsigned int mmFMT0_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI__VI = 0x1BFC; +constexpr unsigned int mmFMT0_FMT_CRC_SIG_BLUE_CONTROL__SI__VI = 0x1BFE; +constexpr unsigned int mmFMT0_FMT_CRC_SIG_RED_GREEN_MASK__SI__VI = 0x1BFB; +constexpr unsigned int mmFMT0_FMT_CRC_SIG_RED_GREEN__SI__VI = 0x1BFD; +constexpr unsigned int mmFMT0_FMT_DEBUG_CNTL__SI__VI = 0x1BFF; +constexpr unsigned int mmFMT0_FMT_DITHER_RAND_B_SEED__SI__VI = 0x1BF5; +constexpr unsigned int mmFMT0_FMT_DITHER_RAND_G_SEED__SI__VI = 0x1BF4; +constexpr unsigned int mmFMT0_FMT_DITHER_RAND_R_SEED__SI__VI = 0x1BF3; +constexpr unsigned int mmFMT0_FMT_DYNAMIC_EXP_CNTL__SI__VI = 0x1BED; +constexpr unsigned int mmFMT0_FMT_FORCE_DATA_0_1__SI__VI = 0x1BF0; +constexpr unsigned int mmFMT0_FMT_FORCE_DATA_2_3__SI__VI = 0x1BF1; +constexpr unsigned int mmFMT0_FMT_FORCE_OUTPUT_CNTL__SI__VI = 0x1BEF; +constexpr unsigned int mmFMT0_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI__VI = 0x1BF6; +constexpr unsigned int mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI__VI = 0x1BF7; +constexpr unsigned int mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI__VI = 0x1BF8; +constexpr unsigned int mmFMT1_FMT_BIT_DEPTH_CONTROL__SI = 0x1EF2; +constexpr unsigned int mmFMT1_FMT_CLAMP_CNTL__SI = 0x1EF9; +constexpr unsigned int mmFMT1_FMT_CONTROL__SI = 0x1EEE; +constexpr unsigned int mmFMT1_FMT_CRC_CNTL__SI = 0x1EFA; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI = 0x1EFC; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_BLUE_CONTROL__SI = 0x1EFE; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_RED_GREEN_MASK__SI = 0x1EFB; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_RED_GREEN__SI = 0x1EFD; +constexpr unsigned int mmFMT1_FMT_DEBUG_CNTL__SI = 0x1EFF; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_B_SEED__SI = 0x1EF5; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_G_SEED__SI = 0x1EF4; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_R_SEED__SI = 0x1EF3; +constexpr unsigned int mmFMT1_FMT_DYNAMIC_EXP_CNTL__SI = 0x1EED; +constexpr unsigned int mmFMT1_FMT_FORCE_DATA_0_1__SI = 0x1EF0; +constexpr unsigned int mmFMT1_FMT_FORCE_DATA_2_3__SI = 0x1EF1; +constexpr unsigned int mmFMT1_FMT_FORCE_OUTPUT_CNTL__SI = 0x1EEF; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI = 0x1EF6; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI = 0x1EF7; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI = 0x1EF8; +constexpr unsigned int mmFMT2_FMT_BIT_DEPTH_CONTROL__SI = 0x41F2; +constexpr unsigned int mmFMT2_FMT_CLAMP_CNTL__SI = 0x41F9; +constexpr unsigned int mmFMT2_FMT_CONTROL__SI = 0x41EE; +constexpr unsigned int mmFMT2_FMT_CRC_CNTL__SI = 0x41FA; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI = 0x41FC; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_BLUE_CONTROL__SI = 0x41FE; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_RED_GREEN_MASK__SI = 0x41FB; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_RED_GREEN__SI = 0x41FD; +constexpr unsigned int mmFMT2_FMT_DEBUG_CNTL__SI = 0x41FF; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_B_SEED__SI = 0x41F5; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_G_SEED__SI = 0x41F4; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_R_SEED__SI = 0x41F3; +constexpr unsigned int mmFMT2_FMT_DYNAMIC_EXP_CNTL__SI = 0x41ED; +constexpr unsigned int mmFMT2_FMT_FORCE_DATA_0_1__SI = 0x41F0; +constexpr unsigned int mmFMT2_FMT_FORCE_DATA_2_3__SI = 0x41F1; +constexpr unsigned int mmFMT2_FMT_FORCE_OUTPUT_CNTL__SI = 0x41EF; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI = 0x41F6; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI = 0x41F7; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI = 0x41F8; +constexpr unsigned int mmFMT3_FMT_BIT_DEPTH_CONTROL__SI = 0x44F2; +constexpr unsigned int mmFMT3_FMT_CLAMP_CNTL__SI = 0x44F9; +constexpr unsigned int mmFMT3_FMT_CONTROL__SI = 0x44EE; +constexpr unsigned int mmFMT3_FMT_CRC_CNTL__SI = 0x44FA; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI = 0x44FC; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_BLUE_CONTROL__SI = 0x44FE; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_RED_GREEN_MASK__SI = 0x44FB; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_RED_GREEN__SI = 0x44FD; +constexpr unsigned int mmFMT3_FMT_DEBUG_CNTL__SI = 0x44FF; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_B_SEED__SI = 0x44F5; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_G_SEED__SI = 0x44F4; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_R_SEED__SI = 0x44F3; +constexpr unsigned int mmFMT3_FMT_DYNAMIC_EXP_CNTL__SI = 0x44ED; +constexpr unsigned int mmFMT3_FMT_FORCE_DATA_0_1__SI = 0x44F0; +constexpr unsigned int mmFMT3_FMT_FORCE_DATA_2_3__SI = 0x44F1; +constexpr unsigned int mmFMT3_FMT_FORCE_OUTPUT_CNTL__SI = 0x44EF; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI = 0x44F6; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI = 0x44F7; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI = 0x44F8; +constexpr unsigned int mmFMT4_FMT_BIT_DEPTH_CONTROL__SI = 0x47F2; +constexpr unsigned int mmFMT4_FMT_CLAMP_CNTL__SI = 0x47F9; +constexpr unsigned int mmFMT4_FMT_CONTROL__SI = 0x47EE; +constexpr unsigned int mmFMT4_FMT_CRC_CNTL__SI = 0x47FA; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI = 0x47FC; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_BLUE_CONTROL__SI = 0x47FE; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_RED_GREEN_MASK__SI = 0x47FB; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_RED_GREEN__SI = 0x47FD; +constexpr unsigned int mmFMT4_FMT_DEBUG_CNTL__SI = 0x47FF; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_B_SEED__SI = 0x47F5; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_G_SEED__SI = 0x47F4; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_R_SEED__SI = 0x47F3; +constexpr unsigned int mmFMT4_FMT_DYNAMIC_EXP_CNTL__SI = 0x47ED; +constexpr unsigned int mmFMT4_FMT_FORCE_DATA_0_1__SI = 0x47F0; +constexpr unsigned int mmFMT4_FMT_FORCE_DATA_2_3__SI = 0x47F1; +constexpr unsigned int mmFMT4_FMT_FORCE_OUTPUT_CNTL__SI = 0x47EF; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI = 0x47F6; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI = 0x47F7; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI = 0x47F8; +constexpr unsigned int mmFMT5_FMT_BIT_DEPTH_CONTROL__SI = 0x4AF2; +constexpr unsigned int mmFMT5_FMT_CLAMP_CNTL__SI = 0x4AF9; +constexpr unsigned int mmFMT5_FMT_CONTROL__SI = 0x4AEE; +constexpr unsigned int mmFMT5_FMT_CRC_CNTL__SI = 0x4AFA; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_BLUE_CONTROL_MASK__SI = 0x4AFC; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_BLUE_CONTROL__SI = 0x4AFE; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_RED_GREEN_MASK__SI = 0x4AFB; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_RED_GREEN__SI = 0x4AFD; +constexpr unsigned int mmFMT5_FMT_DEBUG_CNTL__SI = 0x4AFF; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_B_SEED__SI = 0x4AF5; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_G_SEED__SI = 0x4AF4; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_R_SEED__SI = 0x4AF3; +constexpr unsigned int mmFMT5_FMT_DYNAMIC_EXP_CNTL__SI = 0x4AED; +constexpr unsigned int mmFMT5_FMT_FORCE_DATA_0_1__SI = 0x4AF0; +constexpr unsigned int mmFMT5_FMT_FORCE_DATA_2_3__SI = 0x4AF1; +constexpr unsigned int mmFMT5_FMT_FORCE_OUTPUT_CNTL__SI = 0x4AEF; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI = 0x4AF6; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI = 0x4AF7; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI = 0x4AF8; +constexpr unsigned int mmFMT_BIT_DEPTH_CONTROL__SI__VI = 0x1BF2; +constexpr unsigned int mmFMT_CLAMP_CNTL__SI__VI = 0x1BF9; +constexpr unsigned int mmFMT_CONTROL__SI__VI = 0x1BEE; +constexpr unsigned int mmFMT_CRC_CNTL__SI__VI = 0x1BFA; +constexpr unsigned int mmFMT_CRC_SIG_BLUE_CONTROL_MASK__SI__VI = 0x1BFC; +constexpr unsigned int mmFMT_CRC_SIG_BLUE_CONTROL__SI__VI = 0x1BFE; +constexpr unsigned int mmFMT_CRC_SIG_RED_GREEN_MASK__SI__VI = 0x1BFB; +constexpr unsigned int mmFMT_CRC_SIG_RED_GREEN__SI__VI = 0x1BFD; +constexpr unsigned int mmFMT_DEBUG_CNTL__SI__VI = 0x1BFF; +constexpr unsigned int mmFMT_DITHER_RAND_B_SEED__SI__VI = 0x1BF5; +constexpr unsigned int mmFMT_DITHER_RAND_G_SEED__SI__VI = 0x1BF4; +constexpr unsigned int mmFMT_DITHER_RAND_R_SEED__SI__VI = 0x1BF3; +constexpr unsigned int mmFMT_DYNAMIC_EXP_CNTL__SI__VI = 0x1BED; +constexpr unsigned int mmFMT_FORCE_DATA_0_1__SI__VI = 0x1BF0; +constexpr unsigned int mmFMT_FORCE_DATA_2_3__SI__VI = 0x1BF1; +constexpr unsigned int mmFMT_FORCE_OUTPUT_CNTL__SI__VI = 0x1BEF; +constexpr unsigned int mmFMT_TEMPORAL_DITHER_PATTERN_CONTROL__SI__VI = 0x1BF6; +constexpr unsigned int mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__SI__VI = 0x1BF7; +constexpr unsigned int mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__SI__VI = 0x1BF8; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_0__CI__VI = 0x1403; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_1__CI__VI = 0x1405; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_2__CI__VI = 0x1407; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_3__CI__VI = 0x1409; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_4__CI__VI = 0x140B; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_5__CI__VI = 0x140D; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_6__CI__VI = 0x140F; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_END_7__CI__VI = 0x1411; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_0__CI__VI = 0x1402; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_1__CI__VI = 0x1404; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_2__CI__VI = 0x1406; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_3__CI__VI = 0x1408; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_4__CI__VI = 0x140A; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_5__CI__VI = 0x140C; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_6__CI__VI = 0x140E; +constexpr unsigned int mmGARLIC_FLUSH_ADDR_START_7__CI__VI = 0x1410; +constexpr unsigned int mmGARLIC_FLUSH_CNTL__CI__VI = 0x1401; +constexpr unsigned int mmGARLIC_FLUSH_REQ__CI__VI = 0x1412; +constexpr unsigned int mmGB_ADDR_CONFIG = 0x263E; +constexpr unsigned int mmGB_BACKEND_MAP = 0x263F; +constexpr unsigned int mmGB_EDC_MODE = 0x307E; +constexpr unsigned int mmGB_GPU_ID = 0x2640; +constexpr unsigned int mmGB_MACROTILE_MODE0__CI__VI = 0x2664; +constexpr unsigned int mmGB_MACROTILE_MODE10__CI__VI = 0x266E; +constexpr unsigned int mmGB_MACROTILE_MODE11__CI__VI = 0x266F; +constexpr unsigned int mmGB_MACROTILE_MODE12__CI__VI = 0x2670; +constexpr unsigned int mmGB_MACROTILE_MODE13__CI__VI = 0x2671; +constexpr unsigned int mmGB_MACROTILE_MODE14__CI__VI = 0x2672; +constexpr unsigned int mmGB_MACROTILE_MODE15__CI__VI = 0x2673; +constexpr unsigned int mmGB_MACROTILE_MODE1__CI__VI = 0x2665; +constexpr unsigned int mmGB_MACROTILE_MODE2__CI__VI = 0x2666; +constexpr unsigned int mmGB_MACROTILE_MODE3__CI__VI = 0x2667; +constexpr unsigned int mmGB_MACROTILE_MODE4__CI__VI = 0x2668; +constexpr unsigned int mmGB_MACROTILE_MODE5__CI__VI = 0x2669; +constexpr unsigned int mmGB_MACROTILE_MODE6__CI__VI = 0x266A; +constexpr unsigned int mmGB_MACROTILE_MODE7__CI__VI = 0x266B; +constexpr unsigned int mmGB_MACROTILE_MODE8__CI__VI = 0x266C; +constexpr unsigned int mmGB_MACROTILE_MODE9__CI__VI = 0x266D; +constexpr unsigned int mmGB_TILE_MODE0 = 0x2644; +constexpr unsigned int mmGB_TILE_MODE1 = 0x2645; +constexpr unsigned int mmGB_TILE_MODE10 = 0x264E; +constexpr unsigned int mmGB_TILE_MODE11 = 0x264F; +constexpr unsigned int mmGB_TILE_MODE12 = 0x2650; +constexpr unsigned int mmGB_TILE_MODE13 = 0x2651; +constexpr unsigned int mmGB_TILE_MODE14 = 0x2652; +constexpr unsigned int mmGB_TILE_MODE15 = 0x2653; +constexpr unsigned int mmGB_TILE_MODE16 = 0x2654; +constexpr unsigned int mmGB_TILE_MODE17 = 0x2655; +constexpr unsigned int mmGB_TILE_MODE18 = 0x2656; +constexpr unsigned int mmGB_TILE_MODE19 = 0x2657; +constexpr unsigned int mmGB_TILE_MODE2 = 0x2646; +constexpr unsigned int mmGB_TILE_MODE20 = 0x2658; +constexpr unsigned int mmGB_TILE_MODE21 = 0x2659; +constexpr unsigned int mmGB_TILE_MODE22 = 0x265A; +constexpr unsigned int mmGB_TILE_MODE23 = 0x265B; +constexpr unsigned int mmGB_TILE_MODE24 = 0x265C; +constexpr unsigned int mmGB_TILE_MODE25 = 0x265D; +constexpr unsigned int mmGB_TILE_MODE26 = 0x265E; +constexpr unsigned int mmGB_TILE_MODE27 = 0x265F; +constexpr unsigned int mmGB_TILE_MODE28 = 0x2660; +constexpr unsigned int mmGB_TILE_MODE29 = 0x2661; +constexpr unsigned int mmGB_TILE_MODE3 = 0x2647; +constexpr unsigned int mmGB_TILE_MODE30 = 0x2662; +constexpr unsigned int mmGB_TILE_MODE31 = 0x2663; +constexpr unsigned int mmGB_TILE_MODE4 = 0x2648; +constexpr unsigned int mmGB_TILE_MODE5 = 0x2649; +constexpr unsigned int mmGB_TILE_MODE6 = 0x264A; +constexpr unsigned int mmGB_TILE_MODE7 = 0x264B; +constexpr unsigned int mmGB_TILE_MODE8 = 0x264C; +constexpr unsigned int mmGB_TILE_MODE9 = 0x264D; +constexpr unsigned int mmGCK_SMC_IND_DATA__CI__VI = 0x0081; +constexpr unsigned int mmGCK_SMC_IND_INDEX__CI__VI = 0x0080; +constexpr unsigned int mmGC_USER_PRIM_CONFIG__CI__VI = 0x2241; +constexpr unsigned int mmGC_USER_RB_BACKEND_DISABLE = 0x26DF; +constexpr unsigned int mmGC_USER_RB_REDUNDANCY__CI__VI = 0x26DE; +constexpr unsigned int mmGC_USER_SHADER_ARRAY_CONFIG = 0x2270; +constexpr unsigned int mmGC_USER_SYS_RB_BACKEND_DISABLE = 0x03A1; +constexpr unsigned int mmGDS_ATOM_BASE__CI__VI = 0xC40C; +constexpr unsigned int mmGDS_ATOM_BASE__SI = 0x25CE; +constexpr unsigned int mmGDS_ATOM_CNTL__CI__VI = 0xC40A; +constexpr unsigned int mmGDS_ATOM_CNTL__SI = 0x25CC; +constexpr unsigned int mmGDS_ATOM_COMPLETE__CI__VI = 0xC40B; +constexpr unsigned int mmGDS_ATOM_COMPLETE__SI = 0x25CD; +constexpr unsigned int mmGDS_ATOM_DST__CI__VI = 0xC410; +constexpr unsigned int mmGDS_ATOM_DST__SI = 0x25D2; +constexpr unsigned int mmGDS_ATOM_OFFSET0__CI__VI = 0xC40E; +constexpr unsigned int mmGDS_ATOM_OFFSET0__SI = 0x25D0; +constexpr unsigned int mmGDS_ATOM_OFFSET1__CI__VI = 0xC40F; +constexpr unsigned int mmGDS_ATOM_OFFSET1__SI = 0x25D1; +constexpr unsigned int mmGDS_ATOM_OP__CI__VI = 0xC411; +constexpr unsigned int mmGDS_ATOM_OP__SI = 0x25D3; +constexpr unsigned int mmGDS_ATOM_READ0_U__CI__VI = 0xC417; +constexpr unsigned int mmGDS_ATOM_READ0_U__SI = 0x25D9; +constexpr unsigned int mmGDS_ATOM_READ0__CI__VI = 0xC416; +constexpr unsigned int mmGDS_ATOM_READ0__SI = 0x25D8; +constexpr unsigned int mmGDS_ATOM_READ1_U__CI__VI = 0xC419; +constexpr unsigned int mmGDS_ATOM_READ1_U__SI = 0x25DB; +constexpr unsigned int mmGDS_ATOM_READ1__CI__VI = 0xC418; +constexpr unsigned int mmGDS_ATOM_READ1__SI = 0x25DA; +constexpr unsigned int mmGDS_ATOM_SIZE__CI__VI = 0xC40D; +constexpr unsigned int mmGDS_ATOM_SIZE__SI = 0x25CF; +constexpr unsigned int mmGDS_ATOM_SRC0_U__CI__VI = 0xC413; +constexpr unsigned int mmGDS_ATOM_SRC0_U__SI = 0x25D5; +constexpr unsigned int mmGDS_ATOM_SRC0__CI__VI = 0xC412; +constexpr unsigned int mmGDS_ATOM_SRC0__SI = 0x25D4; +constexpr unsigned int mmGDS_ATOM_SRC1_U__CI__VI = 0xC415; +constexpr unsigned int mmGDS_ATOM_SRC1_U__SI = 0x25D7; +constexpr unsigned int mmGDS_ATOM_SRC1__CI__VI = 0xC414; +constexpr unsigned int mmGDS_ATOM_SRC1__SI = 0x25D6; +constexpr unsigned int mmGDS_CNTL_STATUS = 0x25C1; +constexpr unsigned int mmGDS_COMPUTE_MAX_WAVE_ID__CI__VI = 0x3348; +constexpr unsigned int mmGDS_CONFIG = 0x25C0; +constexpr unsigned int mmGDS_DEBUG_CNTL__CI__VI = 0x25C8; +constexpr unsigned int mmGDS_DEBUG_CNTL__SI = 0x25DE; +constexpr unsigned int mmGDS_DEBUG_DATA__CI__VI = 0x25C9; +constexpr unsigned int mmGDS_DEBUG_DATA__SI = 0x25DF; +constexpr unsigned int mmGDS_ENHANCE2__CI__VI = 0x25C2; +constexpr unsigned int mmGDS_ENHANCE__CI__VI = 0x334B; +constexpr unsigned int mmGDS_ENHANCE__SI = 0x25DC; +constexpr unsigned int mmGDS_GRBM_SECDED_CNT__CI = 0x25C6; +constexpr unsigned int mmGDS_GRBM_SECDED_CNT__SI = 0x25E3; +constexpr unsigned int mmGDS_GWS_RESET0__CI__VI = 0x3344; +constexpr unsigned int mmGDS_GWS_RESET1__CI__VI = 0x3345; +constexpr unsigned int mmGDS_GWS_RESOURCE_CNTL__CI__VI = 0xC41A; +constexpr unsigned int mmGDS_GWS_RESOURCE_CNTL__SI = 0x25E0; +constexpr unsigned int mmGDS_GWS_RESOURCE_CNT__CI__VI = 0xC41C; +constexpr unsigned int mmGDS_GWS_RESOURCE_RESET__CI__VI = 0x3346; +constexpr unsigned int mmGDS_GWS_RESOURCE__CI__VI = 0xC41B; +constexpr unsigned int mmGDS_GWS_RESOURCE__SI = 0x25E1; +constexpr unsigned int mmGDS_GWS_VMID0__CI__VI = 0x3320; +constexpr unsigned int mmGDS_GWS_VMID10__CI__VI = 0x332A; +constexpr unsigned int mmGDS_GWS_VMID11__CI__VI = 0x332B; +constexpr unsigned int mmGDS_GWS_VMID12__CI__VI = 0x332C; +constexpr unsigned int mmGDS_GWS_VMID13__CI__VI = 0x332D; +constexpr unsigned int mmGDS_GWS_VMID14__CI__VI = 0x332E; +constexpr unsigned int mmGDS_GWS_VMID15__CI__VI = 0x332F; +constexpr unsigned int mmGDS_GWS_VMID1__CI__VI = 0x3321; +constexpr unsigned int mmGDS_GWS_VMID2__CI__VI = 0x3322; +constexpr unsigned int mmGDS_GWS_VMID3__CI__VI = 0x3323; +constexpr unsigned int mmGDS_GWS_VMID4__CI__VI = 0x3324; +constexpr unsigned int mmGDS_GWS_VMID5__CI__VI = 0x3325; +constexpr unsigned int mmGDS_GWS_VMID6__CI__VI = 0x3326; +constexpr unsigned int mmGDS_GWS_VMID7__CI__VI = 0x3327; +constexpr unsigned int mmGDS_GWS_VMID8__CI__VI = 0x3328; +constexpr unsigned int mmGDS_GWS_VMID9__CI__VI = 0x3329; +constexpr unsigned int mmGDS_OA_ADDRESS__CI__VI = 0xC41F; +constexpr unsigned int mmGDS_OA_CGPG_RESTORE__CI__VI = 0x334C; +constexpr unsigned int mmGDS_OA_CNTL__CI__VI = 0xC41D; +constexpr unsigned int mmGDS_OA_COUNTER__CI__VI = 0xC41E; +constexpr unsigned int mmGDS_OA_DED__CI = 0x25C7; +constexpr unsigned int mmGDS_OA_DED__SI = 0x25E4; +constexpr unsigned int mmGDS_OA_INCDEC__CI__VI = 0xC420; +constexpr unsigned int mmGDS_OA_RESET_MASK__CI__VI = 0x3349; +constexpr unsigned int mmGDS_OA_RESET__CI__VI = 0x334A; +constexpr unsigned int mmGDS_OA_RING_SIZE__CI__VI = 0xC421; +constexpr unsigned int mmGDS_OA_VMID0__CI__VI = 0x3330; +constexpr unsigned int mmGDS_OA_VMID10__CI__VI = 0x333A; +constexpr unsigned int mmGDS_OA_VMID11__CI__VI = 0x333B; +constexpr unsigned int mmGDS_OA_VMID12__CI__VI = 0x333C; +constexpr unsigned int mmGDS_OA_VMID13__CI__VI = 0x333D; +constexpr unsigned int mmGDS_OA_VMID14__CI__VI = 0x333E; +constexpr unsigned int mmGDS_OA_VMID15__CI__VI = 0x333F; +constexpr unsigned int mmGDS_OA_VMID1__CI__VI = 0x3331; +constexpr unsigned int mmGDS_OA_VMID2__CI__VI = 0x3332; +constexpr unsigned int mmGDS_OA_VMID3__CI__VI = 0x3333; +constexpr unsigned int mmGDS_OA_VMID4__CI__VI = 0x3334; +constexpr unsigned int mmGDS_OA_VMID5__CI__VI = 0x3335; +constexpr unsigned int mmGDS_OA_VMID6__CI__VI = 0x3336; +constexpr unsigned int mmGDS_OA_VMID7__CI__VI = 0x3337; +constexpr unsigned int mmGDS_OA_VMID8__CI__VI = 0x3338; +constexpr unsigned int mmGDS_OA_VMID9__CI__VI = 0x3339; +constexpr unsigned int mmGDS_PERFCOUNTER0_HI__CI__VI = 0xD281; +constexpr unsigned int mmGDS_PERFCOUNTER0_HI__SI = 0x25E7; +constexpr unsigned int mmGDS_PERFCOUNTER0_LO__CI__VI = 0xD280; +constexpr unsigned int mmGDS_PERFCOUNTER0_LO__SI = 0x25E6; +constexpr unsigned int mmGDS_PERFCOUNTER0_SELECT1__CI__VI = 0xDA84; +constexpr unsigned int mmGDS_PERFCOUNTER0_SELECT__CI__VI = 0xDA80; +constexpr unsigned int mmGDS_PERFCOUNTER0_SELECT__SI = 0x25E5; +constexpr unsigned int mmGDS_PERFCOUNTER1_HI__CI__VI = 0xD283; +constexpr unsigned int mmGDS_PERFCOUNTER1_HI__SI = 0x25EA; +constexpr unsigned int mmGDS_PERFCOUNTER1_LO__CI__VI = 0xD282; +constexpr unsigned int mmGDS_PERFCOUNTER1_LO__SI = 0x25E9; +constexpr unsigned int mmGDS_PERFCOUNTER1_SELECT__CI__VI = 0xDA81; +constexpr unsigned int mmGDS_PERFCOUNTER1_SELECT__SI = 0x25E8; +constexpr unsigned int mmGDS_PERFCOUNTER2_HI__CI__VI = 0xD285; +constexpr unsigned int mmGDS_PERFCOUNTER2_HI__SI = 0x25ED; +constexpr unsigned int mmGDS_PERFCOUNTER2_LO__CI__VI = 0xD284; +constexpr unsigned int mmGDS_PERFCOUNTER2_LO__SI = 0x25EC; +constexpr unsigned int mmGDS_PERFCOUNTER2_SELECT__CI__VI = 0xDA82; +constexpr unsigned int mmGDS_PERFCOUNTER2_SELECT__SI = 0x25EB; +constexpr unsigned int mmGDS_PERFCOUNTER3_HI__CI__VI = 0xD287; +constexpr unsigned int mmGDS_PERFCOUNTER3_HI__SI = 0x25F0; +constexpr unsigned int mmGDS_PERFCOUNTER3_LO__CI__VI = 0xD286; +constexpr unsigned int mmGDS_PERFCOUNTER3_LO__SI = 0x25EF; +constexpr unsigned int mmGDS_PERFCOUNTER3_SELECT__CI__VI = 0xDA83; +constexpr unsigned int mmGDS_PERFCOUNTER3_SELECT__SI = 0x25EE; +constexpr unsigned int mmGDS_PROTECTION_FAULT__CI__VI = 0x25C3; +constexpr unsigned int mmGDS_RD_ADDR__CI__VI = 0xC400; +constexpr unsigned int mmGDS_RD_ADDR__SI = 0x25C2; +constexpr unsigned int mmGDS_RD_BURST_ADDR__CI__VI = 0xC402; +constexpr unsigned int mmGDS_RD_BURST_ADDR__SI = 0x25C4; +constexpr unsigned int mmGDS_RD_BURST_COUNT__CI__VI = 0xC403; +constexpr unsigned int mmGDS_RD_BURST_COUNT__SI = 0x25C5; +constexpr unsigned int mmGDS_RD_BURST_DATA__CI__VI = 0xC404; +constexpr unsigned int mmGDS_RD_BURST_DATA__SI = 0x25C6; +constexpr unsigned int mmGDS_RD_DATA__CI__VI = 0xC401; +constexpr unsigned int mmGDS_RD_DATA__SI = 0x25C3; +constexpr unsigned int mmGDS_SECDED_CNT__CI = 0x25C5; +constexpr unsigned int mmGDS_SECDED_CNT__SI = 0x25E2; +constexpr unsigned int mmGDS_VMID0_BASE__CI__VI = 0x3300; +constexpr unsigned int mmGDS_VMID0_SIZE__CI__VI = 0x3301; +constexpr unsigned int mmGDS_VMID10_BASE__CI__VI = 0x3314; +constexpr unsigned int mmGDS_VMID10_SIZE__CI__VI = 0x3315; +constexpr unsigned int mmGDS_VMID11_BASE__CI__VI = 0x3316; +constexpr unsigned int mmGDS_VMID11_SIZE__CI__VI = 0x3317; +constexpr unsigned int mmGDS_VMID12_BASE__CI__VI = 0x3318; +constexpr unsigned int mmGDS_VMID12_SIZE__CI__VI = 0x3319; +constexpr unsigned int mmGDS_VMID13_BASE__CI__VI = 0x331A; +constexpr unsigned int mmGDS_VMID13_SIZE__CI__VI = 0x331B; +constexpr unsigned int mmGDS_VMID14_BASE__CI__VI = 0x331C; +constexpr unsigned int mmGDS_VMID14_SIZE__CI__VI = 0x331D; +constexpr unsigned int mmGDS_VMID15_BASE__CI__VI = 0x331E; +constexpr unsigned int mmGDS_VMID15_SIZE__CI__VI = 0x331F; +constexpr unsigned int mmGDS_VMID1_BASE__CI__VI = 0x3302; +constexpr unsigned int mmGDS_VMID1_SIZE__CI__VI = 0x3303; +constexpr unsigned int mmGDS_VMID2_BASE__CI__VI = 0x3304; +constexpr unsigned int mmGDS_VMID2_SIZE__CI__VI = 0x3305; +constexpr unsigned int mmGDS_VMID3_BASE__CI__VI = 0x3306; +constexpr unsigned int mmGDS_VMID3_SIZE__CI__VI = 0x3307; +constexpr unsigned int mmGDS_VMID4_BASE__CI__VI = 0x3308; +constexpr unsigned int mmGDS_VMID4_SIZE__CI__VI = 0x3309; +constexpr unsigned int mmGDS_VMID5_BASE__CI__VI = 0x330A; +constexpr unsigned int mmGDS_VMID5_SIZE__CI__VI = 0x330B; +constexpr unsigned int mmGDS_VMID6_BASE__CI__VI = 0x330C; +constexpr unsigned int mmGDS_VMID6_SIZE__CI__VI = 0x330D; +constexpr unsigned int mmGDS_VMID7_BASE__CI__VI = 0x330E; +constexpr unsigned int mmGDS_VMID7_SIZE__CI__VI = 0x330F; +constexpr unsigned int mmGDS_VMID8_BASE__CI__VI = 0x3310; +constexpr unsigned int mmGDS_VMID8_SIZE__CI__VI = 0x3311; +constexpr unsigned int mmGDS_VMID9_BASE__CI__VI = 0x3312; +constexpr unsigned int mmGDS_VMID9_SIZE__CI__VI = 0x3313; +constexpr unsigned int mmGDS_VM_PROTECTION_FAULT__CI__VI = 0x25C4; +constexpr unsigned int mmGDS_WRITE_COMPLETE__CI__VI = 0xC409; +constexpr unsigned int mmGDS_WRITE_COMPLETE__SI = 0x25CB; +constexpr unsigned int mmGDS_WR_ADDR__CI__VI = 0xC405; +constexpr unsigned int mmGDS_WR_ADDR__SI = 0x25C7; +constexpr unsigned int mmGDS_WR_BURST_ADDR__CI__VI = 0xC407; +constexpr unsigned int mmGDS_WR_BURST_ADDR__SI = 0x25C9; +constexpr unsigned int mmGDS_WR_BURST_DATA__CI__VI = 0xC408; +constexpr unsigned int mmGDS_WR_BURST_DATA__SI = 0x25CA; +constexpr unsigned int mmGDS_WR_DATA__CI__VI = 0xC406; +constexpr unsigned int mmGDS_WR_DATA__SI = 0x25C8; +constexpr unsigned int mmGENENB__SI__VI = 0x00F0; +constexpr unsigned int mmGENERAL_PWRMGT__SI = 0x01E0; +constexpr unsigned int mmGENERIC_I2C_CONTROL__SI = 0x1834; +constexpr unsigned int mmGENERIC_I2C_DATA__SI = 0x183A; +constexpr unsigned int mmGENERIC_I2C_INTERRUPT_CONTROL__SI = 0x1835; +constexpr unsigned int mmGENERIC_I2C_PIN_DEBUG__SI = 0x183C; +constexpr unsigned int mmGENERIC_I2C_PIN_SELECTION__SI = 0x183B; +constexpr unsigned int mmGENERIC_I2C_SETUP__SI = 0x1838; +constexpr unsigned int mmGENERIC_I2C_SPEED__SI = 0x1837; +constexpr unsigned int mmGENERIC_I2C_STATUS__SI = 0x1836; +constexpr unsigned int mmGENERIC_I2C_TRANSACTION__SI = 0x1839; +constexpr unsigned int mmGENFC_RD__SI__VI = 0x00F2; +constexpr unsigned int mmGENFC_WT__SI__VI = 0x00EE; +constexpr unsigned int mmGENMO_RD__SI__VI = 0x00F3; +constexpr unsigned int mmGENMO_WT__SI__VI = 0x00F0; +constexpr unsigned int mmGENS0__SI__VI = 0x00F0; +constexpr unsigned int mmGENS1__SI__VI = 0x00EE; +constexpr unsigned int mmGFX_COPY_STATE = 0xA1F4; +constexpr unsigned int mmGFX_PIPE_CONTROL__CI__VI = 0x226D; +constexpr unsigned int mmGFX_PIPE_PRIORITY__CI__VI = 0xF87F; +constexpr unsigned int mmGMCON_DEBUG__CI__VI = 0x0D5F; +constexpr unsigned int mmGMCON_MASK__CI__VI = 0x0D52; +constexpr unsigned int mmGMCON_MISC2__CI__VI = 0x0D44; +constexpr unsigned int mmGMCON_MISC3__CI__VI = 0x0D51; +constexpr unsigned int mmGMCON_MISC__CI__VI = 0x0D43; +constexpr unsigned int mmGMCON_PERF_MON_CNTL0__CI__VI = 0x0D4A; +constexpr unsigned int mmGMCON_PERF_MON_CNTL1__CI__VI = 0x0D4B; +constexpr unsigned int mmGMCON_PERF_MON_RSLT0__CI__VI = 0x0D4C; +constexpr unsigned int mmGMCON_PERF_MON_RSLT1__CI__VI = 0x0D4D; +constexpr unsigned int mmGMCON_PGFSM_CONFIG__CI__VI = 0x0D4E; +constexpr unsigned int mmGMCON_PGFSM_READ__CI__VI = 0x0D50; +constexpr unsigned int mmGMCON_PGFSM_WRITE__CI__VI = 0x0D4F; +constexpr unsigned int mmGMCON_RENG_EXECUTE__CI__VI = 0x0D42; +constexpr unsigned int mmGMCON_RENG_RAM_DATA__CI__VI = 0x0D41; +constexpr unsigned int mmGMCON_RENG_RAM_INDEX__CI__VI = 0x0D40; +constexpr unsigned int mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET0__CI__VI = 0x0D48; +constexpr unsigned int mmGMCON_STCTRL_REGISTER_SAVE_EXCL_SET1__CI__VI = 0x0D49; +constexpr unsigned int mmGMCON_STCTRL_REGISTER_SAVE_RANGE0__CI__VI = 0x0D45; +constexpr unsigned int mmGMCON_STCTRL_REGISTER_SAVE_RANGE1__CI__VI = 0x0D46; +constexpr unsigned int mmGMCON_STCTRL_REGISTER_SAVE_RANGE2__CI__VI = 0x0D47; +constexpr unsigned int mmGPIOPAD_A__CI__VI = 0x0183; +constexpr unsigned int mmGPIOPAD_A__SI = 0x05E7; +constexpr unsigned int mmGPIOPAD_EN__CI__VI = 0x0184; +constexpr unsigned int mmGPIOPAD_EN__SI = 0x05E8; +constexpr unsigned int mmGPIOPAD_EXTERN_TRIG_CNTL__CI__VI = 0x018D; +constexpr unsigned int mmGPIOPAD_EXTERN_TRIG_CNTL__SI = 0x05F1; +constexpr unsigned int mmGPIOPAD_INT_EN__CI__VI = 0x018A; +constexpr unsigned int mmGPIOPAD_INT_EN__SI = 0x05EE; +constexpr unsigned int mmGPIOPAD_INT_POLARITY__CI__VI = 0x018C; +constexpr unsigned int mmGPIOPAD_INT_POLARITY__SI = 0x05F0; +constexpr unsigned int mmGPIOPAD_INT_STAT_AK__CI__VI = 0x0189; +constexpr unsigned int mmGPIOPAD_INT_STAT_AK__SI = 0x05ED; +constexpr unsigned int mmGPIOPAD_INT_STAT_EN__CI__VI = 0x0187; +constexpr unsigned int mmGPIOPAD_INT_STAT_EN__SI = 0x05EB; +constexpr unsigned int mmGPIOPAD_INT_STAT__CI__VI = 0x0188; +constexpr unsigned int mmGPIOPAD_INT_STAT__SI = 0x05EC; +constexpr unsigned int mmGPIOPAD_INT_TYPE__CI__VI = 0x018B; +constexpr unsigned int mmGPIOPAD_INT_TYPE__SI = 0x05EF; +constexpr unsigned int mmGPIOPAD_MASK__CI__VI = 0x0182; +constexpr unsigned int mmGPIOPAD_MASK__SI = 0x05E6; +constexpr unsigned int mmGPIOPAD_PD_EN__CI__VI = 0x0193; +constexpr unsigned int mmGPIOPAD_PD_EN__SI = 0x05F4; +constexpr unsigned int mmGPIOPAD_PINSTRAPS__CI__VI = 0x0186; +constexpr unsigned int mmGPIOPAD_PINSTRAPS__SI = 0x05EA; +constexpr unsigned int mmGPIOPAD_PU_EN__CI__VI = 0x0192; +constexpr unsigned int mmGPIOPAD_PU_EN__SI = 0x05F3; +constexpr unsigned int mmGPIOPAD_RCVR_SEL__CI__VI = 0x0191; +constexpr unsigned int mmGPIOPAD_RCVR_SEL__SI = 0x05F2; +constexpr unsigned int mmGPIOPAD_STRENGTH__CI__VI = 0x0181; +constexpr unsigned int mmGPIOPAD_STRENGTH__SI = 0x05E5; +constexpr unsigned int mmGPIOPAD_SW_INT_STAT__CI__VI = 0x0180; +constexpr unsigned int mmGPIOPAD_SW_INT_STAT__SI = 0x05E4; +constexpr unsigned int mmGPIOPAD_Y__CI__VI = 0x0185; +constexpr unsigned int mmGPIOPAD_Y__SI = 0x05E9; +constexpr unsigned int mmGPU_GARLIC_FLUSH_DONE__CI__VI = 0x1414; +constexpr unsigned int mmGPU_GARLIC_FLUSH_REQ__CI__VI = 0x1413; +constexpr unsigned int mmGPU_HDP_FLUSH_DONE__CI__VI = 0x1538; +constexpr unsigned int mmGPU_HDP_FLUSH_REQ__CI__VI = 0x1537; +constexpr unsigned int mmGRBM_CNTL = 0x2000; +constexpr unsigned int mmGRBM_DEBUG = 0x2014; +constexpr unsigned int mmGRBM_DEBUG_CNTL = 0x2009; +constexpr unsigned int mmGRBM_DEBUG_DATA = 0x200A; +constexpr unsigned int mmGRBM_DEBUG_SNAPSHOT = 0x2015; +constexpr unsigned int mmGRBM_GFX_CLKEN_CNTL = 0x200C; +constexpr unsigned int mmGRBM_GFX_INDEX__CI__VI = 0xC200; +constexpr unsigned int mmGRBM_GFX_INDEX__SI = 0x200B; +constexpr unsigned int mmGRBM_INT_CNTL = 0x2018; +constexpr unsigned int mmGRBM_NOWHERE = 0x203F; +constexpr unsigned int mmGRBM_PERFCOUNTER0_HI__CI__VI = 0xD041; +constexpr unsigned int mmGRBM_PERFCOUNTER0_HI__SI = 0x201F; +constexpr unsigned int mmGRBM_PERFCOUNTER0_LO__CI__VI = 0xD040; +constexpr unsigned int mmGRBM_PERFCOUNTER0_LO__SI = 0x201E; +constexpr unsigned int mmGRBM_PERFCOUNTER0_SELECT__CI__VI = 0xD840; +constexpr unsigned int mmGRBM_PERFCOUNTER0_SELECT__SI = 0x201C; +constexpr unsigned int mmGRBM_PERFCOUNTER1_HI__CI__VI = 0xD044; +constexpr unsigned int mmGRBM_PERFCOUNTER1_HI__SI = 0x2021; +constexpr unsigned int mmGRBM_PERFCOUNTER1_LO__CI__VI = 0xD043; +constexpr unsigned int mmGRBM_PERFCOUNTER1_LO__SI = 0x2020; +constexpr unsigned int mmGRBM_PERFCOUNTER1_SELECT__CI__VI = 0xD841; +constexpr unsigned int mmGRBM_PERFCOUNTER1_SELECT__SI = 0x201D; +constexpr unsigned int mmGRBM_PWR_CNTL = 0x2003; +constexpr unsigned int mmGRBM_READ_ERROR = 0x2016; +constexpr unsigned int mmGRBM_READ_ERROR2__CI__VI = 0x2017; +constexpr unsigned int mmGRBM_SCRATCH_REG0 = 0x2040; +constexpr unsigned int mmGRBM_SCRATCH_REG1 = 0x2041; +constexpr unsigned int mmGRBM_SCRATCH_REG2 = 0x2042; +constexpr unsigned int mmGRBM_SCRATCH_REG3 = 0x2043; +constexpr unsigned int mmGRBM_SCRATCH_REG4 = 0x2044; +constexpr unsigned int mmGRBM_SCRATCH_REG5 = 0x2045; +constexpr unsigned int mmGRBM_SCRATCH_REG6 = 0x2046; +constexpr unsigned int mmGRBM_SCRATCH_REG7 = 0x2047; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_HI__CI__VI = 0xD046; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_HI__SI = 0x202B; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_LO__CI__VI = 0xD045; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_LO__SI = 0x202A; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_SELECT__CI__VI = 0xD842; +constexpr unsigned int mmGRBM_SE0_PERFCOUNTER_SELECT__SI = 0x2026; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_HI__CI__VI = 0xD048; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_HI__SI = 0x202D; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_LO__CI__VI = 0xD047; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_LO__SI = 0x202C; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_SELECT__CI__VI = 0xD843; +constexpr unsigned int mmGRBM_SE1_PERFCOUNTER_SELECT__SI = 0x2027; +constexpr unsigned int mmGRBM_SE2_PERFCOUNTER_HI__CI__VI = 0xD04A; +constexpr unsigned int mmGRBM_SE2_PERFCOUNTER_LO__CI__VI = 0xD049; +constexpr unsigned int mmGRBM_SE2_PERFCOUNTER_SELECT__CI__VI = 0xD844; +constexpr unsigned int mmGRBM_SE3_PERFCOUNTER_HI__CI__VI = 0xD04C; +constexpr unsigned int mmGRBM_SE3_PERFCOUNTER_LO__CI__VI = 0xD04B; +constexpr unsigned int mmGRBM_SE3_PERFCOUNTER_SELECT__CI__VI = 0xD845; +constexpr unsigned int mmGRBM_SKEW_CNTL = 0x2001; +constexpr unsigned int mmGRBM_SOFT_RESET = 0x2008; +constexpr unsigned int mmGRBM_STATUS = 0x2004; +constexpr unsigned int mmGRBM_STATUS2 = 0x2002; +constexpr unsigned int mmGRBM_STATUS_SE0 = 0x2005; +constexpr unsigned int mmGRBM_STATUS_SE1 = 0x2006; +constexpr unsigned int mmGRBM_STATUS_SE2__CI__VI = 0x200E; +constexpr unsigned int mmGRBM_STATUS_SE3__CI__VI = 0x200F; +constexpr unsigned int mmGRBM_WAIT_IDLE_CLOCKS = 0x200D; +constexpr unsigned int mmGRPH8_DATA__SI__VI = 0x00F3; +constexpr unsigned int mmGRPH8_IDX__SI__VI = 0x00F3; +constexpr unsigned int mmGRPH_COMPRESS_PITCH__SI__VI = 0x1A1A; +constexpr unsigned int mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A1B; +constexpr unsigned int mmGRPH_COMPRESS_SURFACE_ADDRESS__SI__VI = 0x1A19; +constexpr unsigned int mmGRPH_CONTROL = 0x1A01; +constexpr unsigned int mmGRPH_DFQ_CONTROL__SI__VI = 0x1A14; +constexpr unsigned int mmGRPH_DFQ_STATUS__SI__VI = 0x1A15; +constexpr unsigned int mmGRPH_ENABLE__SI__VI = 0x1A00; +constexpr unsigned int mmGRPH_FLIP_CONTROL__SI__VI = 0x1A12; +constexpr unsigned int mmGRPH_INTERRUPT_CONTROL__SI__VI = 0x1A17; +constexpr unsigned int mmGRPH_INTERRUPT_STATUS__SI__VI = 0x1A16; +constexpr unsigned int mmGRPH_LUT_10BIT_BYPASS__SI__VI = 0x1A02; +constexpr unsigned int mmGRPH_PITCH__SI__VI = 0x1A06; +constexpr unsigned int mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A07; +constexpr unsigned int mmGRPH_PRIMARY_SURFACE_ADDRESS__SI__VI = 0x1A04; +constexpr unsigned int mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH__SI__VI = 0x1A08; +constexpr unsigned int mmGRPH_SECONDARY_SURFACE_ADDRESS__SI__VI = 0x1A05; +constexpr unsigned int mmGRPH_SURFACE_ADDRESS_HIGH_INUSE__SI__VI = 0x1A18; +constexpr unsigned int mmGRPH_SURFACE_ADDRESS_INUSE__SI__VI = 0x1A13; +constexpr unsigned int mmGRPH_SURFACE_OFFSET_X__SI__VI = 0x1A09; +constexpr unsigned int mmGRPH_SURFACE_OFFSET_Y__SI__VI = 0x1A0A; +constexpr unsigned int mmGRPH_SWAP_CNTL__SI__VI = 0x1A03; +constexpr unsigned int mmGRPH_UPDATE__SI__VI = 0x1A11; +constexpr unsigned int mmGRPH_X_END__SI__VI = 0x1A0D; +constexpr unsigned int mmGRPH_X_START__SI__VI = 0x1A0B; +constexpr unsigned int mmGRPH_Y_END__SI__VI = 0x1A0E; +constexpr unsigned int mmGRPH_Y_START__SI__VI = 0x1A0C; +constexpr unsigned int mmHDMI_ACR_32_0__SI = 0x1C37; +constexpr unsigned int mmHDMI_ACR_32_1__SI = 0x1C38; +constexpr unsigned int mmHDMI_ACR_44_0__SI = 0x1C39; +constexpr unsigned int mmHDMI_ACR_44_1__SI = 0x1C3A; +constexpr unsigned int mmHDMI_ACR_48_0__SI = 0x1C3B; +constexpr unsigned int mmHDMI_ACR_48_1__SI = 0x1C3C; +constexpr unsigned int mmHDMI_ACR_PACKET_CONTROL__SI = 0x1C0F; +constexpr unsigned int mmHDMI_ACR_STATUS_0__SI = 0x1C3D; +constexpr unsigned int mmHDMI_ACR_STATUS_1__SI = 0x1C3E; +constexpr unsigned int mmHDMI_AUDIO_PACKET_CONTROL__SI = 0x1C0E; +constexpr unsigned int mmHDMI_CONTROL__SI = 0x1C0C; +constexpr unsigned int mmHDMI_GC__SI = 0x1C16; +constexpr unsigned int mmHDMI_GENERIC_PACKET_CONTROL__SI = 0x1C13; +constexpr unsigned int mmHDMI_INFOFRAME_CONTROL0__SI = 0x1C11; +constexpr unsigned int mmHDMI_INFOFRAME_CONTROL1__SI = 0x1C12; +constexpr unsigned int mmHDMI_STATUS__SI = 0x1C0D; +constexpr unsigned int mmHDMI_VBI_PACKET_CONTROL__SI = 0x1C10; +constexpr unsigned int mmHDP_DEBUG0 = 0x0BCC; +constexpr unsigned int mmHDP_DEBUG1 = 0x0BCD; +constexpr unsigned int mmHDP_HOST_PATH_CNTL = 0x0B00; +constexpr unsigned int mmHDP_LAST_SURFACE_HIT = 0x0BCE; +constexpr unsigned int mmHDP_MEM_COHERENCY_FLUSH_CNTL = 0x1520; +constexpr unsigned int mmHDP_NONSURFACE_BASE = 0x0B01; +constexpr unsigned int mmHDP_NONSURFACE_INFO = 0x0B02; +constexpr unsigned int mmHDP_NONSURFACE_SIZE = 0x0B03; +constexpr unsigned int mmHDP_NONSURF_FLAGS = 0x0BC9; +constexpr unsigned int mmHDP_NONSURF_FLAGS_CLR = 0x0BCA; +constexpr unsigned int mmHDP_OUTSTANDING_REQ = 0x0BD1; +constexpr unsigned int mmHDP_REG_COHERENCY_FLUSH_CNTL = 0x1528; +constexpr unsigned int mmHDP_SC_MULTI_CHIP_CNTL = 0x0BD0; +constexpr unsigned int mmHDP_SW_SEMAPHORE = 0x0BCB; +constexpr unsigned int mmHDP_TILING_CONFIG = 0x0BCF; +constexpr unsigned int mmHDP_XDP_BUSY_STS = 0x0C3E; +constexpr unsigned int mmHDP_XDP_CGTT_BLK_CTRL = 0x0C33; +constexpr unsigned int mmHDP_XDP_CHKN = 0x0C40; +constexpr unsigned int mmHDP_XDP_D2H_BAR_UPDATE = 0x0C02; +constexpr unsigned int mmHDP_XDP_D2H_FLUSH = 0x0C01; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_10 = 0x0C0A; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_11 = 0x0C0B; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_12 = 0x0C0C; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_13 = 0x0C0D; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_14 = 0x0C0E; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_15 = 0x0C0F; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_16 = 0x0C10; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_17 = 0x0C11; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_18 = 0x0C12; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_19 = 0x0C13; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_20 = 0x0C14; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_21 = 0x0C15; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_22 = 0x0C16; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_23 = 0x0C17; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_24 = 0x0C18; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_25 = 0x0C19; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_26 = 0x0C1A; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_27 = 0x0C1B; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_28 = 0x0C1C; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_29 = 0x0C1D; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_3 = 0x0C03; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_30 = 0x0C1E; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_31 = 0x0C1F; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_32 = 0x0C20; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_33 = 0x0C21; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_34 = 0x0C22; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_4 = 0x0C04; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_5 = 0x0C05; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_6 = 0x0C06; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_7 = 0x0C07; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_8 = 0x0C08; +constexpr unsigned int mmHDP_XDP_D2H_RSVD_9 = 0x0C09; +constexpr unsigned int mmHDP_XDP_DBG_ADDR = 0x0C41; +constexpr unsigned int mmHDP_XDP_DBG_DATA = 0x0C42; +constexpr unsigned int mmHDP_XDP_DBG_MASK = 0x0C43; +constexpr unsigned int mmHDP_XDP_DIRECT2HDP_FIRST = 0x0C00; +constexpr unsigned int mmHDP_XDP_DIRECT2HDP_LAST = 0x0C23; +constexpr unsigned int mmHDP_XDP_FLUSH_ARMED_STS = 0x0C3C; +constexpr unsigned int mmHDP_XDP_FLUSH_CNTR0_STS = 0x0C3D; +constexpr unsigned int mmHDP_XDP_HDP_IPH_CFG = 0x0C31; +constexpr unsigned int mmHDP_XDP_HDP_MBX_MC_CFG = 0x0C2D; +constexpr unsigned int mmHDP_XDP_HDP_MC_CFG = 0x0C2E; +constexpr unsigned int mmHDP_XDP_HST_CFG = 0x0C2F; +constexpr unsigned int mmHDP_XDP_P2P_BAR0 = 0x0C34; +constexpr unsigned int mmHDP_XDP_P2P_BAR1 = 0x0C35; +constexpr unsigned int mmHDP_XDP_P2P_BAR2 = 0x0C36; +constexpr unsigned int mmHDP_XDP_P2P_BAR3 = 0x0C37; +constexpr unsigned int mmHDP_XDP_P2P_BAR4 = 0x0C38; +constexpr unsigned int mmHDP_XDP_P2P_BAR5 = 0x0C39; +constexpr unsigned int mmHDP_XDP_P2P_BAR6 = 0x0C3A; +constexpr unsigned int mmHDP_XDP_P2P_BAR7 = 0x0C3B; +constexpr unsigned int mmHDP_XDP_P2P_BAR_CFG = 0x0C24; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR0 = 0x0C26; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR1 = 0x0C27; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR2 = 0x0C28; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR3 = 0x0C29; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR4 = 0x0C2A; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR5 = 0x0C2B; +constexpr unsigned int mmHDP_XDP_P2P_MBX_ADDR6 = 0x0C2C; +constexpr unsigned int mmHDP_XDP_P2P_MBX_OFFSET = 0x0C25; +constexpr unsigned int mmHDP_XDP_SID_CFG = 0x0C30; +constexpr unsigned int mmHDP_XDP_SRBM_CFG = 0x0C32; +constexpr unsigned int mmHDP_XDP_STICKY = 0x0C3F; +constexpr unsigned int mmHOST_BUSNUM = 0x153D; +constexpr unsigned int mmHW_DEBUG = 0x1515; +constexpr unsigned int mmIA_CNTL_STATUS = 0x2237; +constexpr unsigned int mmIA_DEBUG_CNTL = 0x223A; +constexpr unsigned int mmIA_DEBUG_DATA = 0x223B; +constexpr unsigned int mmIA_ENHANCE = 0xA29C; +constexpr unsigned int mmIA_MULTI_VGT_PARAM = 0xA2AA; +constexpr unsigned int mmIA_PERFCOUNTER0_HI__CI__VI = 0xD089; +constexpr unsigned int mmIA_PERFCOUNTER0_HI__SI = 0x2225; +constexpr unsigned int mmIA_PERFCOUNTER0_LO__CI__VI = 0xD088; +constexpr unsigned int mmIA_PERFCOUNTER0_LO__SI = 0x2224; +constexpr unsigned int mmIA_PERFCOUNTER0_SELECT1__CI__VI = 0xD888; +constexpr unsigned int mmIA_PERFCOUNTER0_SELECT__CI__VI = 0xD884; +constexpr unsigned int mmIA_PERFCOUNTER0_SELECT__SI = 0x2220; +constexpr unsigned int mmIA_PERFCOUNTER1_HI__CI__VI = 0xD08B; +constexpr unsigned int mmIA_PERFCOUNTER1_HI__SI = 0x2227; +constexpr unsigned int mmIA_PERFCOUNTER1_LO__CI__VI = 0xD08A; +constexpr unsigned int mmIA_PERFCOUNTER1_LO__SI = 0x2226; +constexpr unsigned int mmIA_PERFCOUNTER1_SELECT__CI__VI = 0xD885; +constexpr unsigned int mmIA_PERFCOUNTER1_SELECT__SI = 0x2221; +constexpr unsigned int mmIA_PERFCOUNTER2_HI__CI__VI = 0xD08D; +constexpr unsigned int mmIA_PERFCOUNTER2_HI__SI = 0x2229; +constexpr unsigned int mmIA_PERFCOUNTER2_LO__CI__VI = 0xD08C; +constexpr unsigned int mmIA_PERFCOUNTER2_LO__SI = 0x2228; +constexpr unsigned int mmIA_PERFCOUNTER2_SELECT__CI__VI = 0xD886; +constexpr unsigned int mmIA_PERFCOUNTER2_SELECT__SI = 0x2222; +constexpr unsigned int mmIA_PERFCOUNTER3_HI__CI__VI = 0xD08F; +constexpr unsigned int mmIA_PERFCOUNTER3_HI__SI = 0x222B; +constexpr unsigned int mmIA_PERFCOUNTER3_LO__CI__VI = 0xD08E; +constexpr unsigned int mmIA_PERFCOUNTER3_LO__SI = 0x222A; +constexpr unsigned int mmIA_PERFCOUNTER3_SELECT__CI__VI = 0xD887; +constexpr unsigned int mmIA_PERFCOUNTER3_SELECT__SI = 0x2223; +constexpr unsigned int mmIA_VMID_OVERRIDE__SI__CI = 0x2260; +constexpr unsigned int mmIH_ADVFAULT_CNTL__SI__CI = 0x0F8C; +constexpr unsigned int mmIH_PERFCOUNTER0_RESULT__CI = 0x0F8A; +constexpr unsigned int mmIH_PERFCOUNTER1_RESULT__CI = 0x0F8B; +constexpr unsigned int mmIH_PERFMON_CNTL__CI = 0x0F89; +constexpr unsigned int mmIH_VMID_0_LUT__CI = 0x0F50; +constexpr unsigned int mmIH_VMID_10_LUT__CI = 0x0F5A; +constexpr unsigned int mmIH_VMID_11_LUT__CI = 0x0F5B; +constexpr unsigned int mmIH_VMID_12_LUT__CI = 0x0F5C; +constexpr unsigned int mmIH_VMID_13_LUT__CI = 0x0F5D; +constexpr unsigned int mmIH_VMID_14_LUT__CI = 0x0F5E; +constexpr unsigned int mmIH_VMID_15_LUT__CI = 0x0F5F; +constexpr unsigned int mmIH_VMID_1_LUT__CI = 0x0F51; +constexpr unsigned int mmIH_VMID_2_LUT__CI = 0x0F52; +constexpr unsigned int mmIH_VMID_3_LUT__CI = 0x0F53; +constexpr unsigned int mmIH_VMID_4_LUT__CI = 0x0F54; +constexpr unsigned int mmIH_VMID_5_LUT__CI = 0x0F55; +constexpr unsigned int mmIH_VMID_6_LUT__CI = 0x0F56; +constexpr unsigned int mmIH_VMID_7_LUT__CI = 0x0F57; +constexpr unsigned int mmIH_VMID_8_LUT__CI = 0x0F58; +constexpr unsigned int mmIH_VMID_9_LUT__CI = 0x0F59; +constexpr unsigned int mmIMPCTL_RESET__CI__VI = 0x14F5; +constexpr unsigned int mmINTERRUPT_CNTL = 0x151A; +constexpr unsigned int mmINTERRUPT_CNTL2 = 0x151B; +constexpr unsigned int mmINT_MASK__SI = 0x1AD0; +constexpr unsigned int mmLB0_DC_MVP_LB_CONTROL__SI = 0x1ADB; +constexpr unsigned int mmLB0_LB_DEBUG__SI = 0x1AFC; +constexpr unsigned int mmLB0_LB_SYNC_RESET_SEL__SI = 0x1ACA; +constexpr unsigned int mmLB0_LB_TEST_DEBUG_DATA__SI__VI = 0x1AFF; +constexpr unsigned int mmLB0_LB_TEST_DEBUG_INDEX__SI__VI = 0x1AFE; +constexpr unsigned int mmLB0_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x1AD9; +constexpr unsigned int mmLB0_MVP_AFR_FLIP_MODE__SI = 0x1AD8; +constexpr unsigned int mmLB0_MVP_FLIP_LINE_NUM_INSERT__SI = 0x1ADA; +constexpr unsigned int mmLB1_DC_MVP_LB_CONTROL__SI = 0x1DDB; +constexpr unsigned int mmLB1_LB_DEBUG__SI = 0x1DFC; +constexpr unsigned int mmLB1_LB_SYNC_RESET_SEL__SI = 0x1DCA; +constexpr unsigned int mmLB1_LB_TEST_DEBUG_DATA__SI = 0x1DFF; +constexpr unsigned int mmLB1_LB_TEST_DEBUG_INDEX__SI = 0x1DFE; +constexpr unsigned int mmLB1_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x1DD9; +constexpr unsigned int mmLB1_MVP_AFR_FLIP_MODE__SI = 0x1DD8; +constexpr unsigned int mmLB1_MVP_FLIP_LINE_NUM_INSERT__SI = 0x1DDA; +constexpr unsigned int mmLB2_DC_MVP_LB_CONTROL__SI = 0x40DB; +constexpr unsigned int mmLB2_LB_DEBUG__SI = 0x40FC; +constexpr unsigned int mmLB2_LB_SYNC_RESET_SEL__SI = 0x40CA; +constexpr unsigned int mmLB2_LB_TEST_DEBUG_DATA__SI = 0x40FF; +constexpr unsigned int mmLB2_LB_TEST_DEBUG_INDEX__SI = 0x40FE; +constexpr unsigned int mmLB2_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x40D9; +constexpr unsigned int mmLB2_MVP_AFR_FLIP_MODE__SI = 0x40D8; +constexpr unsigned int mmLB2_MVP_FLIP_LINE_NUM_INSERT__SI = 0x40DA; +constexpr unsigned int mmLB3_DC_MVP_LB_CONTROL__SI = 0x43DB; +constexpr unsigned int mmLB3_LB_DEBUG__SI = 0x43FC; +constexpr unsigned int mmLB3_LB_SYNC_RESET_SEL__SI = 0x43CA; +constexpr unsigned int mmLB3_LB_TEST_DEBUG_DATA__SI = 0x43FF; +constexpr unsigned int mmLB3_LB_TEST_DEBUG_INDEX__SI = 0x43FE; +constexpr unsigned int mmLB3_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x43D9; +constexpr unsigned int mmLB3_MVP_AFR_FLIP_MODE__SI = 0x43D8; +constexpr unsigned int mmLB3_MVP_FLIP_LINE_NUM_INSERT__SI = 0x43DA; +constexpr unsigned int mmLB4_DC_MVP_LB_CONTROL__SI = 0x46DB; +constexpr unsigned int mmLB4_LB_DEBUG__SI = 0x46FC; +constexpr unsigned int mmLB4_LB_SYNC_RESET_SEL__SI = 0x46CA; +constexpr unsigned int mmLB4_LB_TEST_DEBUG_DATA__SI = 0x46FF; +constexpr unsigned int mmLB4_LB_TEST_DEBUG_INDEX__SI = 0x46FE; +constexpr unsigned int mmLB4_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x46D9; +constexpr unsigned int mmLB4_MVP_AFR_FLIP_MODE__SI = 0x46D8; +constexpr unsigned int mmLB4_MVP_FLIP_LINE_NUM_INSERT__SI = 0x46DA; +constexpr unsigned int mmLB5_DC_MVP_LB_CONTROL__SI = 0x49DB; +constexpr unsigned int mmLB5_LB_DEBUG__SI = 0x49FC; +constexpr unsigned int mmLB5_LB_SYNC_RESET_SEL__SI = 0x49CA; +constexpr unsigned int mmLB5_LB_TEST_DEBUG_DATA__SI = 0x49FF; +constexpr unsigned int mmLB5_LB_TEST_DEBUG_INDEX__SI = 0x49FE; +constexpr unsigned int mmLB5_MVP_AFR_FLIP_FIFO_CNTL__SI = 0x49D9; +constexpr unsigned int mmLB5_MVP_AFR_FLIP_MODE__SI = 0x49D8; +constexpr unsigned int mmLB5_MVP_FLIP_LINE_NUM_INSERT__SI = 0x49DA; +constexpr unsigned int mmLB_DEBUG__SI = 0x1AFC; +constexpr unsigned int mmLB_SYNC_RESET_SEL__SI = 0x1ACA; +constexpr unsigned int mmLB_TEST_DEBUG_DATA__SI__VI = 0x1AFF; +constexpr unsigned int mmLB_TEST_DEBUG_INDEX__SI__VI = 0x1AFE; +constexpr unsigned int mmLNCNT_CONTROL__CI = 0x1487; +constexpr unsigned int mmLVDS_DATA_CNTL__SI = 0x1C8C; +constexpr unsigned int mmLVTMA_PWRSEQ_CNTL__SI = 0x1962; +constexpr unsigned int mmLVTMA_PWRSEQ_DELAY1__SI = 0x1965; +constexpr unsigned int mmLVTMA_PWRSEQ_DELAY2__SI = 0x1966; +constexpr unsigned int mmLVTMA_PWRSEQ_REF_DIV__SI = 0x1964; +constexpr unsigned int mmLVTMA_PWRSEQ_STATE__SI = 0x1963; +constexpr unsigned int mmMASTER_COMM_CMD_REG__SI__VI = 0x161F; +constexpr unsigned int mmMASTER_COMM_CNTL_REG__SI__VI = 0x1620; +constexpr unsigned int mmMASTER_COMM_DATA_REG1__SI__VI = 0x161C; +constexpr unsigned int mmMASTER_COMM_DATA_REG2__SI__VI = 0x161D; +constexpr unsigned int mmMASTER_COMM_DATA_REG3__SI__VI = 0x161E; +constexpr unsigned int mmMASTER_CREDIT_CNTL = 0x1516; +constexpr unsigned int mmMASTER_UPDATE_LOCK__SI__VI = 0x1BBD; +constexpr unsigned int mmMASTER_UPDATE_MODE__SI__VI = 0x1BBE; +constexpr unsigned int mmMCIF_CONTROL__SI = 0x0314; +constexpr unsigned int mmMCIF_TEST_DEBUG_DATA__SI = 0x0317; +constexpr unsigned int mmMCIF_TEST_DEBUG_INDEX__SI = 0x0316; +constexpr unsigned int mmMCIF_WRITE_COMBINE_CONTROL__SI = 0x0315; +constexpr unsigned int mmMCLK_PWRMGT_CNTL__SI__CI = 0x0AE8; +constexpr unsigned int mmMC_ARB_ADDR_HASH = 0x09DC; +constexpr unsigned int mmMC_ARB_ADDR_SWIZ0__CI__VI = 0x09CB; +constexpr unsigned int mmMC_ARB_ADDR_SWIZ1__CI__VI = 0x09CC; +constexpr unsigned int mmMC_ARB_AGE_CNTL__CI__VI = 0x09BF; +constexpr unsigned int mmMC_ARB_AGE_RD = 0x09E9; +constexpr unsigned int mmMC_ARB_AGE_WR = 0x09EA; +constexpr unsigned int mmMC_ARB_BANKMAP = 0x09D7; +constexpr unsigned int mmMC_ARB_BURST_TIME = 0x0A02; +constexpr unsigned int mmMC_ARB_BUSY_STATUS__CI__VI = 0x09FD; +constexpr unsigned int mmMC_ARB_CAC_CNTL = 0x09D4; +constexpr unsigned int mmMC_ARB_CG = 0x09FA; +constexpr unsigned int mmMC_ARB_DRAM_TIMING = 0x09DD; +constexpr unsigned int mmMC_ARB_DRAM_TIMING2 = 0x09DE; +constexpr unsigned int mmMC_ARB_DRAM_TIMING2_1 = 0x09FF; +constexpr unsigned int mmMC_ARB_DRAM_TIMING_1 = 0x09FC; +constexpr unsigned int mmMC_ARB_FED_CNTL = 0x09C1; +constexpr unsigned int mmMC_ARB_GDEC_RD_CNTL = 0x09EE; +constexpr unsigned int mmMC_ARB_GDEC_WR_CNTL = 0x09EF; +constexpr unsigned int mmMC_ARB_GECC2 = 0x09C9; +constexpr unsigned int mmMC_ARB_GECC2_CLI = 0x09CA; +constexpr unsigned int mmMC_ARB_GECC2_DEBUG = 0x09C4; +constexpr unsigned int mmMC_ARB_GECC2_DEBUG2 = 0x09C5; +constexpr unsigned int mmMC_ARB_GECC2_MISC = 0x09C3; +constexpr unsigned int mmMC_ARB_GECC2_STATUS = 0x09C2; +constexpr unsigned int mmMC_ARB_HARSH_BWCNT0_RD__CI__VI = 0x0DCE; +constexpr unsigned int mmMC_ARB_HARSH_BWCNT0_WR__CI__VI = 0x0DCF; +constexpr unsigned int mmMC_ARB_HARSH_BWCNT1_RD__CI__VI = 0x0DD0; +constexpr unsigned int mmMC_ARB_HARSH_BWCNT1_WR__CI__VI = 0x0DD1; +constexpr unsigned int mmMC_ARB_HARSH_BWPERIOD0_RD__CI__VI = 0x0DCA; +constexpr unsigned int mmMC_ARB_HARSH_BWPERIOD0_WR__CI__VI = 0x0DCB; +constexpr unsigned int mmMC_ARB_HARSH_BWPERIOD1_RD__CI__VI = 0x0DCC; +constexpr unsigned int mmMC_ARB_HARSH_BWPERIOD1_WR__CI__VI = 0x0DCD; +constexpr unsigned int mmMC_ARB_HARSH_CTL_RD__CI__VI = 0x0DD6; +constexpr unsigned int mmMC_ARB_HARSH_CTL_WR__CI__VI = 0x0DD7; +constexpr unsigned int mmMC_ARB_HARSH_EN_RD__CI__VI = 0x0DC0; +constexpr unsigned int mmMC_ARB_HARSH_EN_WR__CI__VI = 0x0DC1; +constexpr unsigned int mmMC_ARB_HARSH_SAT0_RD__CI__VI = 0x0DD2; +constexpr unsigned int mmMC_ARB_HARSH_SAT0_WR__CI__VI = 0x0DD3; +constexpr unsigned int mmMC_ARB_HARSH_SAT1_RD__CI__VI = 0x0DD4; +constexpr unsigned int mmMC_ARB_HARSH_SAT1_WR__CI__VI = 0x0DD5; +constexpr unsigned int mmMC_ARB_HARSH_TX_HI0_RD__CI__VI = 0x0DC2; +constexpr unsigned int mmMC_ARB_HARSH_TX_HI0_WR__CI__VI = 0x0DC3; +constexpr unsigned int mmMC_ARB_HARSH_TX_HI1_RD__CI__VI = 0x0DC4; +constexpr unsigned int mmMC_ARB_HARSH_TX_HI1_WR__CI__VI = 0x0DC5; +constexpr unsigned int mmMC_ARB_HARSH_TX_LO0_RD__CI__VI = 0x0DC6; +constexpr unsigned int mmMC_ARB_HARSH_TX_LO0_WR__CI__VI = 0x0DC7; +constexpr unsigned int mmMC_ARB_HARSH_TX_LO1_RD__CI__VI = 0x0DC8; +constexpr unsigned int mmMC_ARB_HARSH_TX_LO1_WR__CI__VI = 0x0DC9; +constexpr unsigned int mmMC_ARB_LAZY0_RD = 0x09E5; +constexpr unsigned int mmMC_ARB_LAZY0_WR = 0x09E6; +constexpr unsigned int mmMC_ARB_LAZY1_RD = 0x09E7; +constexpr unsigned int mmMC_ARB_LAZY1_WR = 0x09E8; +constexpr unsigned int mmMC_ARB_LM_RD = 0x09F0; +constexpr unsigned int mmMC_ARB_LM_WR = 0x09F1; +constexpr unsigned int mmMC_ARB_MAX_LAT_CID__CI__VI = 0x09F6; +constexpr unsigned int mmMC_ARB_MAX_LAT_RSLT0__CI__VI = 0x09F7; +constexpr unsigned int mmMC_ARB_MAX_LAT_RSLT1__CI__VI = 0x09F8; +constexpr unsigned int mmMC_ARB_MINCLKS = 0x09DA; +constexpr unsigned int mmMC_ARB_MISC = 0x09D6; +constexpr unsigned int mmMC_ARB_MISC2 = 0x09D5; +constexpr unsigned int mmMC_ARB_MISC3__CI__VI = 0x09CD; +constexpr unsigned int mmMC_ARB_PERFCOUNTER0_CFG__CI__VI = 0x07BC; +constexpr unsigned int mmMC_ARB_PERFCOUNTER1_CFG__CI__VI = 0x07BD; +constexpr unsigned int mmMC_ARB_PERFCOUNTER2_CFG__CI__VI = 0x07BE; +constexpr unsigned int mmMC_ARB_PERFCOUNTER3_CFG__CI__VI = 0x07BF; +constexpr unsigned int mmMC_ARB_PERFCOUNTER_HI__CI__VI = 0x07AE; +constexpr unsigned int mmMC_ARB_PERFCOUNTER_LO__CI__VI = 0x07A6; +constexpr unsigned int mmMC_ARB_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D4; +constexpr unsigned int mmMC_ARB_PERF_MON_CNTL0_ECC__CI = 0x07DB; +constexpr unsigned int mmMC_ARB_PERF_MON_CNTL0__SI = 0x09F6; +constexpr unsigned int mmMC_ARB_PM_CNTL = 0x09ED; +constexpr unsigned int mmMC_ARB_POP = 0x09D9; +constexpr unsigned int mmMC_ARB_RAMCFG = 0x09D8; +constexpr unsigned int mmMC_ARB_REMREQ = 0x09F2; +constexpr unsigned int mmMC_ARB_REPLAY = 0x09F3; +constexpr unsigned int mmMC_ARB_RET_CREDITS2__CI__VI = 0x09C0; +constexpr unsigned int mmMC_ARB_RET_CREDITS_RD = 0x09F4; +constexpr unsigned int mmMC_ARB_RET_CREDITS_WR = 0x09F5; +constexpr unsigned int mmMC_ARB_RFSH_CNTL = 0x09EB; +constexpr unsigned int mmMC_ARB_RFSH_RATE = 0x09EC; +constexpr unsigned int mmMC_ARB_RTT_CNTL0 = 0x09D0; +constexpr unsigned int mmMC_ARB_RTT_CNTL1 = 0x09D1; +constexpr unsigned int mmMC_ARB_RTT_CNTL2 = 0x09D2; +constexpr unsigned int mmMC_ARB_RTT_DATA = 0x09CF; +constexpr unsigned int mmMC_ARB_RTT_DEBUG = 0x09D3; +constexpr unsigned int mmMC_ARB_SQM_CNTL = 0x09DB; +constexpr unsigned int mmMC_ARB_SSM__CI = 0x09F9; +constexpr unsigned int mmMC_ARB_TM_CNTL_RD = 0x09E3; +constexpr unsigned int mmMC_ARB_TM_CNTL_WR = 0x09E4; +constexpr unsigned int mmMC_ARB_WCDR__SI__CI = 0x09FB; +constexpr unsigned int mmMC_ARB_WCDR_2__SI__CI = 0x09CE; +constexpr unsigned int mmMC_ARB_WTM_CNTL_RD = 0x09DF; +constexpr unsigned int mmMC_ARB_WTM_CNTL_WR = 0x09E0; +constexpr unsigned int mmMC_ARB_WTM_GRPWT_RD = 0x09E1; +constexpr unsigned int mmMC_ARB_WTM_GRPWT_WR = 0x09E2; +constexpr unsigned int mmMC_BIST_AUTO_CNTL__SI__CI = 0x0A06; +constexpr unsigned int mmMC_BIST_CMD_CNTL__SI__CI = 0x0A8E; +constexpr unsigned int mmMC_BIST_CMP_CNTL__SI__CI = 0x0A8D; +constexpr unsigned int mmMC_BIST_CMP_CNTL_2__SI__CI = 0x0AB6; +constexpr unsigned int mmMC_BIST_DATA_MASK__SI__CI = 0x0A12; +constexpr unsigned int mmMC_BIST_DIR_CNTL__SI__CI = 0x0A07; +constexpr unsigned int mmMC_BIST_EADDR__SI__CI = 0x0A09; +constexpr unsigned int mmMC_BIST_RDATA_EDC__SI__CI = 0x0A1D; +constexpr unsigned int mmMC_BIST_RDATA_MASK__SI__CI = 0x0A1C; +constexpr unsigned int mmMC_BIST_SADDR__SI__CI = 0x0A08; +constexpr unsigned int mmMC_CG_CONFIG = 0x096F; +constexpr unsigned int mmMC_CG_CONFIG_MCD = 0x0829; +constexpr unsigned int mmMC_CITF_CNTL = 0x0970; +constexpr unsigned int mmMC_CITF_CREDITS_ARB_RD = 0x0972; +constexpr unsigned int mmMC_CITF_CREDITS_ARB_WR = 0x0973; +constexpr unsigned int mmMC_CITF_CREDITS_VM = 0x0971; +constexpr unsigned int mmMC_CITF_CREDITS_XBAR = 0x0989; +constexpr unsigned int mmMC_CITF_DAGB_CNTL = 0x0974; +constexpr unsigned int mmMC_CITF_DAGB_DLY = 0x0977; +constexpr unsigned int mmMC_CITF_INT_CREDITS = 0x0975; +constexpr unsigned int mmMC_CITF_INT_CREDITS_WR__CI__VI = 0x097D; +constexpr unsigned int mmMC_CITF_MISC_RD_CG = 0x0992; +constexpr unsigned int mmMC_CITF_MISC_VM_CG = 0x0994; +constexpr unsigned int mmMC_CITF_MISC_WR_CG = 0x0993; +constexpr unsigned int mmMC_CITF_PERFCOUNTER0_CFG__CI__VI = 0x07B0; +constexpr unsigned int mmMC_CITF_PERFCOUNTER1_CFG__CI__VI = 0x07B1; +constexpr unsigned int mmMC_CITF_PERFCOUNTER2_CFG__CI__VI = 0x07B2; +constexpr unsigned int mmMC_CITF_PERFCOUNTER3_CFG__CI__VI = 0x07B3; +constexpr unsigned int mmMC_CITF_PERFCOUNTER_HI__CI__VI = 0x07A8; +constexpr unsigned int mmMC_CITF_PERFCOUNTER_LO__CI__VI = 0x07A0; +constexpr unsigned int mmMC_CITF_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07CE; +constexpr unsigned int mmMC_CITF_PERF_MON_CNTL2 = 0x098E; +constexpr unsigned int mmMC_CITF_PERF_MON_RSLT2 = 0x0991; +constexpr unsigned int mmMC_CITF_REMREQ = 0x097A; +constexpr unsigned int mmMC_CITF_RET_MODE = 0x0976; +constexpr unsigned int mmMC_CITF_WTM_RD_CNTL = 0x097F; +constexpr unsigned int mmMC_CITF_WTM_WR_CNTL = 0x0980; +constexpr unsigned int mmMC_CITF_XTRA_ENABLE = 0x096D; +constexpr unsigned int mmMC_CONFIG = 0x0800; +constexpr unsigned int mmMC_CONFIG_MCD = 0x0828; +constexpr unsigned int mmMC_DC_INTERFACE_NACK_STATUS__SI = 0x031C; +constexpr unsigned int mmMC_DLB_CONFIG0__CI = 0x0D93; +constexpr unsigned int mmMC_DLB_CONFIG1__CI = 0x0D94; +constexpr unsigned int mmMC_DLB_MISCCTRL0__CI = 0x0D90; +constexpr unsigned int mmMC_DLB_MISCCTRL1__CI = 0x0D91; +constexpr unsigned int mmMC_DLB_MISCCTRL2__CI = 0x0D92; +constexpr unsigned int mmMC_DLB_SETUPFIFO__CI = 0x0D97; +constexpr unsigned int mmMC_DLB_SETUPSWEEP__CI = 0x0D96; +constexpr unsigned int mmMC_DLB_SETUP__CI = 0x0D95; +constexpr unsigned int mmMC_DLB_STATUS_MISC0__CI = 0x0D9A; +constexpr unsigned int mmMC_DLB_STATUS_MISC1__CI = 0x0D9B; +constexpr unsigned int mmMC_DLB_STATUS_MISC2__CI = 0x0D9C; +constexpr unsigned int mmMC_DLB_STATUS_MISC3__CI = 0x0D9D; +constexpr unsigned int mmMC_DLB_STATUS_MISC4__CI = 0x0D9E; +constexpr unsigned int mmMC_DLB_STATUS_MISC5__CI = 0x0D9F; +constexpr unsigned int mmMC_DLB_STATUS_MISC6__CI = 0x0DA0; +constexpr unsigned int mmMC_DLB_STATUS_MISC7__CI = 0x0DA1; +constexpr unsigned int mmMC_DLB_STATUS__CI = 0x0D99; +constexpr unsigned int mmMC_DLB_WRITE_MASK__CI = 0x0D98; +constexpr unsigned int mmMC_HUB_MISC_DBG__SI__CI = 0x0831; +constexpr unsigned int mmMC_HUB_MISC_FRAMING = 0x0834; +constexpr unsigned int mmMC_HUB_MISC_HUB_CG = 0x082E; +constexpr unsigned int mmMC_HUB_MISC_IDLE_STATUS = 0x0847; +constexpr unsigned int mmMC_HUB_MISC_OVERRIDE = 0x0833; +constexpr unsigned int mmMC_HUB_MISC_POWER = 0x082D; +constexpr unsigned int mmMC_HUB_MISC_SIP_CG = 0x0830; +constexpr unsigned int mmMC_HUB_MISC_STATUS = 0x0832; +constexpr unsigned int mmMC_HUB_MISC_VM_CG = 0x082F; +constexpr unsigned int mmMC_HUB_PERFCOUNTER0_CFG__CI__VI = 0x07B4; +constexpr unsigned int mmMC_HUB_PERFCOUNTER1_CFG__CI__VI = 0x07B5; +constexpr unsigned int mmMC_HUB_PERFCOUNTER2_CFG__CI__VI = 0x07B6; +constexpr unsigned int mmMC_HUB_PERFCOUNTER3_CFG__CI__VI = 0x07B7; +constexpr unsigned int mmMC_HUB_PERFCOUNTER_HI__CI__VI = 0x07A9; +constexpr unsigned int mmMC_HUB_PERFCOUNTER_LO__CI__VI = 0x07A1; +constexpr unsigned int mmMC_HUB_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07CF; +constexpr unsigned int mmMC_HUB_RDREQ_ACPG_LIMIT__CI__VI = 0x0849; +constexpr unsigned int mmMC_HUB_RDREQ_ACPG__CI = 0x0887; +constexpr unsigned int mmMC_HUB_RDREQ_ACPO__CI = 0x0888; +constexpr unsigned int mmMC_HUB_RDREQ_CNTL = 0x083B; +constexpr unsigned int mmMC_HUB_RDREQ_CPC__CI = 0x085A; +constexpr unsigned int mmMC_HUB_RDREQ_CPF__CI = 0x085B; +constexpr unsigned int mmMC_HUB_RDREQ_CPG__CI = 0x0859; +constexpr unsigned int mmMC_HUB_RDREQ_CP__SI = 0x0859; +constexpr unsigned int mmMC_HUB_RDREQ_CREDITS = 0x0844; +constexpr unsigned int mmMC_HUB_RDREQ_CREDITS2 = 0x0845; +constexpr unsigned int mmMC_HUB_RDREQ_DMIF_LIMIT = 0x0848; +constexpr unsigned int mmMC_HUB_RDREQ_DMIF__CI = 0x0865; +constexpr unsigned int mmMC_HUB_RDREQ_DMIF__SI = 0x0863; +constexpr unsigned int mmMC_HUB_RDREQ_GBL0 = 0x0856; +constexpr unsigned int mmMC_HUB_RDREQ_GBL1 = 0x0857; +constexpr unsigned int mmMC_HUB_RDREQ_HDP__CI = 0x085E; +constexpr unsigned int mmMC_HUB_RDREQ_HDP__SI = 0x085B; +constexpr unsigned int mmMC_HUB_RDREQ_IA0__CI = 0x084F; +constexpr unsigned int mmMC_HUB_RDREQ_IA1__CI = 0x0850; +constexpr unsigned int mmMC_HUB_RDREQ_IA__CI = 0x0864; +constexpr unsigned int mmMC_HUB_RDREQ_MCDW = 0x0851; +constexpr unsigned int mmMC_HUB_RDREQ_MCDX = 0x0852; +constexpr unsigned int mmMC_HUB_RDREQ_MCDY = 0x0853; +constexpr unsigned int mmMC_HUB_RDREQ_MCDZ = 0x0854; +constexpr unsigned int mmMC_HUB_RDREQ_MCIF__CI = 0x0866; +constexpr unsigned int mmMC_HUB_RDREQ_MCIF__SI = 0x0864; +constexpr unsigned int mmMC_HUB_RDREQ_RLC__CI = 0x085F; +constexpr unsigned int mmMC_HUB_RDREQ_RLC__SI = 0x085D; +constexpr unsigned int mmMC_HUB_RDREQ_SAM__CI = 0x0889; +constexpr unsigned int mmMC_HUB_RDREQ_SDMA0__CI = 0x085C; +constexpr unsigned int mmMC_HUB_RDREQ_SDMA1__CI = 0x085D; +constexpr unsigned int mmMC_HUB_RDREQ_SEM__CI = 0x0860; +constexpr unsigned int mmMC_HUB_RDREQ_SEM__SI = 0x085E; +constexpr unsigned int mmMC_HUB_RDREQ_SIP = 0x0855; +constexpr unsigned int mmMC_HUB_RDREQ_SMU = 0x0858; +constexpr unsigned int mmMC_HUB_RDREQ_STATUS = 0x0839; +constexpr unsigned int mmMC_HUB_RDREQ_UMC__CI = 0x0862; +constexpr unsigned int mmMC_HUB_RDREQ_UMC__SI = 0x0860; +constexpr unsigned int mmMC_HUB_RDREQ_UVD__CI = 0x0863; +constexpr unsigned int mmMC_HUB_RDREQ_UVD__SI = 0x0861; +constexpr unsigned int mmMC_HUB_RDREQ_VCEU__CI = 0x0868; +constexpr unsigned int mmMC_HUB_RDREQ_VCEU__SI = 0x0866; +constexpr unsigned int mmMC_HUB_RDREQ_VCE__CI = 0x0861; +constexpr unsigned int mmMC_HUB_RDREQ_VCE__SI = 0x085F; +constexpr unsigned int mmMC_HUB_RDREQ_VMC__CI = 0x0867; +constexpr unsigned int mmMC_HUB_RDREQ_VMC__SI = 0x0865; +constexpr unsigned int mmMC_HUB_RDREQ_WTM_CNTL = 0x083D; +constexpr unsigned int mmMC_HUB_RDREQ_XDMAM__CI = 0x0886; +constexpr unsigned int mmMC_HUB_RDREQ_XDMAM__SI = 0x0882; +constexpr unsigned int mmMC_HUB_SHARED_DAGB_DLY = 0x0846; +constexpr unsigned int mmMC_HUB_WDP_ACPG__CI = 0x088A; +constexpr unsigned int mmMC_HUB_WDP_ACPO__CI = 0x088B; +constexpr unsigned int mmMC_HUB_WDP_BP = 0x0837; +constexpr unsigned int mmMC_HUB_WDP_CNTL = 0x0835; +constexpr unsigned int mmMC_HUB_WDP_CPC__CI = 0x086F; +constexpr unsigned int mmMC_HUB_WDP_CPF__CI = 0x0870; +constexpr unsigned int mmMC_HUB_WDP_CPG__CI = 0x086E; +constexpr unsigned int mmMC_HUB_WDP_CP__SI = 0x086C; +constexpr unsigned int mmMC_HUB_WDP_CREDITS = 0x083F; +constexpr unsigned int mmMC_HUB_WDP_ERR = 0x0836; +constexpr unsigned int mmMC_HUB_WDP_GBL0 = 0x0841; +constexpr unsigned int mmMC_HUB_WDP_GBL1 = 0x0842; +constexpr unsigned int mmMC_HUB_WDP_HDP__CI = 0x087C; +constexpr unsigned int mmMC_HUB_WDP_HDP__SI = 0x0879; +constexpr unsigned int mmMC_HUB_WDP_IH__CI = 0x0875; +constexpr unsigned int mmMC_HUB_WDP_IH__SI = 0x0872; +constexpr unsigned int mmMC_HUB_WDP_MCDW__CI = 0x0869; +constexpr unsigned int mmMC_HUB_WDP_MCDW__SI = 0x0867; +constexpr unsigned int mmMC_HUB_WDP_MCDX__CI = 0x086A; +constexpr unsigned int mmMC_HUB_WDP_MCDX__SI = 0x0868; +constexpr unsigned int mmMC_HUB_WDP_MCDY__CI = 0x086B; +constexpr unsigned int mmMC_HUB_WDP_MCDY__SI = 0x0869; +constexpr unsigned int mmMC_HUB_WDP_MCDZ__CI = 0x086C; +constexpr unsigned int mmMC_HUB_WDP_MCDZ__SI = 0x086A; +constexpr unsigned int mmMC_HUB_WDP_MCIF__CI = 0x0872; +constexpr unsigned int mmMC_HUB_WDP_MCIF__SI = 0x086F; +constexpr unsigned int mmMC_HUB_WDP_MGPU__SI__CI = 0x0843; +constexpr unsigned int mmMC_HUB_WDP_MGPU2__SI__CI = 0x0840; +constexpr unsigned int mmMC_HUB_WDP_RLC__CI = 0x0876; +constexpr unsigned int mmMC_HUB_WDP_RLC__SI = 0x0873; +constexpr unsigned int mmMC_HUB_WDP_SAM__CI = 0x088C; +constexpr unsigned int mmMC_HUB_WDP_SDMA0__CI = 0x087D; +constexpr unsigned int mmMC_HUB_WDP_SDMA1__CI = 0x087E; +constexpr unsigned int mmMC_HUB_WDP_SEM__CI = 0x0877; +constexpr unsigned int mmMC_HUB_WDP_SEM__SI = 0x0874; +constexpr unsigned int mmMC_HUB_WDP_SH0__CI = 0x0871; +constexpr unsigned int mmMC_HUB_WDP_SH0__SI = 0x086E; +constexpr unsigned int mmMC_HUB_WDP_SH1__CI = 0x0879; +constexpr unsigned int mmMC_HUB_WDP_SH1__SI = 0x0876; +constexpr unsigned int mmMC_HUB_WDP_SH2__CI__VI = 0x084D; +constexpr unsigned int mmMC_HUB_WDP_SH3__CI__VI = 0x084E; +constexpr unsigned int mmMC_HUB_WDP_SIP__CI = 0x086D; +constexpr unsigned int mmMC_HUB_WDP_SIP__SI = 0x086B; +constexpr unsigned int mmMC_HUB_WDP_SMU__CI = 0x0878; +constexpr unsigned int mmMC_HUB_WDP_SMU__SI = 0x0875; +constexpr unsigned int mmMC_HUB_WDP_STATUS = 0x0838; +constexpr unsigned int mmMC_HUB_WDP_UMC__CI = 0x087A; +constexpr unsigned int mmMC_HUB_WDP_UMC__SI = 0x0877; +constexpr unsigned int mmMC_HUB_WDP_UVD__CI = 0x087B; +constexpr unsigned int mmMC_HUB_WDP_UVD__SI = 0x0878; +constexpr unsigned int mmMC_HUB_WDP_VCEU__CI = 0x0883; +constexpr unsigned int mmMC_HUB_WDP_VCEU__SI = 0x087F; +constexpr unsigned int mmMC_HUB_WDP_VCE__CI = 0x0873; +constexpr unsigned int mmMC_HUB_WDP_VCE__SI = 0x0870; +constexpr unsigned int mmMC_HUB_WDP_WTM_CNTL = 0x083E; +constexpr unsigned int mmMC_HUB_WDP_XDMAM__CI = 0x0884; +constexpr unsigned int mmMC_HUB_WDP_XDMAM__SI = 0x0880; +constexpr unsigned int mmMC_HUB_WDP_XDMA__CI = 0x0885; +constexpr unsigned int mmMC_HUB_WDP_XDMA__SI = 0x0881; +constexpr unsigned int mmMC_HUB_WDP_XDP__CI = 0x0874; +constexpr unsigned int mmMC_HUB_WDP_XDP__SI = 0x0871; +constexpr unsigned int mmMC_HUB_WRRET_CNTL = 0x083C; +constexpr unsigned int mmMC_HUB_WRRET_MCDW__CI = 0x087F; +constexpr unsigned int mmMC_HUB_WRRET_MCDW__SI = 0x087B; +constexpr unsigned int mmMC_HUB_WRRET_MCDX__CI = 0x0880; +constexpr unsigned int mmMC_HUB_WRRET_MCDX__SI = 0x087C; +constexpr unsigned int mmMC_HUB_WRRET_MCDY__CI = 0x0881; +constexpr unsigned int mmMC_HUB_WRRET_MCDY__SI = 0x087D; +constexpr unsigned int mmMC_HUB_WRRET_MCDZ__CI = 0x0882; +constexpr unsigned int mmMC_HUB_WRRET_MCDZ__SI = 0x087E; +constexpr unsigned int mmMC_HUB_WRRET_STATUS = 0x083A; +constexpr unsigned int mmMC_IMP_CNTL__SI__CI = 0x0A36; +constexpr unsigned int mmMC_IMP_DEBUG__SI__CI = 0x0A37; +constexpr unsigned int mmMC_IMP_DQ_STATUS__SI__CI = 0x0ABC; +constexpr unsigned int mmMC_IMP_STATUS__SI__CI = 0x0A38; +constexpr unsigned int mmMC_IO_APHY_STR_CNTL_D0__SI__CI = 0x0A97; +constexpr unsigned int mmMC_IO_APHY_STR_CNTL_D1__SI__CI = 0x0A98; +constexpr unsigned int mmMC_IO_CDRCNTL1_D0__SI__CI = 0x0ADD; +constexpr unsigned int mmMC_IO_CDRCNTL1_D1__SI__CI = 0x0ADE; +constexpr unsigned int mmMC_IO_CDRCNTL2_D0__SI__CI = 0x0AE4; +constexpr unsigned int mmMC_IO_CDRCNTL2_D1__SI__CI = 0x0AE5; +constexpr unsigned int mmMC_IO_CDRCNTL_D0__SI__CI = 0x0A55; +constexpr unsigned int mmMC_IO_CDRCNTL_D1__SI__CI = 0x0A56; +constexpr unsigned int mmMC_IO_DPHY_STR_CNTL_D0__SI__CI = 0x0A4E; +constexpr unsigned int mmMC_IO_DPHY_STR_CNTL_D1__SI__CI = 0x0A54; +constexpr unsigned int mmMC_IO_PAD_CNTL__SI__CI = 0x0A73; +constexpr unsigned int mmMC_IO_PAD_CNTL_D0__SI__CI = 0x0A74; +constexpr unsigned int mmMC_IO_PAD_CNTL_D1__SI__CI = 0x0A75; +constexpr unsigned int mmMC_IO_RXCNTL1_DPHY0_D0__SI__CI = 0x0ADF; +constexpr unsigned int mmMC_IO_RXCNTL1_DPHY0_D1__SI__CI = 0x0AE1; +constexpr unsigned int mmMC_IO_RXCNTL1_DPHY1_D0__SI__CI = 0x0AE0; +constexpr unsigned int mmMC_IO_RXCNTL1_DPHY1_D1__SI__CI = 0x0AE2; +constexpr unsigned int mmMC_IO_RXCNTL_DPHY0_D0__SI__CI = 0x0A4C; +constexpr unsigned int mmMC_IO_RXCNTL_DPHY0_D1__SI__CI = 0x0A52; +constexpr unsigned int mmMC_IO_RXCNTL_DPHY1_D0__SI__CI = 0x0A4D; +constexpr unsigned int mmMC_IO_RXCNTL_DPHY1_D1__SI__CI = 0x0A53; +constexpr unsigned int mmMC_IO_TXCNTL_APHY_D0__SI__CI = 0x0A4B; +constexpr unsigned int mmMC_IO_TXCNTL_APHY_D1__SI__CI = 0x0A51; +constexpr unsigned int mmMC_IO_TXCNTL_DPHY0_D0__SI__CI = 0x0A49; +constexpr unsigned int mmMC_IO_TXCNTL_DPHY0_D1__SI__CI = 0x0A4F; +constexpr unsigned int mmMC_IO_TXCNTL_DPHY1_D0__SI__CI = 0x0A4A; +constexpr unsigned int mmMC_IO_TXCNTL_DPHY1_D1__SI__CI = 0x0A50; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER0_CFG__CI__VI = 0x07C0; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER1_CFG__CI__VI = 0x07C1; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER2_CFG__CI__VI = 0x07C2; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER3_CFG__CI__VI = 0x07C3; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER_HI__CI__VI = 0x07AA; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER_LO__CI__VI = 0x07A3; +constexpr unsigned int mmMC_MCBVM_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D1; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER0_CFG__CI__VI = 0x07C4; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER1_CFG__CI__VI = 0x07C5; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER2_CFG__CI__VI = 0x07C6; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER3_CFG__CI__VI = 0x07C7; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER_HI__CI__VI = 0x07AB; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER_LO__CI__VI = 0x07A4; +constexpr unsigned int mmMC_MCDVM_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D2; +constexpr unsigned int mmMC_MEM_POWER_LS = 0x082A; +constexpr unsigned int mmMC_NPL_STATUS__SI__CI = 0x0A76; +constexpr unsigned int mmMC_PHY_TIMING_2__SI__CI = 0x0ACE; +constexpr unsigned int mmMC_PHY_TIMING_D0__SI__CI = 0x0ACC; +constexpr unsigned int mmMC_PHY_TIMING_D1__SI__CI = 0x0ACD; +constexpr unsigned int mmMC_PMG_AUTO_CFG__SI__CI = 0x0A35; +constexpr unsigned int mmMC_PMG_AUTO_CMD__SI__CI = 0x0A34; +constexpr unsigned int mmMC_RD_CB = 0x0981; +constexpr unsigned int mmMC_RD_DB = 0x0982; +constexpr unsigned int mmMC_RD_GRP_EXT = 0x0978; +constexpr unsigned int mmMC_RD_GRP_GFX = 0x0803; +constexpr unsigned int mmMC_RD_GRP_LCL = 0x098A; +constexpr unsigned int mmMC_RD_GRP_OTH = 0x0807; +constexpr unsigned int mmMC_RD_GRP_SYS = 0x0805; +constexpr unsigned int mmMC_RD_HUB = 0x0985; +constexpr unsigned int mmMC_RD_TC0 = 0x0983; +constexpr unsigned int mmMC_RD_TC1 = 0x0984; +constexpr unsigned int mmMC_RPB_ARB_CNTL = 0x0951; +constexpr unsigned int mmMC_RPB_BIF_CNTL = 0x0952; +constexpr unsigned int mmMC_RPB_CID_QUEUE_EX = 0x095A; +constexpr unsigned int mmMC_RPB_CID_QUEUE_EX_DATA = 0x095B; +constexpr unsigned int mmMC_RPB_CID_QUEUE_RD = 0x0957; +constexpr unsigned int mmMC_RPB_CID_QUEUE_WR = 0x0956; +constexpr unsigned int mmMC_RPB_CONF = 0x094D; +constexpr unsigned int mmMC_RPB_DBG1 = 0x094F; +constexpr unsigned int mmMC_RPB_EFF_CNTL = 0x0950; +constexpr unsigned int mmMC_RPB_IF_CONF = 0x094E; +constexpr unsigned int mmMC_RPB_PERFCOUNTER0_CFG__CI__VI = 0x07B8; +constexpr unsigned int mmMC_RPB_PERFCOUNTER1_CFG__CI__VI = 0x07B9; +constexpr unsigned int mmMC_RPB_PERFCOUNTER2_CFG__CI__VI = 0x07BA; +constexpr unsigned int mmMC_RPB_PERFCOUNTER3_CFG__CI__VI = 0x07BB; +constexpr unsigned int mmMC_RPB_PERFCOUNTER_HI__CI__VI = 0x07AC; +constexpr unsigned int mmMC_RPB_PERFCOUNTER_LO__CI__VI = 0x07A2; +constexpr unsigned int mmMC_RPB_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D0; +constexpr unsigned int mmMC_RPB_PERF_COUNTER_CNTL = 0x0958; +constexpr unsigned int mmMC_RPB_PERF_COUNTER_STATUS = 0x0959; +constexpr unsigned int mmMC_RPB_RD_SWITCH_CNTL = 0x0955; +constexpr unsigned int mmMC_RPB_WR_COMBINE_CNTL = 0x0954; +constexpr unsigned int mmMC_RPB_WR_SWITCH_CNTL = 0x0953; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B0_D0__SI__CI = 0x0AA3; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B0_D1__SI__CI = 0x0AA7; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B1_D0__SI__CI = 0x0AA4; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B1_D1__SI__CI = 0x0AA8; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B2_D0__SI__CI = 0x0AA5; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B2_D1__SI__CI = 0x0AA9; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B3_D0__SI__CI = 0x0AA6; +constexpr unsigned int mmMC_SEQ_BIT_REMAP_B3_D1__SI__CI = 0x0AAA; +constexpr unsigned int mmMC_SEQ_BYTE_REMAP_D0__SI__CI = 0x0A93; +constexpr unsigned int mmMC_SEQ_BYTE_REMAP_D1__SI__CI = 0x0A94; +constexpr unsigned int mmMC_SEQ_CNTL_3__CI = 0x0D80; +constexpr unsigned int mmMC_SEQ_DLL_STBY_LP__CI = 0x0D8F; +constexpr unsigned int mmMC_SEQ_DLL_STBY__CI = 0x0D8E; +constexpr unsigned int mmMC_SEQ_DRAM_ERROR_INSERTION__SI__CI = 0x0ACB; +constexpr unsigned int mmMC_SEQ_G5PDX_CMD0_LP__CI = 0x0D84; +constexpr unsigned int mmMC_SEQ_G5PDX_CMD0__CI = 0x0D83; +constexpr unsigned int mmMC_SEQ_G5PDX_CMD1_LP__CI = 0x0D86; +constexpr unsigned int mmMC_SEQ_G5PDX_CMD1__CI = 0x0D85; +constexpr unsigned int mmMC_SEQ_G5PDX_CTRL_LP__CI = 0x0D82; +constexpr unsigned int mmMC_SEQ_G5PDX_CTRL__CI = 0x0D81; +constexpr unsigned int mmMC_SEQ_IO_RDBI__SI__CI = 0x0AB4; +constexpr unsigned int mmMC_SEQ_IO_REDC__SI__CI = 0x0AB5; +constexpr unsigned int mmMC_SEQ_IO_RESERVE_D0__SI__CI = 0x0AB7; +constexpr unsigned int mmMC_SEQ_IO_RESERVE_D1__SI__CI = 0x0AB8; +constexpr unsigned int mmMC_SEQ_IO_RWORD0__SI__CI = 0x0AAC; +constexpr unsigned int mmMC_SEQ_IO_RWORD1__SI__CI = 0x0AAD; +constexpr unsigned int mmMC_SEQ_IO_RWORD2__SI__CI = 0x0AAE; +constexpr unsigned int mmMC_SEQ_IO_RWORD3__SI__CI = 0x0AAF; +constexpr unsigned int mmMC_SEQ_IO_RWORD4__SI__CI = 0x0AB0; +constexpr unsigned int mmMC_SEQ_IO_RWORD5__SI__CI = 0x0AB1; +constexpr unsigned int mmMC_SEQ_IO_RWORD6__SI__CI = 0x0AB2; +constexpr unsigned int mmMC_SEQ_IO_RWORD7__SI__CI = 0x0AB3; +constexpr unsigned int mmMC_SEQ_MPLL_OVERRIDE__SI__CI = 0x0A22; +constexpr unsigned int mmMC_SEQ_PERF_CNTL__SI__CI = 0x0A77; +constexpr unsigned int mmMC_SEQ_PERF_CNTL_1__SI__CI = 0x0AFD; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_A_I0__SI__CI = 0x0A79; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_A_I1__SI__CI = 0x0A7A; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_B_I0__SI__CI = 0x0A7B; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_B_I1__SI__CI = 0x0A7C; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_C_I0__SI__CI = 0x0AD9; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_C_I1__SI__CI = 0x0ADA; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_D_I0__SI__CI = 0x0ADB; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CNT_D_I1__SI__CI = 0x0ADC; +constexpr unsigned int mmMC_SEQ_PERF_SEQ_CTL__SI__CI = 0x0A78; +constexpr unsigned int mmMC_SEQ_PHYREG_BCAST__CI = 0x0D89; +constexpr unsigned int mmMC_SEQ_PMG_CMD_EMRS_LP__SI__CI = 0x0AA1; +constexpr unsigned int mmMC_SEQ_PMG_CMD_MRS1_LP__SI__CI = 0x0AD2; +constexpr unsigned int mmMC_SEQ_PMG_CMD_MRS2_LP__SI__CI = 0x0AD8; +constexpr unsigned int mmMC_SEQ_PMG_CMD_MRS_LP__SI__CI = 0x0AA2; +constexpr unsigned int mmMC_SEQ_PMG_DVS_CMD_LP__CI = 0x0D8D; +constexpr unsigned int mmMC_SEQ_PMG_DVS_CMD__CI = 0x0D8C; +constexpr unsigned int mmMC_SEQ_PMG_DVS_CTL_LP__CI = 0x0D8B; +constexpr unsigned int mmMC_SEQ_PMG_DVS_CTL__CI = 0x0D8A; +constexpr unsigned int mmMC_SEQ_PMG_PG_HWCNTL__SI__CI = 0x0AB9; +constexpr unsigned int mmMC_SEQ_PMG_PG_SWCNTL_0__SI__CI = 0x0ABA; +constexpr unsigned int mmMC_SEQ_PMG_PG_SWCNTL_1__SI__CI = 0x0ABB; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE0_D0__SI__CI = 0x0A67; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE0_D1__SI__CI = 0x0A6D; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE1_D0__SI__CI = 0x0A68; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE1_D1__SI__CI = 0x0A6E; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE2_D0__SI__CI = 0x0A69; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE2_D1__SI__CI = 0x0A6F; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE3_D0__SI__CI = 0x0A6A; +constexpr unsigned int mmMC_SEQ_RXFRAMING_BYTE3_D1__SI__CI = 0x0A70; +constexpr unsigned int mmMC_SEQ_RXFRAMING_DBI_D0__SI__CI = 0x0A6B; +constexpr unsigned int mmMC_SEQ_RXFRAMING_DBI_D1__SI__CI = 0x0A71; +constexpr unsigned int mmMC_SEQ_RXFRAMING_EDC_D0__SI__CI = 0x0A6C; +constexpr unsigned int mmMC_SEQ_RXFRAMING_EDC_D1__SI__CI = 0x0A72; +constexpr unsigned int mmMC_SEQ_SREG_READ__CI = 0x0D87; +constexpr unsigned int mmMC_SEQ_SREG_STATUS__CI = 0x0D88; +constexpr unsigned int mmMC_SEQ_TCG_CNTL__SI__CI = 0x0ABD; +constexpr unsigned int mmMC_SEQ_TRAIN_EDC_THRESHOLD__SI__CI = 0x0A3B; +constexpr unsigned int mmMC_SEQ_TRAIN_EDC_THRESHOLD2__SI__CI = 0x0AFE; +constexpr unsigned int mmMC_SEQ_TRAIN_EDC_THRESHOLD3__SI__CI = 0x0AFF; +constexpr unsigned int mmMC_SEQ_TRAIN_TIMING__SI__CI = 0x0A40; +constexpr unsigned int mmMC_SEQ_TSM_BCNT__SI__CI = 0x0AC2; +constexpr unsigned int mmMC_SEQ_TSM_CTRL__SI__CI = 0x0ABE; +constexpr unsigned int mmMC_SEQ_TSM_DBI__SI__CI = 0x0AC6; +constexpr unsigned int mmMC_SEQ_TSM_DEBUG_DATA__SI__CI = 0x0AD0; +constexpr unsigned int mmMC_SEQ_TSM_DEBUG_INDEX__SI__CI = 0x0ACF; +constexpr unsigned int mmMC_SEQ_TSM_EDC__SI__CI = 0x0AC5; +constexpr unsigned int mmMC_SEQ_TSM_FLAG__SI__CI = 0x0AC3; +constexpr unsigned int mmMC_SEQ_TSM_GCNT__SI__CI = 0x0ABF; +constexpr unsigned int mmMC_SEQ_TSM_MISC__SI__CI = 0x0AE6; +constexpr unsigned int mmMC_SEQ_TSM_NCNT__SI__CI = 0x0AC1; +constexpr unsigned int mmMC_SEQ_TSM_OCNT__SI__CI = 0x0AC0; +constexpr unsigned int mmMC_SEQ_TSM_UPDATE__SI__CI = 0x0AC4; +constexpr unsigned int mmMC_SEQ_TSM_WCDR__SI__CI = 0x0AE3; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE0_D0__SI__CI = 0x0A58; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE0_D1__SI__CI = 0x0A60; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE1_D0__SI__CI = 0x0A59; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE1_D1__SI__CI = 0x0A61; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE2_D0__SI__CI = 0x0A5A; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE2_D1__SI__CI = 0x0A62; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE3_D0__SI__CI = 0x0A5B; +constexpr unsigned int mmMC_SEQ_TXFRAMING_BYTE3_D1__SI__CI = 0x0A63; +constexpr unsigned int mmMC_SEQ_TXFRAMING_DBI_D0__SI__CI = 0x0A5C; +constexpr unsigned int mmMC_SEQ_TXFRAMING_DBI_D1__SI__CI = 0x0A64; +constexpr unsigned int mmMC_SEQ_TXFRAMING_EDC_D0__SI__CI = 0x0A5D; +constexpr unsigned int mmMC_SEQ_TXFRAMING_EDC_D1__SI__CI = 0x0A65; +constexpr unsigned int mmMC_SEQ_TXFRAMING_FCK_D0__SI__CI = 0x0A5E; +constexpr unsigned int mmMC_SEQ_TXFRAMING_FCK_D1__SI__CI = 0x0A66; +constexpr unsigned int mmMC_SEQ_VENDOR_ID_I0__SI__CI = 0x0A7E; +constexpr unsigned int mmMC_SEQ_VENDOR_ID_I1__SI__CI = 0x0A7F; +constexpr unsigned int mmMC_SEQ_WCDR_CTRL__SI__CI = 0x0A39; +constexpr unsigned int mmMC_SEQ_WR_CTL_2__SI__CI = 0x0AD5; +constexpr unsigned int mmMC_SEQ_WR_CTL_2_LP__SI__CI = 0x0AD6; +constexpr unsigned int mmMC_SHARED_BLACKOUT_CNTL = 0x082B; +constexpr unsigned int mmMC_SHARED_CHMAP = 0x0801; +constexpr unsigned int mmMC_SHARED_CHREMAP = 0x0802; +constexpr unsigned int mmMC_TRAIN_EDCCDR_R_D0__SI__CI = 0x0A41; +constexpr unsigned int mmMC_TRAIN_EDCCDR_R_D1__SI__CI = 0x0A42; +constexpr unsigned int mmMC_TRAIN_EDC_STATUS_D0__SI__CI = 0x0A45; +constexpr unsigned int mmMC_TRAIN_EDC_STATUS_D1__SI__CI = 0x0A48; +constexpr unsigned int mmMC_TRAIN_PRBSERR_0_D0__SI__CI = 0x0A43; +constexpr unsigned int mmMC_TRAIN_PRBSERR_0_D1__SI__CI = 0x0A46; +constexpr unsigned int mmMC_TRAIN_PRBSERR_1_D0__SI__CI = 0x0A44; +constexpr unsigned int mmMC_TRAIN_PRBSERR_1_D1__SI__CI = 0x0A47; +constexpr unsigned int mmMC_TRAIN_PRBSERR_2_D0__SI__CI = 0x0AFB; +constexpr unsigned int mmMC_TRAIN_PRBSERR_2_D1__SI__CI = 0x0AFC; +constexpr unsigned int mmMC_VM_AGP_BASE = 0x080C; +constexpr unsigned int mmMC_VM_AGP_BOT = 0x080B; +constexpr unsigned int mmMC_VM_AGP_TOP = 0x080A; +constexpr unsigned int mmMC_VM_DC_WRITE_CNTL = 0x0810; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_0_HIGH_ADDR = 0x0815; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_0_LOW_ADDR = 0x0811; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_1_HIGH_ADDR = 0x0816; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_1_LOW_ADDR = 0x0812; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_2_HIGH_ADDR = 0x0817; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_2_LOW_ADDR = 0x0813; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_3_HIGH_ADDR = 0x0818; +constexpr unsigned int mmMC_VM_DC_WRITE_HIT_REGION_3_LOW_ADDR = 0x0814; +constexpr unsigned int mmMC_VM_FB_LOCATION = 0x0809; +constexpr unsigned int mmMC_VM_FB_OFFSET = 0x081A; +constexpr unsigned int mmMC_VM_L2_PERFCOUNTER0_CFG__CI__VI = 0x07CC; +constexpr unsigned int mmMC_VM_L2_PERFCOUNTER1_CFG__CI__VI = 0x07CD; +constexpr unsigned int mmMC_VM_L2_PERFCOUNTER_HI__CI__VI = 0x07AD; +constexpr unsigned int mmMC_VM_L2_PERFCOUNTER_LO__CI__VI = 0x07A5; +constexpr unsigned int mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL__CI__VI = 0x07D3; +constexpr unsigned int mmMC_VM_MB_L1_TLB0_DEBUG = 0x0891; +constexpr unsigned int mmMC_VM_MB_L1_TLB0_STATUS = 0x0895; +constexpr unsigned int mmMC_VM_MB_L1_TLB1_STATUS = 0x0896; +constexpr unsigned int mmMC_VM_MB_L1_TLB2_DEBUG = 0x0893; +constexpr unsigned int mmMC_VM_MB_L1_TLB2_STATUS = 0x0897; +constexpr unsigned int mmMC_VM_MB_L1_TLB3_DEBUG = 0x08A5; +constexpr unsigned int mmMC_VM_MB_L1_TLB3_STATUS = 0x08A6; +constexpr unsigned int mmMC_VM_MB_L2ARBITER_L2_CREDITS = 0x08A1; +constexpr unsigned int mmMC_VM_MD_L1_TLB0_DEBUG = 0x0998; +constexpr unsigned int mmMC_VM_MD_L1_TLB0_STATUS = 0x099B; +constexpr unsigned int mmMC_VM_MD_L1_TLB1_DEBUG = 0x0999; +constexpr unsigned int mmMC_VM_MD_L1_TLB1_STATUS = 0x099C; +constexpr unsigned int mmMC_VM_MD_L1_TLB2_DEBUG = 0x099A; +constexpr unsigned int mmMC_VM_MD_L1_TLB2_STATUS = 0x099D; +constexpr unsigned int mmMC_VM_MD_L1_TLB3_DEBUG = 0x09A7; +constexpr unsigned int mmMC_VM_MD_L1_TLB3_STATUS = 0x09A8; +constexpr unsigned int mmMC_VM_MD_L2ARBITER_L2_CREDITS = 0x09A4; +constexpr unsigned int mmMC_VM_MX_L1_TLB_CNTL = 0x0819; +constexpr unsigned int mmMC_VM_STEERING__CI__VI = 0x081B; +constexpr unsigned int mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR = 0x080F; +constexpr unsigned int mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR = 0x080E; +constexpr unsigned int mmMC_VM_SYSTEM_APERTURE_LOW_ADDR = 0x080D; +constexpr unsigned int mmMC_WR_CB = 0x0986; +constexpr unsigned int mmMC_WR_DB = 0x0987; +constexpr unsigned int mmMC_WR_GRP_EXT = 0x0979; +constexpr unsigned int mmMC_WR_GRP_GFX = 0x0804; +constexpr unsigned int mmMC_WR_GRP_LCL = 0x098B; +constexpr unsigned int mmMC_WR_GRP_OTH = 0x0808; +constexpr unsigned int mmMC_WR_GRP_SYS = 0x0806; +constexpr unsigned int mmMC_WR_HUB = 0x0988; +constexpr unsigned int mmMC_WR_TC0 = 0x097B; +constexpr unsigned int mmMC_WR_TC1 = 0x097C; +constexpr unsigned int mmMC_XBAR_ADDR_DEC = 0x0C80; +constexpr unsigned int mmMC_XBAR_ARB = 0x0C8D; +constexpr unsigned int mmMC_XBAR_ARB_MAX_BURST = 0x0C8E; +constexpr unsigned int mmMC_XBAR_CHTRIREMAP = 0x0C8B; +constexpr unsigned int mmMC_XBAR_PERF_MON_CNTL0__SI__CI = 0x0C8F; +constexpr unsigned int mmMC_XBAR_PERF_MON_CNTL1__SI__CI = 0x0C90; +constexpr unsigned int mmMC_XBAR_PERF_MON_CNTL2__SI__CI = 0x0C91; +constexpr unsigned int mmMC_XBAR_PERF_MON_MAX_THSH__SI__CI = 0x0C96; +constexpr unsigned int mmMC_XBAR_PERF_MON_RSLT0__SI__CI = 0x0C92; +constexpr unsigned int mmMC_XBAR_PERF_MON_RSLT1__SI__CI = 0x0C93; +constexpr unsigned int mmMC_XBAR_PERF_MON_RSLT2__SI__CI = 0x0C94; +constexpr unsigned int mmMC_XBAR_PERF_MON_RSLT3__SI__CI = 0x0C95; +constexpr unsigned int mmMC_XBAR_RDREQ_CREDIT = 0x0C83; +constexpr unsigned int mmMC_XBAR_RDREQ_PRI_CREDIT = 0x0C84; +constexpr unsigned int mmMC_XBAR_RDRET_CREDIT1 = 0x0C87; +constexpr unsigned int mmMC_XBAR_RDRET_CREDIT2 = 0x0C88; +constexpr unsigned int mmMC_XBAR_RDRET_PRI_CREDIT1 = 0x0C89; +constexpr unsigned int mmMC_XBAR_RDRET_PRI_CREDIT2 = 0x0C8A; +constexpr unsigned int mmMC_XBAR_REMOTE = 0x0C81; +constexpr unsigned int mmMC_XBAR_SPARE0 = 0x0C97; +constexpr unsigned int mmMC_XBAR_SPARE1 = 0x0C98; +constexpr unsigned int mmMC_XBAR_TWOCHAN = 0x0C8C; +constexpr unsigned int mmMC_XBAR_WRREQ_CREDIT = 0x0C82; +constexpr unsigned int mmMC_XBAR_WRRET_CREDIT1 = 0x0C85; +constexpr unsigned int mmMC_XBAR_WRRET_CREDIT2 = 0x0C86; +constexpr unsigned int mmMC_XPB_CLG_CFG0 = 0x08E9; +constexpr unsigned int mmMC_XPB_CLG_CFG1 = 0x08EA; +constexpr unsigned int mmMC_XPB_CLG_CFG10 = 0x08F3; +constexpr unsigned int mmMC_XPB_CLG_CFG11 = 0x08F4; +constexpr unsigned int mmMC_XPB_CLG_CFG12 = 0x08F5; +constexpr unsigned int mmMC_XPB_CLG_CFG13 = 0x08F6; +constexpr unsigned int mmMC_XPB_CLG_CFG14 = 0x08F7; +constexpr unsigned int mmMC_XPB_CLG_CFG15 = 0x08F8; +constexpr unsigned int mmMC_XPB_CLG_CFG16 = 0x08F9; +constexpr unsigned int mmMC_XPB_CLG_CFG17 = 0x08FA; +constexpr unsigned int mmMC_XPB_CLG_CFG18 = 0x08FB; +constexpr unsigned int mmMC_XPB_CLG_CFG19 = 0x08FC; +constexpr unsigned int mmMC_XPB_CLG_CFG2 = 0x08EB; +constexpr unsigned int mmMC_XPB_CLG_CFG20 = 0x0928; +constexpr unsigned int mmMC_XPB_CLG_CFG21 = 0x0929; +constexpr unsigned int mmMC_XPB_CLG_CFG22 = 0x092A; +constexpr unsigned int mmMC_XPB_CLG_CFG23 = 0x092B; +constexpr unsigned int mmMC_XPB_CLG_CFG24 = 0x092C; +constexpr unsigned int mmMC_XPB_CLG_CFG25 = 0x092D; +constexpr unsigned int mmMC_XPB_CLG_CFG26 = 0x092E; +constexpr unsigned int mmMC_XPB_CLG_CFG27 = 0x092F; +constexpr unsigned int mmMC_XPB_CLG_CFG28 = 0x0930; +constexpr unsigned int mmMC_XPB_CLG_CFG29 = 0x0931; +constexpr unsigned int mmMC_XPB_CLG_CFG3 = 0x08EC; +constexpr unsigned int mmMC_XPB_CLG_CFG30 = 0x0932; +constexpr unsigned int mmMC_XPB_CLG_CFG31 = 0x0933; +constexpr unsigned int mmMC_XPB_CLG_CFG32 = 0x0936; +constexpr unsigned int mmMC_XPB_CLG_CFG33 = 0x0937; +constexpr unsigned int mmMC_XPB_CLG_CFG34 = 0x0938; +constexpr unsigned int mmMC_XPB_CLG_CFG35 = 0x0939; +constexpr unsigned int mmMC_XPB_CLG_CFG36 = 0x093A; +constexpr unsigned int mmMC_XPB_CLG_CFG4 = 0x08ED; +constexpr unsigned int mmMC_XPB_CLG_CFG5 = 0x08EE; +constexpr unsigned int mmMC_XPB_CLG_CFG6 = 0x08EF; +constexpr unsigned int mmMC_XPB_CLG_CFG7 = 0x08F0; +constexpr unsigned int mmMC_XPB_CLG_CFG8 = 0x08F1; +constexpr unsigned int mmMC_XPB_CLG_CFG9 = 0x08F2; +constexpr unsigned int mmMC_XPB_CLG_EXTRA = 0x08FD; +constexpr unsigned int mmMC_XPB_CLG_EXTRA_RD = 0x0935; +constexpr unsigned int mmMC_XPB_CLK_GAT = 0x091E; +constexpr unsigned int mmMC_XPB_INTF_CFG = 0x091F; +constexpr unsigned int mmMC_XPB_INTF_CFG2 = 0x0934; +constexpr unsigned int mmMC_XPB_INTF_STS = 0x0920; +constexpr unsigned int mmMC_XPB_LB_ADDR = 0x08FE; +constexpr unsigned int mmMC_XPB_MAP_INVERT_FLUSH_NUM_LSB = 0x0923; +constexpr unsigned int mmMC_XPB_MISC_CFG = 0x0927; +constexpr unsigned int mmMC_XPB_P2P_BAR0 = 0x0904; +constexpr unsigned int mmMC_XPB_P2P_BAR1 = 0x0905; +constexpr unsigned int mmMC_XPB_P2P_BAR2 = 0x0906; +constexpr unsigned int mmMC_XPB_P2P_BAR3 = 0x0907; +constexpr unsigned int mmMC_XPB_P2P_BAR4 = 0x0908; +constexpr unsigned int mmMC_XPB_P2P_BAR5 = 0x0909; +constexpr unsigned int mmMC_XPB_P2P_BAR6 = 0x090A; +constexpr unsigned int mmMC_XPB_P2P_BAR7 = 0x090B; +constexpr unsigned int mmMC_XPB_P2P_BAR_CFG = 0x0903; +constexpr unsigned int mmMC_XPB_P2P_BAR_DEBUG = 0x090D; +constexpr unsigned int mmMC_XPB_P2P_BAR_DELTA_ABOVE = 0x090E; +constexpr unsigned int mmMC_XPB_P2P_BAR_DELTA_BELOW = 0x090F; +constexpr unsigned int mmMC_XPB_P2P_BAR_SETUP = 0x090C; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR0 = 0x0910; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR1 = 0x0911; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR2 = 0x0912; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR3 = 0x0913; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR4 = 0x0914; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR5 = 0x0915; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR6 = 0x0916; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR7 = 0x0917; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR8 = 0x0918; +constexpr unsigned int mmMC_XPB_PEER_SYS_BAR9 = 0x0919; +constexpr unsigned int mmMC_XPB_PERF_KNOBS = 0x0924; +constexpr unsigned int mmMC_XPB_PIPE_STS = 0x0921; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP0 = 0x08DB; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP1 = 0x08DC; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP2 = 0x08DD; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP3 = 0x08DE; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP4 = 0x08DF; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP5 = 0x08E0; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP6 = 0x08E1; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP7 = 0x08E2; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP8 = 0x08E3; +constexpr unsigned int mmMC_XPB_RTR_DEST_MAP9 = 0x08E4; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR0 = 0x08CD; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR1 = 0x08CE; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR2 = 0x08CF; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR3 = 0x08D0; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR4 = 0x08D1; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR5 = 0x08D2; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR6 = 0x08D3; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR7 = 0x08D4; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR8 = 0x08D5; +constexpr unsigned int mmMC_XPB_RTR_SRC_APRTR9 = 0x08D6; +constexpr unsigned int mmMC_XPB_STICKY = 0x0925; +constexpr unsigned int mmMC_XPB_STICKY_W1C = 0x0926; +constexpr unsigned int mmMC_XPB_SUB_CTRL = 0x0922; +constexpr unsigned int mmMC_XPB_UNC_THRESH_HST = 0x08FF; +constexpr unsigned int mmMC_XPB_UNC_THRESH_SID = 0x0900; +constexpr unsigned int mmMC_XPB_WCB_CFG = 0x0902; +constexpr unsigned int mmMC_XPB_WCB_STS = 0x0901; +constexpr unsigned int mmMC_XPB_XDMA_PEER_SYS_BAR0 = 0x091A; +constexpr unsigned int mmMC_XPB_XDMA_PEER_SYS_BAR1 = 0x091B; +constexpr unsigned int mmMC_XPB_XDMA_PEER_SYS_BAR2 = 0x091C; +constexpr unsigned int mmMC_XPB_XDMA_PEER_SYS_BAR3 = 0x091D; +constexpr unsigned int mmMC_XPB_XDMA_RTR_DEST_MAP0 = 0x08E5; +constexpr unsigned int mmMC_XPB_XDMA_RTR_DEST_MAP1 = 0x08E6; +constexpr unsigned int mmMC_XPB_XDMA_RTR_DEST_MAP2 = 0x08E7; +constexpr unsigned int mmMC_XPB_XDMA_RTR_DEST_MAP3 = 0x08E8; +constexpr unsigned int mmMC_XPB_XDMA_RTR_SRC_APRTR0 = 0x08D7; +constexpr unsigned int mmMC_XPB_XDMA_RTR_SRC_APRTR1 = 0x08D8; +constexpr unsigned int mmMC_XPB_XDMA_RTR_SRC_APRTR2 = 0x08D9; +constexpr unsigned int mmMC_XPB_XDMA_RTR_SRC_APRTR3 = 0x08DA; +constexpr unsigned int mmMEM_TYPE_CNTL__CI__VI = 0x14E4; +constexpr unsigned int mmMICROSECOND_TIME_BASE_DIV__SI = 0x0148; +constexpr unsigned int mmMM_CFGREGS_CNTL = 0x1513; +constexpr unsigned int mmMM_DATA = 0x0001; +constexpr unsigned int mmMM_INDEX = 0x0000; +constexpr unsigned int mmMM_INDEX_HI__CI__VI = 0x0006; +constexpr unsigned int mmMPLL_AD_FUNC_CNTL__SI__CI = 0x0AF0; +constexpr unsigned int mmMPLL_AD_STATUS__SI__CI = 0x0AF6; +constexpr unsigned int mmMPLL_BYPASSCLK_SEL__SI = 0x0197; +constexpr unsigned int mmMPLL_CNTL_MODE__SI__CI = 0x0AEC; +constexpr unsigned int mmMPLL_CONTROL__SI__CI = 0x0AF5; +constexpr unsigned int mmMPLL_DQ_0_0_STATUS__SI__CI = 0x0AF7; +constexpr unsigned int mmMPLL_DQ_0_1_STATUS__SI__CI = 0x0AF8; +constexpr unsigned int mmMPLL_DQ_1_0_STATUS__SI__CI = 0x0AF9; +constexpr unsigned int mmMPLL_DQ_1_1_STATUS__SI__CI = 0x0AFA; +constexpr unsigned int mmMPLL_DQ_FUNC_CNTL__SI__CI = 0x0AF1; +constexpr unsigned int mmMPLL_FUNC_CNTL__SI__CI = 0x0AED; +constexpr unsigned int mmMPLL_FUNC_CNTL_1__SI__CI = 0x0AEE; +constexpr unsigned int mmMPLL_FUNC_CNTL_2__SI__CI = 0x0AEF; +constexpr unsigned int mmMPLL_SEQ_UCODE_1__SI__CI = 0x0AEA; +constexpr unsigned int mmMPLL_SEQ_UCODE_2__SI__CI = 0x0AEB; +constexpr unsigned int mmMPLL_SS1__SI__CI = 0x0AF3; +constexpr unsigned int mmMPLL_SS2__SI__CI = 0x0AF4; +constexpr unsigned int mmMPLL_TIME__SI__CI = 0x0AF2; +constexpr unsigned int mmMVP_AFR_FLIP_FIFO_CNTL__SI = 0x1AD9; +constexpr unsigned int mmMVP_AFR_FLIP_MODE__SI = 0x1AD8; +constexpr unsigned int mmMVP_BLACK_KEYER__SI = 0x1686; +constexpr unsigned int mmMVP_CONTROL1__SI = 0x1680; +constexpr unsigned int mmMVP_CONTROL2__SI = 0x1681; +constexpr unsigned int mmMVP_CONTROL3__SI = 0x168A; +constexpr unsigned int mmMVP_CRC_CNTL__SI = 0x1687; +constexpr unsigned int mmMVP_CRC_RESULT_BLUE_GREEN__SI = 0x1688; +constexpr unsigned int mmMVP_CRC_RESULT_RED__SI = 0x1689; +constexpr unsigned int mmMVP_FIFO_CONTROL__SI = 0x1682; +constexpr unsigned int mmMVP_FIFO_STATUS__SI = 0x1683; +constexpr unsigned int mmMVP_FLIP_LINE_NUM_INSERT__SI = 0x1ADA; +constexpr unsigned int mmMVP_INBAND_CNTL_CAP__SI = 0x1685; +constexpr unsigned int mmMVP_RECEIVE_CNT_CNTL1__SI = 0x168B; +constexpr unsigned int mmMVP_RECEIVE_CNT_CNTL2__SI = 0x168C; +constexpr unsigned int mmMVP_SLAVE_STATUS__SI = 0x1684; +constexpr unsigned int mmMVP_TEST_DEBUG_DATA__SI = 0x168E; +constexpr unsigned int mmMVP_TEST_DEBUG_INDEX__SI = 0x168D; +constexpr unsigned int mmNEW_REFCLKB_TIMER_1__CI = 0x1484; +constexpr unsigned int mmNEW_REFCLKB_TIMER__CI = 0x1485; +constexpr unsigned int mmOVLSCL_EDGE_PIXEL_CNTL__SI__VI = 0x1A2C; +constexpr unsigned int mmOVL_CONTROL1__SI__VI = 0x1A1D; +constexpr unsigned int mmOVL_CONTROL2__SI__VI = 0x1A1E; +constexpr unsigned int mmOVL_DFQ_CONTROL__SI__VI = 0x1A29; +constexpr unsigned int mmOVL_DFQ_STATUS__SI__VI = 0x1A2A; +constexpr unsigned int mmOVL_ENABLE__SI__VI = 0x1A1C; +constexpr unsigned int mmOVL_END__SI__VI = 0x1A26; +constexpr unsigned int mmOVL_PITCH__SI__VI = 0x1A21; +constexpr unsigned int mmOVL_START__SI__VI = 0x1A25; +constexpr unsigned int mmOVL_SURFACE_ADDRESS = 0x1A20; +constexpr unsigned int mmOVL_SURFACE_ADDRESS_HIGH = 0x1A22; +constexpr unsigned int mmOVL_SURFACE_ADDRESS_HIGH_INUSE__SI__VI = 0x1A2B; +constexpr unsigned int mmOVL_SURFACE_ADDRESS_INUSE__SI__VI = 0x1A28; +constexpr unsigned int mmOVL_SURFACE_OFFSET_X__SI__VI = 0x1A23; +constexpr unsigned int mmOVL_SURFACE_OFFSET_Y__SI__VI = 0x1A24; +constexpr unsigned int mmOVL_SWAP_CNTL__SI__VI = 0x1A1F; +constexpr unsigned int mmOVL_UPDATE__SI__VI = 0x1A27; +constexpr unsigned int mmPAGE_MIRROR_CNTL__SI = 0x0581; +constexpr unsigned int mmPA_CL_CLIP_CNTL = 0xA204; +constexpr unsigned int mmPA_CL_CNTL_STATUS = 0x2284; +constexpr unsigned int mmPA_CL_ENHANCE = 0x2285; +constexpr unsigned int mmPA_CL_GB_HORZ_CLIP_ADJ = 0xA2FC; +constexpr unsigned int mmPA_CL_GB_HORZ_DISC_ADJ = 0xA2FD; +constexpr unsigned int mmPA_CL_GB_VERT_CLIP_ADJ = 0xA2FA; +constexpr unsigned int mmPA_CL_GB_VERT_DISC_ADJ = 0xA2FB; +constexpr unsigned int mmPA_CL_NANINF_CNTL = 0xA208; +constexpr unsigned int mmPA_CL_POINT_CULL_RAD = 0xA1F8; +constexpr unsigned int mmPA_CL_POINT_SIZE = 0xA1F7; +constexpr unsigned int mmPA_CL_POINT_X_RAD = 0xA1F5; +constexpr unsigned int mmPA_CL_POINT_Y_RAD = 0xA1F6; +constexpr unsigned int mmPA_CL_RESET_DEBUG__CI__VI = 0x2286; +constexpr unsigned int mmPA_CL_UCP_0_W = 0xA172; +constexpr unsigned int mmPA_CL_UCP_0_X = 0xA16F; +constexpr unsigned int mmPA_CL_UCP_0_Y = 0xA170; +constexpr unsigned int mmPA_CL_UCP_0_Z = 0xA171; +constexpr unsigned int mmPA_CL_UCP_1_W = 0xA176; +constexpr unsigned int mmPA_CL_UCP_1_X = 0xA173; +constexpr unsigned int mmPA_CL_UCP_1_Y = 0xA174; +constexpr unsigned int mmPA_CL_UCP_1_Z = 0xA175; +constexpr unsigned int mmPA_CL_UCP_2_W = 0xA17A; +constexpr unsigned int mmPA_CL_UCP_2_X = 0xA177; +constexpr unsigned int mmPA_CL_UCP_2_Y = 0xA178; +constexpr unsigned int mmPA_CL_UCP_2_Z = 0xA179; +constexpr unsigned int mmPA_CL_UCP_3_W = 0xA17E; +constexpr unsigned int mmPA_CL_UCP_3_X = 0xA17B; +constexpr unsigned int mmPA_CL_UCP_3_Y = 0xA17C; +constexpr unsigned int mmPA_CL_UCP_3_Z = 0xA17D; +constexpr unsigned int mmPA_CL_UCP_4_W = 0xA182; +constexpr unsigned int mmPA_CL_UCP_4_X = 0xA17F; +constexpr unsigned int mmPA_CL_UCP_4_Y = 0xA180; +constexpr unsigned int mmPA_CL_UCP_4_Z = 0xA181; +constexpr unsigned int mmPA_CL_UCP_5_W = 0xA186; +constexpr unsigned int mmPA_CL_UCP_5_X = 0xA183; +constexpr unsigned int mmPA_CL_UCP_5_Y = 0xA184; +constexpr unsigned int mmPA_CL_UCP_5_Z = 0xA185; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET = 0xA110; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_1 = 0xA116; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_10 = 0xA14C; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_11 = 0xA152; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_12 = 0xA158; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_13 = 0xA15E; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_14 = 0xA164; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_15 = 0xA16A; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_2 = 0xA11C; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_3 = 0xA122; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_4 = 0xA128; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_5 = 0xA12E; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_6 = 0xA134; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_7 = 0xA13A; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_8 = 0xA140; +constexpr unsigned int mmPA_CL_VPORT_XOFFSET_9 = 0xA146; +constexpr unsigned int mmPA_CL_VPORT_XSCALE = 0xA10F; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_1 = 0xA115; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_10 = 0xA14B; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_11 = 0xA151; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_12 = 0xA157; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_13 = 0xA15D; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_14 = 0xA163; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_15 = 0xA169; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_2 = 0xA11B; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_3 = 0xA121; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_4 = 0xA127; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_5 = 0xA12D; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_6 = 0xA133; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_7 = 0xA139; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_8 = 0xA13F; +constexpr unsigned int mmPA_CL_VPORT_XSCALE_9 = 0xA145; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET = 0xA112; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_1 = 0xA118; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_10 = 0xA14E; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_11 = 0xA154; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_12 = 0xA15A; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_13 = 0xA160; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_14 = 0xA166; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_15 = 0xA16C; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_2 = 0xA11E; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_3 = 0xA124; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_4 = 0xA12A; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_5 = 0xA130; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_6 = 0xA136; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_7 = 0xA13C; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_8 = 0xA142; +constexpr unsigned int mmPA_CL_VPORT_YOFFSET_9 = 0xA148; +constexpr unsigned int mmPA_CL_VPORT_YSCALE = 0xA111; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_1 = 0xA117; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_10 = 0xA14D; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_11 = 0xA153; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_12 = 0xA159; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_13 = 0xA15F; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_14 = 0xA165; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_15 = 0xA16B; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_2 = 0xA11D; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_3 = 0xA123; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_4 = 0xA129; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_5 = 0xA12F; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_6 = 0xA135; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_7 = 0xA13B; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_8 = 0xA141; +constexpr unsigned int mmPA_CL_VPORT_YSCALE_9 = 0xA147; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET = 0xA114; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_1 = 0xA11A; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_10 = 0xA150; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_11 = 0xA156; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_12 = 0xA15C; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_13 = 0xA162; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_14 = 0xA168; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_15 = 0xA16E; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_2 = 0xA120; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_3 = 0xA126; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_4 = 0xA12C; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_5 = 0xA132; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_6 = 0xA138; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_7 = 0xA13E; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_8 = 0xA144; +constexpr unsigned int mmPA_CL_VPORT_ZOFFSET_9 = 0xA14A; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE = 0xA113; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_1 = 0xA119; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_10 = 0xA14F; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_11 = 0xA155; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_12 = 0xA15B; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_13 = 0xA161; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_14 = 0xA167; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_15 = 0xA16D; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_2 = 0xA11F; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_3 = 0xA125; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_4 = 0xA12B; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_5 = 0xA131; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_6 = 0xA137; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_7 = 0xA13D; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_8 = 0xA143; +constexpr unsigned int mmPA_CL_VPORT_ZSCALE_9 = 0xA149; +constexpr unsigned int mmPA_CL_VS_OUT_CNTL = 0xA207; +constexpr unsigned int mmPA_CL_VTE_CNTL = 0xA206; +constexpr unsigned int mmPA_SC_AA_CONFIG = 0xA2F8; +constexpr unsigned int mmPA_SC_AA_MASK_X0Y0_X1Y0 = 0xA30E; +constexpr unsigned int mmPA_SC_AA_MASK_X0Y1_X1Y1 = 0xA30F; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 = 0xA2FE; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 = 0xA2FF; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 = 0xA300; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 = 0xA301; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 = 0xA306; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 = 0xA307; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 = 0xA308; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 = 0xA309; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 = 0xA302; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 = 0xA303; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 = 0xA304; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 = 0xA305; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 = 0xA30A; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 = 0xA30B; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 = 0xA30C; +constexpr unsigned int mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 = 0xA30D; +constexpr unsigned int mmPA_SC_CENTROID_PRIORITY_0 = 0xA2F5; +constexpr unsigned int mmPA_SC_CENTROID_PRIORITY_1 = 0xA2F6; +constexpr unsigned int mmPA_SC_CLIPRECT_0_BR = 0xA085; +constexpr unsigned int mmPA_SC_CLIPRECT_0_TL = 0xA084; +constexpr unsigned int mmPA_SC_CLIPRECT_1_BR = 0xA087; +constexpr unsigned int mmPA_SC_CLIPRECT_1_TL = 0xA086; +constexpr unsigned int mmPA_SC_CLIPRECT_2_BR = 0xA089; +constexpr unsigned int mmPA_SC_CLIPRECT_2_TL = 0xA088; +constexpr unsigned int mmPA_SC_CLIPRECT_3_BR = 0xA08B; +constexpr unsigned int mmPA_SC_CLIPRECT_3_TL = 0xA08A; +constexpr unsigned int mmPA_SC_CLIPRECT_RULE = 0xA083; +constexpr unsigned int mmPA_SC_DEBUG_CNTL = 0x22F6; +constexpr unsigned int mmPA_SC_DEBUG_DATA = 0x22F7; +constexpr unsigned int mmPA_SC_EDGERULE = 0xA08C; +constexpr unsigned int mmPA_SC_ENHANCE = 0x22FC; +constexpr unsigned int mmPA_SC_FIFO_DEPTH_CNTL = 0x2295; +constexpr unsigned int mmPA_SC_FIFO_SIZE = 0x22F3; +constexpr unsigned int mmPA_SC_FORCE_EOV_MAX_CNTS = 0x22C9; +constexpr unsigned int mmPA_SC_GENERIC_SCISSOR_BR = 0xA091; +constexpr unsigned int mmPA_SC_GENERIC_SCISSOR_TL = 0xA090; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_COUNT__CI__VI = 0xC2AC; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_HV_EN__CI__VI = 0xC2A8; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK__CI__VI = 0x22C1; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_H__CI__VI = 0xC2A9; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE__CI__VI = 0xC2AB; +constexpr unsigned int mmPA_SC_HP3D_TRAP_SCREEN_V__CI__VI = 0xC2AA; +constexpr unsigned int mmPA_SC_IF_FIFO_SIZE = 0x22F5; +constexpr unsigned int mmPA_SC_LINE_CNTL = 0xA2F7; +constexpr unsigned int mmPA_SC_LINE_STIPPLE = 0xA283; +constexpr unsigned int mmPA_SC_LINE_STIPPLE_STATE__CI__VI = 0xC281; +constexpr unsigned int mmPA_SC_LINE_STIPPLE_STATE__SI = 0x22C4; +constexpr unsigned int mmPA_SC_MODE_CNTL_0 = 0xA292; +constexpr unsigned int mmPA_SC_MODE_CNTL_1 = 0xA293; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_COUNT__CI__VI = 0xC2A4; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_HV_EN__CI__VI = 0xC2A0; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK__CI__VI = 0x22C0; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_H__CI__VI = 0xC2A1; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE__CI__VI = 0xC2A3; +constexpr unsigned int mmPA_SC_P3D_TRAP_SCREEN_V__CI__VI = 0xC2A2; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_HI__CI__VI = 0xD141; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_HI__SI = 0x22A9; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_LO__CI__VI = 0xD140; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_LO__SI = 0x22A8; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_SELECT1__CI__VI = 0xD941; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_SELECT__CI__VI = 0xD940; +constexpr unsigned int mmPA_SC_PERFCOUNTER0_SELECT__SI = 0x22A0; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_HI__CI__VI = 0xD143; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_HI__SI = 0x22AB; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_LO__CI__VI = 0xD142; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_LO__SI = 0x22AA; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_SELECT__CI__VI = 0xD942; +constexpr unsigned int mmPA_SC_PERFCOUNTER1_SELECT__SI = 0x22A1; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_HI__CI__VI = 0xD145; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_HI__SI = 0x22AD; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_LO__CI__VI = 0xD144; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_LO__SI = 0x22AC; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_SELECT__CI__VI = 0xD943; +constexpr unsigned int mmPA_SC_PERFCOUNTER2_SELECT__SI = 0x22A2; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_HI__CI__VI = 0xD147; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_HI__SI = 0x22AF; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_LO__CI__VI = 0xD146; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_LO__SI = 0x22AE; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_SELECT__CI__VI = 0xD944; +constexpr unsigned int mmPA_SC_PERFCOUNTER3_SELECT__SI = 0x22A3; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_HI__CI__VI = 0xD149; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_HI__SI = 0x22B1; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_LO__CI__VI = 0xD148; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_LO__SI = 0x22B0; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_SELECT__CI__VI = 0xD945; +constexpr unsigned int mmPA_SC_PERFCOUNTER4_SELECT__SI = 0x22A4; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_HI__CI__VI = 0xD14B; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_HI__SI = 0x22B3; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_LO__CI__VI = 0xD14A; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_LO__SI = 0x22B2; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_SELECT__CI__VI = 0xD946; +constexpr unsigned int mmPA_SC_PERFCOUNTER5_SELECT__SI = 0x22A5; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_HI__CI__VI = 0xD14D; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_HI__SI = 0x22B5; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_LO__CI__VI = 0xD14C; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_LO__SI = 0x22B4; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_SELECT__CI__VI = 0xD947; +constexpr unsigned int mmPA_SC_PERFCOUNTER6_SELECT__SI = 0x22A6; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_HI__CI__VI = 0xD14F; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_HI__SI = 0x22B7; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_LO__CI__VI = 0xD14E; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_LO__SI = 0x22B6; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_SELECT__CI__VI = 0xD948; +constexpr unsigned int mmPA_SC_PERFCOUNTER7_SELECT__SI = 0x22A7; +constexpr unsigned int mmPA_SC_RASTER_CONFIG = 0xA0D4; +constexpr unsigned int mmPA_SC_RASTER_CONFIG_1__CI__VI = 0xA0D5; +constexpr unsigned int mmPA_SC_SCREEN_SCISSOR_BR = 0xA00D; +constexpr unsigned int mmPA_SC_SCREEN_SCISSOR_TL = 0xA00C; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_COUNT__CI__VI = 0xC2B4; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_HV_EN__CI__VI = 0xC2B0; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_HV_LOCK__CI__VI = 0x22C2; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_H__CI__VI = 0xC2B1; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_OCCURRENCE__CI__VI = 0xC2B3; +constexpr unsigned int mmPA_SC_TRAP_SCREEN_V__CI__VI = 0xC2B2; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_0_BR = 0xA095; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_0_TL = 0xA094; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_10_BR = 0xA0A9; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_10_TL = 0xA0A8; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_11_BR = 0xA0AB; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_11_TL = 0xA0AA; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_12_BR = 0xA0AD; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_12_TL = 0xA0AC; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_13_BR = 0xA0AF; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_13_TL = 0xA0AE; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_14_BR = 0xA0B1; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_14_TL = 0xA0B0; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_15_BR = 0xA0B3; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_15_TL = 0xA0B2; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_1_BR = 0xA097; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_1_TL = 0xA096; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_2_BR = 0xA099; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_2_TL = 0xA098; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_3_BR = 0xA09B; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_3_TL = 0xA09A; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_4_BR = 0xA09D; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_4_TL = 0xA09C; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_5_BR = 0xA09F; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_5_TL = 0xA09E; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_6_BR = 0xA0A1; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_6_TL = 0xA0A0; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_7_BR = 0xA0A3; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_7_TL = 0xA0A2; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_8_BR = 0xA0A5; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_8_TL = 0xA0A4; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_9_BR = 0xA0A7; +constexpr unsigned int mmPA_SC_VPORT_SCISSOR_9_TL = 0xA0A6; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_0 = 0xA0B5; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_1 = 0xA0B7; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_10 = 0xA0C9; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_11 = 0xA0CB; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_12 = 0xA0CD; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_13 = 0xA0CF; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_14 = 0xA0D1; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_15 = 0xA0D3; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_2 = 0xA0B9; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_3 = 0xA0BB; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_4 = 0xA0BD; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_5 = 0xA0BF; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_6 = 0xA0C1; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_7 = 0xA0C3; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_8 = 0xA0C5; +constexpr unsigned int mmPA_SC_VPORT_ZMAX_9 = 0xA0C7; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_0 = 0xA0B4; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_1 = 0xA0B6; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_10 = 0xA0C8; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_11 = 0xA0CA; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_12 = 0xA0CC; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_13 = 0xA0CE; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_14 = 0xA0D0; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_15 = 0xA0D2; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_2 = 0xA0B8; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_3 = 0xA0BA; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_4 = 0xA0BC; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_5 = 0xA0BE; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_6 = 0xA0C0; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_7 = 0xA0C2; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_8 = 0xA0C4; +constexpr unsigned int mmPA_SC_VPORT_ZMIN_9 = 0xA0C6; +constexpr unsigned int mmPA_SC_WINDOW_OFFSET = 0xA080; +constexpr unsigned int mmPA_SC_WINDOW_SCISSOR_BR = 0xA082; +constexpr unsigned int mmPA_SC_WINDOW_SCISSOR_TL = 0xA081; +constexpr unsigned int mmPA_SU_CNTL_STATUS = 0x2294; +constexpr unsigned int mmPA_SU_DEBUG_CNTL = 0x2280; +constexpr unsigned int mmPA_SU_DEBUG_DATA = 0x2281; +constexpr unsigned int mmPA_SU_HARDWARE_SCREEN_OFFSET = 0xA08D; +constexpr unsigned int mmPA_SU_LINE_CNTL = 0xA282; +constexpr unsigned int mmPA_SU_LINE_STIPPLE_CNTL = 0xA209; +constexpr unsigned int mmPA_SU_LINE_STIPPLE_SCALE = 0xA20A; +constexpr unsigned int mmPA_SU_LINE_STIPPLE_VALUE__CI__VI = 0xC280; +constexpr unsigned int mmPA_SU_LINE_STIPPLE_VALUE__SI = 0x2298; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_HI__CI__VI = 0xD101; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_HI__SI = 0x228D; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_LO__CI__VI = 0xD100; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_LO__SI = 0x228C; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_SELECT1__CI__VI = 0xD901; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_SELECT__CI__VI = 0xD900; +constexpr unsigned int mmPA_SU_PERFCOUNTER0_SELECT__SI = 0x2288; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_HI__CI__VI = 0xD103; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_HI__SI = 0x228F; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_LO__CI__VI = 0xD102; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_LO__SI = 0x228E; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_SELECT1__CI__VI = 0xD903; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_SELECT__CI__VI = 0xD902; +constexpr unsigned int mmPA_SU_PERFCOUNTER1_SELECT__SI = 0x2289; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_HI__CI__VI = 0xD105; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_HI__SI = 0x2291; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_LO__CI__VI = 0xD104; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_LO__SI = 0x2290; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_SELECT__CI__VI = 0xD904; +constexpr unsigned int mmPA_SU_PERFCOUNTER2_SELECT__SI = 0x228A; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_HI__CI__VI = 0xD107; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_HI__SI = 0x2293; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_LO__CI__VI = 0xD106; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_LO__SI = 0x2292; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_SELECT__CI__VI = 0xD905; +constexpr unsigned int mmPA_SU_PERFCOUNTER3_SELECT__SI = 0x228B; +constexpr unsigned int mmPA_SU_POINT_MINMAX = 0xA281; +constexpr unsigned int mmPA_SU_POINT_SIZE = 0xA280; +constexpr unsigned int mmPA_SU_POLY_OFFSET_BACK_OFFSET = 0xA2E3; +constexpr unsigned int mmPA_SU_POLY_OFFSET_BACK_SCALE = 0xA2E2; +constexpr unsigned int mmPA_SU_POLY_OFFSET_CLAMP = 0xA2DF; +constexpr unsigned int mmPA_SU_POLY_OFFSET_DB_FMT_CNTL = 0xA2DE; +constexpr unsigned int mmPA_SU_POLY_OFFSET_FRONT_OFFSET = 0xA2E1; +constexpr unsigned int mmPA_SU_POLY_OFFSET_FRONT_SCALE = 0xA2E0; +constexpr unsigned int mmPA_SU_PRIM_FILTER_CNTL = 0xA20B; +constexpr unsigned int mmPA_SU_SC_MODE_CNTL = 0xA205; +constexpr unsigned int mmPA_SU_VTX_CNTL = 0xA2F9; +constexpr unsigned int mmPCIE_DATA_2__CI__VI = 0x000D; +constexpr unsigned int mmPCIE_DATA__CI__VI = 0x000F; +constexpr unsigned int mmPCIE_DATA__SI = 0x000D; +constexpr unsigned int mmPCIE_INDEX_2__CI__VI = 0x000C; +constexpr unsigned int mmPCIE_INDEX__CI__VI = 0x000E; +constexpr unsigned int mmPCIE_INDEX__SI = 0x000C; +constexpr unsigned int mmPEER0_FB_OFFSET_HI__CI__VI = 0x14F3; +constexpr unsigned int mmPEER0_FB_OFFSET_LO__CI__VI = 0x14F2; +constexpr unsigned int mmPEER1_FB_OFFSET_HI__CI__VI = 0x14F1; +constexpr unsigned int mmPEER1_FB_OFFSET_LO__CI__VI = 0x14F0; +constexpr unsigned int mmPEER2_FB_OFFSET_HI__CI__VI = 0x14EF; +constexpr unsigned int mmPEER2_FB_OFFSET_LO__CI__VI = 0x14EE; +constexpr unsigned int mmPEER3_FB_OFFSET_HI__CI__VI = 0x14ED; +constexpr unsigned int mmPEER3_FB_OFFSET_LO__CI__VI = 0x14EC; +constexpr unsigned int mmPEER_REG_RANGE0 = 0x153E; +constexpr unsigned int mmPEER_REG_RANGE1 = 0x153F; +constexpr unsigned int mmPHY_AUX_CNTL__SI = 0x1953; +constexpr unsigned int mmPIPE0_ARBITRATION_CONTROL3__SI = 0x02FC; +constexpr unsigned int mmPIPE1_ARBITRATION_CONTROL3__SI = 0x0300; +constexpr unsigned int mmPIPE2_ARBITRATION_CONTROL3__SI = 0x0304; +constexpr unsigned int mmPIPE3_ARBITRATION_CONTROL3__SI = 0x0308; +constexpr unsigned int mmPIPE4_ARBITRATION_CONTROL3__SI = 0x030C; +constexpr unsigned int mmPIPE5_ARBITRATION_CONTROL3__SI = 0x0310; +constexpr unsigned int mmPIXCLK1_RESYNC_CNTL__SI = 0x0126; +constexpr unsigned int mmPIXCLK2_RESYNC_CNTL__SI = 0x0127; +constexpr unsigned int mmPLL_TEST_CNTL__SI = 0x0199; +constexpr unsigned int mmRAS_BCI_SIGNATURE0 = 0x339E; +constexpr unsigned int mmRAS_BCI_SIGNATURE1 = 0x339F; +constexpr unsigned int mmRAS_CB_SIGNATURE0 = 0x339D; +constexpr unsigned int mmRAS_DB_SIGNATURE0 = 0x338B; +constexpr unsigned int mmRAS_IA_SIGNATURE0 = 0x3397; +constexpr unsigned int mmRAS_IA_SIGNATURE1 = 0x3398; +constexpr unsigned int mmRAS_PA_SIGNATURE0 = 0x338C; +constexpr unsigned int mmRAS_SC_SIGNATURE0 = 0x338F; +constexpr unsigned int mmRAS_SC_SIGNATURE1 = 0x3390; +constexpr unsigned int mmRAS_SC_SIGNATURE2 = 0x3391; +constexpr unsigned int mmRAS_SC_SIGNATURE3 = 0x3392; +constexpr unsigned int mmRAS_SC_SIGNATURE4 = 0x3393; +constexpr unsigned int mmRAS_SC_SIGNATURE5 = 0x3394; +constexpr unsigned int mmRAS_SC_SIGNATURE6 = 0x3395; +constexpr unsigned int mmRAS_SC_SIGNATURE7 = 0x3396; +constexpr unsigned int mmRAS_SIGNATURE_CONTROL = 0x3380; +constexpr unsigned int mmRAS_SIGNATURE_MASK = 0x3381; +constexpr unsigned int mmRAS_SPI_SIGNATURE0 = 0x3399; +constexpr unsigned int mmRAS_SPI_SIGNATURE1 = 0x339A; +constexpr unsigned int mmRAS_SQ_SIGNATURE0 = 0x338E; +constexpr unsigned int mmRAS_SX_SIGNATURE0 = 0x3382; +constexpr unsigned int mmRAS_SX_SIGNATURE1 = 0x3383; +constexpr unsigned int mmRAS_SX_SIGNATURE2 = 0x3384; +constexpr unsigned int mmRAS_SX_SIGNATURE3 = 0x3385; +constexpr unsigned int mmRAS_TA_SIGNATURE0 = 0x339B; +constexpr unsigned int mmRAS_TD_SIGNATURE0 = 0x339C; +constexpr unsigned int mmRAS_VGT_SIGNATURE0 = 0x338D; +constexpr unsigned int mmRCU_MISC_CTRL__SI = 0x0043; +constexpr unsigned int mmRCU_UC_EVENTS__SI = 0x0045; +constexpr unsigned int mmRLC_AUTO_PG_CTRL__CI = 0x3115; +constexpr unsigned int mmRLC_AUTO_PG_CTRL__SI = 0x310D; +constexpr unsigned int mmRLC_CAPTURE_GPU_CLOCK_COUNT__CI = 0x30E6; +constexpr unsigned int mmRLC_CAPTURE_GPU_CLOCK_COUNT__SI = 0x30D0; +constexpr unsigned int mmRLC_CGCG_CGLS_CTRL__CI = 0x3109; +constexpr unsigned int mmRLC_CGCG_CGLS_CTRL__SI = 0x3101; +constexpr unsigned int mmRLC_CGCG_RAMP_CTRL__CI = 0x310A; +constexpr unsigned int mmRLC_CGCG_RAMP_CTRL__SI = 0x3102; +constexpr unsigned int mmRLC_CGTT_MGCG_OVERRIDE__CI = 0x3108; +constexpr unsigned int mmRLC_CGTT_MGCG_OVERRIDE__SI = 0x3100; +constexpr unsigned int mmRLC_CU_STATUS__CI = 0x310E; +constexpr unsigned int mmRLC_CU_STATUS__SI = 0x3106; +constexpr unsigned int mmRLC_DEBUG_SELECT__CI = 0x30C1; +constexpr unsigned int mmRLC_DEBUG_SELECT__SI = 0x30C9; +constexpr unsigned int mmRLC_DEBUG__CI = 0x30C2; +constexpr unsigned int mmRLC_DEBUG__SI = 0x30CA; +constexpr unsigned int mmRLC_DRIVER_CPDMA_STATUS__CI = 0x30DE; +constexpr unsigned int mmRLC_DRIVER_CPDMA_STATUS__SI = 0x30C7; +constexpr unsigned int mmRLC_DYN_PG_REQUEST__CI = 0x310C; +constexpr unsigned int mmRLC_DYN_PG_REQUEST__SI = 0x3104; +constexpr unsigned int mmRLC_DYN_PG_STATUS__CI = 0x310B; +constexpr unsigned int mmRLC_DYN_PG_STATUS__SI = 0x3103; +constexpr unsigned int mmRLC_GPM_CU_PD_TIMEOUT__CI = 0x312B; +constexpr unsigned int mmRLC_GPM_DEBUG_SELECT__CI = 0x30E0; +constexpr unsigned int mmRLC_GPM_DEBUG__CI = 0x30E1; +constexpr unsigned int mmRLC_GPM_GENERAL_0__CI = 0x3123; +constexpr unsigned int mmRLC_GPM_GENERAL_1__CI = 0x3124; +constexpr unsigned int mmRLC_GPM_GENERAL_2__CI = 0x3125; +constexpr unsigned int mmRLC_GPM_GENERAL_3__CI = 0x3126; +constexpr unsigned int mmRLC_GPM_GENERAL_4__CI = 0x3127; +constexpr unsigned int mmRLC_GPM_GENERAL_5__CI = 0x3128; +constexpr unsigned int mmRLC_GPM_GENERAL_6__CI = 0x3129; +constexpr unsigned int mmRLC_GPM_GENERAL_7__CI = 0x312A; +constexpr unsigned int mmRLC_GPM_LOG_ADDR__CI = 0x3136; +constexpr unsigned int mmRLC_GPM_LOG_CONT__CI = 0x3138; +constexpr unsigned int mmRLC_GPM_LOG_SIZE__CI = 0x3137; +constexpr unsigned int mmRLC_GPM_PERF_COUNT_0__CI = 0x312F; +constexpr unsigned int mmRLC_GPM_PERF_COUNT_1__CI = 0x3130; +constexpr unsigned int mmRLC_GPM_SCRATCH_ADDR__CI = 0x312C; +constexpr unsigned int mmRLC_GPM_SCRATCH_DATA__CI = 0x312D; +constexpr unsigned int mmRLC_GPM_STAT__CI = 0x3100; +constexpr unsigned int mmRLC_GPM_THREAD_ENABLE__CI = 0x3105; +constexpr unsigned int mmRLC_GPM_THREAD_PRIORITY__CI = 0x3104; +constexpr unsigned int mmRLC_GPM_UCODE_ADDR__CI = 0x30E2; +constexpr unsigned int mmRLC_GPM_UCODE_DATA__CI = 0x30E3; +constexpr unsigned int mmRLC_GPM_VMID_THREAD0__CI = 0x3106; +constexpr unsigned int mmRLC_GPM_VMID_THREAD1__CI = 0x3107; +constexpr unsigned int mmRLC_GPR_REG1__CI = 0x3139; +constexpr unsigned int mmRLC_GPR_REG2__CI = 0x313A; +constexpr unsigned int mmRLC_GPU_CLOCK_32_RES_SEL__CI = 0x3101; +constexpr unsigned int mmRLC_GPU_CLOCK_32_RES_SEL__SI = 0x30D4; +constexpr unsigned int mmRLC_GPU_CLOCK_32__CI = 0x3102; +constexpr unsigned int mmRLC_GPU_CLOCK_32__SI = 0x30D5; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_LSB__CI = 0x30E4; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_LSB__SI = 0x30CE; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_MSB__CI = 0x30E5; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_MSB__SI = 0x30CF; +constexpr unsigned int mmRLC_JUMP_TABLE_RESTORE__CI = 0x30DE; +constexpr unsigned int mmRLC_LB_ALWAYS_ACTIVE_CU_MASK__CI = 0x3110; +constexpr unsigned int mmRLC_LB_ALWAYS_ACTIVE_CU_MASK__SI = 0x3108; +constexpr unsigned int mmRLC_LB_CNTL__CI = 0x30D9; +constexpr unsigned int mmRLC_LB_CNTL__SI = 0x30C3; +constexpr unsigned int mmRLC_LB_CNTR_INIT__CI = 0x30DB; +constexpr unsigned int mmRLC_LB_CNTR_INIT__SI = 0x30C6; +constexpr unsigned int mmRLC_LB_CNTR_MAX__CI = 0x30D2; +constexpr unsigned int mmRLC_LB_CNTR_MAX__SI = 0x30C5; +constexpr unsigned int mmRLC_LB_INIT_CU_MASK__CI = 0x310F; +constexpr unsigned int mmRLC_LB_INIT_CU_MASK__SI = 0x3107; +constexpr unsigned int mmRLC_LB_PARAMS__CI = 0x3111; +constexpr unsigned int mmRLC_LB_PARAMS__SI = 0x3109; +constexpr unsigned int mmRLC_LOAD_BALANCE_CNTR__CI = 0x30DC; +constexpr unsigned int mmRLC_LOAD_BALANCE_CNTR__SI = 0x30F6; +constexpr unsigned int mmRLC_MAX_PG_CU__CI = 0x3114; +constexpr unsigned int mmRLC_MAX_PG_CU__SI = 0x310C; +constexpr unsigned int mmRLC_MC_CNTL__CI = 0x30C3; +constexpr unsigned int mmRLC_MC_CNTL__SI = 0x30D1; +constexpr unsigned int mmRLC_MEM_SLP_CNTL__CI = 0x30C6; +constexpr unsigned int mmRLC_MEM_SLP_CNTL__SI = 0x30D8; +constexpr unsigned int mmRLC_PERFCOUNTER0_HI__CI__VI = 0xD481; +constexpr unsigned int mmRLC_PERFCOUNTER0_HI__SI = 0x30DC; +constexpr unsigned int mmRLC_PERFCOUNTER0_LO__CI__VI = 0xD480; +constexpr unsigned int mmRLC_PERFCOUNTER0_LO__SI = 0x30DB; +constexpr unsigned int mmRLC_PERFCOUNTER0_SELECT__CI__VI = 0xDCC1; +constexpr unsigned int mmRLC_PERFCOUNTER0_SELECT__SI = 0x30DA; +constexpr unsigned int mmRLC_PERFCOUNTER1_HI__CI__VI = 0xD483; +constexpr unsigned int mmRLC_PERFCOUNTER1_HI__SI = 0x30DF; +constexpr unsigned int mmRLC_PERFCOUNTER1_LO__CI__VI = 0xD482; +constexpr unsigned int mmRLC_PERFCOUNTER1_LO__SI = 0x30DE; +constexpr unsigned int mmRLC_PERFCOUNTER1_SELECT__CI__VI = 0xDCC2; +constexpr unsigned int mmRLC_PERFCOUNTER1_SELECT__SI = 0x30DD; +constexpr unsigned int mmRLC_PERFMON_CNTL__CI__VI = 0xDCC0; +constexpr unsigned int mmRLC_PERFMON_CNTL__SI = 0x30D9; +constexpr unsigned int mmRLC_PG_ALWAYS_ON_CU_MASK__CI = 0x3113; +constexpr unsigned int mmRLC_PG_ALWAYS_ON_CU_MASK__SI = 0x310B; +constexpr unsigned int mmRLC_PG_CNTL__CI = 0x3103; +constexpr unsigned int mmRLC_PG_CNTL__SI = 0x30D7; +constexpr unsigned int mmRLC_PG_DELAY_2__CI = 0x30DF; +constexpr unsigned int mmRLC_PG_DELAY__CI = 0x310D; +constexpr unsigned int mmRLC_SAFE_MODE__CI = 0x313A; +constexpr unsigned int mmRLC_SAVE_AND_RESTORE_BASE__CI = 0x30DD; +constexpr unsigned int mmRLC_SAVE_AND_RESTORE_BASE__SI = 0x30C4; +constexpr unsigned int mmRLC_SERDES_CU_MASTER_BUSY__CI = 0x3121; +constexpr unsigned int mmRLC_SERDES_NONCU_MASTER_BUSY__CI = 0x3122; +constexpr unsigned int mmRLC_SERDES_RD_DATA_0__CI = 0x311A; +constexpr unsigned int mmRLC_SERDES_RD_DATA_0__SI = 0x3112; +constexpr unsigned int mmRLC_SERDES_RD_DATA_1__CI = 0x311B; +constexpr unsigned int mmRLC_SERDES_RD_DATA_1__SI = 0x3113; +constexpr unsigned int mmRLC_SERDES_RD_DATA_2__CI = 0x311C; +constexpr unsigned int mmRLC_SERDES_RD_DATA_2__SI = 0x3114; +constexpr unsigned int mmRLC_SERDES_RD_MASTER_INDEX__CI = 0x3119; +constexpr unsigned int mmRLC_SERDES_RD_MASTER_INDEX__SI = 0x3111; +constexpr unsigned int mmRLC_SERDES_WR_CTRL__CI = 0x311F; +constexpr unsigned int mmRLC_SERDES_WR_CTRL__SI = 0x3117; +constexpr unsigned int mmRLC_SERDES_WR_CU_MASTER_MASK__CI = 0x311D; +constexpr unsigned int mmRLC_SERDES_WR_DATA__CI = 0x3120; +constexpr unsigned int mmRLC_SERDES_WR_DATA__SI = 0x3118; +constexpr unsigned int mmRLC_SERDES_WR_NONCU_MASTER_MASK__CI = 0x311E; +constexpr unsigned int mmRLC_SMU_GRBM_REG_SAVE_CTRL__CI = 0x3116; +constexpr unsigned int mmRLC_SMU_GRBM_REG_SAVE_CTRL__SI = 0x310E; +constexpr unsigned int mmRLC_SMU_PG_CTRL__CI = 0x3117; +constexpr unsigned int mmRLC_SMU_PG_CTRL__SI = 0x310F; +constexpr unsigned int mmRLC_SMU_PG_WAKE_UP_CTRL__CI = 0x3118; +constexpr unsigned int mmRLC_SMU_PG_WAKE_UP_CTRL__SI = 0x3110; +constexpr unsigned int mmRLC_SOFT_RESET_GPU__CI = 0x30C5; +constexpr unsigned int mmRLC_SOFT_RESET_GPU__SI = 0x30D6; +constexpr unsigned int mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC8A; +constexpr unsigned int mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC88; +constexpr unsigned int mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC89; +constexpr unsigned int mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC87; +constexpr unsigned int mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC8B; +constexpr unsigned int mmRLC_SPM_DEBUG_SELECT__CI = 0x3134; +constexpr unsigned int mmRLC_SPM_DEBUG__CI = 0x3135; +constexpr unsigned int mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC8D; +constexpr unsigned int mmRLC_SPM_GLOBAL_MUXSEL_ADDR__CI__VI = 0xDC9B; +constexpr unsigned int mmRLC_SPM_GLOBAL_MUXSEL_DATA__CI__VI = 0xDC9C; +constexpr unsigned int mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC8E; +constexpr unsigned int mmRLC_SPM_INT_CNTL__CI = 0x3132; +constexpr unsigned int mmRLC_SPM_INT_STATUS__CI = 0x3133; +constexpr unsigned int mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC8C; +constexpr unsigned int mmRLC_SPM_PERFMON_CNTL__CI__VI = 0xDC80; +constexpr unsigned int mmRLC_SPM_PERFMON_RING_BASE_HI__CI__VI = 0xDC82; +constexpr unsigned int mmRLC_SPM_PERFMON_RING_BASE_LO__CI__VI = 0xDC81; +constexpr unsigned int mmRLC_SPM_PERFMON_RING_SIZE__CI__VI = 0xDC83; +constexpr unsigned int mmRLC_SPM_PERFMON_SEGMENT_SIZE__CI__VI = 0xDC84; +constexpr unsigned int mmRLC_SPM_RING_RDPTR__CI__VI = 0xDC9D; +constexpr unsigned int mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC90; +constexpr unsigned int mmRLC_SPM_SEGMENT_THRESHOLD__CI__VI = 0xDC9E; +constexpr unsigned int mmRLC_SPM_SE_MUXSEL_ADDR__CI__VI = 0xDC85; +constexpr unsigned int mmRLC_SPM_SE_MUXSEL_DATA__CI__VI = 0xDC86; +constexpr unsigned int mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC97; +constexpr unsigned int mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC98; +constexpr unsigned int mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC9A; +constexpr unsigned int mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC94; +constexpr unsigned int mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC92; +constexpr unsigned int mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC91; +constexpr unsigned int mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC93; +constexpr unsigned int mmRLC_SPM_TCS_PERFMON_SAMPLE_DELAY__CI = 0xDC99; +constexpr unsigned int mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC95; +constexpr unsigned int mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY__CI__VI = 0xDC96; +constexpr unsigned int mmRLC_SPM_VMID__CI = 0x3131; +constexpr unsigned int mmRLC_STATIC_PG_STATUS__CI = 0x312E; +constexpr unsigned int mmRLC_STAT__CI = 0x30C4; +constexpr unsigned int mmRLC_STAT__SI = 0x30D3; +constexpr unsigned int mmRLC_THREAD1_DELAY__CI = 0x3112; +constexpr unsigned int mmRLC_THREAD1_DELAY__SI = 0x310A; +constexpr unsigned int mmRLC_UCODE_CNTL__CI = 0x30E7; +constexpr unsigned int mmRLC_UCODE_CNTL__SI = 0x30D2; +constexpr unsigned int mmROM_CNTL__SI = 0x0580; +constexpr unsigned int mmROM_DATA__SI = 0x002B; +constexpr unsigned int mmROM_INDEX__SI = 0x002A; +constexpr unsigned int mmROM_SMC_IND_DATA__CI__VI = 0x0081; +constexpr unsigned int mmROM_SMC_IND_INDEX__CI__VI = 0x0080; +constexpr unsigned int mmROM_START__SI = 0x0585; +constexpr unsigned int mmROM_STATUS__SI = 0x0582; +constexpr unsigned int mmROM_SW_CNTL__SI = 0x0586; +constexpr unsigned int mmROM_SW_COMMAND__SI = 0x0588; +constexpr unsigned int mmROM_SW_DATA_10__SI = 0x0592; +constexpr unsigned int mmROM_SW_DATA_11__SI = 0x0593; +constexpr unsigned int mmROM_SW_DATA_12__SI = 0x0594; +constexpr unsigned int mmROM_SW_DATA_13__SI = 0x0595; +constexpr unsigned int mmROM_SW_DATA_14__SI = 0x0596; +constexpr unsigned int mmROM_SW_DATA_15__SI = 0x0597; +constexpr unsigned int mmROM_SW_DATA_16__SI = 0x0598; +constexpr unsigned int mmROM_SW_DATA_17__SI = 0x0599; +constexpr unsigned int mmROM_SW_DATA_18__SI = 0x059A; +constexpr unsigned int mmROM_SW_DATA_19__SI = 0x059B; +constexpr unsigned int mmROM_SW_DATA_1__SI = 0x0589; +constexpr unsigned int mmROM_SW_DATA_20__SI = 0x059C; +constexpr unsigned int mmROM_SW_DATA_21__SI = 0x059D; +constexpr unsigned int mmROM_SW_DATA_22__SI = 0x059E; +constexpr unsigned int mmROM_SW_DATA_23__SI = 0x059F; +constexpr unsigned int mmROM_SW_DATA_24__SI = 0x05A0; +constexpr unsigned int mmROM_SW_DATA_25__SI = 0x05A1; +constexpr unsigned int mmROM_SW_DATA_26__SI = 0x05A2; +constexpr unsigned int mmROM_SW_DATA_27__SI = 0x05A3; +constexpr unsigned int mmROM_SW_DATA_28__SI = 0x05A4; +constexpr unsigned int mmROM_SW_DATA_29__SI = 0x05A5; +constexpr unsigned int mmROM_SW_DATA_2__SI = 0x058A; +constexpr unsigned int mmROM_SW_DATA_30__SI = 0x05A6; +constexpr unsigned int mmROM_SW_DATA_31__SI = 0x05A7; +constexpr unsigned int mmROM_SW_DATA_32__SI = 0x05A8; +constexpr unsigned int mmROM_SW_DATA_33__SI = 0x05A9; +constexpr unsigned int mmROM_SW_DATA_34__SI = 0x05AA; +constexpr unsigned int mmROM_SW_DATA_35__SI = 0x05AB; +constexpr unsigned int mmROM_SW_DATA_36__SI = 0x05AC; +constexpr unsigned int mmROM_SW_DATA_37__SI = 0x05AD; +constexpr unsigned int mmROM_SW_DATA_38__SI = 0x05AE; +constexpr unsigned int mmROM_SW_DATA_39__SI = 0x05AF; +constexpr unsigned int mmROM_SW_DATA_3__SI = 0x058B; +constexpr unsigned int mmROM_SW_DATA_40__SI = 0x05B0; +constexpr unsigned int mmROM_SW_DATA_41__SI = 0x05B1; +constexpr unsigned int mmROM_SW_DATA_42__SI = 0x05B2; +constexpr unsigned int mmROM_SW_DATA_43__SI = 0x05B3; +constexpr unsigned int mmROM_SW_DATA_44__SI = 0x05B4; +constexpr unsigned int mmROM_SW_DATA_45__SI = 0x05B5; +constexpr unsigned int mmROM_SW_DATA_46__SI = 0x05B6; +constexpr unsigned int mmROM_SW_DATA_47__SI = 0x05B7; +constexpr unsigned int mmROM_SW_DATA_48__SI = 0x05B8; +constexpr unsigned int mmROM_SW_DATA_49__SI = 0x05B9; +constexpr unsigned int mmROM_SW_DATA_4__SI = 0x058C; +constexpr unsigned int mmROM_SW_DATA_50__SI = 0x05BA; +constexpr unsigned int mmROM_SW_DATA_51__SI = 0x05BB; +constexpr unsigned int mmROM_SW_DATA_52__SI = 0x05BC; +constexpr unsigned int mmROM_SW_DATA_53__SI = 0x05BD; +constexpr unsigned int mmROM_SW_DATA_54__SI = 0x05BE; +constexpr unsigned int mmROM_SW_DATA_55__SI = 0x05BF; +constexpr unsigned int mmROM_SW_DATA_56__SI = 0x05C0; +constexpr unsigned int mmROM_SW_DATA_57__SI = 0x05C1; +constexpr unsigned int mmROM_SW_DATA_58__SI = 0x05C2; +constexpr unsigned int mmROM_SW_DATA_59__SI = 0x05C3; +constexpr unsigned int mmROM_SW_DATA_5__SI = 0x058D; +constexpr unsigned int mmROM_SW_DATA_60__SI = 0x05C4; +constexpr unsigned int mmROM_SW_DATA_61__SI = 0x05C5; +constexpr unsigned int mmROM_SW_DATA_62__SI = 0x05C6; +constexpr unsigned int mmROM_SW_DATA_63__SI = 0x05C7; +constexpr unsigned int mmROM_SW_DATA_64__SI = 0x05C8; +constexpr unsigned int mmROM_SW_DATA_6__SI = 0x058E; +constexpr unsigned int mmROM_SW_DATA_7__SI = 0x058F; +constexpr unsigned int mmROM_SW_DATA_8__SI = 0x0590; +constexpr unsigned int mmROM_SW_DATA_9__SI = 0x0591; +constexpr unsigned int mmROM_SW_STATUS__SI = 0x0587; +constexpr unsigned int mmSCL0_EXT_OVERSCAN_LEFT_RIGHT__SI__VI = 0x1B5E; +constexpr unsigned int mmSCL0_EXT_OVERSCAN_TOP_BOTTOM__SI__VI = 0x1B5F; +constexpr unsigned int mmSCL0_SCL_ALU_CONTROL__SI__VI = 0x1B54; +constexpr unsigned int mmSCL0_SCL_AUTOMATIC_MODE_CONTROL__SI__VI = 0x1B47; +constexpr unsigned int mmSCL0_SCL_BYPASS_CONTROL__SI__VI = 0x1B45; +constexpr unsigned int mmSCL0_SCL_COEF_RAM_CONFLICT_STATUS__SI__VI = 0x1B55; +constexpr unsigned int mmSCL0_SCL_COEF_RAM_SELECT__SI__VI = 0x1B40; +constexpr unsigned int mmSCL0_SCL_COEF_RAM_TAP_DATA__SI__VI = 0x1B41; +constexpr unsigned int mmSCL0_SCL_CONTROL__SI__VI = 0x1B44; +constexpr unsigned int mmSCL0_SCL_DEBUG__SI__VI = 0x1B6A; +constexpr unsigned int mmSCL0_SCL_F_SHARP_CONTROL__SI__VI = 0x1B53; +constexpr unsigned int mmSCL0_SCL_HORZ_FILTER_CONTROL__SI = 0x1B4A; +constexpr unsigned int mmSCL0_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x1B4B; +constexpr unsigned int mmSCL0_SCL_MANUAL_REPLICATE_CONTROL__SI__VI = 0x1B46; +constexpr unsigned int mmSCL0_SCL_MODE_CHANGE_DET1__SI__VI = 0x1B60; +constexpr unsigned int mmSCL0_SCL_MODE_CHANGE_DET2__SI__VI = 0x1B61; +constexpr unsigned int mmSCL0_SCL_MODE_CHANGE_DET3__SI__VI = 0x1B62; +constexpr unsigned int mmSCL0_SCL_MODE_CHANGE_MASK__SI__VI = 0x1B63; +constexpr unsigned int mmSCL0_SCL_TAP_CONTROL__SI__VI = 0x1B43; +constexpr unsigned int mmSCL0_SCL_TEST_DEBUG_DATA__SI__VI = 0x1B6C; +constexpr unsigned int mmSCL0_SCL_TEST_DEBUG_INDEX__SI__VI = 0x1B6B; +constexpr unsigned int mmSCL0_SCL_UPDATE__SI__VI = 0x1B51; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_CONTROL__SI = 0x1B4E; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_INIT_BOT__SI = 0x1B57; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_INIT__SI = 0x1B50; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x1B4F; +constexpr unsigned int mmSCL0_VIEWPORT_SIZE__SI__VI = 0x1B5D; +constexpr unsigned int mmSCL0_VIEWPORT_START__SI__VI = 0x1B5C; +constexpr unsigned int mmSCL1_EXT_OVERSCAN_LEFT_RIGHT__SI = 0x1E5E; +constexpr unsigned int mmSCL1_EXT_OVERSCAN_TOP_BOTTOM__SI = 0x1E5F; +constexpr unsigned int mmSCL1_SCL_ALU_CONTROL__SI = 0x1E54; +constexpr unsigned int mmSCL1_SCL_AUTOMATIC_MODE_CONTROL__SI = 0x1E47; +constexpr unsigned int mmSCL1_SCL_BYPASS_CONTROL__SI = 0x1E45; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_CONFLICT_STATUS__SI = 0x1E55; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_SELECT__SI = 0x1E40; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_TAP_DATA__SI = 0x1E41; +constexpr unsigned int mmSCL1_SCL_CONTROL__SI = 0x1E44; +constexpr unsigned int mmSCL1_SCL_DEBUG__SI = 0x1E6A; +constexpr unsigned int mmSCL1_SCL_F_SHARP_CONTROL__SI = 0x1E53; +constexpr unsigned int mmSCL1_SCL_HORZ_FILTER_CONTROL__SI = 0x1E4A; +constexpr unsigned int mmSCL1_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x1E4B; +constexpr unsigned int mmSCL1_SCL_MANUAL_REPLICATE_CONTROL__SI = 0x1E46; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET1__SI = 0x1E60; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET2__SI = 0x1E61; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET3__SI = 0x1E62; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_MASK__SI = 0x1E63; +constexpr unsigned int mmSCL1_SCL_TAP_CONTROL__SI = 0x1E43; +constexpr unsigned int mmSCL1_SCL_TEST_DEBUG_DATA__SI = 0x1E6C; +constexpr unsigned int mmSCL1_SCL_TEST_DEBUG_INDEX__SI = 0x1E6B; +constexpr unsigned int mmSCL1_SCL_UPDATE__SI = 0x1E51; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_CONTROL__SI = 0x1E4E; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_INIT_BOT__SI = 0x1E57; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_INIT__SI = 0x1E50; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x1E4F; +constexpr unsigned int mmSCL1_VIEWPORT_SIZE__SI = 0x1E5D; +constexpr unsigned int mmSCL1_VIEWPORT_START__SI = 0x1E5C; +constexpr unsigned int mmSCL2_EXT_OVERSCAN_LEFT_RIGHT__SI = 0x415E; +constexpr unsigned int mmSCL2_EXT_OVERSCAN_TOP_BOTTOM__SI = 0x415F; +constexpr unsigned int mmSCL2_SCL_ALU_CONTROL__SI = 0x4154; +constexpr unsigned int mmSCL2_SCL_AUTOMATIC_MODE_CONTROL__SI = 0x4147; +constexpr unsigned int mmSCL2_SCL_BYPASS_CONTROL__SI = 0x4145; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_CONFLICT_STATUS__SI = 0x4155; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_SELECT__SI = 0x4140; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_TAP_DATA__SI = 0x4141; +constexpr unsigned int mmSCL2_SCL_CONTROL__SI = 0x4144; +constexpr unsigned int mmSCL2_SCL_DEBUG__SI = 0x416A; +constexpr unsigned int mmSCL2_SCL_F_SHARP_CONTROL__SI = 0x4153; +constexpr unsigned int mmSCL2_SCL_HORZ_FILTER_CONTROL__SI = 0x414A; +constexpr unsigned int mmSCL2_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x414B; +constexpr unsigned int mmSCL2_SCL_MANUAL_REPLICATE_CONTROL__SI = 0x4146; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET1__SI = 0x4160; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET2__SI = 0x4161; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET3__SI = 0x4162; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_MASK__SI = 0x4163; +constexpr unsigned int mmSCL2_SCL_TAP_CONTROL__SI = 0x4143; +constexpr unsigned int mmSCL2_SCL_TEST_DEBUG_DATA__SI = 0x416C; +constexpr unsigned int mmSCL2_SCL_TEST_DEBUG_INDEX__SI = 0x416B; +constexpr unsigned int mmSCL2_SCL_UPDATE__SI = 0x4151; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_CONTROL__SI = 0x414E; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_INIT_BOT__SI = 0x4157; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_INIT__SI = 0x4150; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x414F; +constexpr unsigned int mmSCL2_VIEWPORT_SIZE__SI = 0x415D; +constexpr unsigned int mmSCL2_VIEWPORT_START__SI = 0x415C; +constexpr unsigned int mmSCL3_EXT_OVERSCAN_LEFT_RIGHT__SI = 0x445E; +constexpr unsigned int mmSCL3_EXT_OVERSCAN_TOP_BOTTOM__SI = 0x445F; +constexpr unsigned int mmSCL3_SCL_ALU_CONTROL__SI = 0x4454; +constexpr unsigned int mmSCL3_SCL_AUTOMATIC_MODE_CONTROL__SI = 0x4447; +constexpr unsigned int mmSCL3_SCL_BYPASS_CONTROL__SI = 0x4445; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_CONFLICT_STATUS__SI = 0x4455; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_SELECT__SI = 0x4440; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_TAP_DATA__SI = 0x4441; +constexpr unsigned int mmSCL3_SCL_CONTROL__SI = 0x4444; +constexpr unsigned int mmSCL3_SCL_DEBUG__SI = 0x446A; +constexpr unsigned int mmSCL3_SCL_F_SHARP_CONTROL__SI = 0x4453; +constexpr unsigned int mmSCL3_SCL_HORZ_FILTER_CONTROL__SI = 0x444A; +constexpr unsigned int mmSCL3_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x444B; +constexpr unsigned int mmSCL3_SCL_MANUAL_REPLICATE_CONTROL__SI = 0x4446; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET1__SI = 0x4460; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET2__SI = 0x4461; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET3__SI = 0x4462; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_MASK__SI = 0x4463; +constexpr unsigned int mmSCL3_SCL_TAP_CONTROL__SI = 0x4443; +constexpr unsigned int mmSCL3_SCL_TEST_DEBUG_DATA__SI = 0x446C; +constexpr unsigned int mmSCL3_SCL_TEST_DEBUG_INDEX__SI = 0x446B; +constexpr unsigned int mmSCL3_SCL_UPDATE__SI = 0x4451; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_CONTROL__SI = 0x444E; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_INIT_BOT__SI = 0x4457; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_INIT__SI = 0x4450; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x444F; +constexpr unsigned int mmSCL3_VIEWPORT_SIZE__SI = 0x445D; +constexpr unsigned int mmSCL3_VIEWPORT_START__SI = 0x445C; +constexpr unsigned int mmSCL4_EXT_OVERSCAN_LEFT_RIGHT__SI = 0x475E; +constexpr unsigned int mmSCL4_EXT_OVERSCAN_TOP_BOTTOM__SI = 0x475F; +constexpr unsigned int mmSCL4_SCL_ALU_CONTROL__SI = 0x4754; +constexpr unsigned int mmSCL4_SCL_AUTOMATIC_MODE_CONTROL__SI = 0x4747; +constexpr unsigned int mmSCL4_SCL_BYPASS_CONTROL__SI = 0x4745; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_CONFLICT_STATUS__SI = 0x4755; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_SELECT__SI = 0x4740; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_TAP_DATA__SI = 0x4741; +constexpr unsigned int mmSCL4_SCL_CONTROL__SI = 0x4744; +constexpr unsigned int mmSCL4_SCL_DEBUG__SI = 0x476A; +constexpr unsigned int mmSCL4_SCL_F_SHARP_CONTROL__SI = 0x4753; +constexpr unsigned int mmSCL4_SCL_HORZ_FILTER_CONTROL__SI = 0x474A; +constexpr unsigned int mmSCL4_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x474B; +constexpr unsigned int mmSCL4_SCL_MANUAL_REPLICATE_CONTROL__SI = 0x4746; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET1__SI = 0x4760; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET2__SI = 0x4761; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET3__SI = 0x4762; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_MASK__SI = 0x4763; +constexpr unsigned int mmSCL4_SCL_TAP_CONTROL__SI = 0x4743; +constexpr unsigned int mmSCL4_SCL_TEST_DEBUG_DATA__SI = 0x476C; +constexpr unsigned int mmSCL4_SCL_TEST_DEBUG_INDEX__SI = 0x476B; +constexpr unsigned int mmSCL4_SCL_UPDATE__SI = 0x4751; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_CONTROL__SI = 0x474E; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_INIT_BOT__SI = 0x4757; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_INIT__SI = 0x4750; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x474F; +constexpr unsigned int mmSCL4_VIEWPORT_SIZE__SI = 0x475D; +constexpr unsigned int mmSCL4_VIEWPORT_START__SI = 0x475C; +constexpr unsigned int mmSCL5_EXT_OVERSCAN_LEFT_RIGHT__SI = 0x4A5E; +constexpr unsigned int mmSCL5_EXT_OVERSCAN_TOP_BOTTOM__SI = 0x4A5F; +constexpr unsigned int mmSCL5_SCL_ALU_CONTROL__SI = 0x4A54; +constexpr unsigned int mmSCL5_SCL_AUTOMATIC_MODE_CONTROL__SI = 0x4A47; +constexpr unsigned int mmSCL5_SCL_BYPASS_CONTROL__SI = 0x4A45; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_CONFLICT_STATUS__SI = 0x4A55; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_SELECT__SI = 0x4A40; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_TAP_DATA__SI = 0x4A41; +constexpr unsigned int mmSCL5_SCL_CONTROL__SI = 0x4A44; +constexpr unsigned int mmSCL5_SCL_DEBUG__SI = 0x4A6A; +constexpr unsigned int mmSCL5_SCL_F_SHARP_CONTROL__SI = 0x4A53; +constexpr unsigned int mmSCL5_SCL_HORZ_FILTER_CONTROL__SI = 0x4A4A; +constexpr unsigned int mmSCL5_SCL_HORZ_FILTER_SCALE_RATIO__SI = 0x4A4B; +constexpr unsigned int mmSCL5_SCL_MANUAL_REPLICATE_CONTROL__SI = 0x4A46; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET1__SI = 0x4A60; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET2__SI = 0x4A61; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET3__SI = 0x4A62; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_MASK__SI = 0x4A63; +constexpr unsigned int mmSCL5_SCL_TAP_CONTROL__SI = 0x4A43; +constexpr unsigned int mmSCL5_SCL_TEST_DEBUG_DATA__SI = 0x4A6C; +constexpr unsigned int mmSCL5_SCL_TEST_DEBUG_INDEX__SI = 0x4A6B; +constexpr unsigned int mmSCL5_SCL_UPDATE__SI = 0x4A51; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_CONTROL__SI = 0x4A4E; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_INIT_BOT__SI = 0x4A57; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_INIT__SI = 0x4A50; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_SCALE_RATIO__SI = 0x4A4F; +constexpr unsigned int mmSCL5_VIEWPORT_SIZE__SI = 0x4A5D; +constexpr unsigned int mmSCL5_VIEWPORT_START__SI = 0x4A5C; +constexpr unsigned int mmSCLK_CGTT_BLK_CTRL_REG__SI = 0x0129; +constexpr unsigned int mmSCLK_PWRMGT_CNTL__SI = 0x01E2; +constexpr unsigned int mmSCL_ALU_CONTROL__SI__VI = 0x1B54; +constexpr unsigned int mmSCL_AUTOMATIC_MODE_CONTROL__SI__VI = 0x1B47; +constexpr unsigned int mmSCL_BYPASS_CONTROL__SI__VI = 0x1B45; +constexpr unsigned int mmSCL_COEF_RAM_CONFLICT_STATUS__SI__VI = 0x1B55; +constexpr unsigned int mmSCL_COEF_RAM_SELECT__SI__VI = 0x1B40; +constexpr unsigned int mmSCL_COEF_RAM_TAP_DATA__SI__VI = 0x1B41; +constexpr unsigned int mmSCL_CONTROL__SI__VI = 0x1B44; +constexpr unsigned int mmSCL_DEBUG__SI__VI = 0x1B6A; +constexpr unsigned int mmSCL_F_SHARP_CONTROL__SI__VI = 0x1B53; +constexpr unsigned int mmSCL_HORZ_FILTER_CONTROL__SI = 0x1B4A; +constexpr unsigned int mmSCL_HORZ_FILTER_SCALE_RATIO__SI = 0x1B4B; +constexpr unsigned int mmSCL_MANUAL_REPLICATE_CONTROL__SI__VI = 0x1B46; +constexpr unsigned int mmSCL_MODE_CHANGE_DET1__SI__VI = 0x1B60; +constexpr unsigned int mmSCL_MODE_CHANGE_DET2__SI__VI = 0x1B61; +constexpr unsigned int mmSCL_MODE_CHANGE_DET3__SI__VI = 0x1B62; +constexpr unsigned int mmSCL_MODE_CHANGE_MASK__SI__VI = 0x1B63; +constexpr unsigned int mmSCL_TAP_CONTROL__SI__VI = 0x1B43; +constexpr unsigned int mmSCL_TEST_DEBUG_DATA__SI__VI = 0x1B6C; +constexpr unsigned int mmSCL_TEST_DEBUG_INDEX__SI__VI = 0x1B6B; +constexpr unsigned int mmSCL_UPDATE__SI__VI = 0x1B51; +constexpr unsigned int mmSCL_VERT_FILTER_CONTROL__SI = 0x1B4E; +constexpr unsigned int mmSCL_VERT_FILTER_INIT_BOT__SI = 0x1B57; +constexpr unsigned int mmSCL_VERT_FILTER_INIT__SI = 0x1B50; +constexpr unsigned int mmSCL_VERT_FILTER_SCALE_RATIO__SI = 0x1B4F; +constexpr unsigned int mmSCRATCH_ADDR__CI__VI = 0xC051; +constexpr unsigned int mmSCRATCH_ADDR__SI = 0x2151; +constexpr unsigned int mmSCRATCH_REG0__CI__VI = 0xC040; +constexpr unsigned int mmSCRATCH_REG0__SI = 0x2140; +constexpr unsigned int mmSCRATCH_REG1__CI__VI = 0xC041; +constexpr unsigned int mmSCRATCH_REG1__SI = 0x2141; +constexpr unsigned int mmSCRATCH_REG2__CI__VI = 0xC042; +constexpr unsigned int mmSCRATCH_REG2__SI = 0x2142; +constexpr unsigned int mmSCRATCH_REG3__CI__VI = 0xC043; +constexpr unsigned int mmSCRATCH_REG3__SI = 0x2143; +constexpr unsigned int mmSCRATCH_REG4__CI__VI = 0xC044; +constexpr unsigned int mmSCRATCH_REG4__SI = 0x2144; +constexpr unsigned int mmSCRATCH_REG5__CI__VI = 0xC045; +constexpr unsigned int mmSCRATCH_REG5__SI = 0x2145; +constexpr unsigned int mmSCRATCH_REG6__CI__VI = 0xC046; +constexpr unsigned int mmSCRATCH_REG6__SI = 0x2146; +constexpr unsigned int mmSCRATCH_REG7__CI__VI = 0xC047; +constexpr unsigned int mmSCRATCH_REG7__SI = 0x2147; +constexpr unsigned int mmSCRATCH_UMSK__CI__VI = 0xC050; +constexpr unsigned int mmSCRATCH_UMSK__SI = 0x2150; +constexpr unsigned int mmSDMA0_CHICKEN_BITS__CI__VI = 0x3405; +constexpr unsigned int mmSDMA0_CLK_CTRL__CI__VI = 0x3403; +constexpr unsigned int mmSDMA0_CNTL__CI__VI = 0x3404; +constexpr unsigned int mmSDMA0_F32_CNTL__CI__VI = 0x3412; +constexpr unsigned int mmSDMA0_FREEZE__CI__VI = 0x3413; +constexpr unsigned int mmSDMA0_GFX_APE1_CNTL__CI__VI = 0x34A8; +constexpr unsigned int mmSDMA0_GFX_CONTEXT_CNTL__CI__VI = 0x3493; +constexpr unsigned int mmSDMA0_GFX_CONTEXT_STATUS__CI__VI = 0x3491; +constexpr unsigned int mmSDMA0_GFX_IB_BASE_HI__CI__VI = 0x348E; +constexpr unsigned int mmSDMA0_GFX_IB_BASE_LO__CI__VI = 0x348D; +constexpr unsigned int mmSDMA0_GFX_IB_CNTL__CI__VI = 0x348A; +constexpr unsigned int mmSDMA0_GFX_IB_OFFSET__CI__VI = 0x348C; +constexpr unsigned int mmSDMA0_GFX_IB_RPTR__CI__VI = 0x348B; +constexpr unsigned int mmSDMA0_GFX_IB_SIZE__CI__VI = 0x348F; +constexpr unsigned int mmSDMA0_GFX_RB_BASE_HI__CI__VI = 0x3482; +constexpr unsigned int mmSDMA0_GFX_RB_BASE__CI__VI = 0x3481; +constexpr unsigned int mmSDMA0_GFX_RB_CNTL__CI__VI = 0x3480; +constexpr unsigned int mmSDMA0_GFX_RB_RPTR_ADDR_HI__CI__VI = 0x3488; +constexpr unsigned int mmSDMA0_GFX_RB_RPTR_ADDR_LO__CI__VI = 0x3489; +constexpr unsigned int mmSDMA0_GFX_RB_RPTR__CI__VI = 0x3483; +constexpr unsigned int mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3486; +constexpr unsigned int mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3487; +constexpr unsigned int mmSDMA0_GFX_RB_WPTR_POLL_CNTL__CI__VI = 0x3485; +constexpr unsigned int mmSDMA0_GFX_RB_WPTR__CI__VI = 0x3484; +constexpr unsigned int mmSDMA0_GFX_SKIP_CNTL__CI__VI = 0x3490; +constexpr unsigned int mmSDMA0_GFX_VIRTUAL_ADDR__CI__VI = 0x34A7; +constexpr unsigned int mmSDMA0_HASH__CI__VI = 0x3407; +constexpr unsigned int mmSDMA0_IB_OFFSET_FETCH__CI__VI = 0x340B; +constexpr unsigned int mmSDMA0_PERFCOUNTER0_RESULT__CI = 0x3410; +constexpr unsigned int mmSDMA0_PERFCOUNTER1_RESULT__CI = 0x3411; +constexpr unsigned int mmSDMA0_PERFMON_CNTL__CI = 0x340F; +constexpr unsigned int mmSDMA0_PHASE0_QUANTUM__CI__VI = 0x3414; +constexpr unsigned int mmSDMA0_PHASE1_QUANTUM__CI__VI = 0x3415; +constexpr unsigned int mmSDMA0_POWER_CNTL__CI__VI = 0x3402; +constexpr unsigned int mmSDMA0_PROGRAM__CI__VI = 0x340C; +constexpr unsigned int mmSDMA0_RB_RPTR_FETCH__CI__VI = 0x340A; +constexpr unsigned int mmSDMA0_RLC0_APE1_CNTL__CI__VI = 0x3528; +constexpr unsigned int mmSDMA0_RLC0_CONTEXT_STATUS__CI__VI = 0x3511; +constexpr unsigned int mmSDMA0_RLC0_DOORBELL_LOG__CI__VI = 0x3529; +constexpr unsigned int mmSDMA0_RLC0_DOORBELL__CI__VI = 0x3512; +constexpr unsigned int mmSDMA0_RLC0_IB_BASE_HI__CI__VI = 0x350E; +constexpr unsigned int mmSDMA0_RLC0_IB_BASE_LO__CI__VI = 0x350D; +constexpr unsigned int mmSDMA0_RLC0_IB_CNTL__CI__VI = 0x350A; +constexpr unsigned int mmSDMA0_RLC0_IB_OFFSET__CI__VI = 0x350C; +constexpr unsigned int mmSDMA0_RLC0_IB_RPTR__CI__VI = 0x350B; +constexpr unsigned int mmSDMA0_RLC0_IB_SIZE__CI__VI = 0x350F; +constexpr unsigned int mmSDMA0_RLC0_RB_BASE_HI__CI__VI = 0x3502; +constexpr unsigned int mmSDMA0_RLC0_RB_BASE__CI__VI = 0x3501; +constexpr unsigned int mmSDMA0_RLC0_RB_CNTL__CI__VI = 0x3500; +constexpr unsigned int mmSDMA0_RLC0_RB_RPTR_ADDR_HI__CI__VI = 0x3508; +constexpr unsigned int mmSDMA0_RLC0_RB_RPTR_ADDR_LO__CI__VI = 0x3509; +constexpr unsigned int mmSDMA0_RLC0_RB_RPTR__CI__VI = 0x3503; +constexpr unsigned int mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3506; +constexpr unsigned int mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3507; +constexpr unsigned int mmSDMA0_RLC0_RB_WPTR_POLL_CNTL__CI__VI = 0x3505; +constexpr unsigned int mmSDMA0_RLC0_RB_WPTR__CI__VI = 0x3504; +constexpr unsigned int mmSDMA0_RLC0_SKIP_CNTL__CI__VI = 0x3510; +constexpr unsigned int mmSDMA0_RLC0_VIRTUAL_ADDR__CI__VI = 0x3527; +constexpr unsigned int mmSDMA0_RLC1_APE1_CNTL__CI__VI = 0x35A8; +constexpr unsigned int mmSDMA0_RLC1_CONTEXT_STATUS__CI__VI = 0x3591; +constexpr unsigned int mmSDMA0_RLC1_DOORBELL_LOG__CI__VI = 0x35A9; +constexpr unsigned int mmSDMA0_RLC1_DOORBELL__CI__VI = 0x3592; +constexpr unsigned int mmSDMA0_RLC1_IB_BASE_HI__CI__VI = 0x358E; +constexpr unsigned int mmSDMA0_RLC1_IB_BASE_LO__CI__VI = 0x358D; +constexpr unsigned int mmSDMA0_RLC1_IB_CNTL__CI__VI = 0x358A; +constexpr unsigned int mmSDMA0_RLC1_IB_OFFSET__CI__VI = 0x358C; +constexpr unsigned int mmSDMA0_RLC1_IB_RPTR__CI__VI = 0x358B; +constexpr unsigned int mmSDMA0_RLC1_IB_SIZE__CI__VI = 0x358F; +constexpr unsigned int mmSDMA0_RLC1_RB_BASE_HI__CI__VI = 0x3582; +constexpr unsigned int mmSDMA0_RLC1_RB_BASE__CI__VI = 0x3581; +constexpr unsigned int mmSDMA0_RLC1_RB_CNTL__CI__VI = 0x3580; +constexpr unsigned int mmSDMA0_RLC1_RB_RPTR_ADDR_HI__CI__VI = 0x3588; +constexpr unsigned int mmSDMA0_RLC1_RB_RPTR_ADDR_LO__CI__VI = 0x3589; +constexpr unsigned int mmSDMA0_RLC1_RB_RPTR__CI__VI = 0x3583; +constexpr unsigned int mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3586; +constexpr unsigned int mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3587; +constexpr unsigned int mmSDMA0_RLC1_RB_WPTR_POLL_CNTL__CI__VI = 0x3585; +constexpr unsigned int mmSDMA0_RLC1_RB_WPTR__CI__VI = 0x3584; +constexpr unsigned int mmSDMA0_RLC1_SKIP_CNTL__CI__VI = 0x3590; +constexpr unsigned int mmSDMA0_RLC1_VIRTUAL_ADDR__CI__VI = 0x35A7; +constexpr unsigned int mmSDMA0_SEM_INCOMPLETE_TIMER_CNTL__CI = 0x3408; +constexpr unsigned int mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL__CI__VI = 0x3409; +constexpr unsigned int mmSDMA0_STATUS1_REG__CI__VI = 0x340E; +constexpr unsigned int mmSDMA0_STATUS_REG__CI__VI = 0x340D; +constexpr unsigned int mmSDMA0_TILING_CONFIG__CI__VI = 0x3406; +constexpr unsigned int mmSDMA0_UCODE_ADDR__CI__VI = 0x3400; +constexpr unsigned int mmSDMA0_UCODE_DATA__CI__VI = 0x3401; +constexpr unsigned int mmSDMA1_CHICKEN_BITS__CI__VI = 0x3605; +constexpr unsigned int mmSDMA1_CLK_CTRL__CI__VI = 0x3603; +constexpr unsigned int mmSDMA1_CNTL__CI__VI = 0x3604; +constexpr unsigned int mmSDMA1_CONFIG__CI__VI = 0x0F92; +constexpr unsigned int mmSDMA1_F32_CNTL__CI__VI = 0x3612; +constexpr unsigned int mmSDMA1_FREEZE__CI__VI = 0x3613; +constexpr unsigned int mmSDMA1_GFX_APE1_CNTL__CI__VI = 0x36A8; +constexpr unsigned int mmSDMA1_GFX_CONTEXT_CNTL__CI__VI = 0x3693; +constexpr unsigned int mmSDMA1_GFX_CONTEXT_STATUS__CI__VI = 0x3691; +constexpr unsigned int mmSDMA1_GFX_IB_BASE_HI__CI__VI = 0x368E; +constexpr unsigned int mmSDMA1_GFX_IB_BASE_LO__CI__VI = 0x368D; +constexpr unsigned int mmSDMA1_GFX_IB_CNTL__CI__VI = 0x368A; +constexpr unsigned int mmSDMA1_GFX_IB_OFFSET__CI__VI = 0x368C; +constexpr unsigned int mmSDMA1_GFX_IB_RPTR__CI__VI = 0x368B; +constexpr unsigned int mmSDMA1_GFX_IB_SIZE__CI__VI = 0x368F; +constexpr unsigned int mmSDMA1_GFX_RB_BASE_HI__CI__VI = 0x3682; +constexpr unsigned int mmSDMA1_GFX_RB_BASE__CI__VI = 0x3681; +constexpr unsigned int mmSDMA1_GFX_RB_CNTL__CI__VI = 0x3680; +constexpr unsigned int mmSDMA1_GFX_RB_RPTR_ADDR_HI__CI__VI = 0x3688; +constexpr unsigned int mmSDMA1_GFX_RB_RPTR_ADDR_LO__CI__VI = 0x3689; +constexpr unsigned int mmSDMA1_GFX_RB_RPTR__CI__VI = 0x3683; +constexpr unsigned int mmSDMA1_GFX_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3686; +constexpr unsigned int mmSDMA1_GFX_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3687; +constexpr unsigned int mmSDMA1_GFX_RB_WPTR_POLL_CNTL__CI__VI = 0x3685; +constexpr unsigned int mmSDMA1_GFX_RB_WPTR__CI__VI = 0x3684; +constexpr unsigned int mmSDMA1_GFX_SKIP_CNTL__CI__VI = 0x3690; +constexpr unsigned int mmSDMA1_GFX_VIRTUAL_ADDR__CI__VI = 0x36A7; +constexpr unsigned int mmSDMA1_HASH__CI__VI = 0x3607; +constexpr unsigned int mmSDMA1_IB_OFFSET_FETCH__CI__VI = 0x360B; +constexpr unsigned int mmSDMA1_PERFCOUNTER0_RESULT__CI = 0x3610; +constexpr unsigned int mmSDMA1_PERFCOUNTER1_RESULT__CI = 0x3611; +constexpr unsigned int mmSDMA1_PERFMON_CNTL__CI = 0x360F; +constexpr unsigned int mmSDMA1_PHASE0_QUANTUM__CI__VI = 0x3614; +constexpr unsigned int mmSDMA1_PHASE1_QUANTUM__CI__VI = 0x3615; +constexpr unsigned int mmSDMA1_POWER_CNTL__CI__VI = 0x3602; +constexpr unsigned int mmSDMA1_PROGRAM__CI__VI = 0x360C; +constexpr unsigned int mmSDMA1_RB_RPTR_FETCH__CI__VI = 0x360A; +constexpr unsigned int mmSDMA1_RLC0_APE1_CNTL__CI__VI = 0x3728; +constexpr unsigned int mmSDMA1_RLC0_CONTEXT_STATUS__CI__VI = 0x3711; +constexpr unsigned int mmSDMA1_RLC0_DOORBELL_LOG__CI__VI = 0x3729; +constexpr unsigned int mmSDMA1_RLC0_DOORBELL__CI__VI = 0x3712; +constexpr unsigned int mmSDMA1_RLC0_IB_BASE_HI__CI__VI = 0x370E; +constexpr unsigned int mmSDMA1_RLC0_IB_BASE_LO__CI__VI = 0x370D; +constexpr unsigned int mmSDMA1_RLC0_IB_CNTL__CI__VI = 0x370A; +constexpr unsigned int mmSDMA1_RLC0_IB_OFFSET__CI__VI = 0x370C; +constexpr unsigned int mmSDMA1_RLC0_IB_RPTR__CI__VI = 0x370B; +constexpr unsigned int mmSDMA1_RLC0_IB_SIZE__CI__VI = 0x370F; +constexpr unsigned int mmSDMA1_RLC0_RB_BASE_HI__CI__VI = 0x3702; +constexpr unsigned int mmSDMA1_RLC0_RB_BASE__CI__VI = 0x3701; +constexpr unsigned int mmSDMA1_RLC0_RB_CNTL__CI__VI = 0x3700; +constexpr unsigned int mmSDMA1_RLC0_RB_RPTR_ADDR_HI__CI__VI = 0x3708; +constexpr unsigned int mmSDMA1_RLC0_RB_RPTR_ADDR_LO__CI__VI = 0x3709; +constexpr unsigned int mmSDMA1_RLC0_RB_RPTR__CI__VI = 0x3703; +constexpr unsigned int mmSDMA1_RLC0_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3706; +constexpr unsigned int mmSDMA1_RLC0_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3707; +constexpr unsigned int mmSDMA1_RLC0_RB_WPTR_POLL_CNTL__CI__VI = 0x3705; +constexpr unsigned int mmSDMA1_RLC0_RB_WPTR__CI__VI = 0x3704; +constexpr unsigned int mmSDMA1_RLC0_SKIP_CNTL__CI__VI = 0x3710; +constexpr unsigned int mmSDMA1_RLC0_VIRTUAL_ADDR__CI__VI = 0x3727; +constexpr unsigned int mmSDMA1_RLC1_APE1_CNTL__CI__VI = 0x37A8; +constexpr unsigned int mmSDMA1_RLC1_CONTEXT_STATUS__CI__VI = 0x3791; +constexpr unsigned int mmSDMA1_RLC1_DOORBELL_LOG__CI__VI = 0x37A9; +constexpr unsigned int mmSDMA1_RLC1_DOORBELL__CI__VI = 0x3792; +constexpr unsigned int mmSDMA1_RLC1_IB_BASE_HI__CI__VI = 0x378E; +constexpr unsigned int mmSDMA1_RLC1_IB_BASE_LO__CI__VI = 0x378D; +constexpr unsigned int mmSDMA1_RLC1_IB_CNTL__CI__VI = 0x378A; +constexpr unsigned int mmSDMA1_RLC1_IB_OFFSET__CI__VI = 0x378C; +constexpr unsigned int mmSDMA1_RLC1_IB_RPTR__CI__VI = 0x378B; +constexpr unsigned int mmSDMA1_RLC1_IB_SIZE__CI__VI = 0x378F; +constexpr unsigned int mmSDMA1_RLC1_RB_BASE_HI__CI__VI = 0x3782; +constexpr unsigned int mmSDMA1_RLC1_RB_BASE__CI__VI = 0x3781; +constexpr unsigned int mmSDMA1_RLC1_RB_CNTL__CI__VI = 0x3780; +constexpr unsigned int mmSDMA1_RLC1_RB_RPTR_ADDR_HI__CI__VI = 0x3788; +constexpr unsigned int mmSDMA1_RLC1_RB_RPTR_ADDR_LO__CI__VI = 0x3789; +constexpr unsigned int mmSDMA1_RLC1_RB_RPTR__CI__VI = 0x3783; +constexpr unsigned int mmSDMA1_RLC1_RB_WPTR_POLL_ADDR_HI__CI__VI = 0x3786; +constexpr unsigned int mmSDMA1_RLC1_RB_WPTR_POLL_ADDR_LO__CI__VI = 0x3787; +constexpr unsigned int mmSDMA1_RLC1_RB_WPTR_POLL_CNTL__CI__VI = 0x3785; +constexpr unsigned int mmSDMA1_RLC1_RB_WPTR__CI__VI = 0x3784; +constexpr unsigned int mmSDMA1_RLC1_SKIP_CNTL__CI__VI = 0x3790; +constexpr unsigned int mmSDMA1_RLC1_VIRTUAL_ADDR__CI__VI = 0x37A7; +constexpr unsigned int mmSDMA1_SEM_INCOMPLETE_TIMER_CNTL__CI = 0x3608; +constexpr unsigned int mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL__CI__VI = 0x3609; +constexpr unsigned int mmSDMA1_STATUS1_REG__CI__VI = 0x360E; +constexpr unsigned int mmSDMA1_STATUS_REG__CI__VI = 0x360D; +constexpr unsigned int mmSDMA1_TILING_CONFIG__CI__VI = 0x3606; +constexpr unsigned int mmSDMA1_UCODE_ADDR__CI__VI = 0x3600; +constexpr unsigned int mmSDMA1_UCODE_DATA__CI__VI = 0x3601; +constexpr unsigned int mmSDMA_CONFIG__CI__VI = 0x0F91; +constexpr unsigned int mmSDMA_PGFSM_CONFIG__CI__VI = 0x3417; +constexpr unsigned int mmSDMA_PGFSM_READ__CI__VI = 0x3419; +constexpr unsigned int mmSDMA_PGFSM_WRITE__CI__VI = 0x3418; +constexpr unsigned int mmSDMA_POWER_GATING__CI__VI = 0x3416; +constexpr unsigned int mmSEM_CHICKEN_BITS__CI__VI = 0x0F9E; +constexpr unsigned int mmSEM_EDC_CONFIG__CI__VI = 0x0F9A; +constexpr unsigned int mmSEM_MAILBOX_CLIENTCONFIG__CI__VI = 0x0F9B; +constexpr unsigned int mmSEM_MAILBOX_CLIENTCONFIG__SI = 0x0F9A; +constexpr unsigned int mmSEM_MAILBOX_CONTROL__CI__VI = 0x0F9D; +constexpr unsigned int mmSEM_MAILBOX_CONTROL__SI = 0x0F9C; +constexpr unsigned int mmSEM_MAILBOX__CI__VI = 0x0F9C; +constexpr unsigned int mmSEM_MAILBOX__SI = 0x0F9B; +constexpr unsigned int mmSEM_MCIF_CONFIG = 0x0F90; +constexpr unsigned int mmSEM_STATUS__CI__VI = 0x0F99; +constexpr unsigned int mmSEQ8_DATA__SI__VI = 0x00F1; +constexpr unsigned int mmSEQ8_IDX__SI__VI = 0x00F1; +constexpr unsigned int mmSH_HIDDEN_PRIVATE_BASE_VMID__CI__VI = 0x2580; +constexpr unsigned int mmSH_MEM_APE1_BASE__CI__VI = 0x230B; +constexpr unsigned int mmSH_MEM_APE1_LIMIT__CI__VI = 0x230C; +constexpr unsigned int mmSH_MEM_BASES__CI__VI = 0x230A; +constexpr unsigned int mmSH_MEM_CONFIG__CI__VI = 0x230D; +constexpr unsigned int mmSH_STATIC_MEM_CONFIG__CI__VI = 0x2581; +constexpr unsigned int mmSLAVE_COMM_CMD_REG__SI__VI = 0x1624; +constexpr unsigned int mmSLAVE_COMM_CNTL_REG__SI__VI = 0x1625; +constexpr unsigned int mmSLAVE_COMM_DATA_REG1__SI__VI = 0x1621; +constexpr unsigned int mmSLAVE_COMM_DATA_REG2__SI__VI = 0x1622; +constexpr unsigned int mmSLAVE_COMM_DATA_REG3__SI__VI = 0x1623; +constexpr unsigned int mmSLAVE_HANG_ERROR = 0x153B; +constexpr unsigned int mmSLAVE_HANG_PROTECTION_CNTL = 0x1536; +constexpr unsigned int mmSLAVE_REQ_CREDIT_CNTL = 0x1517; +constexpr unsigned int mmSMBCLK_PAD_CNTL__CI = 0x1523; +constexpr unsigned int mmSMBDAT_PAD_CNTL__CI = 0x1522; +constexpr unsigned int mmSMBUS_SLV_CNTL__CI = 0x14FD; +constexpr unsigned int mmSMC_IND_ACCESS_CNTL__CI__VI = 0x0090; +constexpr unsigned int mmSMC_IND_ACCESS_CNTL__SI = 0x008A; +constexpr unsigned int mmSMC_IND_DATA = 0x0081; +constexpr unsigned int mmSMC_IND_DATA_0__CI__VI = 0x0081; +constexpr unsigned int mmSMC_IND_DATA_1__CI__VI = 0x0083; +constexpr unsigned int mmSMC_IND_DATA_2__CI__VI = 0x0085; +constexpr unsigned int mmSMC_IND_DATA_3__CI__VI = 0x0087; +constexpr unsigned int mmSMC_IND_DATA_4__CI__VI = 0x0089; +constexpr unsigned int mmSMC_IND_DATA_5__CI__VI = 0x008B; +constexpr unsigned int mmSMC_IND_DATA_6__CI__VI = 0x008D; +constexpr unsigned int mmSMC_IND_DATA_7__CI__VI = 0x008F; +constexpr unsigned int mmSMC_IND_INDEX = 0x0080; +constexpr unsigned int mmSMC_IND_INDEX_0__CI__VI = 0x0080; +constexpr unsigned int mmSMC_IND_INDEX_1__CI__VI = 0x0082; +constexpr unsigned int mmSMC_IND_INDEX_2__CI__VI = 0x0084; +constexpr unsigned int mmSMC_IND_INDEX_3__CI__VI = 0x0086; +constexpr unsigned int mmSMC_IND_INDEX_4__CI__VI = 0x0088; +constexpr unsigned int mmSMC_IND_INDEX_5__CI__VI = 0x008A; +constexpr unsigned int mmSMC_IND_INDEX_6__CI__VI = 0x008C; +constexpr unsigned int mmSMC_IND_INDEX_7__CI__VI = 0x008E; +constexpr unsigned int mmSMC_MESSAGE_0__CI__VI = 0x0094; +constexpr unsigned int mmSMC_MESSAGE_0__SI = 0x008B; +constexpr unsigned int mmSMC_MESSAGE_10__CI__VI = 0x00B9; +constexpr unsigned int mmSMC_MESSAGE_11__CI__VI = 0x00BB; +constexpr unsigned int mmSMC_MESSAGE_1__CI__VI = 0x0096; +constexpr unsigned int mmSMC_MESSAGE_1__SI = 0x008D; +constexpr unsigned int mmSMC_MESSAGE_2__CI__VI = 0x0098; +constexpr unsigned int mmSMC_MESSAGE_3__CI__VI = 0x009A; +constexpr unsigned int mmSMC_MESSAGE_4__CI__VI = 0x009C; +constexpr unsigned int mmSMC_MESSAGE_5__CI__VI = 0x009E; +constexpr unsigned int mmSMC_MESSAGE_6__CI__VI = 0x00A0; +constexpr unsigned int mmSMC_MESSAGE_7__CI__VI = 0x00A2; +constexpr unsigned int mmSMC_MESSAGE_8__CI__VI = 0x00B5; +constexpr unsigned int mmSMC_MESSAGE_9__CI__VI = 0x00B7; +constexpr unsigned int mmSMC_MSG_ARG_0__CI__VI = 0x00A4; +constexpr unsigned int mmSMC_MSG_ARG_10__CI__VI = 0x00BF; +constexpr unsigned int mmSMC_MSG_ARG_11__CI = 0x0091; +constexpr unsigned int mmSMC_MSG_ARG_1__CI__VI = 0x00A5; +constexpr unsigned int mmSMC_MSG_ARG_2__CI__VI = 0x00A6; +constexpr unsigned int mmSMC_MSG_ARG_3__CI__VI = 0x00A7; +constexpr unsigned int mmSMC_MSG_ARG_4__CI__VI = 0x00A8; +constexpr unsigned int mmSMC_MSG_ARG_5__CI__VI = 0x00A9; +constexpr unsigned int mmSMC_MSG_ARG_6__CI__VI = 0x00AA; +constexpr unsigned int mmSMC_MSG_ARG_7__CI__VI = 0x00AB; +constexpr unsigned int mmSMC_MSG_ARG_8__CI__VI = 0x00BD; +constexpr unsigned int mmSMC_MSG_ARG_9__CI__VI = 0x00BE; +constexpr unsigned int mmSMC_RESP_0__CI__VI = 0x0095; +constexpr unsigned int mmSMC_RESP_0__SI = 0x008C; +constexpr unsigned int mmSMC_RESP_10__CI__VI = 0x00BA; +constexpr unsigned int mmSMC_RESP_11__CI__VI = 0x00BC; +constexpr unsigned int mmSMC_RESP_1__CI__VI = 0x0097; +constexpr unsigned int mmSMC_RESP_1__SI = 0x008E; +constexpr unsigned int mmSMC_RESP_2__CI__VI = 0x0099; +constexpr unsigned int mmSMC_RESP_3__CI__VI = 0x009B; +constexpr unsigned int mmSMC_RESP_4__CI__VI = 0x009D; +constexpr unsigned int mmSMC_RESP_5__CI__VI = 0x009F; +constexpr unsigned int mmSMC_RESP_6__CI__VI = 0x00A1; +constexpr unsigned int mmSMC_RESP_7__CI__VI = 0x00A3; +constexpr unsigned int mmSMC_RESP_8__CI__VI = 0x00B6; +constexpr unsigned int mmSMC_RESP_9__CI__VI = 0x00B8; +constexpr unsigned int mmSMC_SCRATCH9__SI = 0x022A; +constexpr unsigned int mmSMU_SMC_IND_DATA__CI__VI = 0x0081; +constexpr unsigned int mmSMU_SMC_IND_INDEX__CI__VI = 0x0080; +constexpr unsigned int mmSPI_ARB_CYCLES_0__CI__VI = 0x31C1; +constexpr unsigned int mmSPI_ARB_CYCLES_0__SI = 0x243D; +constexpr unsigned int mmSPI_ARB_CYCLES_1__CI__VI = 0x31C2; +constexpr unsigned int mmSPI_ARB_CYCLES_1__SI = 0x243E; +constexpr unsigned int mmSPI_ARB_PRIORITY__CI__VI = 0x31C0; +constexpr unsigned int mmSPI_ARB_PRIORITY__SI = 0x243C; +constexpr unsigned int mmSPI_BARYC_CNTL = 0xA1B8; +constexpr unsigned int mmSPI_CDBG_SYS_CS0__CI__VI = 0x31C5; +constexpr unsigned int mmSPI_CDBG_SYS_CS1__CI__VI = 0x31C6; +constexpr unsigned int mmSPI_CDBG_SYS_GFX__CI__VI = 0x31C3; +constexpr unsigned int mmSPI_CDBG_SYS_HP3D__CI__VI = 0x31C4; +constexpr unsigned int mmSPI_COMPUTE_QUEUE_RESET__CI__VI = 0x31DB; +constexpr unsigned int mmSPI_CONFIG_CNTL = 0x2440; +constexpr unsigned int mmSPI_CONFIG_CNTL_1 = 0x244F; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_0__CI__VI = 0x24DC; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_1__CI__VI = 0x24DD; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_2__CI__VI = 0x24DE; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_3__CI__VI = 0x24DF; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_4__CI__VI = 0x24E0; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_5__CI__VI = 0x24E1; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_6__CI__VI = 0x24E2; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_COUNT_7__CI__VI = 0x24E3; +constexpr unsigned int mmSPI_CSQ_WF_ACTIVE_STATUS__CI__VI = 0x24DB; +constexpr unsigned int mmSPI_DEBUG_BUSY = 0x2450; +constexpr unsigned int mmSPI_DEBUG_CNTL = 0x2441; +constexpr unsigned int mmSPI_DEBUG_READ = 0x2442; +constexpr unsigned int mmSPI_GDBG_TBA_HI__CI__VI = 0x31D5; +constexpr unsigned int mmSPI_GDBG_TBA_LO__CI__VI = 0x31D4; +constexpr unsigned int mmSPI_GDBG_TMA_HI__CI__VI = 0x31D7; +constexpr unsigned int mmSPI_GDBG_TMA_LO__CI__VI = 0x31D6; +constexpr unsigned int mmSPI_GDBG_TRAP_CONFIG__CI__VI = 0x31D2; +constexpr unsigned int mmSPI_GDBG_TRAP_DATA0__CI__VI = 0x31D8; +constexpr unsigned int mmSPI_GDBG_TRAP_DATA1__CI__VI = 0x31D9; +constexpr unsigned int mmSPI_GDBG_TRAP_MASK__CI__VI = 0x31D3; +constexpr unsigned int mmSPI_GDBG_WAVE_CNTL__CI__VI = 0x31D1; +constexpr unsigned int mmSPI_GDS_CREDITS = 0x24D8; +constexpr unsigned int mmSPI_INTERP_CONTROL_0 = 0xA1B5; +constexpr unsigned int mmSPI_LB_CTR_CTRL = 0x24D4; +constexpr unsigned int mmSPI_LB_CU_MASK = 0x24D5; +constexpr unsigned int mmSPI_LB_DATA_REG = 0x24D6; +constexpr unsigned int mmSPI_P0_TRAP_SCREEN_GPR_MIN__CI__VI = 0x24F0; +constexpr unsigned int mmSPI_P0_TRAP_SCREEN_PSBA_HI__CI__VI = 0x24ED; +constexpr unsigned int mmSPI_P0_TRAP_SCREEN_PSBA_LO__CI__VI = 0x24EC; +constexpr unsigned int mmSPI_P0_TRAP_SCREEN_PSMA_HI__CI__VI = 0x24EF; +constexpr unsigned int mmSPI_P0_TRAP_SCREEN_PSMA_LO__CI__VI = 0x24EE; +constexpr unsigned int mmSPI_P1_TRAP_SCREEN_GPR_MIN__CI__VI = 0x24F5; +constexpr unsigned int mmSPI_P1_TRAP_SCREEN_PSBA_HI__CI__VI = 0x24F2; +constexpr unsigned int mmSPI_P1_TRAP_SCREEN_PSBA_LO__CI__VI = 0x24F1; +constexpr unsigned int mmSPI_P1_TRAP_SCREEN_PSMA_HI__CI__VI = 0x24F4; +constexpr unsigned int mmSPI_P1_TRAP_SCREEN_PSMA_LO__CI__VI = 0x24F3; +constexpr unsigned int mmSPI_PERFCOUNTER0_HI__CI__VI = 0xD180; +constexpr unsigned int mmSPI_PERFCOUNTER0_HI__SI = 0x2447; +constexpr unsigned int mmSPI_PERFCOUNTER0_LO__CI__VI = 0xD181; +constexpr unsigned int mmSPI_PERFCOUNTER0_LO__SI = 0x2448; +constexpr unsigned int mmSPI_PERFCOUNTER0_SELECT1__CI__VI = 0xD984; +constexpr unsigned int mmSPI_PERFCOUNTER0_SELECT__CI__VI = 0xD980; +constexpr unsigned int mmSPI_PERFCOUNTER0_SELECT__SI = 0x2443; +constexpr unsigned int mmSPI_PERFCOUNTER1_HI__CI__VI = 0xD182; +constexpr unsigned int mmSPI_PERFCOUNTER1_HI__SI = 0x2449; +constexpr unsigned int mmSPI_PERFCOUNTER1_LO__CI__VI = 0xD183; +constexpr unsigned int mmSPI_PERFCOUNTER1_LO__SI = 0x244A; +constexpr unsigned int mmSPI_PERFCOUNTER1_SELECT1__CI__VI = 0xD985; +constexpr unsigned int mmSPI_PERFCOUNTER1_SELECT__CI__VI = 0xD981; +constexpr unsigned int mmSPI_PERFCOUNTER1_SELECT__SI = 0x2444; +constexpr unsigned int mmSPI_PERFCOUNTER2_HI__CI__VI = 0xD184; +constexpr unsigned int mmSPI_PERFCOUNTER2_HI__SI = 0x244B; +constexpr unsigned int mmSPI_PERFCOUNTER2_LO__CI__VI = 0xD185; +constexpr unsigned int mmSPI_PERFCOUNTER2_LO__SI = 0x244C; +constexpr unsigned int mmSPI_PERFCOUNTER2_SELECT1__CI__VI = 0xD986; +constexpr unsigned int mmSPI_PERFCOUNTER2_SELECT__CI__VI = 0xD982; +constexpr unsigned int mmSPI_PERFCOUNTER2_SELECT__SI = 0x2445; +constexpr unsigned int mmSPI_PERFCOUNTER3_HI__CI__VI = 0xD186; +constexpr unsigned int mmSPI_PERFCOUNTER3_HI__SI = 0x244D; +constexpr unsigned int mmSPI_PERFCOUNTER3_LO__CI__VI = 0xD187; +constexpr unsigned int mmSPI_PERFCOUNTER3_LO__SI = 0x244E; +constexpr unsigned int mmSPI_PERFCOUNTER3_SELECT1__CI__VI = 0xD987; +constexpr unsigned int mmSPI_PERFCOUNTER3_SELECT__CI__VI = 0xD983; +constexpr unsigned int mmSPI_PERFCOUNTER3_SELECT__SI = 0x2446; +constexpr unsigned int mmSPI_PERFCOUNTER4_HI__CI__VI = 0xD188; +constexpr unsigned int mmSPI_PERFCOUNTER4_LO__CI__VI = 0xD189; +constexpr unsigned int mmSPI_PERFCOUNTER4_SELECT__CI__VI = 0xD988; +constexpr unsigned int mmSPI_PERFCOUNTER5_HI__CI__VI = 0xD18A; +constexpr unsigned int mmSPI_PERFCOUNTER5_LO__CI__VI = 0xD18B; +constexpr unsigned int mmSPI_PERFCOUNTER5_SELECT__CI__VI = 0xD989; +constexpr unsigned int mmSPI_PERFCOUNTER_BINS__CI__VI = 0xD98A; +constexpr unsigned int mmSPI_PERFCOUNTER_BINS__SI = 0x243F; +constexpr unsigned int mmSPI_PG_ENABLE_STATIC_CU_MASK = 0x24D7; +constexpr unsigned int mmSPI_PS_INPUT_ADDR = 0xA1B4; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_0 = 0xA191; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_1 = 0xA192; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_10 = 0xA19B; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_11 = 0xA19C; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_12 = 0xA19D; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_13 = 0xA19E; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_14 = 0xA19F; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_15 = 0xA1A0; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_16 = 0xA1A1; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_17 = 0xA1A2; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_18 = 0xA1A3; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_19 = 0xA1A4; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_2 = 0xA193; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_20 = 0xA1A5; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_21 = 0xA1A6; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_22 = 0xA1A7; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_23 = 0xA1A8; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_24 = 0xA1A9; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_25 = 0xA1AA; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_26 = 0xA1AB; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_27 = 0xA1AC; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_28 = 0xA1AD; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_29 = 0xA1AE; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_3 = 0xA194; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_30 = 0xA1AF; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_31 = 0xA1B0; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_4 = 0xA195; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_5 = 0xA196; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_6 = 0xA197; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_7 = 0xA198; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_8 = 0xA199; +constexpr unsigned int mmSPI_PS_INPUT_CNTL_9 = 0xA19A; +constexpr unsigned int mmSPI_PS_INPUT_ENA = 0xA1B3; +constexpr unsigned int mmSPI_PS_IN_CONTROL = 0xA1B6; +constexpr unsigned int mmSPI_PS_MAX_WAVE_ID__CI__VI = 0x243A; +constexpr unsigned int mmSPI_PS_MAX_WAVE_ID__SI = 0x243B; +constexpr unsigned int mmSPI_RESET_DEBUG__CI__VI = 0x31DA; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_0__CI__VI = 0x31DC; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_10__CI__VI = 0x31F0; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_11__CI__VI = 0x31F1; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_1__CI__VI = 0x31DD; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_2__CI__VI = 0x31DE; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_3__CI__VI = 0x31DF; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_4__CI__VI = 0x31E0; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_5__CI__VI = 0x31E1; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_6__CI__VI = 0x31E2; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_7__CI__VI = 0x31E3; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_8__CI__VI = 0x31E4; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_9__CI__VI = 0x31E5; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_0__CI__VI = 0x31E6; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_10__CI__VI = 0x31F2; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_11__CI__VI = 0x31F3; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_1__CI__VI = 0x31E7; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_2__CI__VI = 0x31E8; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_3__CI__VI = 0x31E9; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_4__CI__VI = 0x31EA; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_5__CI__VI = 0x31EB; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_6__CI__VI = 0x31EC; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_7__CI__VI = 0x31ED; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_8__CI__VI = 0x31EE; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_9__CI__VI = 0x31EF; +constexpr unsigned int mmSPI_SHADER_COL_FORMAT = 0xA1C5; +constexpr unsigned int mmSPI_SHADER_LATE_ALLOC_VS__CI__VI = 0x2C47; +constexpr unsigned int mmSPI_SHADER_PGM_HI_ES = 0x2CC9; +constexpr unsigned int mmSPI_SHADER_PGM_HI_GS = 0x2C89; +constexpr unsigned int mmSPI_SHADER_PGM_HI_HS = 0x2D09; +constexpr unsigned int mmSPI_SHADER_PGM_HI_LS = 0x2D49; +constexpr unsigned int mmSPI_SHADER_PGM_HI_PS = 0x2C09; +constexpr unsigned int mmSPI_SHADER_PGM_HI_VS = 0x2C49; +constexpr unsigned int mmSPI_SHADER_PGM_LO_ES = 0x2CC8; +constexpr unsigned int mmSPI_SHADER_PGM_LO_GS = 0x2C88; +constexpr unsigned int mmSPI_SHADER_PGM_LO_HS = 0x2D08; +constexpr unsigned int mmSPI_SHADER_PGM_LO_LS = 0x2D48; +constexpr unsigned int mmSPI_SHADER_PGM_LO_PS = 0x2C08; +constexpr unsigned int mmSPI_SHADER_PGM_LO_VS = 0x2C48; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_ES = 0x2CCA; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_GS = 0x2C8A; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_HS = 0x2D0A; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_LS = 0x2D4A; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_PS = 0x2C0A; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC1_VS = 0x2C4A; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_ES = 0x2CCB; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_ES_GS__CI__VI = 0x2CBC; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_ES_VS__CI__VI = 0x2C7C; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_GS = 0x2C8B; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_HS = 0x2D0B; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_LS = 0x2D4B; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_LS_ES__CI__VI = 0x2CFD; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_LS_HS__CI__VI = 0x2D3D; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_LS_VS__CI__VI = 0x2C7D; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_PS = 0x2C0B; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC2_VS = 0x2C4B; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_ES__CI__VI = 0x2CC7; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_GS__CI__VI = 0x2C87; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_HS__CI__VI = 0x2D07; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_LS__CI__VI = 0x2D47; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_PS__CI__VI = 0x2C07; +constexpr unsigned int mmSPI_SHADER_PGM_RSRC3_VS__CI__VI = 0x2C46; +constexpr unsigned int mmSPI_SHADER_POS_FORMAT = 0xA1C3; +constexpr unsigned int mmSPI_SHADER_TBA_HI_ES = 0x2CC1; +constexpr unsigned int mmSPI_SHADER_TBA_HI_GS = 0x2C81; +constexpr unsigned int mmSPI_SHADER_TBA_HI_HS = 0x2D01; +constexpr unsigned int mmSPI_SHADER_TBA_HI_LS = 0x2D41; +constexpr unsigned int mmSPI_SHADER_TBA_HI_PS = 0x2C01; +constexpr unsigned int mmSPI_SHADER_TBA_HI_VS = 0x2C41; +constexpr unsigned int mmSPI_SHADER_TBA_LO_ES = 0x2CC0; +constexpr unsigned int mmSPI_SHADER_TBA_LO_GS = 0x2C80; +constexpr unsigned int mmSPI_SHADER_TBA_LO_HS = 0x2D00; +constexpr unsigned int mmSPI_SHADER_TBA_LO_LS = 0x2D40; +constexpr unsigned int mmSPI_SHADER_TBA_LO_PS = 0x2C00; +constexpr unsigned int mmSPI_SHADER_TBA_LO_VS = 0x2C40; +constexpr unsigned int mmSPI_SHADER_TMA_HI_ES = 0x2CC3; +constexpr unsigned int mmSPI_SHADER_TMA_HI_GS = 0x2C83; +constexpr unsigned int mmSPI_SHADER_TMA_HI_HS = 0x2D03; +constexpr unsigned int mmSPI_SHADER_TMA_HI_LS = 0x2D43; +constexpr unsigned int mmSPI_SHADER_TMA_HI_PS = 0x2C03; +constexpr unsigned int mmSPI_SHADER_TMA_HI_VS = 0x2C43; +constexpr unsigned int mmSPI_SHADER_TMA_LO_ES = 0x2CC2; +constexpr unsigned int mmSPI_SHADER_TMA_LO_GS = 0x2C82; +constexpr unsigned int mmSPI_SHADER_TMA_LO_HS = 0x2D02; +constexpr unsigned int mmSPI_SHADER_TMA_LO_LS = 0x2D42; +constexpr unsigned int mmSPI_SHADER_TMA_LO_PS = 0x2C02; +constexpr unsigned int mmSPI_SHADER_TMA_LO_VS = 0x2C42; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_0 = 0x2CCC; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_1 = 0x2CCD; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_10 = 0x2CD6; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_11 = 0x2CD7; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_12 = 0x2CD8; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_13 = 0x2CD9; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_14 = 0x2CDA; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_15 = 0x2CDB; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_2 = 0x2CCE; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_3 = 0x2CCF; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_4 = 0x2CD0; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_5 = 0x2CD1; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_6 = 0x2CD2; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_7 = 0x2CD3; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_8 = 0x2CD4; +constexpr unsigned int mmSPI_SHADER_USER_DATA_ES_9 = 0x2CD5; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_0 = 0x2C8C; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_1 = 0x2C8D; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_10 = 0x2C96; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_11 = 0x2C97; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_12 = 0x2C98; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_13 = 0x2C99; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_14 = 0x2C9A; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_15 = 0x2C9B; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_2 = 0x2C8E; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_3 = 0x2C8F; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_4 = 0x2C90; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_5 = 0x2C91; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_6 = 0x2C92; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_7 = 0x2C93; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_8 = 0x2C94; +constexpr unsigned int mmSPI_SHADER_USER_DATA_GS_9 = 0x2C95; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_0 = 0x2D0C; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_1 = 0x2D0D; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_10 = 0x2D16; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_11 = 0x2D17; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_12 = 0x2D18; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_13 = 0x2D19; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_14 = 0x2D1A; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_15 = 0x2D1B; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_2 = 0x2D0E; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_3 = 0x2D0F; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_4 = 0x2D10; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_5 = 0x2D11; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_6 = 0x2D12; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_7 = 0x2D13; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_8 = 0x2D14; +constexpr unsigned int mmSPI_SHADER_USER_DATA_HS_9 = 0x2D15; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_0 = 0x2D4C; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_1 = 0x2D4D; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_10 = 0x2D56; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_11 = 0x2D57; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_12 = 0x2D58; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_13 = 0x2D59; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_14 = 0x2D5A; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_15 = 0x2D5B; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_2 = 0x2D4E; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_3 = 0x2D4F; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_4 = 0x2D50; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_5 = 0x2D51; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_6 = 0x2D52; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_7 = 0x2D53; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_8 = 0x2D54; +constexpr unsigned int mmSPI_SHADER_USER_DATA_LS_9 = 0x2D55; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_0 = 0x2C0C; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_1 = 0x2C0D; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_10 = 0x2C16; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_11 = 0x2C17; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_12 = 0x2C18; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_13 = 0x2C19; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_14 = 0x2C1A; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_15 = 0x2C1B; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_2 = 0x2C0E; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_3 = 0x2C0F; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_4 = 0x2C10; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_5 = 0x2C11; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_6 = 0x2C12; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_7 = 0x2C13; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_8 = 0x2C14; +constexpr unsigned int mmSPI_SHADER_USER_DATA_PS_9 = 0x2C15; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_0 = 0x2C4C; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_1 = 0x2C4D; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_10 = 0x2C56; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_11 = 0x2C57; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_12 = 0x2C58; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_13 = 0x2C59; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_14 = 0x2C5A; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_15 = 0x2C5B; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_2 = 0x2C4E; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_3 = 0x2C4F; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_4 = 0x2C50; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_5 = 0x2C51; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_6 = 0x2C52; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_7 = 0x2C53; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_8 = 0x2C54; +constexpr unsigned int mmSPI_SHADER_USER_DATA_VS_9 = 0x2C55; +constexpr unsigned int mmSPI_SHADER_Z_FORMAT = 0xA1C4; +constexpr unsigned int mmSPI_SLAVE_DEBUG_BUSY = 0x24D3; +constexpr unsigned int mmSPI_STATIC_THREAD_MGMT_3__SI = 0x243A; +constexpr unsigned int mmSPI_SX_EXPORT_BUFFER_SIZES = 0x24D9; +constexpr unsigned int mmSPI_SX_SCOREBOARD_BUFFER_SIZES = 0x24DA; +constexpr unsigned int mmSPI_TMPRING_SIZE = 0xA1BA; +constexpr unsigned int mmSPI_VS_OUT_CONFIG = 0xA1B1; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS0__CI__VI = 0x31C9; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS1__CI__VI = 0x31CA; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS2__CI__VI = 0x31CB; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS3__CI__VI = 0x31CC; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS4__CI__VI = 0x31CD; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS5__CI__VI = 0x31CE; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS6__CI__VI = 0x31CF; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_CS7__CI__VI = 0x31D0; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_GFX__CI__VI = 0x31C7; +constexpr unsigned int mmSPI_WCL_PIPE_PERCENT_HP3D__CI__VI = 0x31C8; +constexpr unsigned int mmSPI_WF_LIFETIME_CNTL__CI__VI = 0x24AA; +constexpr unsigned int mmSPI_WF_LIFETIME_DEBUG__CI__VI = 0x24CA; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_0__CI__VI = 0x24AB; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_1__CI__VI = 0x24AC; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_2__CI__VI = 0x24AD; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_3__CI__VI = 0x24AE; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_4__CI__VI = 0x24AF; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_5__CI__VI = 0x24B0; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_6__CI__VI = 0x24B1; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_7__CI__VI = 0x24B2; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_8__CI__VI = 0x24B3; +constexpr unsigned int mmSPI_WF_LIFETIME_LIMIT_9__CI__VI = 0x24B4; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_0__CI__VI = 0x24B5; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_10__CI__VI = 0x24BF; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_11__CI__VI = 0x24C0; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_12__CI__VI = 0x24C1; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_13__CI__VI = 0x24C2; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_14__CI__VI = 0x24C3; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_15__CI__VI = 0x24C4; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_16__CI__VI = 0x24C5; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_17__CI__VI = 0x24C6; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_18__CI__VI = 0x24C7; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_19__CI__VI = 0x24C8; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_1__CI__VI = 0x24B6; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_20__CI__VI = 0x24C9; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_2__CI__VI = 0x24B7; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_3__CI__VI = 0x24B8; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_4__CI__VI = 0x24B9; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_5__CI__VI = 0x24BA; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_6__CI__VI = 0x24BB; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_7__CI__VI = 0x24BC; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_8__CI__VI = 0x24BD; +constexpr unsigned int mmSPI_WF_LIFETIME_STATUS_9__CI__VI = 0x24BE; +constexpr unsigned int mmSPLL_CNTL_MODE__SI = 0x0186; +constexpr unsigned int mmSQC_CACHES__CI__VI = 0xC348; +constexpr unsigned int mmSQC_CACHES__SI = 0x2302; +constexpr unsigned int mmSQC_CONFIG = 0x2301; +constexpr unsigned int mmSQC_POLICY__CI = 0x230E; +constexpr unsigned int mmSQC_SECDED_CNT__SI__CI = 0x23A0; +constexpr unsigned int mmSQC_VOLATILE__CI = 0x230F; +constexpr unsigned int mmSQ_ALU_CLK_CTRL__CI__VI = 0xF08E; +constexpr unsigned int mmSQ_ALU_CLK_CTRL__SI = 0x2360; +constexpr unsigned int mmSQ_BUF_RSRC_WORD0 = 0x23C0; +constexpr unsigned int mmSQ_BUF_RSRC_WORD1 = 0x23C1; +constexpr unsigned int mmSQ_BUF_RSRC_WORD2 = 0x23C2; +constexpr unsigned int mmSQ_BUF_RSRC_WORD3 = 0x23C3; +constexpr unsigned int mmSQ_CMD_TIMESTAMP__CI__VI = 0x2375; +constexpr unsigned int mmSQ_CMD__CI__VI = 0x237B; +constexpr unsigned int mmSQ_CONFIG = 0x2300; +constexpr unsigned int mmSQ_DEBUG_STS_GLOBAL = 0x2309; +constexpr unsigned int mmSQ_DEBUG_STS_GLOBAL2__CI__VI = 0x2310; +constexpr unsigned int mmSQ_DEBUG_STS_GLOBAL3__CI__VI = 0x2311; +constexpr unsigned int mmSQ_DED_CNT__SI__CI = 0x23A2; +constexpr unsigned int mmSQ_DED_INFO__SI__CI = 0x23A3; +constexpr unsigned int mmSQ_DS_0 = 0x237F; +constexpr unsigned int mmSQ_DS_1 = 0x237F; +constexpr unsigned int mmSQ_EXP_0 = 0x237F; +constexpr unsigned int mmSQ_EXP_1 = 0x237F; +constexpr unsigned int mmSQ_FIFO_SIZES = 0x2305; +constexpr unsigned int mmSQ_FLAT_0__CI__VI = 0x237F; +constexpr unsigned int mmSQ_FLAT_1__CI__VI = 0x237F; +constexpr unsigned int mmSQ_FLAT_SCRATCH_WORD0__CI__VI = 0x23D0; +constexpr unsigned int mmSQ_FLAT_SCRATCH_WORD1__CI__VI = 0x23D1; +constexpr unsigned int mmSQ_HV_VMID_CTRL__CI__VI = 0xF840; +constexpr unsigned int mmSQ_IMG_RSRC_WORD0 = 0x23C4; +constexpr unsigned int mmSQ_IMG_RSRC_WORD1 = 0x23C5; +constexpr unsigned int mmSQ_IMG_RSRC_WORD2 = 0x23C6; +constexpr unsigned int mmSQ_IMG_RSRC_WORD3 = 0x23C7; +constexpr unsigned int mmSQ_IMG_RSRC_WORD4 = 0x23C8; +constexpr unsigned int mmSQ_IMG_RSRC_WORD5 = 0x23C9; +constexpr unsigned int mmSQ_IMG_RSRC_WORD6 = 0x23CA; +constexpr unsigned int mmSQ_IMG_RSRC_WORD7 = 0x23CB; +constexpr unsigned int mmSQ_IMG_SAMP_WORD0 = 0x23CC; +constexpr unsigned int mmSQ_IMG_SAMP_WORD1 = 0x23CD; +constexpr unsigned int mmSQ_IMG_SAMP_WORD2 = 0x23CE; +constexpr unsigned int mmSQ_IMG_SAMP_WORD3 = 0x23CF; +constexpr unsigned int mmSQ_IND_DATA = 0x2379; +constexpr unsigned int mmSQ_IND_INDEX = 0x2378; +constexpr unsigned int mmSQ_INST = 0x237F; +constexpr unsigned int mmSQ_INTERRUPT_AUTO_MASK__CI__VI = 0x2314; +constexpr unsigned int mmSQ_INTERRUPT_MSG_CTRL__CI__VI = 0x2315; +constexpr unsigned int mmSQ_LB_CTR_CTRL = 0x2398; +constexpr unsigned int mmSQ_LB_DATA_ALU_CYCLES = 0x2399; +constexpr unsigned int mmSQ_LB_DATA_ALU_STALLS = 0x239B; +constexpr unsigned int mmSQ_LB_DATA_TEX_CYCLES = 0x239A; +constexpr unsigned int mmSQ_LB_DATA_TEX_STALLS = 0x239C; +constexpr unsigned int mmSQ_LDS_CLK_CTRL__CI__VI = 0xF090; +constexpr unsigned int mmSQ_MIMG_0 = 0x237F; +constexpr unsigned int mmSQ_MIMG_1 = 0x237F; +constexpr unsigned int mmSQ_MTBUF_0 = 0x237F; +constexpr unsigned int mmSQ_MTBUF_1 = 0x237F; +constexpr unsigned int mmSQ_MUBUF_0 = 0x237F; +constexpr unsigned int mmSQ_MUBUF_1 = 0x237F; +constexpr unsigned int mmSQ_PERFCOUNTER0_HI__CI__VI = 0xD1C1; +constexpr unsigned int mmSQ_PERFCOUNTER0_HI__SI = 0x2321; +constexpr unsigned int mmSQ_PERFCOUNTER0_LO__CI__VI = 0xD1C0; +constexpr unsigned int mmSQ_PERFCOUNTER0_LO__SI = 0x2320; +constexpr unsigned int mmSQ_PERFCOUNTER0_SELECT__CI__VI = 0xD9C0; +constexpr unsigned int mmSQ_PERFCOUNTER0_SELECT__SI = 0x2340; +constexpr unsigned int mmSQ_PERFCOUNTER10_HI__CI__VI = 0xD1D5; +constexpr unsigned int mmSQ_PERFCOUNTER10_HI__SI = 0x2335; +constexpr unsigned int mmSQ_PERFCOUNTER10_LO__CI__VI = 0xD1D4; +constexpr unsigned int mmSQ_PERFCOUNTER10_LO__SI = 0x2334; +constexpr unsigned int mmSQ_PERFCOUNTER10_SELECT__CI__VI = 0xD9CA; +constexpr unsigned int mmSQ_PERFCOUNTER10_SELECT__SI = 0x234A; +constexpr unsigned int mmSQ_PERFCOUNTER11_HI__CI__VI = 0xD1D7; +constexpr unsigned int mmSQ_PERFCOUNTER11_HI__SI = 0x2337; +constexpr unsigned int mmSQ_PERFCOUNTER11_LO__CI__VI = 0xD1D6; +constexpr unsigned int mmSQ_PERFCOUNTER11_LO__SI = 0x2336; +constexpr unsigned int mmSQ_PERFCOUNTER11_SELECT__CI__VI = 0xD9CB; +constexpr unsigned int mmSQ_PERFCOUNTER11_SELECT__SI = 0x234B; +constexpr unsigned int mmSQ_PERFCOUNTER12_HI__CI__VI = 0xD1D9; +constexpr unsigned int mmSQ_PERFCOUNTER12_HI__SI = 0x2339; +constexpr unsigned int mmSQ_PERFCOUNTER12_LO__CI__VI = 0xD1D8; +constexpr unsigned int mmSQ_PERFCOUNTER12_LO__SI = 0x2338; +constexpr unsigned int mmSQ_PERFCOUNTER12_SELECT__CI__VI = 0xD9CC; +constexpr unsigned int mmSQ_PERFCOUNTER12_SELECT__SI = 0x234C; +constexpr unsigned int mmSQ_PERFCOUNTER13_HI__CI__VI = 0xD1DB; +constexpr unsigned int mmSQ_PERFCOUNTER13_HI__SI = 0x233B; +constexpr unsigned int mmSQ_PERFCOUNTER13_LO__CI__VI = 0xD1DA; +constexpr unsigned int mmSQ_PERFCOUNTER13_LO__SI = 0x233A; +constexpr unsigned int mmSQ_PERFCOUNTER13_SELECT__CI__VI = 0xD9CD; +constexpr unsigned int mmSQ_PERFCOUNTER13_SELECT__SI = 0x234D; +constexpr unsigned int mmSQ_PERFCOUNTER14_HI__CI__VI = 0xD1DD; +constexpr unsigned int mmSQ_PERFCOUNTER14_HI__SI = 0x233D; +constexpr unsigned int mmSQ_PERFCOUNTER14_LO__CI__VI = 0xD1DC; +constexpr unsigned int mmSQ_PERFCOUNTER14_LO__SI = 0x233C; +constexpr unsigned int mmSQ_PERFCOUNTER14_SELECT__CI__VI = 0xD9CE; +constexpr unsigned int mmSQ_PERFCOUNTER14_SELECT__SI = 0x234E; +constexpr unsigned int mmSQ_PERFCOUNTER15_HI__CI__VI = 0xD1DF; +constexpr unsigned int mmSQ_PERFCOUNTER15_HI__SI = 0x233F; +constexpr unsigned int mmSQ_PERFCOUNTER15_LO__CI__VI = 0xD1DE; +constexpr unsigned int mmSQ_PERFCOUNTER15_LO__SI = 0x233E; +constexpr unsigned int mmSQ_PERFCOUNTER15_SELECT__CI__VI = 0xD9CF; +constexpr unsigned int mmSQ_PERFCOUNTER15_SELECT__SI = 0x234F; +constexpr unsigned int mmSQ_PERFCOUNTER1_HI__CI__VI = 0xD1C3; +constexpr unsigned int mmSQ_PERFCOUNTER1_HI__SI = 0x2323; +constexpr unsigned int mmSQ_PERFCOUNTER1_LO__CI__VI = 0xD1C2; +constexpr unsigned int mmSQ_PERFCOUNTER1_LO__SI = 0x2322; +constexpr unsigned int mmSQ_PERFCOUNTER1_SELECT__CI__VI = 0xD9C1; +constexpr unsigned int mmSQ_PERFCOUNTER1_SELECT__SI = 0x2341; +constexpr unsigned int mmSQ_PERFCOUNTER2_HI__CI__VI = 0xD1C5; +constexpr unsigned int mmSQ_PERFCOUNTER2_HI__SI = 0x2325; +constexpr unsigned int mmSQ_PERFCOUNTER2_LO__CI__VI = 0xD1C4; +constexpr unsigned int mmSQ_PERFCOUNTER2_LO__SI = 0x2324; +constexpr unsigned int mmSQ_PERFCOUNTER2_SELECT__CI__VI = 0xD9C2; +constexpr unsigned int mmSQ_PERFCOUNTER2_SELECT__SI = 0x2342; +constexpr unsigned int mmSQ_PERFCOUNTER3_HI__CI__VI = 0xD1C7; +constexpr unsigned int mmSQ_PERFCOUNTER3_HI__SI = 0x2327; +constexpr unsigned int mmSQ_PERFCOUNTER3_LO__CI__VI = 0xD1C6; +constexpr unsigned int mmSQ_PERFCOUNTER3_LO__SI = 0x2326; +constexpr unsigned int mmSQ_PERFCOUNTER3_SELECT__CI__VI = 0xD9C3; +constexpr unsigned int mmSQ_PERFCOUNTER3_SELECT__SI = 0x2343; +constexpr unsigned int mmSQ_PERFCOUNTER4_HI__CI__VI = 0xD1C9; +constexpr unsigned int mmSQ_PERFCOUNTER4_HI__SI = 0x2329; +constexpr unsigned int mmSQ_PERFCOUNTER4_LO__CI__VI = 0xD1C8; +constexpr unsigned int mmSQ_PERFCOUNTER4_LO__SI = 0x2328; +constexpr unsigned int mmSQ_PERFCOUNTER4_SELECT__CI__VI = 0xD9C4; +constexpr unsigned int mmSQ_PERFCOUNTER4_SELECT__SI = 0x2344; +constexpr unsigned int mmSQ_PERFCOUNTER5_HI__CI__VI = 0xD1CB; +constexpr unsigned int mmSQ_PERFCOUNTER5_HI__SI = 0x232B; +constexpr unsigned int mmSQ_PERFCOUNTER5_LO__CI__VI = 0xD1CA; +constexpr unsigned int mmSQ_PERFCOUNTER5_LO__SI = 0x232A; +constexpr unsigned int mmSQ_PERFCOUNTER5_SELECT__CI__VI = 0xD9C5; +constexpr unsigned int mmSQ_PERFCOUNTER5_SELECT__SI = 0x2345; +constexpr unsigned int mmSQ_PERFCOUNTER6_HI__CI__VI = 0xD1CD; +constexpr unsigned int mmSQ_PERFCOUNTER6_HI__SI = 0x232D; +constexpr unsigned int mmSQ_PERFCOUNTER6_LO__CI__VI = 0xD1CC; +constexpr unsigned int mmSQ_PERFCOUNTER6_LO__SI = 0x232C; +constexpr unsigned int mmSQ_PERFCOUNTER6_SELECT__CI__VI = 0xD9C6; +constexpr unsigned int mmSQ_PERFCOUNTER6_SELECT__SI = 0x2346; +constexpr unsigned int mmSQ_PERFCOUNTER7_HI__CI__VI = 0xD1CF; +constexpr unsigned int mmSQ_PERFCOUNTER7_HI__SI = 0x232F; +constexpr unsigned int mmSQ_PERFCOUNTER7_LO__CI__VI = 0xD1CE; +constexpr unsigned int mmSQ_PERFCOUNTER7_LO__SI = 0x232E; +constexpr unsigned int mmSQ_PERFCOUNTER7_SELECT__CI__VI = 0xD9C7; +constexpr unsigned int mmSQ_PERFCOUNTER7_SELECT__SI = 0x2347; +constexpr unsigned int mmSQ_PERFCOUNTER8_HI__CI__VI = 0xD1D1; +constexpr unsigned int mmSQ_PERFCOUNTER8_HI__SI = 0x2331; +constexpr unsigned int mmSQ_PERFCOUNTER8_LO__CI__VI = 0xD1D0; +constexpr unsigned int mmSQ_PERFCOUNTER8_LO__SI = 0x2330; +constexpr unsigned int mmSQ_PERFCOUNTER8_SELECT__CI__VI = 0xD9C8; +constexpr unsigned int mmSQ_PERFCOUNTER8_SELECT__SI = 0x2348; +constexpr unsigned int mmSQ_PERFCOUNTER9_HI__CI__VI = 0xD1D3; +constexpr unsigned int mmSQ_PERFCOUNTER9_HI__SI = 0x2333; +constexpr unsigned int mmSQ_PERFCOUNTER9_LO__CI__VI = 0xD1D2; +constexpr unsigned int mmSQ_PERFCOUNTER9_LO__SI = 0x2332; +constexpr unsigned int mmSQ_PERFCOUNTER9_SELECT__CI__VI = 0xD9C9; +constexpr unsigned int mmSQ_PERFCOUNTER9_SELECT__SI = 0x2349; +constexpr unsigned int mmSQ_PERFCOUNTER_CTRL2__CI__VI = 0xD9E2; +constexpr unsigned int mmSQ_PERFCOUNTER_CTRL__CI__VI = 0xD9E0; +constexpr unsigned int mmSQ_PERFCOUNTER_CTRL__SI = 0x2306; +constexpr unsigned int mmSQ_PERFCOUNTER_MASK__CI__VI = 0xD9E1; +constexpr unsigned int mmSQ_POWER_THROTTLE2__CI__VI = 0xF092; +constexpr unsigned int mmSQ_POWER_THROTTLE2__SI = 0x2397; +constexpr unsigned int mmSQ_POWER_THROTTLE__CI__VI = 0xF091; +constexpr unsigned int mmSQ_POWER_THROTTLE__SI = 0x2396; +constexpr unsigned int mmSQ_RANDOM_WAVE_PRI = 0x2303; +constexpr unsigned int mmSQ_REG_CREDITS = 0x2304; +constexpr unsigned int mmSQ_REG_TIMESTAMP__CI__VI = 0x2374; +constexpr unsigned int mmSQ_SEC_CNT__SI__CI = 0x23A1; +constexpr unsigned int mmSQ_SMRD__SI__CI = 0x237F; +constexpr unsigned int mmSQ_SOP1 = 0x237F; +constexpr unsigned int mmSQ_SOP2 = 0x237F; +constexpr unsigned int mmSQ_SOPC = 0x237F; +constexpr unsigned int mmSQ_SOPK = 0x237F; +constexpr unsigned int mmSQ_SOPP = 0x237F; +constexpr unsigned int mmSQ_TEX_CLK_CTRL__CI__VI = 0xF08F; +constexpr unsigned int mmSQ_TEX_CLK_CTRL__SI = 0x2361; +constexpr unsigned int mmSQ_THREAD_TRACE_BASE2__CI = 0x2385; +constexpr unsigned int mmSQ_THREAD_TRACE_CNTR = 0x2390; +constexpr unsigned int mmSQ_THREAD_TRACE_TOKEN_MASK2__CI = 0x2386; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_0__CI__VI = 0xC340; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_0__SI = 0x2388; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_1__CI__VI = 0xC341; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_1__SI = 0x2389; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_2__CI__VI = 0xC342; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_2__SI = 0x238A; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_3__CI__VI = 0xC343; +constexpr unsigned int mmSQ_THREAD_TRACE_USERDATA_3__SI = 0x238B; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_CMN = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_EVENT = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_INST = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 = 0x23B1; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 = 0x23B1; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_ISSUE = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_MISC = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 = 0x23B1; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2__CI__VI = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2__CI__VI = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 = 0x23B1; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_TIME__SI = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_WAVE = 0x23B0; +constexpr unsigned int mmSQ_THREAD_TRACE_WORD_WAVE_START = 0x23B0; +constexpr unsigned int mmSQ_TIME_HI = 0x237C; +constexpr unsigned int mmSQ_TIME_LO = 0x237D; +constexpr unsigned int mmSQ_VINTRP = 0x237F; +constexpr unsigned int mmSQ_VOP1 = 0x237F; +constexpr unsigned int mmSQ_VOP2 = 0x237F; +constexpr unsigned int mmSQ_VOP3_0 = 0x237F; +constexpr unsigned int mmSQ_VOP3_0_SDST_ENC = 0x237F; +constexpr unsigned int mmSQ_VOP3_1 = 0x237F; +constexpr unsigned int mmSQ_VOPC = 0x237F; +constexpr unsigned int mmSRBM_CHIP_REVISION = 0x039B; +constexpr unsigned int mmSRBM_CNTL = 0x0390; +constexpr unsigned int mmSRBM_DEBUG = 0x03A4; +constexpr unsigned int mmSRBM_DEBUG_CNTL = 0x0399; +constexpr unsigned int mmSRBM_DEBUG_DATA = 0x039A; +constexpr unsigned int mmSRBM_DEBUG_SNAPSHOT = 0x03A5; +constexpr unsigned int mmSRBM_GFX_CNTL = 0x0391; +constexpr unsigned int mmSRBM_INT_ACK = 0x03AA; +constexpr unsigned int mmSRBM_INT_CNTL = 0x03A8; +constexpr unsigned int mmSRBM_INT_STATUS = 0x03A9; +constexpr unsigned int mmSRBM_MC_CLKEN_CNTL__CI__VI = 0x03B3; +constexpr unsigned int mmSRBM_READ_ERROR = 0x03A6; +constexpr unsigned int mmSRBM_SAM_CLKEN_CNTL__CI__VI = 0x03B8; +constexpr unsigned int mmSRBM_SDMA_CLKEN_CNTL__CI__VI = 0x03B7; +constexpr unsigned int mmSRBM_SOFT_RESET = 0x0398; +constexpr unsigned int mmSRBM_STATUS = 0x0394; +constexpr unsigned int mmSRBM_STATUS2 = 0x0393; +constexpr unsigned int mmSRBM_SYS_CLKEN_CNTL = 0x03B4; +constexpr unsigned int mmSRBM_UVD_CLKEN_CNTL = 0x03B6; +constexpr unsigned int mmSRBM_VCE_CLKEN_CNTL = 0x03B5; +constexpr unsigned int mmSX_DEBUG_1 = 0x2418; +constexpr unsigned int mmSX_DEBUG_BUSY = 0x2414; +constexpr unsigned int mmSX_DEBUG_BUSY_2 = 0x2415; +constexpr unsigned int mmSX_DEBUG_BUSY_3 = 0x2416; +constexpr unsigned int mmSX_DEBUG_BUSY_4 = 0x2417; +constexpr unsigned int mmSX_PERFCOUNTER0_HI__CI__VI = 0xD241; +constexpr unsigned int mmSX_PERFCOUNTER0_HI__SI = 0x2421; +constexpr unsigned int mmSX_PERFCOUNTER0_LO__CI__VI = 0xD240; +constexpr unsigned int mmSX_PERFCOUNTER0_LO__SI = 0x2420; +constexpr unsigned int mmSX_PERFCOUNTER0_SELECT1__CI__VI = 0xDA44; +constexpr unsigned int mmSX_PERFCOUNTER0_SELECT__CI__VI = 0xDA40; +constexpr unsigned int mmSX_PERFCOUNTER0_SELECT__SI = 0x241C; +constexpr unsigned int mmSX_PERFCOUNTER1_HI__CI__VI = 0xD243; +constexpr unsigned int mmSX_PERFCOUNTER1_HI__SI = 0x2423; +constexpr unsigned int mmSX_PERFCOUNTER1_LO__CI__VI = 0xD242; +constexpr unsigned int mmSX_PERFCOUNTER1_LO__SI = 0x2422; +constexpr unsigned int mmSX_PERFCOUNTER1_SELECT1__CI__VI = 0xDA45; +constexpr unsigned int mmSX_PERFCOUNTER1_SELECT__CI__VI = 0xDA41; +constexpr unsigned int mmSX_PERFCOUNTER1_SELECT__SI = 0x241D; +constexpr unsigned int mmSX_PERFCOUNTER2_HI__CI__VI = 0xD245; +constexpr unsigned int mmSX_PERFCOUNTER2_HI__SI = 0x2425; +constexpr unsigned int mmSX_PERFCOUNTER2_LO__CI__VI = 0xD244; +constexpr unsigned int mmSX_PERFCOUNTER2_LO__SI = 0x2424; +constexpr unsigned int mmSX_PERFCOUNTER2_SELECT__CI__VI = 0xDA42; +constexpr unsigned int mmSX_PERFCOUNTER2_SELECT__SI = 0x241E; +constexpr unsigned int mmSX_PERFCOUNTER3_HI__CI__VI = 0xD247; +constexpr unsigned int mmSX_PERFCOUNTER3_HI__SI = 0x2427; +constexpr unsigned int mmSX_PERFCOUNTER3_LO__CI__VI = 0xD246; +constexpr unsigned int mmSX_PERFCOUNTER3_LO__SI = 0x2426; +constexpr unsigned int mmSX_PERFCOUNTER3_SELECT__CI__VI = 0xDA43; +constexpr unsigned int mmSX_PERFCOUNTER3_SELECT__SI = 0x241F; +constexpr unsigned int mmTARGET_AND_CURRENT_PROFILE_INDEX_1__SI = 0x021D; +constexpr unsigned int mmTARGET_AND_CURRENT_PROFILE_INDEX__SI = 0x01E6; +constexpr unsigned int mmTA_BC_BASE_ADDR = 0xA020; +constexpr unsigned int mmTA_BC_BASE_ADDR_HI__CI__VI = 0xA021; +constexpr unsigned int mmTA_CGTT_CTRL__CI__VI = 0xF09D; +constexpr unsigned int mmTA_CGTT_CTRL__SI = 0x2544; +constexpr unsigned int mmTA_CNTL = 0x2541; +constexpr unsigned int mmTA_CNTL_AUX = 0x2542; +constexpr unsigned int mmTA_CS_BC_BASE_ADDR_HI__CI__VI = 0xC381; +constexpr unsigned int mmTA_CS_BC_BASE_ADDR__CI__VI = 0xC380; +constexpr unsigned int mmTA_CS_BC_BASE_ADDR__SI = 0x2543; +constexpr unsigned int mmTA_DEBUG_DATA = 0x254D; +constexpr unsigned int mmTA_DEBUG_INDEX = 0x254C; +constexpr unsigned int mmTA_PERFCOUNTER0_HI__CI__VI = 0xD2C1; +constexpr unsigned int mmTA_PERFCOUNTER0_HI__SI = 0x2556; +constexpr unsigned int mmTA_PERFCOUNTER0_LO__CI__VI = 0xD2C0; +constexpr unsigned int mmTA_PERFCOUNTER0_LO__SI = 0x2555; +constexpr unsigned int mmTA_PERFCOUNTER0_SELECT1__CI__VI = 0xDAC1; +constexpr unsigned int mmTA_PERFCOUNTER0_SELECT__CI__VI = 0xDAC0; +constexpr unsigned int mmTA_PERFCOUNTER0_SELECT__SI = 0x2554; +constexpr unsigned int mmTA_PERFCOUNTER1_HI__CI__VI = 0xD2C3; +constexpr unsigned int mmTA_PERFCOUNTER1_HI__SI = 0x2562; +constexpr unsigned int mmTA_PERFCOUNTER1_LO__CI__VI = 0xD2C2; +constexpr unsigned int mmTA_PERFCOUNTER1_LO__SI = 0x2561; +constexpr unsigned int mmTA_PERFCOUNTER1_SELECT__CI__VI = 0xDAC2; +constexpr unsigned int mmTA_PERFCOUNTER1_SELECT__SI = 0x2560; +constexpr unsigned int mmTA_RESERVED_010C__CI__VI = 0x2543; +constexpr unsigned int mmTA_SCRATCH = 0x2564; +constexpr unsigned int mmTA_STATUS = 0x2548; +constexpr unsigned int mmTCA_CGTT_SCLK_CTRL__CI__VI = 0xF0AD; +constexpr unsigned int mmTCA_CGTT_SCLK_CTRL__SI = 0x2BC1; +constexpr unsigned int mmTCA_CTRL = 0x2BC0; +constexpr unsigned int mmTCA_PERFCOUNTER0_HI__CI__VI = 0xD391; +constexpr unsigned int mmTCA_PERFCOUNTER0_HI__SI = 0x2BD2; +constexpr unsigned int mmTCA_PERFCOUNTER0_LO__CI__VI = 0xD390; +constexpr unsigned int mmTCA_PERFCOUNTER0_LO__SI = 0x2BD1; +constexpr unsigned int mmTCA_PERFCOUNTER0_SELECT1__CI__VI = 0xDB91; +constexpr unsigned int mmTCA_PERFCOUNTER0_SELECT__CI__VI = 0xDB90; +constexpr unsigned int mmTCA_PERFCOUNTER0_SELECT__SI = 0x2BD0; +constexpr unsigned int mmTCA_PERFCOUNTER1_HI__CI__VI = 0xD393; +constexpr unsigned int mmTCA_PERFCOUNTER1_HI__SI = 0x2BD5; +constexpr unsigned int mmTCA_PERFCOUNTER1_LO__CI__VI = 0xD392; +constexpr unsigned int mmTCA_PERFCOUNTER1_LO__SI = 0x2BD4; +constexpr unsigned int mmTCA_PERFCOUNTER1_SELECT1__CI__VI = 0xDB93; +constexpr unsigned int mmTCA_PERFCOUNTER1_SELECT__CI__VI = 0xDB92; +constexpr unsigned int mmTCA_PERFCOUNTER1_SELECT__SI = 0x2BD3; +constexpr unsigned int mmTCA_PERFCOUNTER2_HI__CI__VI = 0xD395; +constexpr unsigned int mmTCA_PERFCOUNTER2_HI__SI = 0x2BD8; +constexpr unsigned int mmTCA_PERFCOUNTER2_LO__CI__VI = 0xD394; +constexpr unsigned int mmTCA_PERFCOUNTER2_LO__SI = 0x2BD7; +constexpr unsigned int mmTCA_PERFCOUNTER2_SELECT__CI__VI = 0xDB94; +constexpr unsigned int mmTCA_PERFCOUNTER2_SELECT__SI = 0x2BD6; +constexpr unsigned int mmTCA_PERFCOUNTER3_HI__CI__VI = 0xD397; +constexpr unsigned int mmTCA_PERFCOUNTER3_HI__SI = 0x2BDB; +constexpr unsigned int mmTCA_PERFCOUNTER3_LO__CI__VI = 0xD396; +constexpr unsigned int mmTCA_PERFCOUNTER3_LO__SI = 0x2BDA; +constexpr unsigned int mmTCA_PERFCOUNTER3_SELECT__CI__VI = 0xDB95; +constexpr unsigned int mmTCA_PERFCOUNTER3_SELECT__SI = 0x2BD9; +constexpr unsigned int mmTCC_CGTT_SCLK_CTRL__CI__VI = 0xF0AC; +constexpr unsigned int mmTCC_CGTT_SCLK_CTRL__SI = 0x2B81; +constexpr unsigned int mmTCC_CTRL = 0x2B80; +constexpr unsigned int mmTCC_EDC_COUNTER__SI__CI = 0x2B82; +constexpr unsigned int mmTCC_PERFCOUNTER0_HI__CI__VI = 0xD381; +constexpr unsigned int mmTCC_PERFCOUNTER0_HI__SI = 0x2B92; +constexpr unsigned int mmTCC_PERFCOUNTER0_LO__CI__VI = 0xD380; +constexpr unsigned int mmTCC_PERFCOUNTER0_LO__SI = 0x2B91; +constexpr unsigned int mmTCC_PERFCOUNTER0_SELECT1__CI__VI = 0xDB81; +constexpr unsigned int mmTCC_PERFCOUNTER0_SELECT__CI__VI = 0xDB80; +constexpr unsigned int mmTCC_PERFCOUNTER0_SELECT__SI = 0x2B90; +constexpr unsigned int mmTCC_PERFCOUNTER1_HI__CI__VI = 0xD383; +constexpr unsigned int mmTCC_PERFCOUNTER1_HI__SI = 0x2B95; +constexpr unsigned int mmTCC_PERFCOUNTER1_LO__CI__VI = 0xD382; +constexpr unsigned int mmTCC_PERFCOUNTER1_LO__SI = 0x2B94; +constexpr unsigned int mmTCC_PERFCOUNTER1_SELECT1__CI__VI = 0xDB83; +constexpr unsigned int mmTCC_PERFCOUNTER1_SELECT__CI__VI = 0xDB82; +constexpr unsigned int mmTCC_PERFCOUNTER1_SELECT__SI = 0x2B93; +constexpr unsigned int mmTCC_PERFCOUNTER2_HI__CI__VI = 0xD385; +constexpr unsigned int mmTCC_PERFCOUNTER2_HI__SI = 0x2B98; +constexpr unsigned int mmTCC_PERFCOUNTER2_LO__CI__VI = 0xD384; +constexpr unsigned int mmTCC_PERFCOUNTER2_LO__SI = 0x2B97; +constexpr unsigned int mmTCC_PERFCOUNTER2_SELECT__CI__VI = 0xDB84; +constexpr unsigned int mmTCC_PERFCOUNTER2_SELECT__SI = 0x2B96; +constexpr unsigned int mmTCC_PERFCOUNTER3_HI__CI__VI = 0xD387; +constexpr unsigned int mmTCC_PERFCOUNTER3_HI__SI = 0x2B9B; +constexpr unsigned int mmTCC_PERFCOUNTER3_LO__CI__VI = 0xD386; +constexpr unsigned int mmTCC_PERFCOUNTER3_LO__SI = 0x2B9A; +constexpr unsigned int mmTCC_PERFCOUNTER3_SELECT__CI__VI = 0xDB85; +constexpr unsigned int mmTCC_PERFCOUNTER3_SELECT__SI = 0x2B99; +constexpr unsigned int mmTCC_REDUNDANCY__CI__VI = 0x2B83; +constexpr unsigned int mmTCI_CNTL_1 = 0x2B62; +constexpr unsigned int mmTCI_CNTL_2 = 0x2B63; +constexpr unsigned int mmTCI_STATUS = 0x2B61; +constexpr unsigned int mmTCP_ADDR_CONFIG = 0x2B05; +constexpr unsigned int mmTCP_BUFFER_ADDR_HASH_CNTL = 0x2B16; +constexpr unsigned int mmTCP_CHAN_STEER_HI = 0x2B04; +constexpr unsigned int mmTCP_CHAN_STEER_LO = 0x2B03; +constexpr unsigned int mmTCP_CNTL = 0x2B02; +constexpr unsigned int mmTCP_CREDIT = 0x2B06; +constexpr unsigned int mmTCP_EDC_COUNTER__SI__CI = 0x2B17; +constexpr unsigned int mmTCP_INVALIDATE = 0x2B00; +constexpr unsigned int mmTCP_PERFCOUNTER0_HI__CI__VI = 0xD341; +constexpr unsigned int mmTCP_PERFCOUNTER0_HI__SI = 0x2B0A; +constexpr unsigned int mmTCP_PERFCOUNTER0_LO__CI__VI = 0xD340; +constexpr unsigned int mmTCP_PERFCOUNTER0_LO__SI = 0x2B0B; +constexpr unsigned int mmTCP_PERFCOUNTER0_SELECT1__CI__VI = 0xDB41; +constexpr unsigned int mmTCP_PERFCOUNTER0_SELECT__CI__VI = 0xDB40; +constexpr unsigned int mmTCP_PERFCOUNTER0_SELECT__SI = 0x2B09; +constexpr unsigned int mmTCP_PERFCOUNTER1_HI__CI__VI = 0xD343; +constexpr unsigned int mmTCP_PERFCOUNTER1_HI__SI = 0x2B0D; +constexpr unsigned int mmTCP_PERFCOUNTER1_LO__CI__VI = 0xD342; +constexpr unsigned int mmTCP_PERFCOUNTER1_LO__SI = 0x2B0E; +constexpr unsigned int mmTCP_PERFCOUNTER1_SELECT1__CI__VI = 0xDB43; +constexpr unsigned int mmTCP_PERFCOUNTER1_SELECT__CI__VI = 0xDB42; +constexpr unsigned int mmTCP_PERFCOUNTER1_SELECT__SI = 0x2B0C; +constexpr unsigned int mmTCP_PERFCOUNTER2_HI__CI__VI = 0xD345; +constexpr unsigned int mmTCP_PERFCOUNTER2_HI__SI = 0x2B10; +constexpr unsigned int mmTCP_PERFCOUNTER2_LO__CI__VI = 0xD344; +constexpr unsigned int mmTCP_PERFCOUNTER2_LO__SI = 0x2B11; +constexpr unsigned int mmTCP_PERFCOUNTER2_SELECT__CI__VI = 0xDB44; +constexpr unsigned int mmTCP_PERFCOUNTER2_SELECT__SI = 0x2B0F; +constexpr unsigned int mmTCP_PERFCOUNTER3_HI__CI__VI = 0xD347; +constexpr unsigned int mmTCP_PERFCOUNTER3_HI__SI = 0x2B13; +constexpr unsigned int mmTCP_PERFCOUNTER3_LO__CI__VI = 0xD346; +constexpr unsigned int mmTCP_PERFCOUNTER3_LO__SI = 0x2B14; +constexpr unsigned int mmTCP_PERFCOUNTER3_SELECT__CI__VI = 0xDB45; +constexpr unsigned int mmTCP_PERFCOUNTER3_SELECT__SI = 0x2B12; +constexpr unsigned int mmTCP_STATUS = 0x2B01; +constexpr unsigned int mmTCP_WATCH0_ADDR_H__CI__VI = 0x32A0; +constexpr unsigned int mmTCP_WATCH0_ADDR_L__CI__VI = 0x32A1; +constexpr unsigned int mmTCP_WATCH0_CNTL__CI__VI = 0x32A2; +constexpr unsigned int mmTCP_WATCH1_ADDR_H__CI__VI = 0x32A3; +constexpr unsigned int mmTCP_WATCH1_ADDR_L__CI__VI = 0x32A4; +constexpr unsigned int mmTCP_WATCH1_CNTL__CI__VI = 0x32A5; +constexpr unsigned int mmTCP_WATCH2_ADDR_H__CI__VI = 0x32A6; +constexpr unsigned int mmTCP_WATCH2_ADDR_L__CI__VI = 0x32A7; +constexpr unsigned int mmTCP_WATCH2_CNTL__CI__VI = 0x32A8; +constexpr unsigned int mmTCP_WATCH3_ADDR_H__CI__VI = 0x32A9; +constexpr unsigned int mmTCP_WATCH3_ADDR_L__CI__VI = 0x32AA; +constexpr unsigned int mmTCP_WATCH3_CNTL__CI__VI = 0x32AB; +constexpr unsigned int mmTCS_CGTT_SCLK_CTRL__CI = 0xF0AE; +constexpr unsigned int mmTCS_CTRL__CI = 0x2BE0; +constexpr unsigned int mmTCS_PERFCOUNTER0_HI__CI = 0xD3A1; +constexpr unsigned int mmTCS_PERFCOUNTER0_LO__CI = 0xD3A0; +constexpr unsigned int mmTCS_PERFCOUNTER0_SELECT1__CI = 0xDBA1; +constexpr unsigned int mmTCS_PERFCOUNTER0_SELECT__CI = 0xDBA0; +constexpr unsigned int mmTCS_PERFCOUNTER1_HI__CI = 0xD3A3; +constexpr unsigned int mmTCS_PERFCOUNTER1_LO__CI = 0xD3A2; +constexpr unsigned int mmTCS_PERFCOUNTER1_SELECT__CI = 0xDBA2; +constexpr unsigned int mmTCS_PERFCOUNTER2_HI__CI = 0xD3A5; +constexpr unsigned int mmTCS_PERFCOUNTER2_LO__CI = 0xD3A4; +constexpr unsigned int mmTCS_PERFCOUNTER2_SELECT__CI = 0xDBA3; +constexpr unsigned int mmTCS_PERFCOUNTER3_HI__CI = 0xD3A7; +constexpr unsigned int mmTCS_PERFCOUNTER3_LO__CI = 0xD3A6; +constexpr unsigned int mmTCS_PERFCOUNTER3_SELECT__CI = 0xDBA4; +constexpr unsigned int mmTC_CFG_L1_LOAD_POLICY0__CI__VI = 0x2B1A; +constexpr unsigned int mmTC_CFG_L1_LOAD_POLICY1__CI__VI = 0x2B1B; +constexpr unsigned int mmTC_CFG_L1_STORE_POLICY__CI__VI = 0x2B1C; +constexpr unsigned int mmTC_CFG_L1_VOLATILE__CI__VI = 0x2B22; +constexpr unsigned int mmTC_CFG_L2_ATOMIC_POLICY__CI__VI = 0x2B21; +constexpr unsigned int mmTC_CFG_L2_LOAD_POLICY0__CI__VI = 0x2B1D; +constexpr unsigned int mmTC_CFG_L2_LOAD_POLICY1__CI__VI = 0x2B1E; +constexpr unsigned int mmTC_CFG_L2_STORE_POLICY0__CI__VI = 0x2B1F; +constexpr unsigned int mmTC_CFG_L2_STORE_POLICY1__CI__VI = 0x2B20; +constexpr unsigned int mmTC_CFG_L2_VOLATILE__CI__VI = 0x2B23; +constexpr unsigned int mmTD_CGTT_CTRL__CI__VI = 0xF09C; +constexpr unsigned int mmTD_CGTT_CTRL__SI = 0x2527; +constexpr unsigned int mmTD_CNTL = 0x2525; +constexpr unsigned int mmTD_DEBUG_DATA = 0x2529; +constexpr unsigned int mmTD_DEBUG_INDEX = 0x2528; +constexpr unsigned int mmTD_PERFCOUNTER0_HI__CI__VI = 0xD301; +constexpr unsigned int mmTD_PERFCOUNTER0_HI__SI = 0x252E; +constexpr unsigned int mmTD_PERFCOUNTER0_LO__CI__VI = 0xD300; +constexpr unsigned int mmTD_PERFCOUNTER0_LO__SI = 0x252D; +constexpr unsigned int mmTD_PERFCOUNTER0_SELECT1__CI__VI = 0xDB01; +constexpr unsigned int mmTD_PERFCOUNTER0_SELECT__CI__VI = 0xDB00; +constexpr unsigned int mmTD_PERFCOUNTER0_SELECT__SI = 0x252C; +constexpr unsigned int mmTD_PERFCOUNTER1_HI__CI__VI = 0xD303; +constexpr unsigned int mmTD_PERFCOUNTER1_LO__CI__VI = 0xD302; +constexpr unsigned int mmTD_PERFCOUNTER1_SELECT__CI__VI = 0xDB02; +constexpr unsigned int mmTD_SCRATCH__CI__VI = 0x2533; +constexpr unsigned int mmTD_SCRATCH__SI = 0x2530; +constexpr unsigned int mmTD_STATUS = 0x2526; +constexpr unsigned int mmTHM_CLK_CNTL__SI = 0x019A; +constexpr unsigned int mmTMDS_CNTL__SI = 0x1C7C; +constexpr unsigned int mmTMDS_CONTROL0_FEEDBACK__SI = 0x1C7E; +constexpr unsigned int mmTMDS_CONTROL_CHAR__SI = 0x1C7D; +constexpr unsigned int mmTMDS_CTL0_1_GEN_CNTL__SI = 0x1C86; +constexpr unsigned int mmTMDS_CTL2_3_GEN_CNTL__SI = 0x1C87; +constexpr unsigned int mmTMDS_CTL_BITS__SI = 0x1C83; +constexpr unsigned int mmTMDS_DCBALANCER_CONTROL__SI = 0x1C84; +constexpr unsigned int mmTMDS_DEBUG__SI = 0x1C82; +constexpr unsigned int mmTMDS_STEREOSYNC_CTL_SEL__SI = 0x1C7F; +constexpr unsigned int mmTMDS_SYNC_CHAR_PATTERN_0_1__SI = 0x1C80; +constexpr unsigned int mmTMDS_SYNC_CHAR_PATTERN_2_3__SI = 0x1C81; +constexpr unsigned int mmUNIPHY_DATA_SYNCHRONIZATION__SI = 0x1984; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKA__SI = 0x1947; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKB__SI = 0x1948; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKC__SI = 0x194D; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKD__SI = 0x194E; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKE__SI = 0x1950; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKF__SI = 0x1951; +constexpr unsigned int mmUNIPHY_IMPCAL_PERIOD__SI = 0x1949; +constexpr unsigned int mmUNIPHY_REG_TEST_OUTPUT__SI = 0x1986; +constexpr unsigned int mmUSER_SQC_BANK_DISABLE = 0x2308; +constexpr unsigned int mmUVD_CGC_CTRL__SI__VI = 0x3D2C; +constexpr unsigned int mmUVD_CGC_GATE__SI__VI = 0x3D2A; +constexpr unsigned int mmUVD_CGC_STATUS__SI__VI = 0x3D2B; +constexpr unsigned int mmUVD_CONFIG__CI__VI = 0x0F93; +constexpr unsigned int mmUVD_CONFIG__SI = 0x0F98; +constexpr unsigned int mmUVD_CONTEXT_ID__SI__VI = 0x3DBD; +constexpr unsigned int mmUVD_CTX_DATA__SI__VI = 0x3D29; +constexpr unsigned int mmUVD_CTX_INDEX__SI__VI = 0x3D28; +constexpr unsigned int mmUVD_ENGINE_CNTL__SI__VI = 0x3BC6; +constexpr unsigned int mmUVD_GPCOM_VCPU_CMD__SI__VI = 0x3BC3; +constexpr unsigned int mmUVD_GPCOM_VCPU_DATA0__SI__VI = 0x3BC4; +constexpr unsigned int mmUVD_GPCOM_VCPU_DATA1__SI__VI = 0x3BC5; +constexpr unsigned int mmUVD_LMI_ADDR_EXT__SI__VI = 0x3D65; +constexpr unsigned int mmUVD_LMI_CTRL2__SI__VI = 0x3D3D; +constexpr unsigned int mmUVD_LMI_CTRL__SI__VI = 0x3D66; +constexpr unsigned int mmUVD_LMI_EXT40_ADDR__SI__VI = 0x3D26; +constexpr unsigned int mmUVD_LMI_STATUS__SI__VI = 0x3D67; +constexpr unsigned int mmUVD_LMI_SWAP_CNTL__SI__VI = 0x3D6D; +constexpr unsigned int mmUVD_MASTINT_EN__SI__VI = 0x3D40; +constexpr unsigned int mmUVD_MPC_CNTL__SI__VI = 0x3D77; +constexpr unsigned int mmUVD_MPC_SET_ALU__SI__VI = 0x3D7E; +constexpr unsigned int mmUVD_MPC_SET_MUXA0__SI__VI = 0x3D79; +constexpr unsigned int mmUVD_MPC_SET_MUXA1__SI__VI = 0x3D7A; +constexpr unsigned int mmUVD_MPC_SET_MUXB0__SI__VI = 0x3D7B; +constexpr unsigned int mmUVD_MPC_SET_MUXB1__SI__VI = 0x3D7C; +constexpr unsigned int mmUVD_MPC_SET_MUX__SI__VI = 0x3D7D; +constexpr unsigned int mmUVD_MP_SWAP_CNTL__SI__VI = 0x3D6F; +constexpr unsigned int mmUVD_RBC_IB_BASE__SI = 0x3DA1; +constexpr unsigned int mmUVD_RBC_IB_SIZE__SI__VI = 0x3DA2; +constexpr unsigned int mmUVD_RBC_RB_BASE__SI = 0x3DA3; +constexpr unsigned int mmUVD_RBC_RB_CNTL__SI__VI = 0x3DA9; +constexpr unsigned int mmUVD_RBC_RB_RPTR_ADDR__SI__VI = 0x3DAA; +constexpr unsigned int mmUVD_RBC_RB_RPTR__SI__VI = 0x3DA4; +constexpr unsigned int mmUVD_RBC_RB_WPTR__SI__VI = 0x3DA5; +constexpr unsigned int mmUVD_SEMA_ADDR_HIGH__SI__VI = 0x3BC1; +constexpr unsigned int mmUVD_SEMA_ADDR_LOW__SI__VI = 0x3BC0; +constexpr unsigned int mmUVD_SEMA_CMD__SI__VI = 0x3BC2; +constexpr unsigned int mmUVD_SEMA_CNTL__SI__VI = 0x3D00; +constexpr unsigned int mmUVD_SEMA_SIGNAL_INCOMPLETE_TIMEOUT_CNTL__SI__VI = 0x3DB3; +constexpr unsigned int mmUVD_SEMA_TIMEOUT_STATUS__SI__VI = 0x3DB0; +constexpr unsigned int mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL__SI__VI = 0x3DB2; +constexpr unsigned int mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL__SI__VI = 0x3DB1; +constexpr unsigned int mmUVD_SOFT_RESET__SI__VI = 0x3DA0; +constexpr unsigned int mmUVD_STATUS__SI__VI = 0x3DAF; +constexpr unsigned int mmUVD_VCPU_CACHE_OFFSET0__SI__VI = 0x3D82; +constexpr unsigned int mmUVD_VCPU_CACHE_OFFSET1__SI__VI = 0x3D84; +constexpr unsigned int mmUVD_VCPU_CACHE_OFFSET2__SI__VI = 0x3D86; +constexpr unsigned int mmUVD_VCPU_CACHE_SIZE0__SI__VI = 0x3D83; +constexpr unsigned int mmUVD_VCPU_CACHE_SIZE1__SI__VI = 0x3D85; +constexpr unsigned int mmUVD_VCPU_CACHE_SIZE2__SI__VI = 0x3D87; +constexpr unsigned int mmUVD_VCPU_CNTL__SI__VI = 0x3D98; +constexpr unsigned int mmVBLANK_STATUS__SI = 0x1AEF; +constexpr unsigned int mmVCE_CONFIG__CI__VI = 0x0F94; +constexpr unsigned int mmVGA25_PPLL_FB_DIV__SI = 0x00DE; +constexpr unsigned int mmVGA25_PPLL_POST_DIV__SI = 0x00E2; +constexpr unsigned int mmVGA25_PPLL_REF_DIV__SI = 0x00D9; +constexpr unsigned int mmVGA28_PPLL_FB_DIV__SI = 0x00DF; +constexpr unsigned int mmVGA28_PPLL_POST_DIV__SI = 0x00E4; +constexpr unsigned int mmVGA28_PPLL_REF_DIV__SI = 0x00DB; +constexpr unsigned int mmVGA41_PPLL_FB_DIV__SI = 0x00E0; +constexpr unsigned int mmVGA41_PPLL_POST_DIV__SI = 0x00E6; +constexpr unsigned int mmVGA41_PPLL_REF_DIV__SI = 0x00DD; +constexpr unsigned int mmVGA_CACHE_CONTROL__SI__VI = 0x00CB; +constexpr unsigned int mmVGA_DEBUG_READBACK_DATA__SI__VI = 0x00D7; +constexpr unsigned int mmVGA_DEBUG_READBACK_INDEX__SI__VI = 0x00D6; +constexpr unsigned int mmVGA_DISPBUF1_SURFACE_ADDR__SI__VI = 0x00C6; +constexpr unsigned int mmVGA_DISPBUF2_SURFACE_ADDR__SI__VI = 0x00C8; +constexpr unsigned int mmVGA_HDP_CONTROL__SI__VI = 0x00CA; +constexpr unsigned int mmVGA_HW_DEBUG__SI__VI = 0x00CF; +constexpr unsigned int mmVGA_INTERRUPT_CONTROL__SI__VI = 0x00D1; +constexpr unsigned int mmVGA_INTERRUPT_STATUS__SI__VI = 0x00D3; +constexpr unsigned int mmVGA_MAIN_CONTROL__SI__VI = 0x00D4; +constexpr unsigned int mmVGA_MEMORY_BASE_ADDRESS_HIGH__SI__VI = 0x00C9; +constexpr unsigned int mmVGA_MEMORY_BASE_ADDRESS__SI__VI = 0x00C4; +constexpr unsigned int mmVGA_MEM_READ_PAGE_ADDR__SI__VI = 0x0013; +constexpr unsigned int mmVGA_MEM_WRITE_PAGE_ADDR__SI__VI = 0x0012; +constexpr unsigned int mmVGA_MODE_CONTROL__SI__VI = 0x00C2; +constexpr unsigned int mmVGA_RENDER_CONTROL__SI__VI = 0x00C0; +constexpr unsigned int mmVGA_SEQUENCER_RESET_CONTROL__SI__VI = 0x00C1; +constexpr unsigned int mmVGA_SOURCE_SELECT__SI__VI = 0x00FC; +constexpr unsigned int mmVGA_STATUS_CLEAR__SI__VI = 0x00D2; +constexpr unsigned int mmVGA_STATUS__SI__VI = 0x00D0; +constexpr unsigned int mmVGA_SURFACE_PITCH_SELECT__SI__VI = 0x00C3; +constexpr unsigned int mmVGA_TEST_CONTROL__SI__VI = 0x00D5; +constexpr unsigned int mmVGA_TEST_DEBUG_DATA__SI__VI = 0x00C7; +constexpr unsigned int mmVGA_TEST_DEBUG_INDEX__SI__VI = 0x00C5; +constexpr unsigned int mmVGT_CACHE_INVALIDATION = 0x2231; +constexpr unsigned int mmVGT_CNTL_STATUS = 0x223C; +constexpr unsigned int mmVGT_DEBUG_CNTL = 0x2238; +constexpr unsigned int mmVGT_DEBUG_DATA = 0x2239; +constexpr unsigned int mmVGT_DMA_BASE = 0xA1FA; +constexpr unsigned int mmVGT_DMA_BASE_HI = 0xA1F9; +constexpr unsigned int mmVGT_DMA_CONTROL__CI__VI = 0x2272; +constexpr unsigned int mmVGT_DMA_DATA_FIFO_DEPTH = 0x222D; +constexpr unsigned int mmVGT_DMA_INDEX_TYPE = 0xA29F; +constexpr unsigned int mmVGT_DMA_LS_HS_CONFIG__CI__VI = 0x2273; +constexpr unsigned int mmVGT_DMA_MAX_SIZE = 0xA29E; +constexpr unsigned int mmVGT_DMA_NUM_INSTANCES = 0xA2A2; +constexpr unsigned int mmVGT_DMA_PRIMITIVE_TYPE__CI__VI = 0x2271; +constexpr unsigned int mmVGT_DMA_REQ_FIFO_DEPTH = 0x222E; +constexpr unsigned int mmVGT_DMA_SIZE = 0xA29D; +constexpr unsigned int mmVGT_DRAW_INITIATOR = 0xA1FC; +constexpr unsigned int mmVGT_DRAW_INIT_FIFO_DEPTH = 0x222F; +constexpr unsigned int mmVGT_ENHANCE = 0xA294; +constexpr unsigned int mmVGT_ESGS_RING_ITEMSIZE = 0xA2AB; +constexpr unsigned int mmVGT_ESGS_RING_SIZE__CI__VI = 0xC240; +constexpr unsigned int mmVGT_ESGS_RING_SIZE__SI = 0x2232; +constexpr unsigned int mmVGT_ES_PER_GS = 0xA296; +constexpr unsigned int mmVGT_EVENT_ADDRESS_REG = 0xA1FE; +constexpr unsigned int mmVGT_EVENT_INITIATOR = 0xA2A4; +constexpr unsigned int mmVGT_FIFO_DEPTHS = 0x2234; +constexpr unsigned int mmVGT_GROUP_DECR = 0xA28B; +constexpr unsigned int mmVGT_GROUP_FIRST_DECR = 0xA28A; +constexpr unsigned int mmVGT_GROUP_PRIM_TYPE = 0xA289; +constexpr unsigned int mmVGT_GROUP_VECT_0_CNTL = 0xA28C; +constexpr unsigned int mmVGT_GROUP_VECT_0_FMT_CNTL = 0xA28E; +constexpr unsigned int mmVGT_GROUP_VECT_1_CNTL = 0xA28D; +constexpr unsigned int mmVGT_GROUP_VECT_1_FMT_CNTL = 0xA28F; +constexpr unsigned int mmVGT_GSVS_RING_ITEMSIZE = 0xA2AC; +constexpr unsigned int mmVGT_GSVS_RING_OFFSET_1 = 0xA298; +constexpr unsigned int mmVGT_GSVS_RING_OFFSET_2 = 0xA299; +constexpr unsigned int mmVGT_GSVS_RING_OFFSET_3 = 0xA29A; +constexpr unsigned int mmVGT_GSVS_RING_SIZE__CI__VI = 0xC241; +constexpr unsigned int mmVGT_GSVS_RING_SIZE__SI = 0x2233; +constexpr unsigned int mmVGT_GS_INSTANCE_CNT = 0xA2E4; +constexpr unsigned int mmVGT_GS_MAX_VERT_OUT = 0xA2CE; +constexpr unsigned int mmVGT_GS_MODE = 0xA290; +constexpr unsigned int mmVGT_GS_ONCHIP_CNTL__CI__VI = 0xA291; +constexpr unsigned int mmVGT_GS_OUT_PRIM_TYPE = 0xA29B; +constexpr unsigned int mmVGT_GS_PER_ES = 0xA295; +constexpr unsigned int mmVGT_GS_PER_VS = 0xA297; +constexpr unsigned int mmVGT_GS_VERTEX_REUSE = 0x2235; +constexpr unsigned int mmVGT_GS_VERT_ITEMSIZE = 0xA2D7; +constexpr unsigned int mmVGT_GS_VERT_ITEMSIZE_1 = 0xA2D8; +constexpr unsigned int mmVGT_GS_VERT_ITEMSIZE_2 = 0xA2D9; +constexpr unsigned int mmVGT_GS_VERT_ITEMSIZE_3 = 0xA2DA; +constexpr unsigned int mmVGT_HOS_CNTL = 0xA285; +constexpr unsigned int mmVGT_HOS_MAX_TESS_LEVEL = 0xA286; +constexpr unsigned int mmVGT_HOS_MIN_TESS_LEVEL = 0xA287; +constexpr unsigned int mmVGT_HOS_REUSE_DEPTH = 0xA288; +constexpr unsigned int mmVGT_HS_OFFCHIP_PARAM__CI__VI = 0xC24F; +constexpr unsigned int mmVGT_HS_OFFCHIP_PARAM__SI = 0x226C; +constexpr unsigned int mmVGT_IMMED_DATA = 0xA1FD; +constexpr unsigned int mmVGT_INDEX_TYPE__CI__VI = 0xC243; +constexpr unsigned int mmVGT_INDEX_TYPE__SI = 0x2257; +constexpr unsigned int mmVGT_INDX_OFFSET = 0xA102; +constexpr unsigned int mmVGT_INSTANCE_STEP_RATE_0 = 0xA2A8; +constexpr unsigned int mmVGT_INSTANCE_STEP_RATE_1 = 0xA2A9; +constexpr unsigned int mmVGT_LAST_COPY_STATE = 0x2230; +constexpr unsigned int mmVGT_LS_HS_CONFIG = 0xA2D6; +constexpr unsigned int mmVGT_MAX_VTX_INDX = 0xA100; +constexpr unsigned int mmVGT_MC_LAT_CNTL = 0x2236; +constexpr unsigned int mmVGT_MIN_VTX_INDX = 0xA101; +constexpr unsigned int mmVGT_MULTI_PRIM_IB_RESET_EN = 0xA2A5; +constexpr unsigned int mmVGT_MULTI_PRIM_IB_RESET_INDX = 0xA103; +constexpr unsigned int mmVGT_NUM_INDICES__CI__VI = 0xC24C; +constexpr unsigned int mmVGT_NUM_INDICES__SI = 0x225C; +constexpr unsigned int mmVGT_NUM_INSTANCES__CI__VI = 0xC24D; +constexpr unsigned int mmVGT_NUM_INSTANCES__SI = 0x225D; +constexpr unsigned int mmVGT_OUTPUT_PATH_CNTL = 0xA284; +constexpr unsigned int mmVGT_OUT_DEALLOC_CNTL = 0xA317; +constexpr unsigned int mmVGT_PERFCOUNTER0_HI__CI__VI = 0xD091; +constexpr unsigned int mmVGT_PERFCOUNTER0_HI__SI = 0x224D; +constexpr unsigned int mmVGT_PERFCOUNTER0_LO__CI__VI = 0xD090; +constexpr unsigned int mmVGT_PERFCOUNTER0_LO__SI = 0x224C; +constexpr unsigned int mmVGT_PERFCOUNTER0_SELECT1__CI__VI = 0xD890; +constexpr unsigned int mmVGT_PERFCOUNTER0_SELECT__CI__VI = 0xD88C; +constexpr unsigned int mmVGT_PERFCOUNTER0_SELECT__SI = 0x2248; +constexpr unsigned int mmVGT_PERFCOUNTER1_HI__CI__VI = 0xD093; +constexpr unsigned int mmVGT_PERFCOUNTER1_HI__SI = 0x224F; +constexpr unsigned int mmVGT_PERFCOUNTER1_LO__CI__VI = 0xD092; +constexpr unsigned int mmVGT_PERFCOUNTER1_LO__SI = 0x224E; +constexpr unsigned int mmVGT_PERFCOUNTER1_SELECT1__CI__VI = 0xD891; +constexpr unsigned int mmVGT_PERFCOUNTER1_SELECT__CI__VI = 0xD88D; +constexpr unsigned int mmVGT_PERFCOUNTER1_SELECT__SI = 0x2249; +constexpr unsigned int mmVGT_PERFCOUNTER2_HI__CI__VI = 0xD095; +constexpr unsigned int mmVGT_PERFCOUNTER2_HI__SI = 0x2251; +constexpr unsigned int mmVGT_PERFCOUNTER2_LO__CI__VI = 0xD094; +constexpr unsigned int mmVGT_PERFCOUNTER2_LO__SI = 0x2250; +constexpr unsigned int mmVGT_PERFCOUNTER2_SELECT__CI__VI = 0xD88E; +constexpr unsigned int mmVGT_PERFCOUNTER2_SELECT__SI = 0x224A; +constexpr unsigned int mmVGT_PERFCOUNTER3_HI__CI__VI = 0xD097; +constexpr unsigned int mmVGT_PERFCOUNTER3_HI__SI = 0x2253; +constexpr unsigned int mmVGT_PERFCOUNTER3_LO__CI__VI = 0xD096; +constexpr unsigned int mmVGT_PERFCOUNTER3_LO__SI = 0x2252; +constexpr unsigned int mmVGT_PERFCOUNTER3_SELECT__CI__VI = 0xD88F; +constexpr unsigned int mmVGT_PERFCOUNTER3_SELECT__SI = 0x224B; +constexpr unsigned int mmVGT_PERFCOUNTER_SEID_MASK__CI__VI = 0xD894; +constexpr unsigned int mmVGT_PERFCOUNTER_SEID_MASK__SI = 0x2247; +constexpr unsigned int mmVGT_PRIMITIVEID_EN = 0xA2A1; +constexpr unsigned int mmVGT_PRIMITIVEID_RESET = 0xA2A3; +constexpr unsigned int mmVGT_PRIMITIVE_TYPE__CI__VI = 0xC242; +constexpr unsigned int mmVGT_PRIMITIVE_TYPE__SI = 0x2256; +constexpr unsigned int mmVGT_RESET_DEBUG__CI__VI = 0x2232; +constexpr unsigned int mmVGT_REUSE_OFF = 0xA2AD; +constexpr unsigned int mmVGT_SHADER_STAGES_EN = 0xA2D5; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_CONFIG = 0xA2E6; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0__CI__VI = 0xC244; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0__SI = 0x2258; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1__CI__VI = 0xC245; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1__SI = 0x2259; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2__CI__VI = 0xC246; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2__SI = 0x225A; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3__CI__VI = 0xC247; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3__SI = 0x225B; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_OFFSET_0 = 0xA2B7; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_OFFSET_1 = 0xA2BB; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_OFFSET_2 = 0xA2BF; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_OFFSET_3 = 0xA2C3; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_SIZE_0 = 0xA2B4; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_SIZE_1 = 0xA2B8; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_SIZE_2 = 0xA2BC; +constexpr unsigned int mmVGT_STRMOUT_BUFFER_SIZE_3 = 0xA2C0; +constexpr unsigned int mmVGT_STRMOUT_CONFIG = 0xA2E5; +constexpr unsigned int mmVGT_STRMOUT_DELAY__CI__VI = 0x2233; +constexpr unsigned int mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE = 0xA2CB; +constexpr unsigned int mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET = 0xA2CA; +constexpr unsigned int mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE = 0xA2CC; +constexpr unsigned int mmVGT_STRMOUT_VTX_STRIDE_0 = 0xA2B5; +constexpr unsigned int mmVGT_STRMOUT_VTX_STRIDE_1 = 0xA2B9; +constexpr unsigned int mmVGT_STRMOUT_VTX_STRIDE_2 = 0xA2BD; +constexpr unsigned int mmVGT_STRMOUT_VTX_STRIDE_3 = 0xA2C1; +constexpr unsigned int mmVGT_SYS_CONFIG = 0x2263; +constexpr unsigned int mmVGT_TF_MEMORY_BASE__CI__VI = 0xC250; +constexpr unsigned int mmVGT_TF_MEMORY_BASE__SI = 0x226E; +constexpr unsigned int mmVGT_TF_PARAM = 0xA2DB; +constexpr unsigned int mmVGT_TF_RING_SIZE__CI__VI = 0xC24E; +constexpr unsigned int mmVGT_TF_RING_SIZE__SI = 0x2262; +constexpr unsigned int mmVGT_VERTEX_REUSE_BLOCK_CNTL = 0xA316; +constexpr unsigned int mmVGT_VS_MAX_WAVE_ID__CI__VI = 0x2268; +constexpr unsigned int mmVGT_VTX_CNT_EN = 0xA2AE; +constexpr unsigned int mmVGT_VTX_VECT_EJECT_REG = 0x222C; +constexpr unsigned int mmVIEWPORT_SIZE__SI__VI = 0x1B5D; +constexpr unsigned int mmVIEWPORT_START__SI__VI = 0x1B5C; +constexpr unsigned int mmVLINE_STATUS__SI = 0x1AEE; +constexpr unsigned int mmVM_CONTEXT0_CNTL = 0x0504; +constexpr unsigned int mmVM_CONTEXT0_CNTL2 = 0x050C; +constexpr unsigned int mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR = 0x054F; +constexpr unsigned int mmVM_CONTEXT0_PAGE_TABLE_END_ADDR = 0x055F; +constexpr unsigned int mmVM_CONTEXT0_PAGE_TABLE_START_ADDR = 0x0557; +constexpr unsigned int mmVM_CONTEXT0_PROTECTION_FAULT_ADDR = 0x053E; +constexpr unsigned int mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR = 0x0546; +constexpr unsigned int mmVM_CONTEXT0_PROTECTION_FAULT_MCCLIENT__CI__VI = 0x0538; +constexpr unsigned int mmVM_CONTEXT0_PROTECTION_FAULT_STATUS = 0x0536; +constexpr unsigned int mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR = 0x0510; +constexpr unsigned int mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR = 0x0511; +constexpr unsigned int mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR = 0x0512; +constexpr unsigned int mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR = 0x0513; +constexpr unsigned int mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR = 0x0514; +constexpr unsigned int mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR = 0x0515; +constexpr unsigned int mmVM_CONTEXT1_CNTL = 0x0505; +constexpr unsigned int mmVM_CONTEXT1_CNTL2 = 0x050D; +constexpr unsigned int mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR = 0x0550; +constexpr unsigned int mmVM_CONTEXT1_PAGE_TABLE_END_ADDR = 0x0560; +constexpr unsigned int mmVM_CONTEXT1_PAGE_TABLE_START_ADDR = 0x0558; +constexpr unsigned int mmVM_CONTEXT1_PROTECTION_FAULT_ADDR = 0x053F; +constexpr unsigned int mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR = 0x0547; +constexpr unsigned int mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT__CI__VI = 0x0539; +constexpr unsigned int mmVM_CONTEXT1_PROTECTION_FAULT_STATUS = 0x0537; +constexpr unsigned int mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR = 0x0551; +constexpr unsigned int mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR = 0x0552; +constexpr unsigned int mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR = 0x0553; +constexpr unsigned int mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR = 0x0554; +constexpr unsigned int mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR = 0x0555; +constexpr unsigned int mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR = 0x0556; +constexpr unsigned int mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR = 0x050E; +constexpr unsigned int mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR = 0x050F; +constexpr unsigned int mmVM_CONTEXTS_DISABLE = 0x0535; +constexpr unsigned int mmVM_DEBUG = 0x056F; +constexpr unsigned int mmVM_DUMMY_PAGE_FAULT_ADDR = 0x0507; +constexpr unsigned int mmVM_DUMMY_PAGE_FAULT_CNTL = 0x0506; +constexpr unsigned int mmVM_FAULT_CLIENT_ID = 0x054E; +constexpr unsigned int mmVM_INVALIDATE_REQUEST = 0x051E; +constexpr unsigned int mmVM_INVALIDATE_RESPONSE = 0x051F; +constexpr unsigned int mmVM_L2_BANK_SELECT_MASKA = 0x0572; +constexpr unsigned int mmVM_L2_BANK_SELECT_MASKB = 0x0573; +constexpr unsigned int mmVM_L2_CG = 0x0570; +constexpr unsigned int mmVM_L2_CNTL = 0x0500; +constexpr unsigned int mmVM_L2_CNTL2 = 0x0501; +constexpr unsigned int mmVM_L2_CNTL3 = 0x0502; +constexpr unsigned int mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR = 0x0576; +constexpr unsigned int mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR = 0x0575; +constexpr unsigned int mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET = 0x0577; +constexpr unsigned int mmVM_L2_STATUS = 0x0503; +constexpr unsigned int mmVM_PRT_APERTURE0_HIGH_ADDR = 0x0530; +constexpr unsigned int mmVM_PRT_APERTURE0_LOW_ADDR = 0x052C; +constexpr unsigned int mmVM_PRT_APERTURE1_HIGH_ADDR = 0x0531; +constexpr unsigned int mmVM_PRT_APERTURE1_LOW_ADDR = 0x052D; +constexpr unsigned int mmVM_PRT_APERTURE2_HIGH_ADDR = 0x0532; +constexpr unsigned int mmVM_PRT_APERTURE2_LOW_ADDR = 0x052E; +constexpr unsigned int mmVM_PRT_APERTURE3_HIGH_ADDR = 0x0533; +constexpr unsigned int mmVM_PRT_APERTURE3_LOW_ADDR = 0x052F; +constexpr unsigned int mmVM_PRT_CNTL = 0x0534; +constexpr unsigned int mmWD_CNTL_STATUS__CI__VI = 0x223F; +constexpr unsigned int mmWD_DEBUG_CNTL__CI__VI = 0x223D; +constexpr unsigned int mmWD_DEBUG_DATA__CI__VI = 0x223E; +constexpr unsigned int mmWD_ENHANCE__CI__VI = 0xA2A0; +constexpr unsigned int mmWD_PERFCOUNTER0_HI__CI__VI = 0xD081; +constexpr unsigned int mmWD_PERFCOUNTER0_LO__CI__VI = 0xD080; +constexpr unsigned int mmWD_PERFCOUNTER0_SELECT__CI__VI = 0xD880; +constexpr unsigned int mmWD_PERFCOUNTER1_HI__CI__VI = 0xD083; +constexpr unsigned int mmWD_PERFCOUNTER1_LO__CI__VI = 0xD082; +constexpr unsigned int mmWD_PERFCOUNTER1_SELECT__CI__VI = 0xD881; +constexpr unsigned int mmWD_PERFCOUNTER2_HI__CI__VI = 0xD085; +constexpr unsigned int mmWD_PERFCOUNTER2_LO__CI__VI = 0xD084; +constexpr unsigned int mmWD_PERFCOUNTER2_SELECT__CI__VI = 0xD882; +constexpr unsigned int mmWD_PERFCOUNTER3_HI__CI__VI = 0xD087; +constexpr unsigned int mmWD_PERFCOUNTER3_LO__CI__VI = 0xD086; +constexpr unsigned int mmWD_PERFCOUNTER3_SELECT__CI__VI = 0xD883; +constexpr unsigned int mmXDMA_SLV_FLIP_PENDING__CI__VI = 0x046C; +constexpr unsigned int mmXDMA_SLV_FLIP_PENDING__SI = 0x0407; +constexpr unsigned int pciADAPTER_ID = 0x000B; +constexpr unsigned int pciADAPTER_ID_W = 0x0013; +constexpr unsigned int pciBASE_ADDR_1 = 0x0004; +constexpr unsigned int pciBASE_ADDR_2 = 0x0005; +constexpr unsigned int pciBASE_ADDR_3 = 0x0006; +constexpr unsigned int pciBASE_ADDR_4 = 0x0007; +constexpr unsigned int pciBASE_ADDR_5 = 0x0008; +constexpr unsigned int pciBASE_ADDR_6 = 0x0009; +constexpr unsigned int pciBASE_CLASS = 0x0002; +constexpr unsigned int pciBIST = 0x0003; +constexpr unsigned int pciCACHE_LINE = 0x0003; +constexpr unsigned int pciCAP_PTR = 0x000D; +constexpr unsigned int pciCOMMAND = 0x0001; +constexpr unsigned int pciDEVICE_CAP = 0x0017; +constexpr unsigned int pciDEVICE_CAP2 = 0x001F; +constexpr unsigned int pciDEVICE_CNTL = 0x0018; +constexpr unsigned int pciDEVICE_CNTL2 = 0x0020; +constexpr unsigned int pciDEVICE_ID = 0x0000; +constexpr unsigned int pciDEVICE_STATUS = 0x0018; +constexpr unsigned int pciDEVICE_STATUS2 = 0x0020; +constexpr unsigned int pciHEADER = 0x0003; +constexpr unsigned int pciINTERRUPT_LINE = 0x000F; +constexpr unsigned int pciINTERRUPT_PIN = 0x000F; +constexpr unsigned int pciLATENCY = 0x0003; +constexpr unsigned int pciLINK_CAP = 0x0019; +constexpr unsigned int pciLINK_CAP2 = 0x0021; +constexpr unsigned int pciLINK_CNTL = 0x001A; +constexpr unsigned int pciLINK_CNTL2 = 0x0022; +constexpr unsigned int pciLINK_STATUS = 0x001A; +constexpr unsigned int pciLINK_STATUS2 = 0x0022; +constexpr unsigned int pciMAX_LATENCY = 0x000F; +constexpr unsigned int pciMIN_GRANT = 0x000F; +constexpr unsigned int pciMSI_CAP_LIST = 0x0028; +constexpr unsigned int pciMSI_MSG_ADDR_HI = 0x002A; +constexpr unsigned int pciMSI_MSG_ADDR_LO = 0x0029; +constexpr unsigned int pciMSI_MSG_CNTL = 0x0028; +constexpr unsigned int pciMSI_MSG_DATA = 0x002A; +constexpr unsigned int pciMSI_MSG_DATA_64 = 0x002B; +constexpr unsigned int pciPCIE_ACS_CAP__CI__VI = 0x00A9; +constexpr unsigned int pciPCIE_ACS_CNTL__CI__VI = 0x00A9; +constexpr unsigned int pciPCIE_ACS_ENH_CAP_LIST__CI__VI = 0x00A8; +constexpr unsigned int pciPCIE_ADV_ERR_CAP_CNTL = 0x005A; +constexpr unsigned int pciPCIE_ADV_ERR_RPT_ENH_CAP_LIST = 0x0054; +constexpr unsigned int pciPCIE_ATS_CAP__CI__VI = 0x00AD; +constexpr unsigned int pciPCIE_ATS_CNTL__CI__VI = 0x00AD; +constexpr unsigned int pciPCIE_ATS_ENH_CAP_LIST__CI__VI = 0x00AC; +constexpr unsigned int pciPCIE_BAR1_CAP__CI__VI = 0x0081; +constexpr unsigned int pciPCIE_BAR1_CNTL__CI__VI = 0x0082; +constexpr unsigned int pciPCIE_BAR2_CAP__CI__VI = 0x0083; +constexpr unsigned int pciPCIE_BAR2_CNTL__CI__VI = 0x0084; +constexpr unsigned int pciPCIE_BAR3_CAP__CI__VI = 0x0085; +constexpr unsigned int pciPCIE_BAR3_CNTL__CI__VI = 0x0086; +constexpr unsigned int pciPCIE_BAR4_CAP__CI__VI = 0x0087; +constexpr unsigned int pciPCIE_BAR4_CNTL__CI__VI = 0x0088; +constexpr unsigned int pciPCIE_BAR5_CAP__CI__VI = 0x0089; +constexpr unsigned int pciPCIE_BAR5_CNTL__CI__VI = 0x008A; +constexpr unsigned int pciPCIE_BAR6_CAP__CI__VI = 0x008B; +constexpr unsigned int pciPCIE_BAR6_CNTL__CI__VI = 0x008C; +constexpr unsigned int pciPCIE_BAR_ENH_CAP_LIST__CI__VI = 0x0080; +constexpr unsigned int pciPCIE_CAP = 0x0016; +constexpr unsigned int pciPCIE_CAP_LIST = 0x0016; +constexpr unsigned int pciPCIE_CORR_ERR_MASK = 0x0059; +constexpr unsigned int pciPCIE_CORR_ERR_STATUS = 0x0058; +constexpr unsigned int pciPCIE_DEV_SERIAL_NUM_DW1 = 0x0051; +constexpr unsigned int pciPCIE_DEV_SERIAL_NUM_DW2 = 0x0052; +constexpr unsigned int pciPCIE_DEV_SERIAL_NUM_ENH_CAP_LIST = 0x0050; +constexpr unsigned int pciPCIE_DPA_CAP__CI__VI = 0x0095; +constexpr unsigned int pciPCIE_DPA_CNTL__CI__VI = 0x0097; +constexpr unsigned int pciPCIE_DPA_ENH_CAP_LIST__CI__VI = 0x0094; +constexpr unsigned int pciPCIE_DPA_LATENCY_INDICATOR__CI__VI = 0x0096; +constexpr unsigned int pciPCIE_DPA_STATUS__CI__VI = 0x0097; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_0__CI__VI = 0x0098; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_1__CI__VI = 0x0098; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_2__CI__VI = 0x0098; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_3__CI__VI = 0x0098; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_4__CI__VI = 0x0099; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_5__CI__VI = 0x0099; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_6__CI__VI = 0x0099; +constexpr unsigned int pciPCIE_DPA_SUBSTATE_PWR_ALLOC_7__CI__VI = 0x0099; +constexpr unsigned int pciPCIE_HDR_LOG0 = 0x005B; +constexpr unsigned int pciPCIE_HDR_LOG1 = 0x005C; +constexpr unsigned int pciPCIE_HDR_LOG2 = 0x005D; +constexpr unsigned int pciPCIE_HDR_LOG3 = 0x005E; +constexpr unsigned int pciPCIE_LANE_0_EQUALIZATION_CNTL__CI__VI = 0x009F; +constexpr unsigned int pciPCIE_LANE_10_EQUALIZATION_CNTL__CI__VI = 0x00A4; +constexpr unsigned int pciPCIE_LANE_11_EQUALIZATION_CNTL__CI__VI = 0x00A4; +constexpr unsigned int pciPCIE_LANE_12_EQUALIZATION_CNTL__CI__VI = 0x00A5; +constexpr unsigned int pciPCIE_LANE_13_EQUALIZATION_CNTL__CI__VI = 0x00A5; +constexpr unsigned int pciPCIE_LANE_14_EQUALIZATION_CNTL__CI__VI = 0x00A6; +constexpr unsigned int pciPCIE_LANE_15_EQUALIZATION_CNTL__CI__VI = 0x00A6; +constexpr unsigned int pciPCIE_LANE_1_EQUALIZATION_CNTL__CI__VI = 0x009F; +constexpr unsigned int pciPCIE_LANE_2_EQUALIZATION_CNTL__CI__VI = 0x00A0; +constexpr unsigned int pciPCIE_LANE_3_EQUALIZATION_CNTL__CI__VI = 0x00A0; +constexpr unsigned int pciPCIE_LANE_4_EQUALIZATION_CNTL__CI__VI = 0x00A1; +constexpr unsigned int pciPCIE_LANE_5_EQUALIZATION_CNTL__CI__VI = 0x00A1; +constexpr unsigned int pciPCIE_LANE_6_EQUALIZATION_CNTL__CI__VI = 0x00A2; +constexpr unsigned int pciPCIE_LANE_7_EQUALIZATION_CNTL__CI__VI = 0x00A2; +constexpr unsigned int pciPCIE_LANE_8_EQUALIZATION_CNTL__CI__VI = 0x00A3; +constexpr unsigned int pciPCIE_LANE_9_EQUALIZATION_CNTL__CI__VI = 0x00A3; +constexpr unsigned int pciPCIE_LANE_ERROR_STATUS__CI__VI = 0x009E; +constexpr unsigned int pciPCIE_LINK_CNTL3__CI__VI = 0x009D; +constexpr unsigned int pciPCIE_OUTSTAND_PAGE_REQ_ALLOC__CI__VI = 0x00B3; +constexpr unsigned int pciPCIE_OUTSTAND_PAGE_REQ_CAPACITY__CI__VI = 0x00B2; +constexpr unsigned int pciPCIE_PAGE_REQ_CNTL__CI__VI = 0x00B1; +constexpr unsigned int pciPCIE_PAGE_REQ_ENH_CAP_LIST__CI__VI = 0x00B0; +constexpr unsigned int pciPCIE_PAGE_REQ_STATUS__CI__VI = 0x00B1; +constexpr unsigned int pciPCIE_PASID_CAP__CI__VI = 0x00B5; +constexpr unsigned int pciPCIE_PASID_CNTL__CI__VI = 0x00B5; +constexpr unsigned int pciPCIE_PASID_ENH_CAP_LIST__CI__VI = 0x00B4; +constexpr unsigned int pciPCIE_PORT_VC_CAP_REG1 = 0x0045; +constexpr unsigned int pciPCIE_PORT_VC_CAP_REG2 = 0x0046; +constexpr unsigned int pciPCIE_PORT_VC_CNTL = 0x0047; +constexpr unsigned int pciPCIE_PORT_VC_STATUS = 0x0047; +constexpr unsigned int pciPCIE_PWR_BUDGET_CAP__CI__VI = 0x0093; +constexpr unsigned int pciPCIE_PWR_BUDGET_DATA_SELECT__CI__VI = 0x0091; +constexpr unsigned int pciPCIE_PWR_BUDGET_DATA__CI__VI = 0x0092; +constexpr unsigned int pciPCIE_PWR_BUDGET_ENH_CAP_LIST__CI__VI = 0x0090; +constexpr unsigned int pciPCIE_SECONDARY_ENH_CAP_LIST__CI__VI = 0x009C; +constexpr unsigned int pciPCIE_TLP_PREFIX_LOG0__CI__VI = 0x0062; +constexpr unsigned int pciPCIE_TLP_PREFIX_LOG1__CI__VI = 0x0063; +constexpr unsigned int pciPCIE_TLP_PREFIX_LOG2__CI__VI = 0x0064; +constexpr unsigned int pciPCIE_TLP_PREFIX_LOG3__CI__VI = 0x0065; +constexpr unsigned int pciPCIE_UNCORR_ERR_MASK = 0x0056; +constexpr unsigned int pciPCIE_UNCORR_ERR_SEVERITY = 0x0057; +constexpr unsigned int pciPCIE_UNCORR_ERR_STATUS = 0x0055; +constexpr unsigned int pciPCIE_VC0_RESOURCE_CAP = 0x0048; +constexpr unsigned int pciPCIE_VC0_RESOURCE_CNTL = 0x0049; +constexpr unsigned int pciPCIE_VC0_RESOURCE_STATUS = 0x004A; +constexpr unsigned int pciPCIE_VC1_RESOURCE_CAP = 0x004B; +constexpr unsigned int pciPCIE_VC1_RESOURCE_CNTL = 0x004C; +constexpr unsigned int pciPCIE_VC1_RESOURCE_STATUS = 0x004D; +constexpr unsigned int pciPCIE_VC_ENH_CAP_LIST = 0x0044; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC1 = 0x0042; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC2 = 0x0043; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC_ENH_CAP_LIST = 0x0040; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC_HDR = 0x0041; +constexpr unsigned int pciPMI_CAP = 0x0014; +constexpr unsigned int pciPMI_CAP_LIST = 0x0014; +constexpr unsigned int pciPMI_STATUS_CNTL = 0x0015; +constexpr unsigned int pciPROG_INTERFACE = 0x0002; +constexpr unsigned int pciREVISION_ID = 0x0002; +constexpr unsigned int pciROM_BASE_ADDR = 0x000C; +constexpr unsigned int pciSTATUS = 0x0001; +constexpr unsigned int pciSUB_CLASS = 0x0002; +constexpr unsigned int pciVENDOR_CAP_LIST__CI__VI = 0x0012; +constexpr unsigned int pciVENDOR_ID = 0x0000; + +//Merged Defines + +constexpr unsigned int cfgMSI_MASK__VI = 0x002B; +constexpr unsigned int cfgMSI_MASK_64__VI = 0x002C; +constexpr unsigned int cfgMSI_PENDING__VI = 0x002C; +constexpr unsigned int cfgMSI_PENDING_64__VI = 0x002D; +constexpr unsigned int cfgPCIE_ARI_CAP__VI = 0x00CB; +constexpr unsigned int cfgPCIE_ARI_CNTL__VI = 0x00CB; +constexpr unsigned int cfgPCIE_ARI_ENH_CAP_LIST__VI = 0x00CA; +constexpr unsigned int cfgPCIE_LTR_CAP__VI = 0x00C9; +constexpr unsigned int cfgPCIE_LTR_ENH_CAP_LIST__VI = 0x00C8; +constexpr unsigned int cfgPCIE_MC_ADDR0__VI = 0x00BE; +constexpr unsigned int cfgPCIE_MC_ADDR1__VI = 0x00BF; +constexpr unsigned int cfgPCIE_MC_BLOCK_ALL0__VI = 0x00C2; +constexpr unsigned int cfgPCIE_MC_BLOCK_ALL1__VI = 0x00C3; +constexpr unsigned int cfgPCIE_MC_BLOCK_UNTRANSLATED_0__VI = 0x00C4; +constexpr unsigned int cfgPCIE_MC_BLOCK_UNTRANSLATED_1__VI = 0x00C5; +constexpr unsigned int cfgPCIE_MC_CAP__VI = 0x00BD; +constexpr unsigned int cfgPCIE_MC_CNTL__VI = 0x00BD; +constexpr unsigned int cfgPCIE_MC_ENH_CAP_LIST__VI = 0x00BC; +constexpr unsigned int cfgPCIE_MC_RCV0__VI = 0x00C0; +constexpr unsigned int cfgPCIE_MC_RCV1__VI = 0x00C1; +constexpr unsigned int cfgPCIE_SRIOV_CAP__VI = 0x00CD; +constexpr unsigned int cfgPCIE_SRIOV_CONTROL__VI = 0x00CE; +constexpr unsigned int cfgPCIE_SRIOV_ENH_CAP_LIST__VI = 0x00CC; +constexpr unsigned int cfgPCIE_SRIOV_FIRST_VF_OFFSET__VI = 0x00D1; +constexpr unsigned int cfgPCIE_SRIOV_FUNC_DEP_LINK__VI = 0x00D0; +constexpr unsigned int cfgPCIE_SRIOV_INITIAL_VFS__VI = 0x00CF; +constexpr unsigned int cfgPCIE_SRIOV_NUM_VFS__VI = 0x00D0; +constexpr unsigned int cfgPCIE_SRIOV_STATUS__VI = 0x00CE; +constexpr unsigned int cfgPCIE_SRIOV_SUPPORTED_PAGE_SIZE__VI = 0x00D3; +constexpr unsigned int cfgPCIE_SRIOV_SYSTEM_PAGE_SIZE__VI = 0x00D4; +constexpr unsigned int cfgPCIE_SRIOV_TOTAL_VFS__VI = 0x00CF; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_0__VI = 0x00D5; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_1__VI = 0x00D6; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_2__VI = 0x00D7; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_3__VI = 0x00D8; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_4__VI = 0x00D9; +constexpr unsigned int cfgPCIE_SRIOV_VF_BASE_ADDR_5__VI = 0x00DA; +constexpr unsigned int cfgPCIE_SRIOV_VF_DEVICE_ID__VI = 0x00D2; +constexpr unsigned int cfgPCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET__VI = 0x00DB; +constexpr unsigned int cfgPCIE_SRIOV_VF_STRIDE__VI = 0x00D1; +constexpr unsigned int cfgPCIE_TPH_REQR_CAP__VI = 0x00B9; +constexpr unsigned int cfgPCIE_TPH_REQR_CNTL__VI = 0x00BA; +constexpr unsigned int cfgPCIE_TPH_REQR_ENH_CAP_LIST__VI = 0x00B8; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV__VI = 0x0100; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC_HDR_GPUIOV__VI = 0x0101; +constexpr unsigned int cfgPCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL__VI = 0x0105; +constexpr unsigned int mmAFMT_60958_0__VI = 0x4A38; +constexpr unsigned int mmAFMT_60958_1__VI = 0x4A39; +constexpr unsigned int mmAFMT_60958_2__VI = 0x4A3F; +constexpr unsigned int mmAFMT_AUDIO_CRC_CONTROL__VI = 0x4A3A; +constexpr unsigned int mmAFMT_AUDIO_CRC_RESULT__VI = 0x4A40; +constexpr unsigned int mmAFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4A46; +constexpr unsigned int mmAFMT_AUDIO_INFO0__VI = 0x4A36; +constexpr unsigned int mmAFMT_AUDIO_INFO1__VI = 0x4A37; +constexpr unsigned int mmAFMT_AUDIO_PACKET_CONTROL__VI = 0x4A42; +constexpr unsigned int mmAFMT_AUDIO_PACKET_CONTROL2__VI = 0x4A14; +constexpr unsigned int mmAFMT_AUDIO_SRC_CONTROL__VI = 0x4A45; +constexpr unsigned int mmAFMT_AVI_INFO0__VI = 0x4A1E; +constexpr unsigned int mmAFMT_AVI_INFO1__VI = 0x4A1F; +constexpr unsigned int mmAFMT_AVI_INFO2__VI = 0x4A20; +constexpr unsigned int mmAFMT_AVI_INFO3__VI = 0x4A21; +constexpr unsigned int mmAFMT_GENERIC_0__VI = 0x4A25; +constexpr unsigned int mmAFMT_GENERIC_1__VI = 0x4A26; +constexpr unsigned int mmAFMT_GENERIC_2__VI = 0x4A27; +constexpr unsigned int mmAFMT_GENERIC_3__VI = 0x4A28; +constexpr unsigned int mmAFMT_GENERIC_4__VI = 0x4A29; +constexpr unsigned int mmAFMT_GENERIC_5__VI = 0x4A2A; +constexpr unsigned int mmAFMT_GENERIC_6__VI = 0x4A2B; +constexpr unsigned int mmAFMT_GENERIC_7__VI = 0x4A2C; +constexpr unsigned int mmAFMT_GENERIC_HDR__VI = 0x4A24; +constexpr unsigned int mmAFMT_INFOFRAME_CONTROL0__VI = 0x4A44; +constexpr unsigned int mmAFMT_ISRC1_0__VI = 0x4A15; +constexpr unsigned int mmAFMT_ISRC1_1__VI = 0x4A16; +constexpr unsigned int mmAFMT_ISRC1_2__VI = 0x4A17; +constexpr unsigned int mmAFMT_ISRC1_3__VI = 0x4A18; +constexpr unsigned int mmAFMT_ISRC1_4__VI = 0x4A19; +constexpr unsigned int mmAFMT_ISRC2_0__VI = 0x4A1A; +constexpr unsigned int mmAFMT_ISRC2_1__VI = 0x4A1B; +constexpr unsigned int mmAFMT_ISRC2_2__VI = 0x4A1C; +constexpr unsigned int mmAFMT_ISRC2_3__VI = 0x4A1D; +constexpr unsigned int mmAFMT_MPEG_INFO0__VI = 0x4A22; +constexpr unsigned int mmAFMT_MPEG_INFO1__VI = 0x4A23; +constexpr unsigned int mmAFMT_RAMP_CONTROL0__VI = 0x4A3B; +constexpr unsigned int mmAFMT_RAMP_CONTROL1__VI = 0x4A3C; +constexpr unsigned int mmAFMT_RAMP_CONTROL2__VI = 0x4A3D; +constexpr unsigned int mmAFMT_RAMP_CONTROL3__VI = 0x4A3E; +constexpr unsigned int mmAFMT_STATUS__VI = 0x4A41; +constexpr unsigned int mmAFMT_VBI_PACKET_CONTROL__VI = 0x4A43; +constexpr unsigned int mmALPHA_CONTROL__VI = 0x1ABC; +constexpr unsigned int mmATC_ATS_FAULT_STATUS_INFO2__VI = 0x0CD2; +constexpr unsigned int mmATC_ATS_SMU_STATUS__VI = 0x0D08; +constexpr unsigned int mmATC_ATS_VMID_STATUS__VI = 0x0D07; +constexpr unsigned int mmATC_L1RD_DEBUG2_TLB__VI = 0x0CE2; +constexpr unsigned int mmATC_L1WR_DEBUG2_TLB__VI = 0x0CE3; +constexpr unsigned int mmATC_L2_CACHE_DATA0__VI = 0x0CD9; +constexpr unsigned int mmATC_L2_CACHE_DATA1__VI = 0x0CDA; +constexpr unsigned int mmATC_L2_CACHE_DATA2__VI = 0x0CDB; +constexpr unsigned int mmATC_L2_CNTL3__VI = 0x0D08; +constexpr unsigned int mmATC_L2_STATUS__VI = 0x0D09; +constexpr unsigned int mmATC_L2_STATUS2__VI = 0x0D0A; +constexpr unsigned int mmAUXN_IMPCAL__VI = 0x483C; +constexpr unsigned int mmAUXP_IMPCAL__VI = 0x483B; +constexpr unsigned int mmAUX_ARB_CONTROL__VI = 0x5C02; +constexpr unsigned int mmAUX_CONTROL__VI = 0x5C00; +constexpr unsigned int mmAUX_DPHY_RX_CONTROL0__VI = 0x5C0A; +constexpr unsigned int mmAUX_DPHY_RX_CONTROL1__VI = 0x5C0B; +constexpr unsigned int mmAUX_DPHY_RX_STATUS__VI = 0x5C0D; +constexpr unsigned int mmAUX_DPHY_TX_CONTROL__VI = 0x5C09; +constexpr unsigned int mmAUX_DPHY_TX_REF_CONTROL__VI = 0x5C08; +constexpr unsigned int mmAUX_DPHY_TX_STATUS__VI = 0x5C0C; +constexpr unsigned int mmAUX_GTC_SYNC_CONTROL__VI = 0x5C0E; +constexpr unsigned int mmAUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C10; +constexpr unsigned int mmAUX_GTC_SYNC_DATA__VI = 0x5C12; +constexpr unsigned int mmAUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C0F; +constexpr unsigned int mmAUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C13; +constexpr unsigned int mmAUX_GTC_SYNC_STATUS__VI = 0x5C11; +constexpr unsigned int mmAUX_INTERRUPT_CONTROL__VI = 0x5C03; +constexpr unsigned int mmAUX_LS_DATA__VI = 0x5C07; +constexpr unsigned int mmAUX_LS_STATUS__VI = 0x5C05; +constexpr unsigned int mmAUX_SW_CONTROL__VI = 0x5C01; +constexpr unsigned int mmAUX_SW_DATA__VI = 0x5C06; +constexpr unsigned int mmAUX_SW_STATUS__VI = 0x5C04; +constexpr unsigned int mmAUX_TEST_DEBUG_DATA__VI = 0x5C15; +constexpr unsigned int mmAUX_TEST_DEBUG_INDEX__VI = 0x5C14; +constexpr unsigned int mmAVSYNC_COUNTER_CONTROL__VI = 0x012B; +constexpr unsigned int mmAVSYNC_COUNTER_READ__VI = 0x012F; +constexpr unsigned int mmAVSYNC_COUNTER_WRITE__VI = 0x012A; +constexpr unsigned int mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER__VI = 0x17F3; +constexpr unsigned int mmAZALIA_AUDIO_DTO__VI = 0x17E5; +constexpr unsigned int mmAZALIA_AUDIO_DTO_CONTROL__VI = 0x17E6; +constexpr unsigned int mmAZALIA_BDL_DMA_CONTROL__VI = 0x17EA; +constexpr unsigned int mmAZALIA_CONTROLLER_CLOCK_GATING__VI = 0x17E4; +constexpr unsigned int mmAZALIA_CONTROLLER_DEBUG__VI = 0x17F9; +constexpr unsigned int mmAZALIA_CORB_DMA_CONTROL__VI = 0x17EC; +constexpr unsigned int mmAZALIA_CRC0_CONTROL0__VI = 0x1805; +constexpr unsigned int mmAZALIA_CRC0_CONTROL1__VI = 0x1806; +constexpr unsigned int mmAZALIA_CRC0_CONTROL2__VI = 0x1807; +constexpr unsigned int mmAZALIA_CRC0_CONTROL3__VI = 0x1808; +constexpr unsigned int mmAZALIA_CRC0_RESULT__VI = 0x1809; +constexpr unsigned int mmAZALIA_CRC1_CONTROL0__VI = 0x180A; +constexpr unsigned int mmAZALIA_CRC1_CONTROL1__VI = 0x180B; +constexpr unsigned int mmAZALIA_CRC1_CONTROL2__VI = 0x180C; +constexpr unsigned int mmAZALIA_CRC1_CONTROL3__VI = 0x180D; +constexpr unsigned int mmAZALIA_CRC1_RESULT__VI = 0x180E; +constexpr unsigned int mmAZALIA_CYCLIC_BUFFER_SYNC__VI = 0x17F4; +constexpr unsigned int mmAZALIA_DATA_DMA_CONTROL__VI = 0x17E9; +constexpr unsigned int mmAZALIA_F0_CODEC_CHANNEL_COUNT_CONTROL__VI = 0x182A; +constexpr unsigned int mmAZALIA_F0_CODEC_DEBUG__VI = 0x1836; +constexpr unsigned int mmAZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17A9; +constexpr unsigned int mmAZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17A8; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION__VI = 0x1833; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE__VI = 0x1830; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET__VI = 0x1831; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID__VI = 0x1832; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE__VI = 0x182C; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES__VI = 0x182F; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS__VI = 0x182E; +constexpr unsigned int mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES__VI = 0x182D; +constexpr unsigned int mmAZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59D5; +constexpr unsigned int mmAZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59D4; +constexpr unsigned int mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL__VI = 0x182B; +constexpr unsigned int mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID__VI = 0x1829; +constexpr unsigned int mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID__VI = 0x1828; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET0__VI = 0x1837; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET1__VI = 0x1838; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET2__VI = 0x1839; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET3__VI = 0x183A; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET4__VI = 0x183B; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET5__VI = 0x183C; +constexpr unsigned int mmAZALIA_F0_GTC_GROUP_OFFSET6__VI = 0x183D; +constexpr unsigned int mmAZALIA_GLOBAL_CAPABILITIES__VI = 0x17F5; +constexpr unsigned int mmAZALIA_INPUT_CRC0_CONTROL0__VI = 0x17FB; +constexpr unsigned int mmAZALIA_INPUT_CRC0_CONTROL1__VI = 0x17FC; +constexpr unsigned int mmAZALIA_INPUT_CRC0_CONTROL2__VI = 0x17FD; +constexpr unsigned int mmAZALIA_INPUT_CRC0_CONTROL3__VI = 0x17FE; +constexpr unsigned int mmAZALIA_INPUT_CRC0_RESULT__VI = 0x17FF; +constexpr unsigned int mmAZALIA_INPUT_CRC1_CONTROL0__VI = 0x1800; +constexpr unsigned int mmAZALIA_INPUT_CRC1_CONTROL1__VI = 0x1801; +constexpr unsigned int mmAZALIA_INPUT_CRC1_CONTROL2__VI = 0x1802; +constexpr unsigned int mmAZALIA_INPUT_CRC1_CONTROL3__VI = 0x1803; +constexpr unsigned int mmAZALIA_INPUT_CRC1_RESULT__VI = 0x1804; +constexpr unsigned int mmAZALIA_INPUT_PAYLOAD_CAPABILITY__VI = 0x17F8; +constexpr unsigned int mmAZALIA_MEM_PWR_CTRL__VI = 0x1810; +constexpr unsigned int mmAZALIA_MEM_PWR_STATUS__VI = 0x1811; +constexpr unsigned int mmAZALIA_OUTPUT_PAYLOAD_CAPABILITY__VI = 0x17F6; +constexpr unsigned int mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL__VI = 0x17F7; +constexpr unsigned int mmAZALIA_RIRB_AND_DP_CONTROL__VI = 0x17EB; +constexpr unsigned int mmAZALIA_SCLK_CONTROL__VI = 0x17E7; +constexpr unsigned int mmAZALIA_STREAM_DATA__VI = 0x1781; +constexpr unsigned int mmAZALIA_STREAM_INDEX__VI = 0x1780; +constexpr unsigned int mmAZALIA_UNDERFLOW_FILLER_SAMPLE__VI = 0x17E8; +constexpr unsigned int mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17A9; +constexpr unsigned int mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17A8; +constexpr unsigned int mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17AD; +constexpr unsigned int mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17AC; +constexpr unsigned int mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17B1; +constexpr unsigned int mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17B0; +constexpr unsigned int mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17B5; +constexpr unsigned int mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17B4; +constexpr unsigned int mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17B9; +constexpr unsigned int mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17B8; +constexpr unsigned int mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17BD; +constexpr unsigned int mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17BC; +constexpr unsigned int mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17C1; +constexpr unsigned int mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17C0; +constexpr unsigned int mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_DATA__VI = 0x17C5; +constexpr unsigned int mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_INDEX__VI = 0x17C4; +constexpr unsigned int mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59D5; +constexpr unsigned int mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59D4; +constexpr unsigned int mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59D9; +constexpr unsigned int mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59D8; +constexpr unsigned int mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59DD; +constexpr unsigned int mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59DC; +constexpr unsigned int mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59E1; +constexpr unsigned int mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59E0; +constexpr unsigned int mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59E5; +constexpr unsigned int mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59E4; +constexpr unsigned int mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59E9; +constexpr unsigned int mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59E8; +constexpr unsigned int mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59ED; +constexpr unsigned int mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59EC; +constexpr unsigned int mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA__VI = 0x59F1; +constexpr unsigned int mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX__VI = 0x59F0; +constexpr unsigned int mmAZF0STREAM0_AZALIA_STREAM_DATA__VI = 0x1781; +constexpr unsigned int mmAZF0STREAM0_AZALIA_STREAM_INDEX__VI = 0x1780; +constexpr unsigned int mmAZF0STREAM10_AZALIA_STREAM_DATA__VI = 0x59C5; +constexpr unsigned int mmAZF0STREAM10_AZALIA_STREAM_INDEX__VI = 0x59C4; +constexpr unsigned int mmAZF0STREAM11_AZALIA_STREAM_DATA__VI = 0x59C7; +constexpr unsigned int mmAZF0STREAM11_AZALIA_STREAM_INDEX__VI = 0x59C6; +constexpr unsigned int mmAZF0STREAM12_AZALIA_STREAM_DATA__VI = 0x59C9; +constexpr unsigned int mmAZF0STREAM12_AZALIA_STREAM_INDEX__VI = 0x59C8; +constexpr unsigned int mmAZF0STREAM13_AZALIA_STREAM_DATA__VI = 0x59CB; +constexpr unsigned int mmAZF0STREAM13_AZALIA_STREAM_INDEX__VI = 0x59CA; +constexpr unsigned int mmAZF0STREAM14_AZALIA_STREAM_DATA__VI = 0x59CD; +constexpr unsigned int mmAZF0STREAM14_AZALIA_STREAM_INDEX__VI = 0x59CC; +constexpr unsigned int mmAZF0STREAM15_AZALIA_STREAM_DATA__VI = 0x59CF; +constexpr unsigned int mmAZF0STREAM15_AZALIA_STREAM_INDEX__VI = 0x59CE; +constexpr unsigned int mmAZF0STREAM1_AZALIA_STREAM_DATA__VI = 0x1783; +constexpr unsigned int mmAZF0STREAM1_AZALIA_STREAM_INDEX__VI = 0x1782; +constexpr unsigned int mmAZF0STREAM2_AZALIA_STREAM_DATA__VI = 0x1785; +constexpr unsigned int mmAZF0STREAM2_AZALIA_STREAM_INDEX__VI = 0x1784; +constexpr unsigned int mmAZF0STREAM3_AZALIA_STREAM_DATA__VI = 0x1787; +constexpr unsigned int mmAZF0STREAM3_AZALIA_STREAM_INDEX__VI = 0x1786; +constexpr unsigned int mmAZF0STREAM4_AZALIA_STREAM_DATA__VI = 0x1789; +constexpr unsigned int mmAZF0STREAM4_AZALIA_STREAM_INDEX__VI = 0x1788; +constexpr unsigned int mmAZF0STREAM5_AZALIA_STREAM_DATA__VI = 0x178B; +constexpr unsigned int mmAZF0STREAM5_AZALIA_STREAM_INDEX__VI = 0x178A; +constexpr unsigned int mmAZF0STREAM6_AZALIA_STREAM_DATA__VI = 0x178D; +constexpr unsigned int mmAZF0STREAM6_AZALIA_STREAM_INDEX__VI = 0x178C; +constexpr unsigned int mmAZF0STREAM7_AZALIA_STREAM_DATA__VI = 0x178F; +constexpr unsigned int mmAZF0STREAM7_AZALIA_STREAM_INDEX__VI = 0x178E; +constexpr unsigned int mmAZF0STREAM8_AZALIA_STREAM_DATA__VI = 0x59C1; +constexpr unsigned int mmAZF0STREAM8_AZALIA_STREAM_INDEX__VI = 0x59C0; +constexpr unsigned int mmAZF0STREAM9_AZALIA_STREAM_DATA__VI = 0x59C3; +constexpr unsigned int mmAZF0STREAM9_AZALIA_STREAM_INDEX__VI = 0x59C2; +constexpr unsigned int mmAZ_TEST_DEBUG_DATA__VI = 0x1820; +constexpr unsigned int mmAZ_TEST_DEBUG_INDEX__VI = 0x181F; +constexpr unsigned int mmBF_ANA_ISO_CNTL__VI = 0x14C7; +constexpr unsigned int mmBIF_ATOMIC_ERR_LOG__VI = 0x1512; +constexpr unsigned int mmBIF_BME_STATUS__VI = 0x1511; +constexpr unsigned int mmBIF_CLK_CTRL__VI = 0x14C5; +constexpr unsigned int mmBIF_DOORBELL_APER_EN__VI = 0x1501; +constexpr unsigned int mmBIF_DOORBELL_GBLAPER1_LOWER__VI = 0x14FC; +constexpr unsigned int mmBIF_DOORBELL_GBLAPER1_UPPER__VI = 0x14FD; +constexpr unsigned int mmBIF_DOORBELL_GBLAPER2_LOWER__VI = 0x14FE; +constexpr unsigned int mmBIF_DOORBELL_GBLAPER2_UPPER__VI = 0x14FF; +constexpr unsigned int mmBIF_GPUIOV_FB_TOTAL_FB_INFO__VI = 0x14D8; +constexpr unsigned int mmBIF_GPUIOV_RESET_NOTIFICATION__VI = 0x14D5; +constexpr unsigned int mmBIF_GPUIOV_VM_INIT_STATUS__VI = 0x14D6; +constexpr unsigned int mmBIF_IOV_FUNC_IDENTIFIER__VI = 0x1503; +constexpr unsigned int mmBIF_MM_INDACCESS_CNTL__VI = 0x1500; +constexpr unsigned int mmBIF_MST_TRANS_PENDING__VI = 0x14EA; +constexpr unsigned int mmBIF_RB_BASE__VI = 0x1531; +constexpr unsigned int mmBIF_RB_CNTL__VI = 0x1530; +constexpr unsigned int mmBIF_RB_RPTR__VI = 0x1532; +constexpr unsigned int mmBIF_RB_WPTR__VI = 0x1533; +constexpr unsigned int mmBIF_RB_WPTR_ADDR_HI__VI = 0x1534; +constexpr unsigned int mmBIF_RB_WPTR_ADDR_LO__VI = 0x1535; +constexpr unsigned int mmBIF_RFE_MST_BX_CMDSTATUS__VI = 0x1449; +constexpr unsigned int mmBIF_RFE_MST_SMBUS_CMDSTATUS__VI = 0x1448; +constexpr unsigned int mmBIF_RFE_WARMRST_CNTL__VI = 0x1459; +constexpr unsigned int mmBIF_RLC_INTR_CNTL__VI = 0x1510; +constexpr unsigned int mmBIF_SLV_TRANS_PENDING__VI = 0x14E9; +constexpr unsigned int mmBIF_SMU_DATA__VI = 0x143E; +constexpr unsigned int mmBIF_SMU_INDEX__VI = 0x143D; +constexpr unsigned int mmBIF_VDDGFX_FB_CMP__VI = 0x143C; +constexpr unsigned int mmBIF_VDDGFX_GFX0_LOWER__VI = 0x1428; +constexpr unsigned int mmBIF_VDDGFX_GFX0_UPPER__VI = 0x1429; +constexpr unsigned int mmBIF_VDDGFX_GFX1_LOWER__VI = 0x142A; +constexpr unsigned int mmBIF_VDDGFX_GFX1_UPPER__VI = 0x142B; +constexpr unsigned int mmBIF_VDDGFX_GFX2_LOWER__VI = 0x142C; +constexpr unsigned int mmBIF_VDDGFX_GFX2_UPPER__VI = 0x142D; +constexpr unsigned int mmBIF_VDDGFX_GFX3_LOWER__VI = 0x142E; +constexpr unsigned int mmBIF_VDDGFX_GFX3_UPPER__VI = 0x142F; +constexpr unsigned int mmBIF_VDDGFX_GFX4_LOWER__VI = 0x1430; +constexpr unsigned int mmBIF_VDDGFX_GFX4_UPPER__VI = 0x1431; +constexpr unsigned int mmBIF_VDDGFX_GFX5_LOWER__VI = 0x1432; +constexpr unsigned int mmBIF_VDDGFX_GFX5_UPPER__VI = 0x1433; +constexpr unsigned int mmBIF_VDDGFX_RSV1_LOWER__VI = 0x1434; +constexpr unsigned int mmBIF_VDDGFX_RSV1_UPPER__VI = 0x1435; +constexpr unsigned int mmBIF_VDDGFX_RSV2_LOWER__VI = 0x1436; +constexpr unsigned int mmBIF_VDDGFX_RSV2_UPPER__VI = 0x1437; +constexpr unsigned int mmBIF_VDDGFX_RSV3_LOWER__VI = 0x1438; +constexpr unsigned int mmBIF_VDDGFX_RSV3_UPPER__VI = 0x1439; +constexpr unsigned int mmBIF_VDDGFX_RSV4_LOWER__VI = 0x143A; +constexpr unsigned int mmBIF_VDDGFX_RSV4_UPPER__VI = 0x143B; +constexpr unsigned int mmBIF_VIRT_RESET_REQ__VI = 0x14D2; +constexpr unsigned int mmBLND0_BLND_CONTROL__VI = 0x1B6D; +constexpr unsigned int mmBLND0_BLND_CONTROL2__VI = 0x1B6F; +constexpr unsigned int mmBLND0_BLND_DEBUG__VI = 0x1B74; +constexpr unsigned int mmBLND0_BLND_REG_UPDATE_STATUS__VI = 0x1B77; +constexpr unsigned int mmBLND0_BLND_TEST_DEBUG_DATA__VI = 0x1B76; +constexpr unsigned int mmBLND0_BLND_TEST_DEBUG_INDEX__VI = 0x1B75; +constexpr unsigned int mmBLND0_BLND_UNDERFLOW_INTERRUPT__VI = 0x1B71; +constexpr unsigned int mmBLND0_BLND_UPDATE__VI = 0x1B70; +constexpr unsigned int mmBLND0_BLND_V_UPDATE_LOCK__VI = 0x1B73; +constexpr unsigned int mmBLND0_SM_CONTROL2__VI = 0x1B6E; +constexpr unsigned int mmBLND1_BLND_CONTROL__VI = 0x1D6D; +constexpr unsigned int mmBLND1_BLND_CONTROL2__VI = 0x1D6F; +constexpr unsigned int mmBLND1_BLND_DEBUG__VI = 0x1D74; +constexpr unsigned int mmBLND1_BLND_REG_UPDATE_STATUS__VI = 0x1D77; +constexpr unsigned int mmBLND1_BLND_TEST_DEBUG_DATA__VI = 0x1D76; +constexpr unsigned int mmBLND1_BLND_TEST_DEBUG_INDEX__VI = 0x1D75; +constexpr unsigned int mmBLND1_BLND_UNDERFLOW_INTERRUPT__VI = 0x1D71; +constexpr unsigned int mmBLND1_BLND_UPDATE__VI = 0x1D70; +constexpr unsigned int mmBLND1_BLND_V_UPDATE_LOCK__VI = 0x1D73; +constexpr unsigned int mmBLND1_SM_CONTROL2__VI = 0x1D6E; +constexpr unsigned int mmBLND2_BLND_CONTROL__VI = 0x1F6D; +constexpr unsigned int mmBLND2_BLND_CONTROL2__VI = 0x1F6F; +constexpr unsigned int mmBLND2_BLND_DEBUG__VI = 0x1F74; +constexpr unsigned int mmBLND2_BLND_REG_UPDATE_STATUS__VI = 0x1F77; +constexpr unsigned int mmBLND2_BLND_TEST_DEBUG_DATA__VI = 0x1F76; +constexpr unsigned int mmBLND2_BLND_TEST_DEBUG_INDEX__VI = 0x1F75; +constexpr unsigned int mmBLND2_BLND_UNDERFLOW_INTERRUPT__VI = 0x1F71; +constexpr unsigned int mmBLND2_BLND_UPDATE__VI = 0x1F70; +constexpr unsigned int mmBLND2_BLND_V_UPDATE_LOCK__VI = 0x1F73; +constexpr unsigned int mmBLND2_SM_CONTROL2__VI = 0x1F6E; +constexpr unsigned int mmBLND3_BLND_CONTROL__VI = 0x416D; +constexpr unsigned int mmBLND3_BLND_CONTROL2__VI = 0x416F; +constexpr unsigned int mmBLND3_BLND_DEBUG__VI = 0x4174; +constexpr unsigned int mmBLND3_BLND_REG_UPDATE_STATUS__VI = 0x4177; +constexpr unsigned int mmBLND3_BLND_TEST_DEBUG_DATA__VI = 0x4176; +constexpr unsigned int mmBLND3_BLND_TEST_DEBUG_INDEX__VI = 0x4175; +constexpr unsigned int mmBLND3_BLND_UNDERFLOW_INTERRUPT__VI = 0x4171; +constexpr unsigned int mmBLND3_BLND_UPDATE__VI = 0x4170; +constexpr unsigned int mmBLND3_BLND_V_UPDATE_LOCK__VI = 0x4173; +constexpr unsigned int mmBLND3_SM_CONTROL2__VI = 0x416E; +constexpr unsigned int mmBLND4_BLND_CONTROL__VI = 0x436D; +constexpr unsigned int mmBLND4_BLND_CONTROL2__VI = 0x436F; +constexpr unsigned int mmBLND4_BLND_DEBUG__VI = 0x4374; +constexpr unsigned int mmBLND4_BLND_REG_UPDATE_STATUS__VI = 0x4377; +constexpr unsigned int mmBLND4_BLND_TEST_DEBUG_DATA__VI = 0x4376; +constexpr unsigned int mmBLND4_BLND_TEST_DEBUG_INDEX__VI = 0x4375; +constexpr unsigned int mmBLND4_BLND_UNDERFLOW_INTERRUPT__VI = 0x4371; +constexpr unsigned int mmBLND4_BLND_UPDATE__VI = 0x4370; +constexpr unsigned int mmBLND4_BLND_V_UPDATE_LOCK__VI = 0x4373; +constexpr unsigned int mmBLND4_SM_CONTROL2__VI = 0x436E; +constexpr unsigned int mmBLND5_BLND_CONTROL__VI = 0x456D; +constexpr unsigned int mmBLND5_BLND_CONTROL2__VI = 0x456F; +constexpr unsigned int mmBLND5_BLND_DEBUG__VI = 0x4574; +constexpr unsigned int mmBLND5_BLND_REG_UPDATE_STATUS__VI = 0x4577; +constexpr unsigned int mmBLND5_BLND_TEST_DEBUG_DATA__VI = 0x4576; +constexpr unsigned int mmBLND5_BLND_TEST_DEBUG_INDEX__VI = 0x4575; +constexpr unsigned int mmBLND5_BLND_UNDERFLOW_INTERRUPT__VI = 0x4571; +constexpr unsigned int mmBLND5_BLND_UPDATE__VI = 0x4570; +constexpr unsigned int mmBLND5_BLND_V_UPDATE_LOCK__VI = 0x4573; +constexpr unsigned int mmBLND5_SM_CONTROL2__VI = 0x456E; +constexpr unsigned int mmBLND6_BLND_CONTROL__VI = 0x476D; +constexpr unsigned int mmBLND6_BLND_CONTROL2__VI = 0x476F; +constexpr unsigned int mmBLND6_BLND_DEBUG__VI = 0x4774; +constexpr unsigned int mmBLND6_BLND_REG_UPDATE_STATUS__VI = 0x4777; +constexpr unsigned int mmBLND6_BLND_TEST_DEBUG_DATA__VI = 0x4776; +constexpr unsigned int mmBLND6_BLND_TEST_DEBUG_INDEX__VI = 0x4775; +constexpr unsigned int mmBLND6_BLND_UNDERFLOW_INTERRUPT__VI = 0x4771; +constexpr unsigned int mmBLND6_BLND_UPDATE__VI = 0x4770; +constexpr unsigned int mmBLND6_BLND_V_UPDATE_LOCK__VI = 0x4773; +constexpr unsigned int mmBLND6_SM_CONTROL2__VI = 0x476E; +constexpr unsigned int mmBLND_CONTROL__VI = 0x1B6D; +constexpr unsigned int mmBLND_CONTROL2__VI = 0x1B6F; +constexpr unsigned int mmBLND_DEBUG__VI = 0x1B74; +constexpr unsigned int mmBLND_REG_UPDATE_STATUS__VI = 0x1B77; +constexpr unsigned int mmBLND_TEST_DEBUG_DATA__VI = 0x1B76; +constexpr unsigned int mmBLND_TEST_DEBUG_INDEX__VI = 0x1B75; +constexpr unsigned int mmBLND_UNDERFLOW_INTERRUPT__VI = 0x1B71; +constexpr unsigned int mmBLND_UPDATE__VI = 0x1B70; +constexpr unsigned int mmBLND_V_UPDATE_LOCK__VI = 0x1B73; +constexpr unsigned int mmBL_PWM_CNTL__VI = 0x4820; +constexpr unsigned int mmBL_PWM_CNTL2__VI = 0x4821; +constexpr unsigned int mmBL_PWM_GRP1_REG_LOCK__VI = 0x4823; +constexpr unsigned int mmBL_PWM_PERIOD_CNTL__VI = 0x4822; +constexpr unsigned int mmBPHYC_DAC_AUTO_CALIB_CONTROL__VI = 0x48BA; +constexpr unsigned int mmBPHYC_DAC_MACRO_CNTL__VI = 0x48B9; +constexpr unsigned int mmBPHYC_PLL0_DISPPLL_BG_CNTL__VI = 0x171E; +constexpr unsigned int mmBPHYC_PLL0_PLL_ANALOG__VI = 0x1708; +constexpr unsigned int mmBPHYC_PLL0_PLL_ANALOG_CNTL__VI = 0x1711; +constexpr unsigned int mmBPHYC_PLL0_PLL_CNTL__VI = 0x1707; +constexpr unsigned int mmBPHYC_PLL0_PLL_DEBUG_CNTL__VI = 0x170B; +constexpr unsigned int mmBPHYC_PLL0_PLL_DS_CNTL__VI = 0x1705; +constexpr unsigned int mmBPHYC_PLL0_PLL_FB_DIV__VI = 0x1701; +constexpr unsigned int mmBPHYC_PLL0_PLL_IDCLK_CNTL__VI = 0x1706; +constexpr unsigned int mmBPHYC_PLL0_PLL_POST_DIV__VI = 0x1702; +constexpr unsigned int mmBPHYC_PLL0_PLL_REF_DIV__VI = 0x1700; +constexpr unsigned int mmBPHYC_PLL0_PLL_SS_AMOUNT_DSFRAC__VI = 0x1703; +constexpr unsigned int mmBPHYC_PLL0_PLL_SS_CNTL__VI = 0x1704; +constexpr unsigned int mmBPHYC_PLL0_PLL_UNLOCK_DETECT_CNTL__VI = 0x170A; +constexpr unsigned int mmBPHYC_PLL0_PLL_UPDATE_CNTL__VI = 0x170D; +constexpr unsigned int mmBPHYC_PLL0_PLL_UPDATE_LOCK__VI = 0x170C; +constexpr unsigned int mmBPHYC_PLL0_PLL_VREG_CNTL__VI = 0x1709; +constexpr unsigned int mmBPHYC_PLL0_PLL_XOR_LOCK__VI = 0x1710; +constexpr unsigned int mmBPHYC_PLL0_PPLL_DEBUG_MUX_CNTL__VI = 0x1721; +constexpr unsigned int mmBPHYC_PLL0_PPLL_DIV_UPDATE_DEBUG__VI = 0x171F; +constexpr unsigned int mmBPHYC_PLL0_PPLL_SPARE0__VI = 0x1722; +constexpr unsigned int mmBPHYC_PLL0_PPLL_SPARE1__VI = 0x1723; +constexpr unsigned int mmBPHYC_PLL0_PPLL_STATUS_DEBUG__VI = 0x1720; +constexpr unsigned int mmBPHYC_PLL0_VGA25_PPLL_ANALOG__VI = 0x171B; +constexpr unsigned int mmBPHYC_PLL0_VGA25_PPLL_FB_DIV__VI = 0x1715; +constexpr unsigned int mmBPHYC_PLL0_VGA25_PPLL_POST_DIV__VI = 0x1718; +constexpr unsigned int mmBPHYC_PLL0_VGA25_PPLL_REF_DIV__VI = 0x1712; +constexpr unsigned int mmBPHYC_PLL0_VGA28_PPLL_ANALOG__VI = 0x171C; +constexpr unsigned int mmBPHYC_PLL0_VGA28_PPLL_FB_DIV__VI = 0x1716; +constexpr unsigned int mmBPHYC_PLL0_VGA28_PPLL_POST_DIV__VI = 0x1719; +constexpr unsigned int mmBPHYC_PLL0_VGA28_PPLL_REF_DIV__VI = 0x1713; +constexpr unsigned int mmBPHYC_PLL0_VGA41_PPLL_ANALOG__VI = 0x171D; +constexpr unsigned int mmBPHYC_PLL0_VGA41_PPLL_FB_DIV__VI = 0x1717; +constexpr unsigned int mmBPHYC_PLL0_VGA41_PPLL_POST_DIV__VI = 0x171A; +constexpr unsigned int mmBPHYC_PLL0_VGA41_PPLL_REF_DIV__VI = 0x1714; +constexpr unsigned int mmBPHYC_PLL1_DISPPLL_BG_CNTL__VI = 0x1748; +constexpr unsigned int mmBPHYC_PLL1_PLL_ANALOG__VI = 0x1732; +constexpr unsigned int mmBPHYC_PLL1_PLL_ANALOG_CNTL__VI = 0x173B; +constexpr unsigned int mmBPHYC_PLL1_PLL_CNTL__VI = 0x1731; +constexpr unsigned int mmBPHYC_PLL1_PLL_DEBUG_CNTL__VI = 0x1735; +constexpr unsigned int mmBPHYC_PLL1_PLL_DS_CNTL__VI = 0x172F; +constexpr unsigned int mmBPHYC_PLL1_PLL_FB_DIV__VI = 0x172B; +constexpr unsigned int mmBPHYC_PLL1_PLL_IDCLK_CNTL__VI = 0x1730; +constexpr unsigned int mmBPHYC_PLL1_PLL_POST_DIV__VI = 0x172C; +constexpr unsigned int mmBPHYC_PLL1_PLL_REF_DIV__VI = 0x172A; +constexpr unsigned int mmBPHYC_PLL1_PLL_SS_AMOUNT_DSFRAC__VI = 0x172D; +constexpr unsigned int mmBPHYC_PLL1_PLL_SS_CNTL__VI = 0x172E; +constexpr unsigned int mmBPHYC_PLL1_PLL_UNLOCK_DETECT_CNTL__VI = 0x1734; +constexpr unsigned int mmBPHYC_PLL1_PLL_UPDATE_CNTL__VI = 0x1737; +constexpr unsigned int mmBPHYC_PLL1_PLL_UPDATE_LOCK__VI = 0x1736; +constexpr unsigned int mmBPHYC_PLL1_PLL_VREG_CNTL__VI = 0x1733; +constexpr unsigned int mmBPHYC_PLL1_PLL_XOR_LOCK__VI = 0x173A; +constexpr unsigned int mmBPHYC_PLL1_PPLL_DEBUG_MUX_CNTL__VI = 0x174B; +constexpr unsigned int mmBPHYC_PLL1_PPLL_DIV_UPDATE_DEBUG__VI = 0x1749; +constexpr unsigned int mmBPHYC_PLL1_PPLL_SPARE0__VI = 0x174C; +constexpr unsigned int mmBPHYC_PLL1_PPLL_SPARE1__VI = 0x174D; +constexpr unsigned int mmBPHYC_PLL1_PPLL_STATUS_DEBUG__VI = 0x174A; +constexpr unsigned int mmBPHYC_PLL1_VGA25_PPLL_ANALOG__VI = 0x1745; +constexpr unsigned int mmBPHYC_PLL1_VGA25_PPLL_FB_DIV__VI = 0x173F; +constexpr unsigned int mmBPHYC_PLL1_VGA25_PPLL_POST_DIV__VI = 0x1742; +constexpr unsigned int mmBPHYC_PLL1_VGA25_PPLL_REF_DIV__VI = 0x173C; +constexpr unsigned int mmBPHYC_PLL1_VGA28_PPLL_ANALOG__VI = 0x1746; +constexpr unsigned int mmBPHYC_PLL1_VGA28_PPLL_FB_DIV__VI = 0x1740; +constexpr unsigned int mmBPHYC_PLL1_VGA28_PPLL_POST_DIV__VI = 0x1743; +constexpr unsigned int mmBPHYC_PLL1_VGA28_PPLL_REF_DIV__VI = 0x173D; +constexpr unsigned int mmBPHYC_PLL1_VGA41_PPLL_ANALOG__VI = 0x1747; +constexpr unsigned int mmBPHYC_PLL1_VGA41_PPLL_FB_DIV__VI = 0x1741; +constexpr unsigned int mmBPHYC_PLL1_VGA41_PPLL_POST_DIV__VI = 0x1744; +constexpr unsigned int mmBPHYC_PLL1_VGA41_PPLL_REF_DIV__VI = 0x173E; +constexpr unsigned int mmBPHYC_PLL2_DISPPLL_BG_CNTL__VI = 0x1772; +constexpr unsigned int mmBPHYC_PLL2_PLL_ANALOG__VI = 0x175C; +constexpr unsigned int mmBPHYC_PLL2_PLL_ANALOG_CNTL__VI = 0x1765; +constexpr unsigned int mmBPHYC_PLL2_PLL_CNTL__VI = 0x175B; +constexpr unsigned int mmBPHYC_PLL2_PLL_DEBUG_CNTL__VI = 0x175F; +constexpr unsigned int mmBPHYC_PLL2_PLL_DS_CNTL__VI = 0x1759; +constexpr unsigned int mmBPHYC_PLL2_PLL_FB_DIV__VI = 0x1755; +constexpr unsigned int mmBPHYC_PLL2_PLL_IDCLK_CNTL__VI = 0x175A; +constexpr unsigned int mmBPHYC_PLL2_PLL_POST_DIV__VI = 0x1756; +constexpr unsigned int mmBPHYC_PLL2_PLL_REF_DIV__VI = 0x1754; +constexpr unsigned int mmBPHYC_PLL2_PLL_SS_AMOUNT_DSFRAC__VI = 0x1757; +constexpr unsigned int mmBPHYC_PLL2_PLL_SS_CNTL__VI = 0x1758; +constexpr unsigned int mmBPHYC_PLL2_PLL_UNLOCK_DETECT_CNTL__VI = 0x175E; +constexpr unsigned int mmBPHYC_PLL2_PLL_UPDATE_CNTL__VI = 0x1761; +constexpr unsigned int mmBPHYC_PLL2_PLL_UPDATE_LOCK__VI = 0x1760; +constexpr unsigned int mmBPHYC_PLL2_PLL_VREG_CNTL__VI = 0x175D; +constexpr unsigned int mmBPHYC_PLL2_PLL_XOR_LOCK__VI = 0x1764; +constexpr unsigned int mmBPHYC_PLL2_PPLL_DEBUG_MUX_CNTL__VI = 0x1775; +constexpr unsigned int mmBPHYC_PLL2_PPLL_DIV_UPDATE_DEBUG__VI = 0x1773; +constexpr unsigned int mmBPHYC_PLL2_PPLL_SPARE0__VI = 0x1776; +constexpr unsigned int mmBPHYC_PLL2_PPLL_SPARE1__VI = 0x1777; +constexpr unsigned int mmBPHYC_PLL2_PPLL_STATUS_DEBUG__VI = 0x1774; +constexpr unsigned int mmBPHYC_PLL2_VGA25_PPLL_ANALOG__VI = 0x176F; +constexpr unsigned int mmBPHYC_PLL2_VGA25_PPLL_FB_DIV__VI = 0x1769; +constexpr unsigned int mmBPHYC_PLL2_VGA25_PPLL_POST_DIV__VI = 0x176C; +constexpr unsigned int mmBPHYC_PLL2_VGA25_PPLL_REF_DIV__VI = 0x1766; +constexpr unsigned int mmBPHYC_PLL2_VGA28_PPLL_ANALOG__VI = 0x1770; +constexpr unsigned int mmBPHYC_PLL2_VGA28_PPLL_FB_DIV__VI = 0x176A; +constexpr unsigned int mmBPHYC_PLL2_VGA28_PPLL_POST_DIV__VI = 0x176D; +constexpr unsigned int mmBPHYC_PLL2_VGA28_PPLL_REF_DIV__VI = 0x1767; +constexpr unsigned int mmBPHYC_PLL2_VGA41_PPLL_ANALOG__VI = 0x1771; +constexpr unsigned int mmBPHYC_PLL2_VGA41_PPLL_FB_DIV__VI = 0x176B; +constexpr unsigned int mmBPHYC_PLL2_VGA41_PPLL_POST_DIV__VI = 0x176E; +constexpr unsigned int mmBPHYC_PLL2_VGA41_PPLL_REF_DIV__VI = 0x1768; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_ANG_BIST_CNTL__VI = 0x48CC; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x48CA; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_DEBUG__VI = 0x48D6; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_PLL_CONTROL1__VI = 0x48C6; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_PLL_CONTROL2__VI = 0x48C7; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_PLL_FBDIV__VI = 0x48C5; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_PLL_SS_CNTL__VI = 0x48C9; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x48C8; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_POWER_CONTROL__VI = 0x48C4; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_REG_TEST_OUTPUT__VI = 0x48CB; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_REG_TEST_OUTPUT2__VI = 0x48CD; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TPG_CONTROL__VI = 0x48D4; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TPG_SEED__VI = 0x48D5; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TX_CONTROL1__VI = 0x48C0; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TX_CONTROL2__VI = 0x48C1; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TX_CONTROL3__VI = 0x48C2; +constexpr unsigned int mmBPHYC_UNIPHY0_UNIPHY_TX_CONTROL4__VI = 0x48C3; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_ANG_BIST_CNTL__VI = 0x48EC; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x48EA; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_DEBUG__VI = 0x48F6; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_PLL_CONTROL1__VI = 0x48E6; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_PLL_CONTROL2__VI = 0x48E7; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_PLL_FBDIV__VI = 0x48E5; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_PLL_SS_CNTL__VI = 0x48E9; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x48E8; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_POWER_CONTROL__VI = 0x48E4; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_REG_TEST_OUTPUT__VI = 0x48EB; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_REG_TEST_OUTPUT2__VI = 0x48ED; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TPG_CONTROL__VI = 0x48F4; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TPG_SEED__VI = 0x48F5; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TX_CONTROL1__VI = 0x48E0; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TX_CONTROL2__VI = 0x48E1; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TX_CONTROL3__VI = 0x48E2; +constexpr unsigned int mmBPHYC_UNIPHY1_UNIPHY_TX_CONTROL4__VI = 0x48E3; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_ANG_BIST_CNTL__VI = 0x490C; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x490A; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_DEBUG__VI = 0x4916; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_PLL_CONTROL1__VI = 0x4906; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_PLL_CONTROL2__VI = 0x4907; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_PLL_FBDIV__VI = 0x4905; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_PLL_SS_CNTL__VI = 0x4909; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x4908; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_POWER_CONTROL__VI = 0x4904; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_REG_TEST_OUTPUT__VI = 0x490B; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_REG_TEST_OUTPUT2__VI = 0x490D; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TPG_CONTROL__VI = 0x4914; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TPG_SEED__VI = 0x4915; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TX_CONTROL1__VI = 0x4900; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TX_CONTROL2__VI = 0x4901; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TX_CONTROL3__VI = 0x4902; +constexpr unsigned int mmBPHYC_UNIPHY2_UNIPHY_TX_CONTROL4__VI = 0x4903; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_ANG_BIST_CNTL__VI = 0x492C; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x492A; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_DEBUG__VI = 0x4936; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_PLL_CONTROL1__VI = 0x4926; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_PLL_CONTROL2__VI = 0x4927; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_PLL_FBDIV__VI = 0x4925; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_PLL_SS_CNTL__VI = 0x4929; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x4928; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_POWER_CONTROL__VI = 0x4924; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_REG_TEST_OUTPUT__VI = 0x492B; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_REG_TEST_OUTPUT2__VI = 0x492D; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TPG_CONTROL__VI = 0x4934; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TPG_SEED__VI = 0x4935; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TX_CONTROL1__VI = 0x4920; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TX_CONTROL2__VI = 0x4921; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TX_CONTROL3__VI = 0x4922; +constexpr unsigned int mmBPHYC_UNIPHY3_UNIPHY_TX_CONTROL4__VI = 0x4923; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_ANG_BIST_CNTL__VI = 0x494C; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x494A; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_DEBUG__VI = 0x4956; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_PLL_CONTROL1__VI = 0x4946; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_PLL_CONTROL2__VI = 0x4947; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_PLL_FBDIV__VI = 0x4945; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_PLL_SS_CNTL__VI = 0x4949; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x4948; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_POWER_CONTROL__VI = 0x4944; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_REG_TEST_OUTPUT__VI = 0x494B; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_REG_TEST_OUTPUT2__VI = 0x494D; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TPG_CONTROL__VI = 0x4954; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TPG_SEED__VI = 0x4955; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TX_CONTROL1__VI = 0x4940; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TX_CONTROL2__VI = 0x4941; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TX_CONTROL3__VI = 0x4942; +constexpr unsigned int mmBPHYC_UNIPHY4_UNIPHY_TX_CONTROL4__VI = 0x4943; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_ANG_BIST_CNTL__VI = 0x496C; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x496A; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_DEBUG__VI = 0x4976; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_PLL_CONTROL1__VI = 0x4966; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_PLL_CONTROL2__VI = 0x4967; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_PLL_FBDIV__VI = 0x4965; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_PLL_SS_CNTL__VI = 0x4969; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x4968; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_POWER_CONTROL__VI = 0x4964; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_REG_TEST_OUTPUT__VI = 0x496B; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_REG_TEST_OUTPUT2__VI = 0x496D; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TPG_CONTROL__VI = 0x4974; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TPG_SEED__VI = 0x4975; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TX_CONTROL1__VI = 0x4960; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TX_CONTROL2__VI = 0x4961; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TX_CONTROL3__VI = 0x4962; +constexpr unsigned int mmBPHYC_UNIPHY5_UNIPHY_TX_CONTROL4__VI = 0x4963; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_ANG_BIST_CNTL__VI = 0x498C; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_DATA_SYNCHRONIZATION__VI = 0x498A; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_DEBUG__VI = 0x4996; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_PLL_CONTROL1__VI = 0x4986; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_PLL_CONTROL2__VI = 0x4987; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_PLL_FBDIV__VI = 0x4985; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_PLL_SS_CNTL__VI = 0x4989; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_PLL_SS_STEP_SIZE__VI = 0x4988; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_POWER_CONTROL__VI = 0x4984; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_REG_TEST_OUTPUT__VI = 0x498B; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_REG_TEST_OUTPUT2__VI = 0x498D; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TPG_CONTROL__VI = 0x4994; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TPG_SEED__VI = 0x4995; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TX_CONTROL1__VI = 0x4980; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TX_CONTROL2__VI = 0x4981; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TX_CONTROL3__VI = 0x4982; +constexpr unsigned int mmBPHYC_UNIPHY6_UNIPHY_TX_CONTROL4__VI = 0x4983; +constexpr unsigned int mmBX_RESET_CNTL__VI = 0x1518; +constexpr unsigned int mmCB_COLOR0_DCC_BASE__VI = 0xA325; +constexpr unsigned int mmCB_COLOR0_DCC_CONTROL__VI = 0xA31E; +constexpr unsigned int mmCB_COLOR1_DCC_BASE__VI = 0xA334; +constexpr unsigned int mmCB_COLOR1_DCC_CONTROL__VI = 0xA32D; +constexpr unsigned int mmCB_COLOR2_DCC_BASE__VI = 0xA343; +constexpr unsigned int mmCB_COLOR2_DCC_CONTROL__VI = 0xA33C; +constexpr unsigned int mmCB_COLOR3_DCC_BASE__VI = 0xA352; +constexpr unsigned int mmCB_COLOR3_DCC_CONTROL__VI = 0xA34B; +constexpr unsigned int mmCB_COLOR4_DCC_BASE__VI = 0xA361; +constexpr unsigned int mmCB_COLOR4_DCC_CONTROL__VI = 0xA35A; +constexpr unsigned int mmCB_COLOR5_DCC_BASE__VI = 0xA370; +constexpr unsigned int mmCB_COLOR5_DCC_CONTROL__VI = 0xA369; +constexpr unsigned int mmCB_COLOR6_DCC_BASE__VI = 0xA37F; +constexpr unsigned int mmCB_COLOR6_DCC_CONTROL__VI = 0xA378; +constexpr unsigned int mmCB_COLOR7_DCC_BASE__VI = 0xA38E; +constexpr unsigned int mmCB_COLOR7_DCC_CONTROL__VI = 0xA387; +constexpr unsigned int mmCB_DCC_CONFIG__VI = 0x2687; +constexpr unsigned int mmCB_DCC_CONTROL__VI = 0xA109; +constexpr unsigned int mmCB_DEBUG_BUS_19__VI = 0x26AB; +constexpr unsigned int mmCB_DEBUG_BUS_20__VI = 0x26AC; +constexpr unsigned int mmCB_DEBUG_BUS_21__VI = 0x26AD; +constexpr unsigned int mmCB_DEBUG_BUS_22__VI = 0x26AE; +constexpr unsigned int mmCC_DC_PIPE_DIS__VI = 0x0312; +constexpr unsigned int mmCC_GC_SHADER_RATE_CONFIG__VI = 0x2312; +constexpr unsigned int mmCC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY__VI = 0x1835; +constexpr unsigned int mmCC_RCU_DC_AUDIO_PORT_CONNECTIVITY__VI = 0x1834; +constexpr unsigned int mmCG_FPS_CNT__VI = 0x01B6; +constexpr unsigned int mmCLKREQB_PERF_COUNTER__VI = 0x1522; +constexpr unsigned int mmCNV_CSC_C11_C12__VI = 0x5E20; +constexpr unsigned int mmCNV_CSC_C13_C14__VI = 0x5E21; +constexpr unsigned int mmCNV_CSC_C21_C22__VI = 0x5E22; +constexpr unsigned int mmCNV_CSC_C23_C24__VI = 0x5E23; +constexpr unsigned int mmCNV_CSC_C31_C32__VI = 0x5E24; +constexpr unsigned int mmCNV_CSC_C33_C34__VI = 0x5E25; +constexpr unsigned int mmCNV_CSC_CLAMP_B__VI = 0x5E2B; +constexpr unsigned int mmCNV_CSC_CLAMP_G__VI = 0x5E2A; +constexpr unsigned int mmCNV_CSC_CLAMP_R__VI = 0x5E29; +constexpr unsigned int mmCNV_CSC_CONTROL__VI = 0x5E1F; +constexpr unsigned int mmCNV_CSC_ROUND_OFFSET_B__VI = 0x5E28; +constexpr unsigned int mmCNV_CSC_ROUND_OFFSET_G__VI = 0x5E27; +constexpr unsigned int mmCNV_CSC_ROUND_OFFSET_R__VI = 0x5E26; +constexpr unsigned int mmCNV_INPUT_SELECT__VI = 0x5E33; +constexpr unsigned int mmCNV_MODE__VI = 0x5E1A; +constexpr unsigned int mmCNV_SOURCE_SIZE__VI = 0x5E1E; +constexpr unsigned int mmCNV_TEST_CNTL__VI = 0x5E2C; +constexpr unsigned int mmCNV_TEST_CRC_BLUE__VI = 0x5E2F; +constexpr unsigned int mmCNV_TEST_CRC_GREEN__VI = 0x5E2E; +constexpr unsigned int mmCNV_TEST_CRC_RED__VI = 0x5E2D; +constexpr unsigned int mmCNV_TEST_DEBUG_DATA__VI = 0x5E35; +constexpr unsigned int mmCNV_TEST_DEBUG_INDEX__VI = 0x5E34; +constexpr unsigned int mmCNV_UPDATE__VI = 0x5E1D; +constexpr unsigned int mmCNV_WINDOW_SIZE__VI = 0x5E1C; +constexpr unsigned int mmCNV_WINDOW_START__VI = 0x5E1B; +constexpr unsigned int mmCOL_MAN_DEBUG_CONTROL__VI = 0x46E6; +constexpr unsigned int mmCOL_MAN_FP_CONVERTED_FIELD__VI = 0x46C7; +constexpr unsigned int mmCOL_MAN_INPUT_CSC_CONTROL__VI = 0x46A5; +constexpr unsigned int mmCOL_MAN_OUTPUT_CSC_CONTROL__VI = 0x46B6; +constexpr unsigned int mmCOL_MAN_TEST_DEBUG_DATA__VI = 0x46E5; +constexpr unsigned int mmCOL_MAN_TEST_DEBUG_INDEX__VI = 0x46E4; +constexpr unsigned int mmCOL_MAN_UPDATE__VI = 0x46A4; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C11_C12__VI = 0x1A43; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C13_C14__VI = 0x1A44; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C21_C22__VI = 0x1A45; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C23_C24__VI = 0x1A46; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C31_C32__VI = 0x1A47; +constexpr unsigned int mmCOMM_MATRIXA_TRANS_C33_C34__VI = 0x1A48; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C11_C12__VI = 0x1A49; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C13_C14__VI = 0x1A4A; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C21_C22__VI = 0x1A4B; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C23_C24__VI = 0x1A4C; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C31_C32__VI = 0x1A4D; +constexpr unsigned int mmCOMM_MATRIXB_TRANS_C33_C34__VI = 0x1A4E; +constexpr unsigned int mmCOMPUTE_DISPATCH_ID__VI = 0x2E20; +constexpr unsigned int mmCOMPUTE_NOWHERE__VI = 0x2E7F; +constexpr unsigned int mmCOMPUTE_RELAUNCH__VI = 0x2E22; +constexpr unsigned int mmCOMPUTE_THREADGROUP_ID__VI = 0x2E21; +constexpr unsigned int mmCOMPUTE_WAVE_RESTORE_ADDR_HI__VI = 0x2E24; +constexpr unsigned int mmCOMPUTE_WAVE_RESTORE_ADDR_LO__VI = 0x2E23; +constexpr unsigned int mmCOMPUTE_WAVE_RESTORE_CONTROL__VI = 0x2E25; +constexpr unsigned int mmCONFIG_RESERVED__VI = 0x1502; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED0__VI = 0x5FD0; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED1__VI = 0x5FD1; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED10__VI = 0x5FDA; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED11__VI = 0x5FDB; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED2__VI = 0x5FD2; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED3__VI = 0x5FD3; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED4__VI = 0x5FD4; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED5__VI = 0x5FD5; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED6__VI = 0x5FD6; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED7__VI = 0x5FD7; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED8__VI = 0x5FD8; +constexpr unsigned int mmCPLL_MACRO_CNTL_RESERVED9__VI = 0x5FD9; +constexpr unsigned int mmCPM_CONTROL__VI = 0x14B8; +constexpr unsigned int mmCP_CE_COMPLETION_STATUS__VI = 0xC0ED; +constexpr unsigned int mmCP_CE_METADATA_BASE_ADDR__VI = 0xC0F2; +constexpr unsigned int mmCP_CE_METADATA_BASE_ADDR_HI__VI = 0xC0F3; +constexpr unsigned int mmCP_CE_RB_OFFSET__VI = 0xC09B; +constexpr unsigned int mmCP_CE_UCODE_ADDR__SI__CI = 0x305A; +constexpr unsigned int mmCP_CE_UCODE_ADDR__VI = 0xF818; +constexpr unsigned int mmCP_CE_UCODE_DATA__SI__CI = 0x305B; +constexpr unsigned int mmCP_CE_UCODE_DATA__VI = 0xF819; +constexpr unsigned int mmCP_CONFIG__VI = 0x0F96; +constexpr unsigned int mmCP_CPC_IC_BASE_CNTL__VI = 0x30BB; +constexpr unsigned int mmCP_CPC_IC_BASE_HI__VI = 0x30BA; +constexpr unsigned int mmCP_CPC_IC_BASE_LO__VI = 0x30B9; +constexpr unsigned int mmCP_CPC_IC_OP_CNTL__VI = 0x30BC; +constexpr unsigned int mmCP_CPC_MGCG_SYNC_CNTL__VI = 0x3036; +constexpr unsigned int mmCP_DFY_CMD__VI = 0x3034; +constexpr unsigned int mmCP_DISPATCH_INDR_ADDR__VI = 0xC0F6; +constexpr unsigned int mmCP_DISPATCH_INDR_ADDR_HI__VI = 0xC0F7; +constexpr unsigned int mmCP_DRAW_INDX_INDR_ADDR__VI = 0xC0F4; +constexpr unsigned int mmCP_DRAW_INDX_INDR_ADDR_HI__VI = 0xC0F5; +constexpr unsigned int mmCP_DRAW_OBJECT__VI = 0xD810; +constexpr unsigned int mmCP_DRAW_OBJECT_COUNTER__VI = 0xD811; +constexpr unsigned int mmCP_DRAW_WINDOW_CNTL__VI = 0xD815; +constexpr unsigned int mmCP_DRAW_WINDOW_HI__VI = 0xD813; +constexpr unsigned int mmCP_DRAW_WINDOW_LO__VI = 0xD814; +constexpr unsigned int mmCP_DRAW_WINDOW_MASK_HI__VI = 0xD812; +constexpr unsigned int mmCP_EOP_DONE_CNTX_ID__VI = 0xC0D7; +constexpr unsigned int mmCP_GDS_BKUP_ADDR__VI = 0xC0FB; +constexpr unsigned int mmCP_GDS_BKUP_ADDR_HI__VI = 0xC0FC; +constexpr unsigned int mmCP_HPD_STATUS0__VI = 0x3241; +constexpr unsigned int mmCP_HQD_CNTL_STACK_OFFSET__VI = 0x3273; +constexpr unsigned int mmCP_HQD_CNTL_STACK_SIZE__VI = 0x3274; +constexpr unsigned int mmCP_HQD_CTX_SAVE_BASE_ADDR_HI__VI = 0x3271; +constexpr unsigned int mmCP_HQD_CTX_SAVE_BASE_ADDR_LO__VI = 0x3270; +constexpr unsigned int mmCP_HQD_CTX_SAVE_CONTROL__VI = 0x3272; +constexpr unsigned int mmCP_HQD_CTX_SAVE_SIZE__VI = 0x3276; +constexpr unsigned int mmCP_HQD_EOP_BASE_ADDR__VI = 0x326A; +constexpr unsigned int mmCP_HQD_EOP_BASE_ADDR_HI__VI = 0x326B; +constexpr unsigned int mmCP_HQD_EOP_CONTROL__VI = 0x326C; +constexpr unsigned int mmCP_HQD_EOP_DONES__VI = 0x327A; +constexpr unsigned int mmCP_HQD_EOP_EVENTS__VI = 0x326F; +constexpr unsigned int mmCP_HQD_EOP_RPTR__VI = 0x326D; +constexpr unsigned int mmCP_HQD_EOP_WPTR__VI = 0x326E; +constexpr unsigned int mmCP_HQD_EOP_WPTR_MEM__VI = 0x3279; +constexpr unsigned int mmCP_HQD_ERROR__VI = 0x3278; +constexpr unsigned int mmCP_HQD_GDS_RESOURCE_STATE__VI = 0x3277; +constexpr unsigned int mmCP_HQD_HQ_CONTROL0__VI = 0x3266; +constexpr unsigned int mmCP_HQD_HQ_CONTROL1__VI = 0x3269; +constexpr unsigned int mmCP_HQD_HQ_STATUS0__VI = 0x3265; +constexpr unsigned int mmCP_HQD_HQ_STATUS1__VI = 0x3268; +constexpr unsigned int mmCP_HQD_OFFLOAD__VI = 0x325E; +constexpr unsigned int mmCP_HQD_WG_STATE_OFFSET__VI = 0x3275; +constexpr unsigned int mmCP_INDEX_BASE_ADDR__VI = 0xC0F8; +constexpr unsigned int mmCP_INDEX_BASE_ADDR_HI__VI = 0xC0F9; +constexpr unsigned int mmCP_INDEX_TYPE__VI = 0xC0FA; +constexpr unsigned int mmCP_MEC1_F32_INT_DIS__VI = 0x30BD; +constexpr unsigned int mmCP_MEC2_F32_INT_DIS__VI = 0x30BE; +constexpr unsigned int mmCP_MEC_DOORBELL_RANGE_LOWER__VI = 0x305C; +constexpr unsigned int mmCP_MEC_DOORBELL_RANGE_UPPER__VI = 0x305D; +constexpr unsigned int mmCP_MEC_ME1_UCODE_ADDR__VI = 0xF81A; +constexpr unsigned int mmCP_MEC_ME1_UCODE_DATA__VI = 0xF81B; +constexpr unsigned int mmCP_MEC_ME2_UCODE_ADDR__VI = 0xF81C; +constexpr unsigned int mmCP_MEC_ME2_UCODE_DATA__VI = 0xF81D; +constexpr unsigned int mmCP_ME_RAM_DATA__SI__CI = 0x3058; +constexpr unsigned int mmCP_ME_RAM_DATA__VI = 0xF817; +constexpr unsigned int mmCP_ME_RAM_RADDR__SI__CI = 0x3056; +constexpr unsigned int mmCP_ME_RAM_RADDR__VI = 0xF816; +constexpr unsigned int mmCP_ME_RAM_WADDR__SI__CI = 0x3057; +constexpr unsigned int mmCP_ME_RAM_WADDR__VI = 0xF816; +constexpr unsigned int mmCP_PFP_COMPLETION_STATUS__VI = 0xC0EC; +constexpr unsigned int mmCP_PFP_METADATA_BASE_ADDR__VI = 0xC0F0; +constexpr unsigned int mmCP_PFP_METADATA_BASE_ADDR_HI__VI = 0xC0F1; +constexpr unsigned int mmCP_PFP_UCODE_ADDR__SI__CI = 0x3054; +constexpr unsigned int mmCP_PFP_UCODE_ADDR__VI = 0xF814; +constexpr unsigned int mmCP_PFP_UCODE_DATA__SI__CI = 0x3055; +constexpr unsigned int mmCP_PFP_UCODE_DATA__VI = 0xF815; +constexpr unsigned int mmCP_PIPE_STATS_CONTROL__VI = 0xC03D; +constexpr unsigned int mmCP_PQ_STATUS__VI = 0x30B8; +constexpr unsigned int mmCP_PRED_NOT_VISIBLE__VI = 0xC0EE; +constexpr unsigned int mmCP_RB_DOORBELL_CONTROL__VI = 0x3059; +constexpr unsigned int mmCP_RB_DOORBELL_RANGE_LOWER__VI = 0x305A; +constexpr unsigned int mmCP_RB_DOORBELL_RANGE_UPPER__VI = 0x305B; +constexpr unsigned int mmCP_SAMPLE_STATUS__VI = 0xC0FD; +constexpr unsigned int mmCP_STREAM_OUT_CONTROL__VI = 0xC03E; +constexpr unsigned int mmCP_VIRT_STATUS__VI = 0x3038; +constexpr unsigned int mmCP_VMID_STATUS__VI = 0x30BF; +constexpr unsigned int mmCRTC0_CRTC_3D_STRUCTURE_CONTROL__VI = 0x1B78; +constexpr unsigned int mmCRTC0_CRTC_AVSYNC_COUNTER__VI = 0x1B9B; +constexpr unsigned int mmCRTC0_CRTC_BLACK_COLOR__VI = 0x1BCC; +constexpr unsigned int mmCRTC0_CRTC_BLACK_COLOR_EXT__VI = 0x1BCD; +constexpr unsigned int mmCRTC0_CRTC_BLANK_DATA_COLOR__VI = 0x1BCA; +constexpr unsigned int mmCRTC0_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x1BCB; +constexpr unsigned int mmCRTC0_CRTC_CRC0_DATA_B__VI = 0x1BDA; +constexpr unsigned int mmCRTC0_CRTC_CRC0_DATA_RG__VI = 0x1BD9; +constexpr unsigned int mmCRTC0_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x1BD5; +constexpr unsigned int mmCRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x1BD6; +constexpr unsigned int mmCRTC0_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x1BD7; +constexpr unsigned int mmCRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x1BD8; +constexpr unsigned int mmCRTC0_CRTC_CRC1_DATA_B__VI = 0x1BE0; +constexpr unsigned int mmCRTC0_CRTC_CRC1_DATA_RG__VI = 0x1BDF; +constexpr unsigned int mmCRTC0_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x1BDB; +constexpr unsigned int mmCRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x1BDC; +constexpr unsigned int mmCRTC0_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x1BDD; +constexpr unsigned int mmCRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x1BDE; +constexpr unsigned int mmCRTC0_CRTC_CRC_CNTL__VI = 0x1BD4; +constexpr unsigned int mmCRTC0_CRTC_DCFE_CLOCK_CONTROL__VI = 0x1B7C; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x1BE1; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x1BE5; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x1BE4; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x1BE6; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x1BE3; +constexpr unsigned int mmCRTC0_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x1BE2; +constexpr unsigned int mmCRTC0_CRTC_FIELD_INDICATION_CONTROL__VI = 0x1BA0; +constexpr unsigned int mmCRTC0_CRTC_GSL_CONTROL__VI = 0x1B7B; +constexpr unsigned int mmCRTC0_CRTC_GSL_VSYNC_GAP__VI = 0x1B79; +constexpr unsigned int mmCRTC0_CRTC_GSL_WINDOW__VI = 0x1B7A; +constexpr unsigned int mmCRTC0_CRTC_H_BLANK_EARLY_NUM__VI = 0x1B7D; +constexpr unsigned int mmCRTC0_CRTC_OVERSCAN_COLOR__VI = 0x1BC8; +constexpr unsigned int mmCRTC0_CRTC_OVERSCAN_COLOR_EXT__VI = 0x1BC9; +constexpr unsigned int mmCRTC0_CRTC_PIXEL_DATA_READBACK0__VI = 0x1BA1; +constexpr unsigned int mmCRTC0_CRTC_PIXEL_DATA_READBACK1__VI = 0x1BA2; +constexpr unsigned int mmCRTC0_CRTC_STATIC_SCREEN_CONTROL__VI = 0x1BE7; +constexpr unsigned int mmCRTC0_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x1B9A; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x1BCF; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x1BCE; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x1BD1; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x1BD0; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x1BD3; +constexpr unsigned int mmCRTC0_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x1BD2; +constexpr unsigned int mmCRTC0_DCFE_DBG_SEL__VI = 0x1B7E; +constexpr unsigned int mmCRTC0_DCFE_MEM_PWR_CTRL__VI = 0x1B7F; +constexpr unsigned int mmCRTC0_DCFE_MEM_PWR_CTRL2__VI = 0x1BB8; +constexpr unsigned int mmCRTC0_DCFE_MEM_PWR_STATUS__VI = 0x1BB9; +constexpr unsigned int mmCRTC0_PIXEL_RATE_CNTL__VI = 0x0140; +constexpr unsigned int mmCRTC1_CRTC_3D_STRUCTURE_CONTROL__VI = 0x1D78; +constexpr unsigned int mmCRTC1_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x1DC3; +constexpr unsigned int mmCRTC1_CRTC_AVSYNC_COUNTER__VI = 0x1D9B; +constexpr unsigned int mmCRTC1_CRTC_BLACK_COLOR__VI = 0x1DCC; +constexpr unsigned int mmCRTC1_CRTC_BLACK_COLOR_EXT__VI = 0x1DCD; +constexpr unsigned int mmCRTC1_CRTC_BLANK_CONTROL__SI__CI = 0x1E9D; +constexpr unsigned int mmCRTC1_CRTC_BLANK_CONTROL__VI = 0x1D9D; +constexpr unsigned int mmCRTC1_CRTC_BLANK_DATA_COLOR__VI = 0x1DCA; +constexpr unsigned int mmCRTC1_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x1DCB; +constexpr unsigned int mmCRTC1_CRTC_CONTROL__VI = 0x1D9C; +constexpr unsigned int mmCRTC1_CRTC_COUNT_CONTROL__VI = 0x1DA9; +constexpr unsigned int mmCRTC1_CRTC_COUNT_RESET__VI = 0x1DAA; +constexpr unsigned int mmCRTC1_CRTC_CRC0_DATA_B__VI = 0x1DDA; +constexpr unsigned int mmCRTC1_CRTC_CRC0_DATA_RG__VI = 0x1DD9; +constexpr unsigned int mmCRTC1_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x1DD5; +constexpr unsigned int mmCRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x1DD6; +constexpr unsigned int mmCRTC1_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x1DD7; +constexpr unsigned int mmCRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x1DD8; +constexpr unsigned int mmCRTC1_CRTC_CRC1_DATA_B__VI = 0x1DE0; +constexpr unsigned int mmCRTC1_CRTC_CRC1_DATA_RG__VI = 0x1DDF; +constexpr unsigned int mmCRTC1_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x1DDB; +constexpr unsigned int mmCRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x1DDC; +constexpr unsigned int mmCRTC1_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x1DDD; +constexpr unsigned int mmCRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x1DDE; +constexpr unsigned int mmCRTC1_CRTC_CRC_CNTL__VI = 0x1DD4; +constexpr unsigned int mmCRTC1_CRTC_DCFE_CLOCK_CONTROL__VI = 0x1D7C; +constexpr unsigned int mmCRTC1_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x1DB6; +constexpr unsigned int mmCRTC1_CRTC_DTMTEST_CNTL__VI = 0x1D92; +constexpr unsigned int mmCRTC1_CRTC_DTMTEST_STATUS_POSITION__VI = 0x1D93; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x1DE1; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x1DE5; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x1DE4; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x1DE6; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x1DE3; +constexpr unsigned int mmCRTC1_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x1DE2; +constexpr unsigned int mmCRTC1_CRTC_FIELD_INDICATION_CONTROL__VI = 0x1DA0; +constexpr unsigned int mmCRTC1_CRTC_FLOW_CONTROL__VI = 0x1D99; +constexpr unsigned int mmCRTC1_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x1D98; +constexpr unsigned int mmCRTC1_CRTC_GSL_CONTROL__VI = 0x1D7B; +constexpr unsigned int mmCRTC1_CRTC_GSL_VSYNC_GAP__VI = 0x1D79; +constexpr unsigned int mmCRTC1_CRTC_GSL_WINDOW__VI = 0x1D7A; +constexpr unsigned int mmCRTC1_CRTC_H_BLANK_EARLY_NUM__VI = 0x1D7D; +constexpr unsigned int mmCRTC1_CRTC_H_BLANK_START_END__VI = 0x1D81; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_A__VI = 0x1D82; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_A_CNTL__VI = 0x1D83; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_B__VI = 0x1D84; +constexpr unsigned int mmCRTC1_CRTC_H_SYNC_B_CNTL__VI = 0x1D85; +constexpr unsigned int mmCRTC1_CRTC_H_TOTAL__VI = 0x1D80; +constexpr unsigned int mmCRTC1_CRTC_INTERLACE_CONTROL__VI = 0x1D9E; +constexpr unsigned int mmCRTC1_CRTC_INTERLACE_STATUS__VI = 0x1D9F; +constexpr unsigned int mmCRTC1_CRTC_INTERRUPT_CONTROL__VI = 0x1DB4; +constexpr unsigned int mmCRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x1DAB; +constexpr unsigned int mmCRTC1_CRTC_MASTER_EN__VI = 0x1DC2; +constexpr unsigned int mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x1DBF; +constexpr unsigned int mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x1DC0; +constexpr unsigned int mmCRTC1_CRTC_MVP_STATUS__VI = 0x1DC1; +constexpr unsigned int mmCRTC1_CRTC_NOM_VERT_POSITION__VI = 0x1DA5; +constexpr unsigned int mmCRTC1_CRTC_OVERSCAN_COLOR__VI = 0x1DC8; +constexpr unsigned int mmCRTC1_CRTC_OVERSCAN_COLOR_EXT__VI = 0x1DC9; +constexpr unsigned int mmCRTC1_CRTC_PIXEL_DATA_READBACK0__VI = 0x1DA1; +constexpr unsigned int mmCRTC1_CRTC_PIXEL_DATA_READBACK1__VI = 0x1DA2; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_CONTROL__VI = 0x1DB0; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_FRAME__VI = 0x1DB2; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_POSITION__VI = 0x1DB1; +constexpr unsigned int mmCRTC1_CRTC_SNAPSHOT_STATUS__VI = 0x1DAF; +constexpr unsigned int mmCRTC1_CRTC_START_LINE_CONTROL__VI = 0x1DB3; +constexpr unsigned int mmCRTC1_CRTC_STATIC_SCREEN_CONTROL__VI = 0x1DE7; +constexpr unsigned int mmCRTC1_CRTC_STATUS__SI__CI = 0x1EA3; +constexpr unsigned int mmCRTC1_CRTC_STATUS__VI = 0x1DA3; +constexpr unsigned int mmCRTC1_CRTC_STATUS_FRAME_COUNT__VI = 0x1DA6; +constexpr unsigned int mmCRTC1_CRTC_STATUS_HV_COUNT__VI = 0x1DA8; +constexpr unsigned int mmCRTC1_CRTC_STATUS_POSITION__SI__CI = 0x1EA4; +constexpr unsigned int mmCRTC1_CRTC_STATUS_POSITION__VI = 0x1DA4; +constexpr unsigned int mmCRTC1_CRTC_STATUS_VF_COUNT__VI = 0x1DA7; +constexpr unsigned int mmCRTC1_CRTC_STEREO_CONTROL__VI = 0x1DAE; +constexpr unsigned int mmCRTC1_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x1D9A; +constexpr unsigned int mmCRTC1_CRTC_STEREO_STATUS__VI = 0x1DAD; +constexpr unsigned int mmCRTC1_CRTC_TEST_DEBUG_DATA__VI = 0x1DC7; +constexpr unsigned int mmCRTC1_CRTC_TEST_DEBUG_INDEX__VI = 0x1DC6; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_COLOR__VI = 0x1DBC; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_CONTROL__VI = 0x1DBA; +constexpr unsigned int mmCRTC1_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x1DBB; +constexpr unsigned int mmCRTC1_CRTC_TRIGA_CNTL__VI = 0x1D94; +constexpr unsigned int mmCRTC1_CRTC_TRIGA_MANUAL_TRIG__VI = 0x1D95; +constexpr unsigned int mmCRTC1_CRTC_TRIGB_CNTL__VI = 0x1D96; +constexpr unsigned int mmCRTC1_CRTC_TRIGB_MANUAL_TRIG__VI = 0x1D97; +constexpr unsigned int mmCRTC1_CRTC_UPDATE_LOCK__VI = 0x1DB5; +constexpr unsigned int mmCRTC1_CRTC_VBI_END__VI = 0x1D86; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x1DCF; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x1DCE; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x1DD1; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x1DD0; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x1DD3; +constexpr unsigned int mmCRTC1_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x1DD2; +constexpr unsigned int mmCRTC1_CRTC_VERT_SYNC_CONTROL__VI = 0x1DAC; +constexpr unsigned int mmCRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x1DB7; +constexpr unsigned int mmCRTC1_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x1D8C; +constexpr unsigned int mmCRTC1_CRTC_V_BLANK_START_END__VI = 0x1D8D; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_A__VI = 0x1D8E; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_A_CNTL__VI = 0x1D8F; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_B__VI = 0x1D90; +constexpr unsigned int mmCRTC1_CRTC_V_SYNC_B_CNTL__VI = 0x1D91; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL__VI = 0x1D87; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_CONTROL__VI = 0x1D8A; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_INT_STATUS__VI = 0x1D8B; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_MAX__VI = 0x1D89; +constexpr unsigned int mmCRTC1_CRTC_V_TOTAL_MIN__VI = 0x1D88; +constexpr unsigned int mmCRTC1_CRTC_V_UPDATE_INT_STATUS__VI = 0x1DC4; +constexpr unsigned int mmCRTC1_DCFE_DBG_SEL__VI = 0x1D7E; +constexpr unsigned int mmCRTC1_DCFE_MEM_PWR_CTRL__VI = 0x1D7F; +constexpr unsigned int mmCRTC1_DCFE_MEM_PWR_CTRL2__VI = 0x1DB8; +constexpr unsigned int mmCRTC1_DCFE_MEM_PWR_STATUS__VI = 0x1DB9; +constexpr unsigned int mmCRTC1_MASTER_UPDATE_LOCK__VI = 0x1DBD; +constexpr unsigned int mmCRTC1_MASTER_UPDATE_MODE__SI__CI = 0x1EBE; +constexpr unsigned int mmCRTC1_MASTER_UPDATE_MODE__VI = 0x1DBE; +constexpr unsigned int mmCRTC1_PIXEL_RATE_CNTL__VI = 0x0144; +constexpr unsigned int mmCRTC2_CRTC_3D_STRUCTURE_CONTROL__VI = 0x1F78; +constexpr unsigned int mmCRTC2_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x1FC3; +constexpr unsigned int mmCRTC2_CRTC_AVSYNC_COUNTER__VI = 0x1F9B; +constexpr unsigned int mmCRTC2_CRTC_BLACK_COLOR__VI = 0x1FCC; +constexpr unsigned int mmCRTC2_CRTC_BLACK_COLOR_EXT__VI = 0x1FCD; +constexpr unsigned int mmCRTC2_CRTC_BLANK_CONTROL__SI__CI = 0x419D; +constexpr unsigned int mmCRTC2_CRTC_BLANK_CONTROL__VI = 0x1F9D; +constexpr unsigned int mmCRTC2_CRTC_BLANK_DATA_COLOR__VI = 0x1FCA; +constexpr unsigned int mmCRTC2_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x1FCB; +constexpr unsigned int mmCRTC2_CRTC_CONTROL__VI = 0x1F9C; +constexpr unsigned int mmCRTC2_CRTC_COUNT_CONTROL__VI = 0x1FA9; +constexpr unsigned int mmCRTC2_CRTC_COUNT_RESET__VI = 0x1FAA; +constexpr unsigned int mmCRTC2_CRTC_CRC0_DATA_B__VI = 0x1FDA; +constexpr unsigned int mmCRTC2_CRTC_CRC0_DATA_RG__VI = 0x1FD9; +constexpr unsigned int mmCRTC2_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x1FD5; +constexpr unsigned int mmCRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x1FD6; +constexpr unsigned int mmCRTC2_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x1FD7; +constexpr unsigned int mmCRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x1FD8; +constexpr unsigned int mmCRTC2_CRTC_CRC1_DATA_B__VI = 0x1FE0; +constexpr unsigned int mmCRTC2_CRTC_CRC1_DATA_RG__VI = 0x1FDF; +constexpr unsigned int mmCRTC2_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x1FDB; +constexpr unsigned int mmCRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x1FDC; +constexpr unsigned int mmCRTC2_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x1FDD; +constexpr unsigned int mmCRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x1FDE; +constexpr unsigned int mmCRTC2_CRTC_CRC_CNTL__VI = 0x1FD4; +constexpr unsigned int mmCRTC2_CRTC_DCFE_CLOCK_CONTROL__VI = 0x1F7C; +constexpr unsigned int mmCRTC2_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x1FB6; +constexpr unsigned int mmCRTC2_CRTC_DTMTEST_CNTL__VI = 0x1F92; +constexpr unsigned int mmCRTC2_CRTC_DTMTEST_STATUS_POSITION__VI = 0x1F93; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x1FE1; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x1FE5; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x1FE4; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x1FE6; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x1FE3; +constexpr unsigned int mmCRTC2_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x1FE2; +constexpr unsigned int mmCRTC2_CRTC_FIELD_INDICATION_CONTROL__VI = 0x1FA0; +constexpr unsigned int mmCRTC2_CRTC_FLOW_CONTROL__VI = 0x1F99; +constexpr unsigned int mmCRTC2_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x1F98; +constexpr unsigned int mmCRTC2_CRTC_GSL_CONTROL__VI = 0x1F7B; +constexpr unsigned int mmCRTC2_CRTC_GSL_VSYNC_GAP__VI = 0x1F79; +constexpr unsigned int mmCRTC2_CRTC_GSL_WINDOW__VI = 0x1F7A; +constexpr unsigned int mmCRTC2_CRTC_H_BLANK_EARLY_NUM__VI = 0x1F7D; +constexpr unsigned int mmCRTC2_CRTC_H_BLANK_START_END__VI = 0x1F81; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_A__VI = 0x1F82; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_A_CNTL__VI = 0x1F83; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_B__VI = 0x1F84; +constexpr unsigned int mmCRTC2_CRTC_H_SYNC_B_CNTL__VI = 0x1F85; +constexpr unsigned int mmCRTC2_CRTC_H_TOTAL__VI = 0x1F80; +constexpr unsigned int mmCRTC2_CRTC_INTERLACE_CONTROL__VI = 0x1F9E; +constexpr unsigned int mmCRTC2_CRTC_INTERLACE_STATUS__VI = 0x1F9F; +constexpr unsigned int mmCRTC2_CRTC_INTERRUPT_CONTROL__VI = 0x1FB4; +constexpr unsigned int mmCRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x1FAB; +constexpr unsigned int mmCRTC2_CRTC_MASTER_EN__VI = 0x1FC2; +constexpr unsigned int mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x1FBF; +constexpr unsigned int mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x1FC0; +constexpr unsigned int mmCRTC2_CRTC_MVP_STATUS__VI = 0x1FC1; +constexpr unsigned int mmCRTC2_CRTC_NOM_VERT_POSITION__VI = 0x1FA5; +constexpr unsigned int mmCRTC2_CRTC_OVERSCAN_COLOR__VI = 0x1FC8; +constexpr unsigned int mmCRTC2_CRTC_OVERSCAN_COLOR_EXT__VI = 0x1FC9; +constexpr unsigned int mmCRTC2_CRTC_PIXEL_DATA_READBACK0__VI = 0x1FA1; +constexpr unsigned int mmCRTC2_CRTC_PIXEL_DATA_READBACK1__VI = 0x1FA2; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_CONTROL__VI = 0x1FB0; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_FRAME__VI = 0x1FB2; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_POSITION__VI = 0x1FB1; +constexpr unsigned int mmCRTC2_CRTC_SNAPSHOT_STATUS__VI = 0x1FAF; +constexpr unsigned int mmCRTC2_CRTC_START_LINE_CONTROL__VI = 0x1FB3; +constexpr unsigned int mmCRTC2_CRTC_STATIC_SCREEN_CONTROL__VI = 0x1FE7; +constexpr unsigned int mmCRTC2_CRTC_STATUS__SI__CI = 0x41A3; +constexpr unsigned int mmCRTC2_CRTC_STATUS__VI = 0x1FA3; +constexpr unsigned int mmCRTC2_CRTC_STATUS_FRAME_COUNT__VI = 0x1FA6; +constexpr unsigned int mmCRTC2_CRTC_STATUS_HV_COUNT__VI = 0x1FA8; +constexpr unsigned int mmCRTC2_CRTC_STATUS_POSITION__SI__CI = 0x41A4; +constexpr unsigned int mmCRTC2_CRTC_STATUS_POSITION__VI = 0x1FA4; +constexpr unsigned int mmCRTC2_CRTC_STATUS_VF_COUNT__VI = 0x1FA7; +constexpr unsigned int mmCRTC2_CRTC_STEREO_CONTROL__VI = 0x1FAE; +constexpr unsigned int mmCRTC2_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x1F9A; +constexpr unsigned int mmCRTC2_CRTC_STEREO_STATUS__VI = 0x1FAD; +constexpr unsigned int mmCRTC2_CRTC_TEST_DEBUG_DATA__VI = 0x1FC7; +constexpr unsigned int mmCRTC2_CRTC_TEST_DEBUG_INDEX__VI = 0x1FC6; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_COLOR__VI = 0x1FBC; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_CONTROL__VI = 0x1FBA; +constexpr unsigned int mmCRTC2_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x1FBB; +constexpr unsigned int mmCRTC2_CRTC_TRIGA_CNTL__VI = 0x1F94; +constexpr unsigned int mmCRTC2_CRTC_TRIGA_MANUAL_TRIG__VI = 0x1F95; +constexpr unsigned int mmCRTC2_CRTC_TRIGB_CNTL__VI = 0x1F96; +constexpr unsigned int mmCRTC2_CRTC_TRIGB_MANUAL_TRIG__VI = 0x1F97; +constexpr unsigned int mmCRTC2_CRTC_UPDATE_LOCK__VI = 0x1FB5; +constexpr unsigned int mmCRTC2_CRTC_VBI_END__VI = 0x1F86; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x1FCF; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x1FCE; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x1FD1; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x1FD0; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x1FD3; +constexpr unsigned int mmCRTC2_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x1FD2; +constexpr unsigned int mmCRTC2_CRTC_VERT_SYNC_CONTROL__VI = 0x1FAC; +constexpr unsigned int mmCRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x1FB7; +constexpr unsigned int mmCRTC2_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x1F8C; +constexpr unsigned int mmCRTC2_CRTC_V_BLANK_START_END__VI = 0x1F8D; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_A__VI = 0x1F8E; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_A_CNTL__VI = 0x1F8F; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_B__VI = 0x1F90; +constexpr unsigned int mmCRTC2_CRTC_V_SYNC_B_CNTL__VI = 0x1F91; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL__VI = 0x1F87; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_CONTROL__VI = 0x1F8A; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_INT_STATUS__VI = 0x1F8B; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_MAX__VI = 0x1F89; +constexpr unsigned int mmCRTC2_CRTC_V_TOTAL_MIN__VI = 0x1F88; +constexpr unsigned int mmCRTC2_CRTC_V_UPDATE_INT_STATUS__VI = 0x1FC4; +constexpr unsigned int mmCRTC2_DCFE_DBG_SEL__VI = 0x1F7E; +constexpr unsigned int mmCRTC2_DCFE_MEM_PWR_CTRL__VI = 0x1F7F; +constexpr unsigned int mmCRTC2_DCFE_MEM_PWR_CTRL2__VI = 0x1FB8; +constexpr unsigned int mmCRTC2_DCFE_MEM_PWR_STATUS__VI = 0x1FB9; +constexpr unsigned int mmCRTC2_MASTER_UPDATE_LOCK__VI = 0x1FBD; +constexpr unsigned int mmCRTC2_MASTER_UPDATE_MODE__SI__CI = 0x41BE; +constexpr unsigned int mmCRTC2_MASTER_UPDATE_MODE__VI = 0x1FBE; +constexpr unsigned int mmCRTC2_PIXEL_RATE_CNTL__VI = 0x0148; +constexpr unsigned int mmCRTC3_CRTC_3D_STRUCTURE_CONTROL__VI = 0x4178; +constexpr unsigned int mmCRTC3_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x41C3; +constexpr unsigned int mmCRTC3_CRTC_AVSYNC_COUNTER__VI = 0x419B; +constexpr unsigned int mmCRTC3_CRTC_BLACK_COLOR__VI = 0x41CC; +constexpr unsigned int mmCRTC3_CRTC_BLACK_COLOR_EXT__VI = 0x41CD; +constexpr unsigned int mmCRTC3_CRTC_BLANK_CONTROL__SI__CI = 0x449D; +constexpr unsigned int mmCRTC3_CRTC_BLANK_CONTROL__VI = 0x419D; +constexpr unsigned int mmCRTC3_CRTC_BLANK_DATA_COLOR__VI = 0x41CA; +constexpr unsigned int mmCRTC3_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x41CB; +constexpr unsigned int mmCRTC3_CRTC_CONTROL__VI = 0x419C; +constexpr unsigned int mmCRTC3_CRTC_COUNT_CONTROL__VI = 0x41A9; +constexpr unsigned int mmCRTC3_CRTC_COUNT_RESET__VI = 0x41AA; +constexpr unsigned int mmCRTC3_CRTC_CRC0_DATA_B__VI = 0x41DA; +constexpr unsigned int mmCRTC3_CRTC_CRC0_DATA_RG__VI = 0x41D9; +constexpr unsigned int mmCRTC3_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x41D5; +constexpr unsigned int mmCRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x41D6; +constexpr unsigned int mmCRTC3_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x41D7; +constexpr unsigned int mmCRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x41D8; +constexpr unsigned int mmCRTC3_CRTC_CRC1_DATA_B__VI = 0x41E0; +constexpr unsigned int mmCRTC3_CRTC_CRC1_DATA_RG__VI = 0x41DF; +constexpr unsigned int mmCRTC3_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x41DB; +constexpr unsigned int mmCRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x41DC; +constexpr unsigned int mmCRTC3_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x41DD; +constexpr unsigned int mmCRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x41DE; +constexpr unsigned int mmCRTC3_CRTC_CRC_CNTL__VI = 0x41D4; +constexpr unsigned int mmCRTC3_CRTC_DCFE_CLOCK_CONTROL__VI = 0x417C; +constexpr unsigned int mmCRTC3_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x41B6; +constexpr unsigned int mmCRTC3_CRTC_DTMTEST_CNTL__VI = 0x4192; +constexpr unsigned int mmCRTC3_CRTC_DTMTEST_STATUS_POSITION__VI = 0x4193; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x41E1; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x41E5; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x41E4; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x41E6; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x41E3; +constexpr unsigned int mmCRTC3_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x41E2; +constexpr unsigned int mmCRTC3_CRTC_FIELD_INDICATION_CONTROL__VI = 0x41A0; +constexpr unsigned int mmCRTC3_CRTC_FLOW_CONTROL__VI = 0x4199; +constexpr unsigned int mmCRTC3_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x4198; +constexpr unsigned int mmCRTC3_CRTC_GSL_CONTROL__VI = 0x417B; +constexpr unsigned int mmCRTC3_CRTC_GSL_VSYNC_GAP__VI = 0x4179; +constexpr unsigned int mmCRTC3_CRTC_GSL_WINDOW__VI = 0x417A; +constexpr unsigned int mmCRTC3_CRTC_H_BLANK_EARLY_NUM__VI = 0x417D; +constexpr unsigned int mmCRTC3_CRTC_H_BLANK_START_END__VI = 0x4181; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_A__VI = 0x4182; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_A_CNTL__VI = 0x4183; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_B__VI = 0x4184; +constexpr unsigned int mmCRTC3_CRTC_H_SYNC_B_CNTL__VI = 0x4185; +constexpr unsigned int mmCRTC3_CRTC_H_TOTAL__VI = 0x4180; +constexpr unsigned int mmCRTC3_CRTC_INTERLACE_CONTROL__VI = 0x419E; +constexpr unsigned int mmCRTC3_CRTC_INTERLACE_STATUS__VI = 0x419F; +constexpr unsigned int mmCRTC3_CRTC_INTERRUPT_CONTROL__VI = 0x41B4; +constexpr unsigned int mmCRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x41AB; +constexpr unsigned int mmCRTC3_CRTC_MASTER_EN__VI = 0x41C2; +constexpr unsigned int mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x41BF; +constexpr unsigned int mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x41C0; +constexpr unsigned int mmCRTC3_CRTC_MVP_STATUS__VI = 0x41C1; +constexpr unsigned int mmCRTC3_CRTC_NOM_VERT_POSITION__VI = 0x41A5; +constexpr unsigned int mmCRTC3_CRTC_OVERSCAN_COLOR__VI = 0x41C8; +constexpr unsigned int mmCRTC3_CRTC_OVERSCAN_COLOR_EXT__VI = 0x41C9; +constexpr unsigned int mmCRTC3_CRTC_PIXEL_DATA_READBACK0__VI = 0x41A1; +constexpr unsigned int mmCRTC3_CRTC_PIXEL_DATA_READBACK1__VI = 0x41A2; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_CONTROL__VI = 0x41B0; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_FRAME__VI = 0x41B2; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_POSITION__VI = 0x41B1; +constexpr unsigned int mmCRTC3_CRTC_SNAPSHOT_STATUS__VI = 0x41AF; +constexpr unsigned int mmCRTC3_CRTC_START_LINE_CONTROL__VI = 0x41B3; +constexpr unsigned int mmCRTC3_CRTC_STATIC_SCREEN_CONTROL__VI = 0x41E7; +constexpr unsigned int mmCRTC3_CRTC_STATUS__SI__CI = 0x44A3; +constexpr unsigned int mmCRTC3_CRTC_STATUS__VI = 0x41A3; +constexpr unsigned int mmCRTC3_CRTC_STATUS_FRAME_COUNT__VI = 0x41A6; +constexpr unsigned int mmCRTC3_CRTC_STATUS_HV_COUNT__VI = 0x41A8; +constexpr unsigned int mmCRTC3_CRTC_STATUS_POSITION__SI__CI = 0x44A4; +constexpr unsigned int mmCRTC3_CRTC_STATUS_POSITION__VI = 0x41A4; +constexpr unsigned int mmCRTC3_CRTC_STATUS_VF_COUNT__VI = 0x41A7; +constexpr unsigned int mmCRTC3_CRTC_STEREO_CONTROL__VI = 0x41AE; +constexpr unsigned int mmCRTC3_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x419A; +constexpr unsigned int mmCRTC3_CRTC_STEREO_STATUS__VI = 0x41AD; +constexpr unsigned int mmCRTC3_CRTC_TEST_DEBUG_DATA__VI = 0x41C7; +constexpr unsigned int mmCRTC3_CRTC_TEST_DEBUG_INDEX__VI = 0x41C6; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_COLOR__VI = 0x41BC; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_CONTROL__VI = 0x41BA; +constexpr unsigned int mmCRTC3_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x41BB; +constexpr unsigned int mmCRTC3_CRTC_TRIGA_CNTL__VI = 0x4194; +constexpr unsigned int mmCRTC3_CRTC_TRIGA_MANUAL_TRIG__VI = 0x4195; +constexpr unsigned int mmCRTC3_CRTC_TRIGB_CNTL__VI = 0x4196; +constexpr unsigned int mmCRTC3_CRTC_TRIGB_MANUAL_TRIG__VI = 0x4197; +constexpr unsigned int mmCRTC3_CRTC_UPDATE_LOCK__VI = 0x41B5; +constexpr unsigned int mmCRTC3_CRTC_VBI_END__VI = 0x4186; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x41CF; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x41CE; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x41D1; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x41D0; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x41D3; +constexpr unsigned int mmCRTC3_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x41D2; +constexpr unsigned int mmCRTC3_CRTC_VERT_SYNC_CONTROL__VI = 0x41AC; +constexpr unsigned int mmCRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x41B7; +constexpr unsigned int mmCRTC3_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x418C; +constexpr unsigned int mmCRTC3_CRTC_V_BLANK_START_END__VI = 0x418D; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_A__VI = 0x418E; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_A_CNTL__VI = 0x418F; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_B__VI = 0x4190; +constexpr unsigned int mmCRTC3_CRTC_V_SYNC_B_CNTL__VI = 0x4191; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL__VI = 0x4187; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_CONTROL__VI = 0x418A; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_INT_STATUS__VI = 0x418B; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_MAX__VI = 0x4189; +constexpr unsigned int mmCRTC3_CRTC_V_TOTAL_MIN__VI = 0x4188; +constexpr unsigned int mmCRTC3_CRTC_V_UPDATE_INT_STATUS__VI = 0x41C4; +constexpr unsigned int mmCRTC3_DCFE_DBG_SEL__VI = 0x417E; +constexpr unsigned int mmCRTC3_DCFE_MEM_PWR_CTRL__VI = 0x417F; +constexpr unsigned int mmCRTC3_DCFE_MEM_PWR_CTRL2__VI = 0x41B8; +constexpr unsigned int mmCRTC3_DCFE_MEM_PWR_STATUS__VI = 0x41B9; +constexpr unsigned int mmCRTC3_MASTER_UPDATE_LOCK__VI = 0x41BD; +constexpr unsigned int mmCRTC3_MASTER_UPDATE_MODE__SI__CI = 0x44BE; +constexpr unsigned int mmCRTC3_MASTER_UPDATE_MODE__VI = 0x41BE; +constexpr unsigned int mmCRTC3_PIXEL_RATE_CNTL__VI = 0x014C; +constexpr unsigned int mmCRTC4_CRTC_3D_STRUCTURE_CONTROL__VI = 0x4378; +constexpr unsigned int mmCRTC4_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x43C3; +constexpr unsigned int mmCRTC4_CRTC_AVSYNC_COUNTER__VI = 0x439B; +constexpr unsigned int mmCRTC4_CRTC_BLACK_COLOR__VI = 0x43CC; +constexpr unsigned int mmCRTC4_CRTC_BLACK_COLOR_EXT__VI = 0x43CD; +constexpr unsigned int mmCRTC4_CRTC_BLANK_CONTROL__SI__CI = 0x479D; +constexpr unsigned int mmCRTC4_CRTC_BLANK_CONTROL__VI = 0x439D; +constexpr unsigned int mmCRTC4_CRTC_BLANK_DATA_COLOR__VI = 0x43CA; +constexpr unsigned int mmCRTC4_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x43CB; +constexpr unsigned int mmCRTC4_CRTC_CONTROL__VI = 0x439C; +constexpr unsigned int mmCRTC4_CRTC_COUNT_CONTROL__VI = 0x43A9; +constexpr unsigned int mmCRTC4_CRTC_COUNT_RESET__VI = 0x43AA; +constexpr unsigned int mmCRTC4_CRTC_CRC0_DATA_B__VI = 0x43DA; +constexpr unsigned int mmCRTC4_CRTC_CRC0_DATA_RG__VI = 0x43D9; +constexpr unsigned int mmCRTC4_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x43D5; +constexpr unsigned int mmCRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x43D6; +constexpr unsigned int mmCRTC4_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x43D7; +constexpr unsigned int mmCRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x43D8; +constexpr unsigned int mmCRTC4_CRTC_CRC1_DATA_B__VI = 0x43E0; +constexpr unsigned int mmCRTC4_CRTC_CRC1_DATA_RG__VI = 0x43DF; +constexpr unsigned int mmCRTC4_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x43DB; +constexpr unsigned int mmCRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x43DC; +constexpr unsigned int mmCRTC4_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x43DD; +constexpr unsigned int mmCRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x43DE; +constexpr unsigned int mmCRTC4_CRTC_CRC_CNTL__VI = 0x43D4; +constexpr unsigned int mmCRTC4_CRTC_DCFE_CLOCK_CONTROL__VI = 0x437C; +constexpr unsigned int mmCRTC4_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x43B6; +constexpr unsigned int mmCRTC4_CRTC_DTMTEST_CNTL__VI = 0x4392; +constexpr unsigned int mmCRTC4_CRTC_DTMTEST_STATUS_POSITION__VI = 0x4393; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x43E1; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x43E5; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x43E4; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x43E6; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x43E3; +constexpr unsigned int mmCRTC4_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x43E2; +constexpr unsigned int mmCRTC4_CRTC_FIELD_INDICATION_CONTROL__VI = 0x43A0; +constexpr unsigned int mmCRTC4_CRTC_FLOW_CONTROL__VI = 0x4399; +constexpr unsigned int mmCRTC4_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x4398; +constexpr unsigned int mmCRTC4_CRTC_GSL_CONTROL__VI = 0x437B; +constexpr unsigned int mmCRTC4_CRTC_GSL_VSYNC_GAP__VI = 0x4379; +constexpr unsigned int mmCRTC4_CRTC_GSL_WINDOW__VI = 0x437A; +constexpr unsigned int mmCRTC4_CRTC_H_BLANK_EARLY_NUM__VI = 0x437D; +constexpr unsigned int mmCRTC4_CRTC_H_BLANK_START_END__VI = 0x4381; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_A__VI = 0x4382; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_A_CNTL__VI = 0x4383; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_B__VI = 0x4384; +constexpr unsigned int mmCRTC4_CRTC_H_SYNC_B_CNTL__VI = 0x4385; +constexpr unsigned int mmCRTC4_CRTC_H_TOTAL__VI = 0x4380; +constexpr unsigned int mmCRTC4_CRTC_INTERLACE_CONTROL__VI = 0x439E; +constexpr unsigned int mmCRTC4_CRTC_INTERLACE_STATUS__VI = 0x439F; +constexpr unsigned int mmCRTC4_CRTC_INTERRUPT_CONTROL__VI = 0x43B4; +constexpr unsigned int mmCRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x43AB; +constexpr unsigned int mmCRTC4_CRTC_MASTER_EN__VI = 0x43C2; +constexpr unsigned int mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x43BF; +constexpr unsigned int mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x43C0; +constexpr unsigned int mmCRTC4_CRTC_MVP_STATUS__VI = 0x43C1; +constexpr unsigned int mmCRTC4_CRTC_NOM_VERT_POSITION__VI = 0x43A5; +constexpr unsigned int mmCRTC4_CRTC_OVERSCAN_COLOR__VI = 0x43C8; +constexpr unsigned int mmCRTC4_CRTC_OVERSCAN_COLOR_EXT__VI = 0x43C9; +constexpr unsigned int mmCRTC4_CRTC_PIXEL_DATA_READBACK0__VI = 0x43A1; +constexpr unsigned int mmCRTC4_CRTC_PIXEL_DATA_READBACK1__VI = 0x43A2; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_CONTROL__VI = 0x43B0; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_FRAME__VI = 0x43B2; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_POSITION__VI = 0x43B1; +constexpr unsigned int mmCRTC4_CRTC_SNAPSHOT_STATUS__VI = 0x43AF; +constexpr unsigned int mmCRTC4_CRTC_START_LINE_CONTROL__VI = 0x43B3; +constexpr unsigned int mmCRTC4_CRTC_STATIC_SCREEN_CONTROL__VI = 0x43E7; +constexpr unsigned int mmCRTC4_CRTC_STATUS__SI__CI = 0x47A3; +constexpr unsigned int mmCRTC4_CRTC_STATUS__VI = 0x43A3; +constexpr unsigned int mmCRTC4_CRTC_STATUS_FRAME_COUNT__VI = 0x43A6; +constexpr unsigned int mmCRTC4_CRTC_STATUS_HV_COUNT__VI = 0x43A8; +constexpr unsigned int mmCRTC4_CRTC_STATUS_POSITION__SI__CI = 0x47A4; +constexpr unsigned int mmCRTC4_CRTC_STATUS_POSITION__VI = 0x43A4; +constexpr unsigned int mmCRTC4_CRTC_STATUS_VF_COUNT__VI = 0x43A7; +constexpr unsigned int mmCRTC4_CRTC_STEREO_CONTROL__VI = 0x43AE; +constexpr unsigned int mmCRTC4_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x439A; +constexpr unsigned int mmCRTC4_CRTC_STEREO_STATUS__VI = 0x43AD; +constexpr unsigned int mmCRTC4_CRTC_TEST_DEBUG_DATA__VI = 0x43C7; +constexpr unsigned int mmCRTC4_CRTC_TEST_DEBUG_INDEX__VI = 0x43C6; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_COLOR__VI = 0x43BC; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_CONTROL__VI = 0x43BA; +constexpr unsigned int mmCRTC4_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x43BB; +constexpr unsigned int mmCRTC4_CRTC_TRIGA_CNTL__VI = 0x4394; +constexpr unsigned int mmCRTC4_CRTC_TRIGA_MANUAL_TRIG__VI = 0x4395; +constexpr unsigned int mmCRTC4_CRTC_TRIGB_CNTL__VI = 0x4396; +constexpr unsigned int mmCRTC4_CRTC_TRIGB_MANUAL_TRIG__VI = 0x4397; +constexpr unsigned int mmCRTC4_CRTC_UPDATE_LOCK__VI = 0x43B5; +constexpr unsigned int mmCRTC4_CRTC_VBI_END__VI = 0x4386; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x43CF; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x43CE; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x43D1; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x43D0; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x43D3; +constexpr unsigned int mmCRTC4_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x43D2; +constexpr unsigned int mmCRTC4_CRTC_VERT_SYNC_CONTROL__VI = 0x43AC; +constexpr unsigned int mmCRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x43B7; +constexpr unsigned int mmCRTC4_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x438C; +constexpr unsigned int mmCRTC4_CRTC_V_BLANK_START_END__VI = 0x438D; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_A__VI = 0x438E; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_A_CNTL__VI = 0x438F; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_B__VI = 0x4390; +constexpr unsigned int mmCRTC4_CRTC_V_SYNC_B_CNTL__VI = 0x4391; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL__VI = 0x4387; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_CONTROL__VI = 0x438A; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_INT_STATUS__VI = 0x438B; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_MAX__VI = 0x4389; +constexpr unsigned int mmCRTC4_CRTC_V_TOTAL_MIN__VI = 0x4388; +constexpr unsigned int mmCRTC4_CRTC_V_UPDATE_INT_STATUS__VI = 0x43C4; +constexpr unsigned int mmCRTC4_DCFE_DBG_SEL__VI = 0x437E; +constexpr unsigned int mmCRTC4_DCFE_MEM_PWR_CTRL__VI = 0x437F; +constexpr unsigned int mmCRTC4_DCFE_MEM_PWR_CTRL2__VI = 0x43B8; +constexpr unsigned int mmCRTC4_DCFE_MEM_PWR_STATUS__VI = 0x43B9; +constexpr unsigned int mmCRTC4_MASTER_UPDATE_LOCK__VI = 0x43BD; +constexpr unsigned int mmCRTC4_MASTER_UPDATE_MODE__SI__CI = 0x47BE; +constexpr unsigned int mmCRTC4_MASTER_UPDATE_MODE__VI = 0x43BE; +constexpr unsigned int mmCRTC4_PIXEL_RATE_CNTL__VI = 0x0150; +constexpr unsigned int mmCRTC5_CRTC_3D_STRUCTURE_CONTROL__VI = 0x4578; +constexpr unsigned int mmCRTC5_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x45C3; +constexpr unsigned int mmCRTC5_CRTC_AVSYNC_COUNTER__VI = 0x459B; +constexpr unsigned int mmCRTC5_CRTC_BLACK_COLOR__VI = 0x45CC; +constexpr unsigned int mmCRTC5_CRTC_BLACK_COLOR_EXT__VI = 0x45CD; +constexpr unsigned int mmCRTC5_CRTC_BLANK_CONTROL__SI__CI = 0x4A9D; +constexpr unsigned int mmCRTC5_CRTC_BLANK_CONTROL__VI = 0x459D; +constexpr unsigned int mmCRTC5_CRTC_BLANK_DATA_COLOR__VI = 0x45CA; +constexpr unsigned int mmCRTC5_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x45CB; +constexpr unsigned int mmCRTC5_CRTC_CONTROL__VI = 0x459C; +constexpr unsigned int mmCRTC5_CRTC_COUNT_CONTROL__VI = 0x45A9; +constexpr unsigned int mmCRTC5_CRTC_COUNT_RESET__VI = 0x45AA; +constexpr unsigned int mmCRTC5_CRTC_CRC0_DATA_B__VI = 0x45DA; +constexpr unsigned int mmCRTC5_CRTC_CRC0_DATA_RG__VI = 0x45D9; +constexpr unsigned int mmCRTC5_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x45D5; +constexpr unsigned int mmCRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x45D6; +constexpr unsigned int mmCRTC5_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x45D7; +constexpr unsigned int mmCRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x45D8; +constexpr unsigned int mmCRTC5_CRTC_CRC1_DATA_B__VI = 0x45E0; +constexpr unsigned int mmCRTC5_CRTC_CRC1_DATA_RG__VI = 0x45DF; +constexpr unsigned int mmCRTC5_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x45DB; +constexpr unsigned int mmCRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x45DC; +constexpr unsigned int mmCRTC5_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x45DD; +constexpr unsigned int mmCRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x45DE; +constexpr unsigned int mmCRTC5_CRTC_CRC_CNTL__VI = 0x45D4; +constexpr unsigned int mmCRTC5_CRTC_DCFE_CLOCK_CONTROL__VI = 0x457C; +constexpr unsigned int mmCRTC5_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x45B6; +constexpr unsigned int mmCRTC5_CRTC_DTMTEST_CNTL__VI = 0x4592; +constexpr unsigned int mmCRTC5_CRTC_DTMTEST_STATUS_POSITION__VI = 0x4593; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x45E1; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x45E5; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x45E4; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x45E6; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x45E3; +constexpr unsigned int mmCRTC5_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x45E2; +constexpr unsigned int mmCRTC5_CRTC_FIELD_INDICATION_CONTROL__VI = 0x45A0; +constexpr unsigned int mmCRTC5_CRTC_FLOW_CONTROL__VI = 0x4599; +constexpr unsigned int mmCRTC5_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x4598; +constexpr unsigned int mmCRTC5_CRTC_GSL_CONTROL__VI = 0x457B; +constexpr unsigned int mmCRTC5_CRTC_GSL_VSYNC_GAP__VI = 0x4579; +constexpr unsigned int mmCRTC5_CRTC_GSL_WINDOW__VI = 0x457A; +constexpr unsigned int mmCRTC5_CRTC_H_BLANK_EARLY_NUM__VI = 0x457D; +constexpr unsigned int mmCRTC5_CRTC_H_BLANK_START_END__VI = 0x4581; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_A__VI = 0x4582; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_A_CNTL__VI = 0x4583; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_B__VI = 0x4584; +constexpr unsigned int mmCRTC5_CRTC_H_SYNC_B_CNTL__VI = 0x4585; +constexpr unsigned int mmCRTC5_CRTC_H_TOTAL__VI = 0x4580; +constexpr unsigned int mmCRTC5_CRTC_INTERLACE_CONTROL__VI = 0x459E; +constexpr unsigned int mmCRTC5_CRTC_INTERLACE_STATUS__VI = 0x459F; +constexpr unsigned int mmCRTC5_CRTC_INTERRUPT_CONTROL__VI = 0x45B4; +constexpr unsigned int mmCRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x45AB; +constexpr unsigned int mmCRTC5_CRTC_MASTER_EN__VI = 0x45C2; +constexpr unsigned int mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x45BF; +constexpr unsigned int mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x45C0; +constexpr unsigned int mmCRTC5_CRTC_MVP_STATUS__VI = 0x45C1; +constexpr unsigned int mmCRTC5_CRTC_NOM_VERT_POSITION__VI = 0x45A5; +constexpr unsigned int mmCRTC5_CRTC_OVERSCAN_COLOR__VI = 0x45C8; +constexpr unsigned int mmCRTC5_CRTC_OVERSCAN_COLOR_EXT__VI = 0x45C9; +constexpr unsigned int mmCRTC5_CRTC_PIXEL_DATA_READBACK0__VI = 0x45A1; +constexpr unsigned int mmCRTC5_CRTC_PIXEL_DATA_READBACK1__VI = 0x45A2; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_CONTROL__VI = 0x45B0; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_FRAME__VI = 0x45B2; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_POSITION__VI = 0x45B1; +constexpr unsigned int mmCRTC5_CRTC_SNAPSHOT_STATUS__VI = 0x45AF; +constexpr unsigned int mmCRTC5_CRTC_START_LINE_CONTROL__VI = 0x45B3; +constexpr unsigned int mmCRTC5_CRTC_STATIC_SCREEN_CONTROL__VI = 0x45E7; +constexpr unsigned int mmCRTC5_CRTC_STATUS__SI__CI = 0x4AA3; +constexpr unsigned int mmCRTC5_CRTC_STATUS__VI = 0x45A3; +constexpr unsigned int mmCRTC5_CRTC_STATUS_FRAME_COUNT__VI = 0x45A6; +constexpr unsigned int mmCRTC5_CRTC_STATUS_HV_COUNT__VI = 0x45A8; +constexpr unsigned int mmCRTC5_CRTC_STATUS_POSITION__SI__CI = 0x4AA4; +constexpr unsigned int mmCRTC5_CRTC_STATUS_POSITION__VI = 0x45A4; +constexpr unsigned int mmCRTC5_CRTC_STATUS_VF_COUNT__VI = 0x45A7; +constexpr unsigned int mmCRTC5_CRTC_STEREO_CONTROL__VI = 0x45AE; +constexpr unsigned int mmCRTC5_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x459A; +constexpr unsigned int mmCRTC5_CRTC_STEREO_STATUS__VI = 0x45AD; +constexpr unsigned int mmCRTC5_CRTC_TEST_DEBUG_DATA__VI = 0x45C7; +constexpr unsigned int mmCRTC5_CRTC_TEST_DEBUG_INDEX__VI = 0x45C6; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_COLOR__VI = 0x45BC; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_CONTROL__VI = 0x45BA; +constexpr unsigned int mmCRTC5_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x45BB; +constexpr unsigned int mmCRTC5_CRTC_TRIGA_CNTL__VI = 0x4594; +constexpr unsigned int mmCRTC5_CRTC_TRIGA_MANUAL_TRIG__VI = 0x4595; +constexpr unsigned int mmCRTC5_CRTC_TRIGB_CNTL__VI = 0x4596; +constexpr unsigned int mmCRTC5_CRTC_TRIGB_MANUAL_TRIG__VI = 0x4597; +constexpr unsigned int mmCRTC5_CRTC_UPDATE_LOCK__VI = 0x45B5; +constexpr unsigned int mmCRTC5_CRTC_VBI_END__VI = 0x4586; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x45CF; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x45CE; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x45D1; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x45D0; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x45D3; +constexpr unsigned int mmCRTC5_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x45D2; +constexpr unsigned int mmCRTC5_CRTC_VERT_SYNC_CONTROL__VI = 0x45AC; +constexpr unsigned int mmCRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x45B7; +constexpr unsigned int mmCRTC5_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x458C; +constexpr unsigned int mmCRTC5_CRTC_V_BLANK_START_END__VI = 0x458D; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_A__VI = 0x458E; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_A_CNTL__VI = 0x458F; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_B__VI = 0x4590; +constexpr unsigned int mmCRTC5_CRTC_V_SYNC_B_CNTL__VI = 0x4591; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL__VI = 0x4587; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_CONTROL__VI = 0x458A; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_INT_STATUS__VI = 0x458B; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_MAX__VI = 0x4589; +constexpr unsigned int mmCRTC5_CRTC_V_TOTAL_MIN__VI = 0x4588; +constexpr unsigned int mmCRTC5_CRTC_V_UPDATE_INT_STATUS__VI = 0x45C4; +constexpr unsigned int mmCRTC5_DCFE_DBG_SEL__VI = 0x457E; +constexpr unsigned int mmCRTC5_DCFE_MEM_PWR_CTRL__VI = 0x457F; +constexpr unsigned int mmCRTC5_DCFE_MEM_PWR_CTRL2__VI = 0x45B8; +constexpr unsigned int mmCRTC5_DCFE_MEM_PWR_STATUS__VI = 0x45B9; +constexpr unsigned int mmCRTC5_MASTER_UPDATE_LOCK__VI = 0x45BD; +constexpr unsigned int mmCRTC5_MASTER_UPDATE_MODE__SI__CI = 0x4ABE; +constexpr unsigned int mmCRTC5_MASTER_UPDATE_MODE__VI = 0x45BE; +constexpr unsigned int mmCRTC5_PIXEL_RATE_CNTL__VI = 0x0154; +constexpr unsigned int mmCRTC6_CRTC_3D_STRUCTURE_CONTROL__VI = 0x4778; +constexpr unsigned int mmCRTC6_CRTC_ALLOW_STOP_OFF_V_CNT__VI = 0x47C3; +constexpr unsigned int mmCRTC6_CRTC_AVSYNC_COUNTER__VI = 0x479B; +constexpr unsigned int mmCRTC6_CRTC_BLACK_COLOR__VI = 0x47CC; +constexpr unsigned int mmCRTC6_CRTC_BLACK_COLOR_EXT__VI = 0x47CD; +constexpr unsigned int mmCRTC6_CRTC_BLANK_CONTROL__VI = 0x479D; +constexpr unsigned int mmCRTC6_CRTC_BLANK_DATA_COLOR__VI = 0x47CA; +constexpr unsigned int mmCRTC6_CRTC_BLANK_DATA_COLOR_EXT__VI = 0x47CB; +constexpr unsigned int mmCRTC6_CRTC_CONTROL__VI = 0x479C; +constexpr unsigned int mmCRTC6_CRTC_COUNT_CONTROL__VI = 0x47A9; +constexpr unsigned int mmCRTC6_CRTC_COUNT_RESET__VI = 0x47AA; +constexpr unsigned int mmCRTC6_CRTC_CRC0_DATA_B__VI = 0x47DA; +constexpr unsigned int mmCRTC6_CRTC_CRC0_DATA_RG__VI = 0x47D9; +constexpr unsigned int mmCRTC6_CRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x47D5; +constexpr unsigned int mmCRTC6_CRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x47D6; +constexpr unsigned int mmCRTC6_CRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x47D7; +constexpr unsigned int mmCRTC6_CRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x47D8; +constexpr unsigned int mmCRTC6_CRTC_CRC1_DATA_B__VI = 0x47E0; +constexpr unsigned int mmCRTC6_CRTC_CRC1_DATA_RG__VI = 0x47DF; +constexpr unsigned int mmCRTC6_CRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x47DB; +constexpr unsigned int mmCRTC6_CRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x47DC; +constexpr unsigned int mmCRTC6_CRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x47DD; +constexpr unsigned int mmCRTC6_CRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x47DE; +constexpr unsigned int mmCRTC6_CRTC_CRC_CNTL__VI = 0x47D4; +constexpr unsigned int mmCRTC6_CRTC_DCFE_CLOCK_CONTROL__VI = 0x477C; +constexpr unsigned int mmCRTC6_CRTC_DOUBLE_BUFFER_CONTROL__VI = 0x47B6; +constexpr unsigned int mmCRTC6_CRTC_DTMTEST_CNTL__VI = 0x4792; +constexpr unsigned int mmCRTC6_CRTC_DTMTEST_STATUS_POSITION__VI = 0x4793; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x47E1; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x47E5; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x47E4; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x47E6; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x47E3; +constexpr unsigned int mmCRTC6_CRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x47E2; +constexpr unsigned int mmCRTC6_CRTC_FIELD_INDICATION_CONTROL__VI = 0x47A0; +constexpr unsigned int mmCRTC6_CRTC_FLOW_CONTROL__VI = 0x4799; +constexpr unsigned int mmCRTC6_CRTC_FORCE_COUNT_NOW_CNTL__VI = 0x4798; +constexpr unsigned int mmCRTC6_CRTC_GSL_CONTROL__VI = 0x477B; +constexpr unsigned int mmCRTC6_CRTC_GSL_VSYNC_GAP__VI = 0x4779; +constexpr unsigned int mmCRTC6_CRTC_GSL_WINDOW__VI = 0x477A; +constexpr unsigned int mmCRTC6_CRTC_H_BLANK_EARLY_NUM__VI = 0x477D; +constexpr unsigned int mmCRTC6_CRTC_H_BLANK_START_END__VI = 0x4781; +constexpr unsigned int mmCRTC6_CRTC_H_SYNC_A__VI = 0x4782; +constexpr unsigned int mmCRTC6_CRTC_H_SYNC_A_CNTL__VI = 0x4783; +constexpr unsigned int mmCRTC6_CRTC_H_SYNC_B__VI = 0x4784; +constexpr unsigned int mmCRTC6_CRTC_H_SYNC_B_CNTL__VI = 0x4785; +constexpr unsigned int mmCRTC6_CRTC_H_TOTAL__VI = 0x4780; +constexpr unsigned int mmCRTC6_CRTC_INTERLACE_CONTROL__VI = 0x479E; +constexpr unsigned int mmCRTC6_CRTC_INTERLACE_STATUS__VI = 0x479F; +constexpr unsigned int mmCRTC6_CRTC_INTERRUPT_CONTROL__VI = 0x47B4; +constexpr unsigned int mmCRTC6_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE__VI = 0x47AB; +constexpr unsigned int mmCRTC6_CRTC_MASTER_EN__VI = 0x47C2; +constexpr unsigned int mmCRTC6_CRTC_MVP_INBAND_CNTL_INSERT__VI = 0x47BF; +constexpr unsigned int mmCRTC6_CRTC_MVP_INBAND_CNTL_INSERT_TIMER__VI = 0x47C0; +constexpr unsigned int mmCRTC6_CRTC_MVP_STATUS__VI = 0x47C1; +constexpr unsigned int mmCRTC6_CRTC_NOM_VERT_POSITION__VI = 0x47A5; +constexpr unsigned int mmCRTC6_CRTC_OVERSCAN_COLOR__VI = 0x47C8; +constexpr unsigned int mmCRTC6_CRTC_OVERSCAN_COLOR_EXT__VI = 0x47C9; +constexpr unsigned int mmCRTC6_CRTC_PIXEL_DATA_READBACK0__VI = 0x47A1; +constexpr unsigned int mmCRTC6_CRTC_PIXEL_DATA_READBACK1__VI = 0x47A2; +constexpr unsigned int mmCRTC6_CRTC_SNAPSHOT_CONTROL__VI = 0x47B0; +constexpr unsigned int mmCRTC6_CRTC_SNAPSHOT_FRAME__VI = 0x47B2; +constexpr unsigned int mmCRTC6_CRTC_SNAPSHOT_POSITION__VI = 0x47B1; +constexpr unsigned int mmCRTC6_CRTC_SNAPSHOT_STATUS__VI = 0x47AF; +constexpr unsigned int mmCRTC6_CRTC_START_LINE_CONTROL__VI = 0x47B3; +constexpr unsigned int mmCRTC6_CRTC_STATIC_SCREEN_CONTROL__VI = 0x47E7; +constexpr unsigned int mmCRTC6_CRTC_STATUS__VI = 0x47A3; +constexpr unsigned int mmCRTC6_CRTC_STATUS_FRAME_COUNT__VI = 0x47A6; +constexpr unsigned int mmCRTC6_CRTC_STATUS_HV_COUNT__VI = 0x47A8; +constexpr unsigned int mmCRTC6_CRTC_STATUS_POSITION__VI = 0x47A4; +constexpr unsigned int mmCRTC6_CRTC_STATUS_VF_COUNT__VI = 0x47A7; +constexpr unsigned int mmCRTC6_CRTC_STEREO_CONTROL__VI = 0x47AE; +constexpr unsigned int mmCRTC6_CRTC_STEREO_FORCE_NEXT_EYE__VI = 0x479A; +constexpr unsigned int mmCRTC6_CRTC_STEREO_STATUS__VI = 0x47AD; +constexpr unsigned int mmCRTC6_CRTC_TEST_DEBUG_DATA__VI = 0x47C7; +constexpr unsigned int mmCRTC6_CRTC_TEST_DEBUG_INDEX__VI = 0x47C6; +constexpr unsigned int mmCRTC6_CRTC_TEST_PATTERN_COLOR__VI = 0x47BC; +constexpr unsigned int mmCRTC6_CRTC_TEST_PATTERN_CONTROL__VI = 0x47BA; +constexpr unsigned int mmCRTC6_CRTC_TEST_PATTERN_PARAMETERS__VI = 0x47BB; +constexpr unsigned int mmCRTC6_CRTC_TRIGA_CNTL__VI = 0x4794; +constexpr unsigned int mmCRTC6_CRTC_TRIGA_MANUAL_TRIG__VI = 0x4795; +constexpr unsigned int mmCRTC6_CRTC_TRIGB_CNTL__VI = 0x4796; +constexpr unsigned int mmCRTC6_CRTC_TRIGB_MANUAL_TRIG__VI = 0x4797; +constexpr unsigned int mmCRTC6_CRTC_UPDATE_LOCK__VI = 0x47B5; +constexpr unsigned int mmCRTC6_CRTC_VBI_END__VI = 0x4786; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x47CF; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x47CE; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x47D1; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x47D0; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x47D3; +constexpr unsigned int mmCRTC6_CRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x47D2; +constexpr unsigned int mmCRTC6_CRTC_VERT_SYNC_CONTROL__VI = 0x47AC; +constexpr unsigned int mmCRTC6_CRTC_VGA_PARAMETER_CAPTURE_MODE__VI = 0x47B7; +constexpr unsigned int mmCRTC6_CRTC_VSYNC_NOM_INT_STATUS__VI = 0x478C; +constexpr unsigned int mmCRTC6_CRTC_V_BLANK_START_END__VI = 0x478D; +constexpr unsigned int mmCRTC6_CRTC_V_SYNC_A__VI = 0x478E; +constexpr unsigned int mmCRTC6_CRTC_V_SYNC_A_CNTL__VI = 0x478F; +constexpr unsigned int mmCRTC6_CRTC_V_SYNC_B__VI = 0x4790; +constexpr unsigned int mmCRTC6_CRTC_V_SYNC_B_CNTL__VI = 0x4791; +constexpr unsigned int mmCRTC6_CRTC_V_TOTAL__VI = 0x4787; +constexpr unsigned int mmCRTC6_CRTC_V_TOTAL_CONTROL__VI = 0x478A; +constexpr unsigned int mmCRTC6_CRTC_V_TOTAL_INT_STATUS__VI = 0x478B; +constexpr unsigned int mmCRTC6_CRTC_V_TOTAL_MAX__VI = 0x4789; +constexpr unsigned int mmCRTC6_CRTC_V_TOTAL_MIN__VI = 0x4788; +constexpr unsigned int mmCRTC6_CRTC_V_UPDATE_INT_STATUS__VI = 0x47C4; +constexpr unsigned int mmCRTC6_DCFE_DBG_SEL__VI = 0x477E; +constexpr unsigned int mmCRTC6_DCFE_MEM_PWR_CTRL__VI = 0x477F; +constexpr unsigned int mmCRTC6_DCFE_MEM_PWR_CTRL2__VI = 0x47B8; +constexpr unsigned int mmCRTC6_DCFE_MEM_PWR_STATUS__VI = 0x47B9; +constexpr unsigned int mmCRTC6_MASTER_UPDATE_LOCK__VI = 0x47BD; +constexpr unsigned int mmCRTC6_MASTER_UPDATE_MODE__VI = 0x47BE; +constexpr unsigned int mmCRTC_3D_STRUCTURE_CONTROL__VI = 0x1B78; +constexpr unsigned int mmCRTC_AVSYNC_COUNTER__VI = 0x1B9B; +constexpr unsigned int mmCRTC_BLACK_COLOR__VI = 0x1BCC; +constexpr unsigned int mmCRTC_BLACK_COLOR_EXT__VI = 0x1BCD; +constexpr unsigned int mmCRTC_BLANK_DATA_COLOR__VI = 0x1BCA; +constexpr unsigned int mmCRTC_BLANK_DATA_COLOR_EXT__VI = 0x1BCB; +constexpr unsigned int mmCRTC_CRC0_DATA_B__VI = 0x1BDA; +constexpr unsigned int mmCRTC_CRC0_DATA_RG__VI = 0x1BD9; +constexpr unsigned int mmCRTC_CRC0_WINDOWA_X_CONTROL__VI = 0x1BD5; +constexpr unsigned int mmCRTC_CRC0_WINDOWA_Y_CONTROL__VI = 0x1BD6; +constexpr unsigned int mmCRTC_CRC0_WINDOWB_X_CONTROL__VI = 0x1BD7; +constexpr unsigned int mmCRTC_CRC0_WINDOWB_Y_CONTROL__VI = 0x1BD8; +constexpr unsigned int mmCRTC_CRC1_DATA_B__VI = 0x1BE0; +constexpr unsigned int mmCRTC_CRC1_DATA_RG__VI = 0x1BDF; +constexpr unsigned int mmCRTC_CRC1_WINDOWA_X_CONTROL__VI = 0x1BDB; +constexpr unsigned int mmCRTC_CRC1_WINDOWA_Y_CONTROL__VI = 0x1BDC; +constexpr unsigned int mmCRTC_CRC1_WINDOWB_X_CONTROL__VI = 0x1BDD; +constexpr unsigned int mmCRTC_CRC1_WINDOWB_Y_CONTROL__VI = 0x1BDE; +constexpr unsigned int mmCRTC_CRC_CNTL__VI = 0x1BD4; +constexpr unsigned int mmCRTC_DCFE_CLOCK_CONTROL__VI = 0x1B7C; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_CONTROL__VI = 0x1BE1; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_INTERRUPT_CONTROL__VI = 0x1BE5; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_LOSS_INTERRUPT_CONTROL__VI = 0x1BE4; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_SIGNAL_INTERRUPT_CONTROL__VI = 0x1BE6; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_WINDOW_END__VI = 0x1BE3; +constexpr unsigned int mmCRTC_EXT_TIMING_SYNC_WINDOW_START__VI = 0x1BE2; +constexpr unsigned int mmCRTC_FIELD_INDICATION_CONTROL__VI = 0x1BA0; +constexpr unsigned int mmCRTC_GSL_CONTROL__VI = 0x1B7B; +constexpr unsigned int mmCRTC_GSL_VSYNC_GAP__VI = 0x1B79; +constexpr unsigned int mmCRTC_GSL_WINDOW__VI = 0x1B7A; +constexpr unsigned int mmCRTC_H_BLANK_EARLY_NUM__VI = 0x1B7D; +constexpr unsigned int mmCRTC_OVERSCAN_COLOR__VI = 0x1BC8; +constexpr unsigned int mmCRTC_OVERSCAN_COLOR_EXT__VI = 0x1BC9; +constexpr unsigned int mmCRTC_PIXEL_DATA_READBACK0__VI = 0x1BA1; +constexpr unsigned int mmCRTC_PIXEL_DATA_READBACK1__VI = 0x1BA2; +constexpr unsigned int mmCRTC_STATIC_SCREEN_CONTROL__VI = 0x1BE7; +constexpr unsigned int mmCRTC_STEREO_FORCE_NEXT_EYE__VI = 0x1B9A; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT0_CONTROL__VI = 0x1BCF; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT0_POSITION__VI = 0x1BCE; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT1_CONTROL__VI = 0x1BD1; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT1_POSITION__VI = 0x1BD0; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT2_CONTROL__VI = 0x1BD3; +constexpr unsigned int mmCRTC_VERTICAL_INTERRUPT2_POSITION__VI = 0x1BD2; +constexpr unsigned int mmCUR2_COLOR1__VI = 0x1A75; +constexpr unsigned int mmCUR2_COLOR2__VI = 0x1A76; +constexpr unsigned int mmCUR2_CONTROL__VI = 0x1A6F; +constexpr unsigned int mmCUR2_HOT_SPOT__VI = 0x1A74; +constexpr unsigned int mmCUR2_POSITION__VI = 0x1A73; +constexpr unsigned int mmCUR2_SIZE__VI = 0x1A71; +constexpr unsigned int mmCUR2_STEREO_CONTROL__VI = 0x1A9B; +constexpr unsigned int mmCUR2_SURFACE_ADDRESS__VI = 0x1A70; +constexpr unsigned int mmCUR2_SURFACE_ADDRESS_HIGH__VI = 0x1A72; +constexpr unsigned int mmCUR2_UPDATE__VI = 0x1A77; +constexpr unsigned int mmCUR_REQUEST_FILTER_CNTL__VI = 0x1A99; +constexpr unsigned int mmCUR_STEREO_CONTROL__VI = 0x1A9A; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL__VI = 0x16B4; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL2__VI = 0x16B5; +constexpr unsigned int mmDAC_AUTODETECT_CONTROL3__VI = 0x16B6; +constexpr unsigned int mmDAC_AUTODETECT_INT_CONTROL__VI = 0x16B8; +constexpr unsigned int mmDAC_AUTODETECT_STATUS__VI = 0x16B7; +constexpr unsigned int mmDAC_CLK_ENABLE__VI = 0x0128; +constexpr unsigned int mmDAC_COMPARATOR_ENABLE__VI = 0x16BD; +constexpr unsigned int mmDAC_COMPARATOR_OUTPUT__VI = 0x16BE; +constexpr unsigned int mmDAC_CONTROL__VI = 0x16BC; +constexpr unsigned int mmDAC_CRC_CONTROL__VI = 0x16AD; +constexpr unsigned int mmDAC_CRC_EN__VI = 0x16AC; +constexpr unsigned int mmDAC_CRC_SIG_CONTROL__VI = 0x16B1; +constexpr unsigned int mmDAC_CRC_SIG_CONTROL_MASK__VI = 0x16AF; +constexpr unsigned int mmDAC_CRC_SIG_RGB__VI = 0x16B0; +constexpr unsigned int mmDAC_CRC_SIG_RGB_MASK__VI = 0x16AE; +constexpr unsigned int mmDAC_DFT_CONFIG__VI = 0x16C0; +constexpr unsigned int mmDAC_ENABLE__VI = 0x16AA; +constexpr unsigned int mmDAC_FIFO_STATUS__VI = 0x16C1; +constexpr unsigned int mmDAC_FORCE_DATA__VI = 0x16BA; +constexpr unsigned int mmDAC_FORCE_OUTPUT_CNTL__VI = 0x16B9; +constexpr unsigned int mmDAC_MACRO_CNTL_RESERVED0__VI = 0x48B8; +constexpr unsigned int mmDAC_MACRO_CNTL_RESERVED1__VI = 0x48B9; +constexpr unsigned int mmDAC_MACRO_CNTL_RESERVED2__VI = 0x48BA; +constexpr unsigned int mmDAC_MACRO_CNTL_RESERVED3__VI = 0x48BB; +constexpr unsigned int mmDAC_POWERDOWN__VI = 0x16BB; +constexpr unsigned int mmDAC_PWR_CNTL__VI = 0x16BF; +constexpr unsigned int mmDAC_SOURCE_SELECT__VI = 0x16AB; +constexpr unsigned int mmDAC_STEREOSYNC_SELECT__VI = 0x16B3; +constexpr unsigned int mmDAC_SYNC_TRISTATE_CONTROL__VI = 0x16B2; +constexpr unsigned int mmDAC_TEST_DEBUG_DATA__VI = 0x16C3; +constexpr unsigned int mmDAC_TEST_DEBUG_INDEX__VI = 0x16C2; +constexpr unsigned int mmDBG_OUT_CNTL__VI = 0x4834; +constexpr unsigned int mmDBG_SMB_BYPASS_SRBM_ACCESS__VI = 0x14EB; +constexpr unsigned int mmDCCG_AUDIO_DTO0_MODULE__VI = 0x016D; +constexpr unsigned int mmDCCG_AUDIO_DTO0_PHASE__VI = 0x016C; +constexpr unsigned int mmDCCG_AUDIO_DTO1_MODULE__VI = 0x016F; +constexpr unsigned int mmDCCG_AUDIO_DTO1_PHASE__VI = 0x016E; +constexpr unsigned int mmDCCG_AUDIO_DTO_SOURCE__VI = 0x016B; +constexpr unsigned int mmDCCG_CAC_STATUS__VI = 0x0137; +constexpr unsigned int mmDCCG_CBUS_WRCMD_DELAY__VI = 0x0110; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED0__VI = 0x5FD0; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED1__VI = 0x5FD1; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED10__VI = 0x5FDA; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED11__VI = 0x5FDB; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED2__VI = 0x5FD2; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED3__VI = 0x5FD3; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED4__VI = 0x5FD4; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED5__VI = 0x5FD5; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED6__VI = 0x5FD6; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7__VI = 0x5FD7; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED8__VI = 0x5FD8; +constexpr unsigned int mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED9__VI = 0x5FD9; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED0__VI = 0x5FDC; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED1__VI = 0x5FDD; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED10__VI = 0x5FE6; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED11__VI = 0x5FE7; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED2__VI = 0x5FDE; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED3__VI = 0x5FDF; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED4__VI = 0x5FE0; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED5__VI = 0x5FE1; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED6__VI = 0x5FE2; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED7__VI = 0x5FE3; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED8__VI = 0x5FE4; +constexpr unsigned int mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED9__VI = 0x5FE5; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED0__VI = 0x5FE8; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED1__VI = 0x5FE9; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED10__VI = 0x5FF2; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED11__VI = 0x5FF3; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED2__VI = 0x5FEA; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED3__VI = 0x5FEB; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED4__VI = 0x5FEC; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED5__VI = 0x5FED; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED6__VI = 0x5FEE; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED7__VI = 0x5FEF; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED8__VI = 0x5FF0; +constexpr unsigned int mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED9__VI = 0x5FF1; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED0__VI = 0x5FF4; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED1__VI = 0x5FF5; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED10__VI = 0x5FFE; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED11__VI = 0x5FFF; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED2__VI = 0x5FF6; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED3__VI = 0x5FF7; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED4__VI = 0x5FF8; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED5__VI = 0x5FF9; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED6__VI = 0x5FFA; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED7__VI = 0x5FFB; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED8__VI = 0x5FFC; +constexpr unsigned int mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED9__VI = 0x5FFD; +constexpr unsigned int mmDCCG_DISP_CNTL_REG__VI = 0x013F; +constexpr unsigned int mmDCCG_DS_CNTL__VI = 0x0115; +constexpr unsigned int mmDCCG_DS_DEBUG_CNTL__VI = 0x0112; +constexpr unsigned int mmDCCG_DS_DTO_INCR__VI = 0x0113; +constexpr unsigned int mmDCCG_DS_DTO_MODULO__VI = 0x0114; +constexpr unsigned int mmDCCG_DS_HW_CAL_INTERVAL__VI = 0x0116; +constexpr unsigned int mmDCCG_GATE_DISABLE_CNTL__VI = 0x0134; +constexpr unsigned int mmDCCG_GTC_CNTL__VI = 0x0120; +constexpr unsigned int mmDCCG_GTC_CURRENT__VI = 0x0123; +constexpr unsigned int mmDCCG_GTC_DTO_INCR__VI = 0x0121; +constexpr unsigned int mmDCCG_GTC_DTO_MODULO__VI = 0x0122; +constexpr unsigned int mmDCCG_PERFMON_CNTL__VI = 0x0133; +constexpr unsigned int mmDCCG_PERFMON_CNTL2__VI = 0x010E; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED0__VI = 0x1700; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED1__VI = 0x1701; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED10__VI = 0x170A; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED11__VI = 0x170B; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED12__VI = 0x170C; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED13__VI = 0x170D; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED14__VI = 0x170E; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED15__VI = 0x170F; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED16__VI = 0x1710; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED17__VI = 0x1711; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED18__VI = 0x1712; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED19__VI = 0x1713; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED2__VI = 0x1702; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED20__VI = 0x1714; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED21__VI = 0x1715; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED22__VI = 0x1716; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED23__VI = 0x1717; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED24__VI = 0x1718; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED25__VI = 0x1719; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED26__VI = 0x171A; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED27__VI = 0x171B; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED28__VI = 0x171C; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED29__VI = 0x171D; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED3__VI = 0x1703; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED30__VI = 0x171E; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED31__VI = 0x171F; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED32__VI = 0x1720; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED33__VI = 0x1721; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED34__VI = 0x1722; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED35__VI = 0x1723; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED36__VI = 0x1724; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED37__VI = 0x1725; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED38__VI = 0x1726; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED39__VI = 0x1727; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED4__VI = 0x1704; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED40__VI = 0x1728; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED41__VI = 0x1729; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED5__VI = 0x1705; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED6__VI = 0x1706; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED7__VI = 0x1707; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED8__VI = 0x1708; +constexpr unsigned int mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED9__VI = 0x1709; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0__VI = 0x172A; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED1__VI = 0x172B; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED10__VI = 0x1734; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED11__VI = 0x1735; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED12__VI = 0x1736; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED13__VI = 0x1737; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED14__VI = 0x1738; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED15__VI = 0x1739; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED16__VI = 0x173A; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED17__VI = 0x173B; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED18__VI = 0x173C; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED19__VI = 0x173D; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED2__VI = 0x172C; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED20__VI = 0x173E; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED21__VI = 0x173F; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED22__VI = 0x1740; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED23__VI = 0x1741; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED24__VI = 0x1742; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED25__VI = 0x1743; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED26__VI = 0x1744; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED27__VI = 0x1745; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED28__VI = 0x1746; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED29__VI = 0x1747; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED3__VI = 0x172D; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED30__VI = 0x1748; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED31__VI = 0x1749; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED32__VI = 0x174A; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED33__VI = 0x174B; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED34__VI = 0x174C; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED35__VI = 0x174D; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED36__VI = 0x174E; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED37__VI = 0x174F; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED38__VI = 0x1750; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED39__VI = 0x1751; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED4__VI = 0x172E; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED40__VI = 0x1752; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED41__VI = 0x1753; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED5__VI = 0x172F; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED6__VI = 0x1730; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED7__VI = 0x1731; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED8__VI = 0x1732; +constexpr unsigned int mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED9__VI = 0x1733; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED0__VI = 0x1754; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED1__VI = 0x1755; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED10__VI = 0x175E; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED11__VI = 0x175F; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED12__VI = 0x1760; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED13__VI = 0x1761; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED14__VI = 0x1762; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED15__VI = 0x1763; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED16__VI = 0x1764; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED17__VI = 0x1765; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18__VI = 0x1766; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED19__VI = 0x1767; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED2__VI = 0x1756; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED20__VI = 0x1768; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED21__VI = 0x1769; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED22__VI = 0x176A; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED23__VI = 0x176B; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED24__VI = 0x176C; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED25__VI = 0x176D; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED26__VI = 0x176E; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED27__VI = 0x176F; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED28__VI = 0x1770; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED29__VI = 0x1771; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED3__VI = 0x1757; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED30__VI = 0x1772; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED31__VI = 0x1773; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED32__VI = 0x1774; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED33__VI = 0x1775; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED34__VI = 0x1776; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED35__VI = 0x1777; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED36__VI = 0x1778; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED37__VI = 0x1779; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED38__VI = 0x177A; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED39__VI = 0x177B; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED4__VI = 0x1758; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED40__VI = 0x177C; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED41__VI = 0x177D; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED5__VI = 0x1759; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED6__VI = 0x175A; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED7__VI = 0x175B; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED8__VI = 0x175C; +constexpr unsigned int mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED9__VI = 0x175D; +constexpr unsigned int mmDCCG_SOFT_RESET__VI = 0x015F; +constexpr unsigned int mmDCCG_TEST_CLK_SEL__VI = 0x017E; +constexpr unsigned int mmDCCG_TEST_DEBUG_DATA__VI = 0x017D; +constexpr unsigned int mmDCCG_TEST_DEBUG_INDEX__VI = 0x017C; +constexpr unsigned int mmDCDEBUG_BUS_CLK1_SEL__VI = 0x16C4; +constexpr unsigned int mmDCDEBUG_BUS_CLK2_SEL__VI = 0x16C5; +constexpr unsigned int mmDCDEBUG_BUS_CLK3_SEL__VI = 0x16C6; +constexpr unsigned int mmDCDEBUG_BUS_CLK4_SEL__VI = 0x16C7; +constexpr unsigned int mmDCDEBUG_BUS_CLK5_SEL__VI = 0x16C8; +constexpr unsigned int mmDCDEBUG_OUT_CNTL__VI = 0x16CA; +constexpr unsigned int mmDCDEBUG_OUT_DATA__VI = 0x16CB; +constexpr unsigned int mmDCDEBUG_OUT_PIN_OVERRIDE__VI = 0x16C9; +constexpr unsigned int mmDCE_VCE_CONTROL__VI = 0x1856; +constexpr unsigned int mmDCFE0_DCFE_CLOCK_CONTROL__VI = 0x1B00; +constexpr unsigned int mmDCFE0_DCFE_DBG_CONFIG__VI = 0x1B02; +constexpr unsigned int mmDCFE0_DCFE_SOFT_RESET__VI = 0x1B01; +constexpr unsigned int mmDCFE1_DCFE_CLOCK_CONTROL__VI = 0x1D00; +constexpr unsigned int mmDCFE1_DCFE_DBG_CONFIG__VI = 0x1D02; +constexpr unsigned int mmDCFE1_DCFE_SOFT_RESET__VI = 0x1D01; +constexpr unsigned int mmDCFE2_DCFE_CLOCK_CONTROL__VI = 0x1F00; +constexpr unsigned int mmDCFE2_DCFE_DBG_CONFIG__VI = 0x1F02; +constexpr unsigned int mmDCFE2_DCFE_SOFT_RESET__VI = 0x1F01; +constexpr unsigned int mmDCFE3_DCFE_CLOCK_CONTROL__VI = 0x4100; +constexpr unsigned int mmDCFE3_DCFE_DBG_CONFIG__VI = 0x4102; +constexpr unsigned int mmDCFE3_DCFE_SOFT_RESET__VI = 0x4101; +constexpr unsigned int mmDCFE4_DCFE_CLOCK_CONTROL__VI = 0x4300; +constexpr unsigned int mmDCFE4_DCFE_DBG_CONFIG__VI = 0x4302; +constexpr unsigned int mmDCFE4_DCFE_SOFT_RESET__VI = 0x4301; +constexpr unsigned int mmDCFE5_DCFE_CLOCK_CONTROL__VI = 0x4500; +constexpr unsigned int mmDCFE5_DCFE_DBG_CONFIG__VI = 0x4502; +constexpr unsigned int mmDCFE5_DCFE_SOFT_RESET__VI = 0x4501; +constexpr unsigned int mmDCFEV0_CRTC_PIXEL_RATE_CNTL__VI = 0x0104; +constexpr unsigned int mmDCFEV0_PG_CONFIG__VI = 0x02DB; +constexpr unsigned int mmDCFEV0_PG_ENABLE__VI = 0x02DC; +constexpr unsigned int mmDCFEV0_PG_STATUS__VI = 0x02DD; +constexpr unsigned int mmDCFEV_CLOCK_CONTROL__VI = 0x46F4; +constexpr unsigned int mmDCFEV_DBG_CONFIG__VI = 0x46F7; +constexpr unsigned int mmDCFEV_DMIFV_CLOCK_CONTROL__VI = 0x46F6; +constexpr unsigned int mmDCFEV_DMIFV_MEM_PWR_CTRL__VI = 0x46F8; +constexpr unsigned int mmDCFEV_DMIFV_MEM_PWR_STATUS__VI = 0x46F9; +constexpr unsigned int mmDCFEV_SOFT_RESET__VI = 0x46F5; +constexpr unsigned int mmDCFE_CLOCK_CONTROL__VI = 0x1B00; +constexpr unsigned int mmDCFE_DBG_CONFIG__VI = 0x1B02; +constexpr unsigned int mmDCFE_DBG_SEL__VI = 0x1B7E; +constexpr unsigned int mmDCFE_MEM_PWR_CTRL__VI = 0x1B7F; +constexpr unsigned int mmDCFE_MEM_PWR_CTRL2__VI = 0x1BB8; +constexpr unsigned int mmDCFE_MEM_PWR_STATUS__VI = 0x1BB9; +constexpr unsigned int mmDCFE_SOFT_RESET__VI = 0x1B01; +constexpr unsigned int mmDCIO_CLOCK_CNTL__VI = 0x482D; +constexpr unsigned int mmDCIO_DEBUG__VI = 0x482F; +constexpr unsigned int mmDCIO_DEBUG_CONFIG__VI = 0x4835; +constexpr unsigned int mmDCIO_DPHY_SEL__VI = 0x4837; +constexpr unsigned int mmDCIO_GSL0_CNTL__VI = 0x4826; +constexpr unsigned int mmDCIO_GSL1_CNTL__VI = 0x4827; +constexpr unsigned int mmDCIO_GSL2_CNTL__VI = 0x4828; +constexpr unsigned int mmDCIO_GSL_GENLK_PAD_CNTL__VI = 0x4824; +constexpr unsigned int mmDCIO_GSL_SWAPLOCK_PAD_CNTL__VI = 0x4825; +constexpr unsigned int mmDCIO_IMPCAL_CNTL__VI = 0x483D; +constexpr unsigned int mmDCIO_IMPCAL_CNTL_CD__VI = 0x4841; +constexpr unsigned int mmDCIO_IMPCAL_CNTL_EF__VI = 0x4845; +constexpr unsigned int mmDCIO_SOFT_RESET__VI = 0x4836; +constexpr unsigned int mmDCIO_TEST_DEBUG_DATA__VI = 0x4832; +constexpr unsigned int mmDCIO_TEST_DEBUG_INDEX__VI = 0x4831; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x48C0; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x48C1; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x48CA; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x48CB; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x48CC; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x48CD; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x48CE; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x48CF; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x48D0; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x48D1; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x48D2; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x48D3; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x48C2; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x48D4; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x48D5; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x48D6; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x48D7; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x48D8; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x48D9; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x48DA; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x48DB; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x48DC; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x48DD; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x48C3; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x48DE; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x48DF; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x48C4; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x48C5; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x48C6; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x48C7; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x48C8; +constexpr unsigned int mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x48C9; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x48E0; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x48E1; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x48EA; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x48EB; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x48EC; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x48ED; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x48EE; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x48EF; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x48F0; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x48F1; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x48F2; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x48F3; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x48E2; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x48F4; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x48F5; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x48F6; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x48F7; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x48F8; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x48F9; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x48FA; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x48FB; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x48FC; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x48FD; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x48E3; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x48FE; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x48FF; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x48E4; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x48E5; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x48E6; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x48E7; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x48E8; +constexpr unsigned int mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x48E9; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x4900; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x4901; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x490A; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x490B; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x490C; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x490D; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x490E; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x490F; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x4910; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x4911; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x4912; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x4913; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x4902; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x4914; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x4915; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x4916; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x4917; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x4918; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x4919; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x491A; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x491B; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x491C; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x491D; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x4903; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x491E; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x491F; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x4904; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x4905; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x4906; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x4907; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x4908; +constexpr unsigned int mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x4909; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x4920; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x4921; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x492A; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x492B; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x492C; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x492D; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x492E; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x492F; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x4930; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x4931; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x4932; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x4933; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x4922; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x4934; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x4935; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x4936; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x4937; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x4938; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x4939; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x493A; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x493B; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x493C; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x493D; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x4923; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x493E; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x493F; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x4924; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x4925; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x4926; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x4927; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x4928; +constexpr unsigned int mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x4929; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x4940; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x4941; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x494A; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x494B; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x494C; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x494D; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x494E; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x494F; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x4950; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x4951; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x4952; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x4953; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x4942; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x4954; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x4955; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x4956; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x4957; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x4958; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x4959; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x495A; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x495B; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x495C; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x495D; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x4943; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x495E; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x495F; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x4944; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x4945; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x4946; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x4947; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x4948; +constexpr unsigned int mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x4949; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x4960; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x4961; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x496A; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x496B; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x496C; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x496D; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x496E; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x496F; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x4970; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x4971; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x4972; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x4973; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x4962; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x4974; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x4975; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x4976; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x4977; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x4978; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x4979; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x497A; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x497B; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x497C; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x497D; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x4963; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x497E; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x497F; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x4964; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x4965; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x4966; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x4967; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x4968; +constexpr unsigned int mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x4969; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED0__VI = 0x4980; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED1__VI = 0x4981; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED10__VI = 0x498A; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED11__VI = 0x498B; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED12__VI = 0x498C; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED13__VI = 0x498D; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED14__VI = 0x498E; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED15__VI = 0x498F; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED16__VI = 0x4990; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED17__VI = 0x4991; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED18__VI = 0x4992; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED19__VI = 0x4993; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED2__VI = 0x4982; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED20__VI = 0x4994; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED21__VI = 0x4995; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED22__VI = 0x4996; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED23__VI = 0x4997; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED24__VI = 0x4998; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED25__VI = 0x4999; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED26__VI = 0x499A; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED27__VI = 0x499B; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED28__VI = 0x499C; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED29__VI = 0x499D; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED3__VI = 0x4983; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED30__VI = 0x499E; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED31__VI = 0x499F; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED4__VI = 0x4984; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED5__VI = 0x4985; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED6__VI = 0x4986; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED7__VI = 0x4987; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED8__VI = 0x4988; +constexpr unsigned int mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED9__VI = 0x4989; +constexpr unsigned int mmDCIO_WRCMD_DELAY__VI = 0x4816; +constexpr unsigned int mmDCI_CLK_CNTL__VI = 0x0319; +constexpr unsigned int mmDCI_CLK_RAMP_CNTL__VI = 0x031A; +constexpr unsigned int mmDCI_DEBUG_CONFIG__VI = 0x0320; +constexpr unsigned int mmDCI_MEM_PWR_CNTL__VI = 0x031B; +constexpr unsigned int mmDCI_MEM_PWR_CNTL2__VI = 0x031C; +constexpr unsigned int mmDCI_MEM_PWR_CNTL3__VI = 0x031D; +constexpr unsigned int mmDCI_MEM_PWR_STATUS__VI = 0x0317; +constexpr unsigned int mmDCI_MEM_PWR_STATUS2__VI = 0x0318; +constexpr unsigned int mmDCI_PG_DEBUG_CONFIG__VI = 0x1812; +constexpr unsigned int mmDCI_SOFT_RESET__VI = 0x0328; +constexpr unsigned int mmDCI_TEST_DEBUG_DATA__VI = 0x031F; +constexpr unsigned int mmDCI_TEST_DEBUG_INDEX__VI = 0x031E; +constexpr unsigned int mmDCO_CLK_CNTL__VI = 0x1864; +constexpr unsigned int mmDCO_CLK_RAMP_CNTL__VI = 0x1865; +constexpr unsigned int mmDCO_DCFE_EXT_VSYNC_CNTL__VI = 0x4830; +constexpr unsigned int mmDCO_MEM_PWR_CTRL__VI = 0x1862; +constexpr unsigned int mmDCO_MEM_PWR_CTRL2__VI = 0x1863; +constexpr unsigned int mmDCO_MEM_PWR_STATUS__VI = 0x1861; +constexpr unsigned int mmDCO_POWER_MANAGEMENT_CNTL__VI = 0x1868; +constexpr unsigned int mmDCO_SCRATCH0__VI = 0x184E; +constexpr unsigned int mmDCO_SCRATCH1__VI = 0x184F; +constexpr unsigned int mmDCO_SCRATCH2__VI = 0x1850; +constexpr unsigned int mmDCO_SCRATCH3__VI = 0x1851; +constexpr unsigned int mmDCO_SCRATCH4__VI = 0x1852; +constexpr unsigned int mmDCO_SCRATCH5__VI = 0x1853; +constexpr unsigned int mmDCO_SCRATCH6__VI = 0x1854; +constexpr unsigned int mmDCO_SCRATCH7__VI = 0x1855; +constexpr unsigned int mmDCO_SOFT_RESET__VI = 0x1871; +constexpr unsigned int mmDCO_STEREOSYNC_SEL__VI = 0x186E; +constexpr unsigned int mmDCO_TEST_DEBUG_DATA__VI = 0x1870; +constexpr unsigned int mmDCO_TEST_DEBUG_INDEX__VI = 0x186F; +constexpr unsigned int mmDCP0_ALPHA_CONTROL__VI = 0x1ABC; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C11_C12__VI = 0x1A43; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C13_C14__VI = 0x1A44; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C21_C22__VI = 0x1A45; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C23_C24__VI = 0x1A46; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C31_C32__VI = 0x1A47; +constexpr unsigned int mmDCP0_COMM_MATRIXA_TRANS_C33_C34__VI = 0x1A48; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C11_C12__VI = 0x1A49; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C13_C14__VI = 0x1A4A; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C21_C22__VI = 0x1A4B; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C23_C24__VI = 0x1A4C; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C31_C32__VI = 0x1A4D; +constexpr unsigned int mmDCP0_COMM_MATRIXB_TRANS_C33_C34__VI = 0x1A4E; +constexpr unsigned int mmDCP0_CUR2_COLOR1__VI = 0x1A75; +constexpr unsigned int mmDCP0_CUR2_COLOR2__VI = 0x1A76; +constexpr unsigned int mmDCP0_CUR2_CONTROL__VI = 0x1A6F; +constexpr unsigned int mmDCP0_CUR2_HOT_SPOT__VI = 0x1A74; +constexpr unsigned int mmDCP0_CUR2_POSITION__VI = 0x1A73; +constexpr unsigned int mmDCP0_CUR2_SIZE__VI = 0x1A71; +constexpr unsigned int mmDCP0_CUR2_STEREO_CONTROL__VI = 0x1A9B; +constexpr unsigned int mmDCP0_CUR2_SURFACE_ADDRESS__VI = 0x1A70; +constexpr unsigned int mmDCP0_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x1A72; +constexpr unsigned int mmDCP0_CUR2_UPDATE__VI = 0x1A77; +constexpr unsigned int mmDCP0_CUR_REQUEST_FILTER_CNTL__VI = 0x1A99; +constexpr unsigned int mmDCP0_CUR_STEREO_CONTROL__VI = 0x1A9A; +constexpr unsigned int mmDCP0_DCP_DEBUG2__VI = 0x1A98; +constexpr unsigned int mmDCP0_DCP_FP_CONVERTED_FIELD__VI = 0x1A65; +constexpr unsigned int mmDCP0_DCP_GSL_CONTROL__VI = 0x1A90; +constexpr unsigned int mmDCP0_DCP_RANDOM_SEEDS__VI = 0x1A61; +constexpr unsigned int mmDCP0_DCP_SPATIAL_DITHER_CNTL__VI = 0x1A60; +constexpr unsigned int mmDCP0_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x1A7D; +constexpr unsigned int mmDCP0_DEGAMMA_CONTROL__VI = 0x1A58; +constexpr unsigned int mmDCP0_DENORM_CONTROL__VI = 0x1A50; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C11_C12__VI = 0x1A5A; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C13_C14__VI = 0x1A5B; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C21_C22__VI = 0x1A5C; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C23_C24__VI = 0x1A5D; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C31_C32__VI = 0x1A5E; +constexpr unsigned int mmDCP0_GAMUT_REMAP_C33_C34__VI = 0x1A5F; +constexpr unsigned int mmDCP0_GAMUT_REMAP_CONTROL__VI = 0x1A59; +constexpr unsigned int mmDCP0_GRPH_FLIP_RATE_CNTL__VI = 0x1A8E; +constexpr unsigned int mmDCP0_GRPH_STEREOSYNC_FLIP__VI = 0x1A97; +constexpr unsigned int mmDCP0_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x1A9F; +constexpr unsigned int mmDCP0_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x1ABF; +constexpr unsigned int mmDCP0_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x1ABD; +constexpr unsigned int mmDCP0_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x1ABE; +constexpr unsigned int mmDCP0_HW_ROTATION__VI = 0x1A9E; +constexpr unsigned int mmDCP0_INPUT_CSC_C11_C12__VI = 0x1A36; +constexpr unsigned int mmDCP0_INPUT_CSC_C13_C14__VI = 0x1A37; +constexpr unsigned int mmDCP0_INPUT_CSC_C21_C22__VI = 0x1A38; +constexpr unsigned int mmDCP0_INPUT_CSC_C23_C24__VI = 0x1A39; +constexpr unsigned int mmDCP0_INPUT_CSC_C31_C32__VI = 0x1A3A; +constexpr unsigned int mmDCP0_INPUT_CSC_C33_C34__VI = 0x1A3B; +constexpr unsigned int mmDCP0_INPUT_CSC_CONTROL__VI = 0x1A35; +constexpr unsigned int mmDCP0_INPUT_GAMMA_CONTROL__VI = 0x1A10; +constexpr unsigned int mmDCP0_KEY_CONTROL__VI = 0x1A53; +constexpr unsigned int mmDCP0_KEY_RANGE_ALPHA__VI = 0x1A54; +constexpr unsigned int mmDCP0_KEY_RANGE_BLUE__VI = 0x1A57; +constexpr unsigned int mmDCP0_KEY_RANGE_GREEN__VI = 0x1A56; +constexpr unsigned int mmDCP0_KEY_RANGE_RED__VI = 0x1A55; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C11_C12__VI = 0x1A3D; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C13_C14__VI = 0x1A3E; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C21_C22__VI = 0x1A3F; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C23_C24__VI = 0x1A40; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C31_C32__VI = 0x1A41; +constexpr unsigned int mmDCP0_OUTPUT_CSC_C33_C34__VI = 0x1A42; +constexpr unsigned int mmDCP0_OUTPUT_CSC_CONTROL__VI = 0x1A3C; +constexpr unsigned int mmDCP0_OUT_CLAMP_CONTROL_B_CB__VI = 0x1A9D; +constexpr unsigned int mmDCP0_OUT_CLAMP_CONTROL_G_Y__VI = 0x1A9C; +constexpr unsigned int mmDCP0_OUT_CLAMP_CONTROL_R_CR__VI = 0x1A52; +constexpr unsigned int mmDCP0_OUT_ROUND_CONTROL__VI = 0x1A51; +constexpr unsigned int mmDCP0_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x1A92; +constexpr unsigned int mmDCP0_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1A94; +constexpr unsigned int mmDCP0_OVL_STEREOSYNC_FLIP__VI = 0x1A93; +constexpr unsigned int mmDCP0_PRESCALE_GRPH_CONTROL__VI = 0x1A2D; +constexpr unsigned int mmDCP0_PRESCALE_OVL_CONTROL__VI = 0x1A31; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_GRPH_B__VI = 0x1A30; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_GRPH_G__VI = 0x1A2F; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_GRPH_R__VI = 0x1A2E; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_OVL_CB__VI = 0x1A32; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_OVL_CR__VI = 0x1A34; +constexpr unsigned int mmDCP0_PRESCALE_VALUES_OVL_Y__VI = 0x1A33; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_END_CNTL1__VI = 0x1AA6; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_END_CNTL2__VI = 0x1AA7; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_0_1__VI = 0x1AA8; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_10_11__VI = 0x1AAD; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_12_13__VI = 0x1AAE; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_14_15__VI = 0x1AAF; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_2_3__VI = 0x1AA9; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_4_5__VI = 0x1AAA; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_6_7__VI = 0x1AAB; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_REGION_8_9__VI = 0x1AAC; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x1AA5; +constexpr unsigned int mmDCP0_REGAMMA_CNTLA_START_CNTL__VI = 0x1AA4; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_END_CNTL1__VI = 0x1AB2; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_END_CNTL2__VI = 0x1AB3; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_0_1__VI = 0x1AB4; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_10_11__VI = 0x1AB9; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_12_13__VI = 0x1ABA; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_14_15__VI = 0x1ABB; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_2_3__VI = 0x1AB5; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_4_5__VI = 0x1AB6; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_6_7__VI = 0x1AB7; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_REGION_8_9__VI = 0x1AB8; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x1AB1; +constexpr unsigned int mmDCP0_REGAMMA_CNTLB_START_CNTL__VI = 0x1AB0; +constexpr unsigned int mmDCP0_REGAMMA_CONTROL__VI = 0x1AA0; +constexpr unsigned int mmDCP0_REGAMMA_LUT_DATA__VI = 0x1AA2; +constexpr unsigned int mmDCP0_REGAMMA_LUT_INDEX__VI = 0x1AA1; +constexpr unsigned int mmDCP0_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x1AA3; +constexpr unsigned int mmDCP1_ALPHA_CONTROL__VI = 0x1CBC; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C11_C12__VI = 0x1C43; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C13_C14__VI = 0x1C44; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C21_C22__VI = 0x1C45; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C23_C24__VI = 0x1C46; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C31_C32__VI = 0x1C47; +constexpr unsigned int mmDCP1_COMM_MATRIXA_TRANS_C33_C34__VI = 0x1C48; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C11_C12__VI = 0x1C49; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C13_C14__VI = 0x1C4A; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C21_C22__VI = 0x1C4B; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C23_C24__VI = 0x1C4C; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C31_C32__VI = 0x1C4D; +constexpr unsigned int mmDCP1_COMM_MATRIXB_TRANS_C33_C34__VI = 0x1C4E; +constexpr unsigned int mmDCP1_CUR2_COLOR1__VI = 0x1C75; +constexpr unsigned int mmDCP1_CUR2_COLOR2__VI = 0x1C76; +constexpr unsigned int mmDCP1_CUR2_CONTROL__VI = 0x1C6F; +constexpr unsigned int mmDCP1_CUR2_HOT_SPOT__VI = 0x1C74; +constexpr unsigned int mmDCP1_CUR2_POSITION__VI = 0x1C73; +constexpr unsigned int mmDCP1_CUR2_SIZE__VI = 0x1C71; +constexpr unsigned int mmDCP1_CUR2_STEREO_CONTROL__VI = 0x1C9B; +constexpr unsigned int mmDCP1_CUR2_SURFACE_ADDRESS__VI = 0x1C70; +constexpr unsigned int mmDCP1_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x1C72; +constexpr unsigned int mmDCP1_CUR2_UPDATE__VI = 0x1C77; +constexpr unsigned int mmDCP1_CUR_COLOR1__VI = 0x1C6C; +constexpr unsigned int mmDCP1_CUR_COLOR2__VI = 0x1C6D; +constexpr unsigned int mmDCP1_CUR_CONTROL__VI = 0x1C66; +constexpr unsigned int mmDCP1_CUR_HOT_SPOT__VI = 0x1C6B; +constexpr unsigned int mmDCP1_CUR_POSITION__VI = 0x1C6A; +constexpr unsigned int mmDCP1_CUR_REQUEST_FILTER_CNTL__VI = 0x1C99; +constexpr unsigned int mmDCP1_CUR_SIZE__VI = 0x1C68; +constexpr unsigned int mmDCP1_CUR_STEREO_CONTROL__VI = 0x1C9A; +constexpr unsigned int mmDCP1_CUR_SURFACE_ADDRESS__VI = 0x1C67; +constexpr unsigned int mmDCP1_CUR_SURFACE_ADDRESS_HIGH__VI = 0x1C69; +constexpr unsigned int mmDCP1_CUR_UPDATE__VI = 0x1C6E; +constexpr unsigned int mmDCP1_DCP_CRC_CONTROL__VI = 0x1C87; +constexpr unsigned int mmDCP1_DCP_CRC_CURRENT__VI = 0x1C89; +constexpr unsigned int mmDCP1_DCP_CRC_LAST__VI = 0x1C8B; +constexpr unsigned int mmDCP1_DCP_CRC_MASK__VI = 0x1C88; +constexpr unsigned int mmDCP1_DCP_DEBUG__VI = 0x1C8D; +constexpr unsigned int mmDCP1_DCP_DEBUG2__VI = 0x1C98; +constexpr unsigned int mmDCP1_DCP_FP_CONVERTED_FIELD__VI = 0x1C65; +constexpr unsigned int mmDCP1_DCP_GSL_CONTROL__VI = 0x1C90; +constexpr unsigned int mmDCP1_DCP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x1C91; +constexpr unsigned int mmDCP1_DCP_RANDOM_SEEDS__VI = 0x1C61; +constexpr unsigned int mmDCP1_DCP_SPATIAL_DITHER_CNTL__VI = 0x1C60; +constexpr unsigned int mmDCP1_DCP_TEST_DEBUG_DATA__VI = 0x1C96; +constexpr unsigned int mmDCP1_DCP_TEST_DEBUG_INDEX__VI = 0x1C95; +constexpr unsigned int mmDCP1_DC_LUT_30_COLOR__VI = 0x1C7C; +constexpr unsigned int mmDCP1_DC_LUT_AUTOFILL__VI = 0x1C7F; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_BLUE__VI = 0x1C81; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_GREEN__VI = 0x1C82; +constexpr unsigned int mmDCP1_DC_LUT_BLACK_OFFSET_RED__VI = 0x1C83; +constexpr unsigned int mmDCP1_DC_LUT_CONTROL__VI = 0x1C80; +constexpr unsigned int mmDCP1_DC_LUT_PWL_DATA__VI = 0x1C7B; +constexpr unsigned int mmDCP1_DC_LUT_RW_INDEX__VI = 0x1C79; +constexpr unsigned int mmDCP1_DC_LUT_RW_MODE__VI = 0x1C78; +constexpr unsigned int mmDCP1_DC_LUT_SEQ_COLOR__VI = 0x1C7A; +constexpr unsigned int mmDCP1_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x1C7D; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_BLUE__VI = 0x1C84; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_GREEN__VI = 0x1C85; +constexpr unsigned int mmDCP1_DC_LUT_WHITE_OFFSET_RED__VI = 0x1C86; +constexpr unsigned int mmDCP1_DC_LUT_WRITE_EN_MASK__VI = 0x1C7E; +constexpr unsigned int mmDCP1_DEGAMMA_CONTROL__VI = 0x1C58; +constexpr unsigned int mmDCP1_DENORM_CONTROL__VI = 0x1C50; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C11_C12__VI = 0x1C5A; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C13_C14__VI = 0x1C5B; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C21_C22__VI = 0x1C5C; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C23_C24__VI = 0x1C5D; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C31_C32__VI = 0x1C5E; +constexpr unsigned int mmDCP1_GAMUT_REMAP_C33_C34__VI = 0x1C5F; +constexpr unsigned int mmDCP1_GAMUT_REMAP_CONTROL__VI = 0x1C59; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_PITCH__VI = 0x1C1A; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS__VI = 0x1C19; +constexpr unsigned int mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__VI = 0x1C1B; +constexpr unsigned int mmDCP1_GRPH_CONTROL__SI__CI = 0x1D01; +constexpr unsigned int mmDCP1_GRPH_CONTROL__VI = 0x1C01; +constexpr unsigned int mmDCP1_GRPH_DFQ_CONTROL__VI = 0x1C14; +constexpr unsigned int mmDCP1_GRPH_DFQ_STATUS__VI = 0x1C15; +constexpr unsigned int mmDCP1_GRPH_ENABLE__VI = 0x1C00; +constexpr unsigned int mmDCP1_GRPH_FLIP_CONTROL__SI__CI = 0x1D12; +constexpr unsigned int mmDCP1_GRPH_FLIP_CONTROL__VI = 0x1C12; +constexpr unsigned int mmDCP1_GRPH_FLIP_RATE_CNTL__VI = 0x1C8E; +constexpr unsigned int mmDCP1_GRPH_INTERRUPT_CONTROL__VI = 0x1C17; +constexpr unsigned int mmDCP1_GRPH_INTERRUPT_STATUS__VI = 0x1C16; +constexpr unsigned int mmDCP1_GRPH_LUT_10BIT_BYPASS__VI = 0x1C02; +constexpr unsigned int mmDCP1_GRPH_PITCH__SI__CI = 0x1D06; +constexpr unsigned int mmDCP1_GRPH_PITCH__VI = 0x1C06; +constexpr unsigned int mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS__SI__CI = 0x1D04; +constexpr unsigned int mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS__VI = 0x1C04; +constexpr unsigned int mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__VI = 0x1C07; +constexpr unsigned int mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS__VI = 0x1C05; +constexpr unsigned int mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1C08; +constexpr unsigned int mmDCP1_GRPH_STEREOSYNC_FLIP__VI = 0x1C97; +constexpr unsigned int mmDCP1_GRPH_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x1C18; +constexpr unsigned int mmDCP1_GRPH_SURFACE_ADDRESS_INUSE__VI = 0x1C13; +constexpr unsigned int mmDCP1_GRPH_SURFACE_OFFSET_X__VI = 0x1C09; +constexpr unsigned int mmDCP1_GRPH_SURFACE_OFFSET_Y__VI = 0x1C0A; +constexpr unsigned int mmDCP1_GRPH_SWAP_CNTL__VI = 0x1C03; +constexpr unsigned int mmDCP1_GRPH_UPDATE__SI__CI = 0x1D11; +constexpr unsigned int mmDCP1_GRPH_UPDATE__VI = 0x1C11; +constexpr unsigned int mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x1C9F; +constexpr unsigned int mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x1CBF; +constexpr unsigned int mmDCP1_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x1CBD; +constexpr unsigned int mmDCP1_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x1CBE; +constexpr unsigned int mmDCP1_GRPH_X_END__VI = 0x1C0D; +constexpr unsigned int mmDCP1_GRPH_X_START__VI = 0x1C0B; +constexpr unsigned int mmDCP1_GRPH_Y_END__VI = 0x1C0E; +constexpr unsigned int mmDCP1_GRPH_Y_START__VI = 0x1C0C; +constexpr unsigned int mmDCP1_HW_ROTATION__VI = 0x1C9E; +constexpr unsigned int mmDCP1_INPUT_CSC_C11_C12__VI = 0x1C36; +constexpr unsigned int mmDCP1_INPUT_CSC_C13_C14__VI = 0x1C37; +constexpr unsigned int mmDCP1_INPUT_CSC_C21_C22__VI = 0x1C38; +constexpr unsigned int mmDCP1_INPUT_CSC_C23_C24__VI = 0x1C39; +constexpr unsigned int mmDCP1_INPUT_CSC_C31_C32__VI = 0x1C3A; +constexpr unsigned int mmDCP1_INPUT_CSC_C33_C34__VI = 0x1C3B; +constexpr unsigned int mmDCP1_INPUT_CSC_CONTROL__VI = 0x1C35; +constexpr unsigned int mmDCP1_INPUT_GAMMA_CONTROL__VI = 0x1C10; +constexpr unsigned int mmDCP1_KEY_CONTROL__VI = 0x1C53; +constexpr unsigned int mmDCP1_KEY_RANGE_ALPHA__VI = 0x1C54; +constexpr unsigned int mmDCP1_KEY_RANGE_BLUE__VI = 0x1C57; +constexpr unsigned int mmDCP1_KEY_RANGE_GREEN__VI = 0x1C56; +constexpr unsigned int mmDCP1_KEY_RANGE_RED__VI = 0x1C55; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C11_C12__VI = 0x1C3D; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C13_C14__VI = 0x1C3E; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C21_C22__VI = 0x1C3F; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C23_C24__VI = 0x1C40; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C31_C32__VI = 0x1C41; +constexpr unsigned int mmDCP1_OUTPUT_CSC_C33_C34__VI = 0x1C42; +constexpr unsigned int mmDCP1_OUTPUT_CSC_CONTROL__VI = 0x1C3C; +constexpr unsigned int mmDCP1_OUT_CLAMP_CONTROL_B_CB__VI = 0x1C9D; +constexpr unsigned int mmDCP1_OUT_CLAMP_CONTROL_G_Y__VI = 0x1C9C; +constexpr unsigned int mmDCP1_OUT_CLAMP_CONTROL_R_CR__VI = 0x1C52; +constexpr unsigned int mmDCP1_OUT_ROUND_CONTROL__VI = 0x1C51; +constexpr unsigned int mmDCP1_OVLSCL_EDGE_PIXEL_CNTL__VI = 0x1C2C; +constexpr unsigned int mmDCP1_OVL_CONTROL1__VI = 0x1C1D; +constexpr unsigned int mmDCP1_OVL_CONTROL2__VI = 0x1C1E; +constexpr unsigned int mmDCP1_OVL_DFQ_CONTROL__VI = 0x1C29; +constexpr unsigned int mmDCP1_OVL_DFQ_STATUS__VI = 0x1C2A; +constexpr unsigned int mmDCP1_OVL_ENABLE__VI = 0x1C1C; +constexpr unsigned int mmDCP1_OVL_END__VI = 0x1C26; +constexpr unsigned int mmDCP1_OVL_PITCH__VI = 0x1C21; +constexpr unsigned int mmDCP1_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x1C92; +constexpr unsigned int mmDCP1_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1C94; +constexpr unsigned int mmDCP1_OVL_START__VI = 0x1C25; +constexpr unsigned int mmDCP1_OVL_STEREOSYNC_FLIP__VI = 0x1C93; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS__SI__CI = 0x1D20; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS__VI = 0x1C20; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_HIGH__VI = 0x1C22; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x1C2B; +constexpr unsigned int mmDCP1_OVL_SURFACE_ADDRESS_INUSE__VI = 0x1C28; +constexpr unsigned int mmDCP1_OVL_SURFACE_OFFSET_X__VI = 0x1C23; +constexpr unsigned int mmDCP1_OVL_SURFACE_OFFSET_Y__VI = 0x1C24; +constexpr unsigned int mmDCP1_OVL_SWAP_CNTL__VI = 0x1C1F; +constexpr unsigned int mmDCP1_OVL_UPDATE__VI = 0x1C27; +constexpr unsigned int mmDCP1_PRESCALE_GRPH_CONTROL__VI = 0x1C2D; +constexpr unsigned int mmDCP1_PRESCALE_OVL_CONTROL__VI = 0x1C31; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_GRPH_B__VI = 0x1C30; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_GRPH_G__VI = 0x1C2F; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_GRPH_R__VI = 0x1C2E; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_OVL_CB__VI = 0x1C32; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_OVL_CR__VI = 0x1C34; +constexpr unsigned int mmDCP1_PRESCALE_VALUES_OVL_Y__VI = 0x1C33; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_END_CNTL1__VI = 0x1CA6; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_END_CNTL2__VI = 0x1CA7; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_0_1__VI = 0x1CA8; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_10_11__VI = 0x1CAD; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_12_13__VI = 0x1CAE; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_14_15__VI = 0x1CAF; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_2_3__VI = 0x1CA9; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_4_5__VI = 0x1CAA; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_6_7__VI = 0x1CAB; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_REGION_8_9__VI = 0x1CAC; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x1CA5; +constexpr unsigned int mmDCP1_REGAMMA_CNTLA_START_CNTL__VI = 0x1CA4; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_END_CNTL1__VI = 0x1CB2; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_END_CNTL2__VI = 0x1CB3; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_0_1__VI = 0x1CB4; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_10_11__VI = 0x1CB9; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_12_13__VI = 0x1CBA; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_14_15__VI = 0x1CBB; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_2_3__VI = 0x1CB5; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_4_5__VI = 0x1CB6; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_6_7__VI = 0x1CB7; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_REGION_8_9__VI = 0x1CB8; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x1CB1; +constexpr unsigned int mmDCP1_REGAMMA_CNTLB_START_CNTL__VI = 0x1CB0; +constexpr unsigned int mmDCP1_REGAMMA_CONTROL__VI = 0x1CA0; +constexpr unsigned int mmDCP1_REGAMMA_LUT_DATA__VI = 0x1CA2; +constexpr unsigned int mmDCP1_REGAMMA_LUT_INDEX__VI = 0x1CA1; +constexpr unsigned int mmDCP1_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x1CA3; +constexpr unsigned int mmDCP2_ALPHA_CONTROL__VI = 0x1EBC; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C11_C12__VI = 0x1E43; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C13_C14__VI = 0x1E44; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C21_C22__VI = 0x1E45; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C23_C24__VI = 0x1E46; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C31_C32__VI = 0x1E47; +constexpr unsigned int mmDCP2_COMM_MATRIXA_TRANS_C33_C34__VI = 0x1E48; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C11_C12__VI = 0x1E49; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C13_C14__VI = 0x1E4A; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C21_C22__VI = 0x1E4B; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C23_C24__VI = 0x1E4C; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C31_C32__VI = 0x1E4D; +constexpr unsigned int mmDCP2_COMM_MATRIXB_TRANS_C33_C34__VI = 0x1E4E; +constexpr unsigned int mmDCP2_CUR2_COLOR1__VI = 0x1E75; +constexpr unsigned int mmDCP2_CUR2_COLOR2__VI = 0x1E76; +constexpr unsigned int mmDCP2_CUR2_CONTROL__VI = 0x1E6F; +constexpr unsigned int mmDCP2_CUR2_HOT_SPOT__VI = 0x1E74; +constexpr unsigned int mmDCP2_CUR2_POSITION__VI = 0x1E73; +constexpr unsigned int mmDCP2_CUR2_SIZE__VI = 0x1E71; +constexpr unsigned int mmDCP2_CUR2_STEREO_CONTROL__VI = 0x1E9B; +constexpr unsigned int mmDCP2_CUR2_SURFACE_ADDRESS__VI = 0x1E70; +constexpr unsigned int mmDCP2_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x1E72; +constexpr unsigned int mmDCP2_CUR2_UPDATE__VI = 0x1E77; +constexpr unsigned int mmDCP2_CUR_COLOR1__VI = 0x1E6C; +constexpr unsigned int mmDCP2_CUR_COLOR2__VI = 0x1E6D; +constexpr unsigned int mmDCP2_CUR_CONTROL__VI = 0x1E66; +constexpr unsigned int mmDCP2_CUR_HOT_SPOT__VI = 0x1E6B; +constexpr unsigned int mmDCP2_CUR_POSITION__VI = 0x1E6A; +constexpr unsigned int mmDCP2_CUR_REQUEST_FILTER_CNTL__VI = 0x1E99; +constexpr unsigned int mmDCP2_CUR_SIZE__VI = 0x1E68; +constexpr unsigned int mmDCP2_CUR_STEREO_CONTROL__VI = 0x1E9A; +constexpr unsigned int mmDCP2_CUR_SURFACE_ADDRESS__VI = 0x1E67; +constexpr unsigned int mmDCP2_CUR_SURFACE_ADDRESS_HIGH__VI = 0x1E69; +constexpr unsigned int mmDCP2_CUR_UPDATE__VI = 0x1E6E; +constexpr unsigned int mmDCP2_DCP_CRC_CONTROL__VI = 0x1E87; +constexpr unsigned int mmDCP2_DCP_CRC_CURRENT__VI = 0x1E89; +constexpr unsigned int mmDCP2_DCP_CRC_LAST__VI = 0x1E8B; +constexpr unsigned int mmDCP2_DCP_CRC_MASK__VI = 0x1E88; +constexpr unsigned int mmDCP2_DCP_DEBUG__VI = 0x1E8D; +constexpr unsigned int mmDCP2_DCP_DEBUG2__VI = 0x1E98; +constexpr unsigned int mmDCP2_DCP_FP_CONVERTED_FIELD__VI = 0x1E65; +constexpr unsigned int mmDCP2_DCP_GSL_CONTROL__VI = 0x1E90; +constexpr unsigned int mmDCP2_DCP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x1E91; +constexpr unsigned int mmDCP2_DCP_RANDOM_SEEDS__VI = 0x1E61; +constexpr unsigned int mmDCP2_DCP_SPATIAL_DITHER_CNTL__VI = 0x1E60; +constexpr unsigned int mmDCP2_DCP_TEST_DEBUG_DATA__VI = 0x1E96; +constexpr unsigned int mmDCP2_DCP_TEST_DEBUG_INDEX__VI = 0x1E95; +constexpr unsigned int mmDCP2_DC_LUT_30_COLOR__VI = 0x1E7C; +constexpr unsigned int mmDCP2_DC_LUT_AUTOFILL__VI = 0x1E7F; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_BLUE__VI = 0x1E81; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_GREEN__VI = 0x1E82; +constexpr unsigned int mmDCP2_DC_LUT_BLACK_OFFSET_RED__VI = 0x1E83; +constexpr unsigned int mmDCP2_DC_LUT_CONTROL__VI = 0x1E80; +constexpr unsigned int mmDCP2_DC_LUT_PWL_DATA__VI = 0x1E7B; +constexpr unsigned int mmDCP2_DC_LUT_RW_INDEX__VI = 0x1E79; +constexpr unsigned int mmDCP2_DC_LUT_RW_MODE__VI = 0x1E78; +constexpr unsigned int mmDCP2_DC_LUT_SEQ_COLOR__VI = 0x1E7A; +constexpr unsigned int mmDCP2_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x1E7D; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_BLUE__VI = 0x1E84; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_GREEN__VI = 0x1E85; +constexpr unsigned int mmDCP2_DC_LUT_WHITE_OFFSET_RED__VI = 0x1E86; +constexpr unsigned int mmDCP2_DC_LUT_WRITE_EN_MASK__VI = 0x1E7E; +constexpr unsigned int mmDCP2_DEGAMMA_CONTROL__VI = 0x1E58; +constexpr unsigned int mmDCP2_DENORM_CONTROL__VI = 0x1E50; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C11_C12__VI = 0x1E5A; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C13_C14__VI = 0x1E5B; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C21_C22__VI = 0x1E5C; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C23_C24__VI = 0x1E5D; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C31_C32__VI = 0x1E5E; +constexpr unsigned int mmDCP2_GAMUT_REMAP_C33_C34__VI = 0x1E5F; +constexpr unsigned int mmDCP2_GAMUT_REMAP_CONTROL__VI = 0x1E59; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_PITCH__VI = 0x1E1A; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS__VI = 0x1E19; +constexpr unsigned int mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__VI = 0x1E1B; +constexpr unsigned int mmDCP2_GRPH_CONTROL__SI__CI = 0x4001; +constexpr unsigned int mmDCP2_GRPH_CONTROL__VI = 0x1E01; +constexpr unsigned int mmDCP2_GRPH_DFQ_CONTROL__VI = 0x1E14; +constexpr unsigned int mmDCP2_GRPH_DFQ_STATUS__VI = 0x1E15; +constexpr unsigned int mmDCP2_GRPH_ENABLE__VI = 0x1E00; +constexpr unsigned int mmDCP2_GRPH_FLIP_CONTROL__SI__CI = 0x4012; +constexpr unsigned int mmDCP2_GRPH_FLIP_CONTROL__VI = 0x1E12; +constexpr unsigned int mmDCP2_GRPH_FLIP_RATE_CNTL__VI = 0x1E8E; +constexpr unsigned int mmDCP2_GRPH_INTERRUPT_CONTROL__VI = 0x1E17; +constexpr unsigned int mmDCP2_GRPH_INTERRUPT_STATUS__VI = 0x1E16; +constexpr unsigned int mmDCP2_GRPH_LUT_10BIT_BYPASS__VI = 0x1E02; +constexpr unsigned int mmDCP2_GRPH_PITCH__SI__CI = 0x4006; +constexpr unsigned int mmDCP2_GRPH_PITCH__VI = 0x1E06; +constexpr unsigned int mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS__SI__CI = 0x4004; +constexpr unsigned int mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS__VI = 0x1E04; +constexpr unsigned int mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__VI = 0x1E07; +constexpr unsigned int mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS__VI = 0x1E05; +constexpr unsigned int mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1E08; +constexpr unsigned int mmDCP2_GRPH_STEREOSYNC_FLIP__VI = 0x1E97; +constexpr unsigned int mmDCP2_GRPH_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x1E18; +constexpr unsigned int mmDCP2_GRPH_SURFACE_ADDRESS_INUSE__VI = 0x1E13; +constexpr unsigned int mmDCP2_GRPH_SURFACE_OFFSET_X__VI = 0x1E09; +constexpr unsigned int mmDCP2_GRPH_SURFACE_OFFSET_Y__VI = 0x1E0A; +constexpr unsigned int mmDCP2_GRPH_SWAP_CNTL__VI = 0x1E03; +constexpr unsigned int mmDCP2_GRPH_UPDATE__SI__CI = 0x4011; +constexpr unsigned int mmDCP2_GRPH_UPDATE__VI = 0x1E11; +constexpr unsigned int mmDCP2_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x1E9F; +constexpr unsigned int mmDCP2_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x1EBF; +constexpr unsigned int mmDCP2_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x1EBD; +constexpr unsigned int mmDCP2_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x1EBE; +constexpr unsigned int mmDCP2_GRPH_X_END__VI = 0x1E0D; +constexpr unsigned int mmDCP2_GRPH_X_START__VI = 0x1E0B; +constexpr unsigned int mmDCP2_GRPH_Y_END__VI = 0x1E0E; +constexpr unsigned int mmDCP2_GRPH_Y_START__VI = 0x1E0C; +constexpr unsigned int mmDCP2_HW_ROTATION__VI = 0x1E9E; +constexpr unsigned int mmDCP2_INPUT_CSC_C11_C12__VI = 0x1E36; +constexpr unsigned int mmDCP2_INPUT_CSC_C13_C14__VI = 0x1E37; +constexpr unsigned int mmDCP2_INPUT_CSC_C21_C22__VI = 0x1E38; +constexpr unsigned int mmDCP2_INPUT_CSC_C23_C24__VI = 0x1E39; +constexpr unsigned int mmDCP2_INPUT_CSC_C31_C32__VI = 0x1E3A; +constexpr unsigned int mmDCP2_INPUT_CSC_C33_C34__VI = 0x1E3B; +constexpr unsigned int mmDCP2_INPUT_CSC_CONTROL__VI = 0x1E35; +constexpr unsigned int mmDCP2_INPUT_GAMMA_CONTROL__VI = 0x1E10; +constexpr unsigned int mmDCP2_KEY_CONTROL__VI = 0x1E53; +constexpr unsigned int mmDCP2_KEY_RANGE_ALPHA__VI = 0x1E54; +constexpr unsigned int mmDCP2_KEY_RANGE_BLUE__VI = 0x1E57; +constexpr unsigned int mmDCP2_KEY_RANGE_GREEN__VI = 0x1E56; +constexpr unsigned int mmDCP2_KEY_RANGE_RED__VI = 0x1E55; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C11_C12__VI = 0x1E3D; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C13_C14__VI = 0x1E3E; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C21_C22__VI = 0x1E3F; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C23_C24__VI = 0x1E40; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C31_C32__VI = 0x1E41; +constexpr unsigned int mmDCP2_OUTPUT_CSC_C33_C34__VI = 0x1E42; +constexpr unsigned int mmDCP2_OUTPUT_CSC_CONTROL__VI = 0x1E3C; +constexpr unsigned int mmDCP2_OUT_CLAMP_CONTROL_B_CB__VI = 0x1E9D; +constexpr unsigned int mmDCP2_OUT_CLAMP_CONTROL_G_Y__VI = 0x1E9C; +constexpr unsigned int mmDCP2_OUT_CLAMP_CONTROL_R_CR__VI = 0x1E52; +constexpr unsigned int mmDCP2_OUT_ROUND_CONTROL__VI = 0x1E51; +constexpr unsigned int mmDCP2_OVLSCL_EDGE_PIXEL_CNTL__VI = 0x1E2C; +constexpr unsigned int mmDCP2_OVL_CONTROL1__VI = 0x1E1D; +constexpr unsigned int mmDCP2_OVL_CONTROL2__VI = 0x1E1E; +constexpr unsigned int mmDCP2_OVL_DFQ_CONTROL__VI = 0x1E29; +constexpr unsigned int mmDCP2_OVL_DFQ_STATUS__VI = 0x1E2A; +constexpr unsigned int mmDCP2_OVL_ENABLE__VI = 0x1E1C; +constexpr unsigned int mmDCP2_OVL_END__VI = 0x1E26; +constexpr unsigned int mmDCP2_OVL_PITCH__VI = 0x1E21; +constexpr unsigned int mmDCP2_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x1E92; +constexpr unsigned int mmDCP2_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1E94; +constexpr unsigned int mmDCP2_OVL_START__VI = 0x1E25; +constexpr unsigned int mmDCP2_OVL_STEREOSYNC_FLIP__VI = 0x1E93; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS__SI__CI = 0x4020; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS__VI = 0x1E20; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_HIGH__VI = 0x1E22; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x1E2B; +constexpr unsigned int mmDCP2_OVL_SURFACE_ADDRESS_INUSE__VI = 0x1E28; +constexpr unsigned int mmDCP2_OVL_SURFACE_OFFSET_X__VI = 0x1E23; +constexpr unsigned int mmDCP2_OVL_SURFACE_OFFSET_Y__VI = 0x1E24; +constexpr unsigned int mmDCP2_OVL_SWAP_CNTL__VI = 0x1E1F; +constexpr unsigned int mmDCP2_OVL_UPDATE__VI = 0x1E27; +constexpr unsigned int mmDCP2_PRESCALE_GRPH_CONTROL__VI = 0x1E2D; +constexpr unsigned int mmDCP2_PRESCALE_OVL_CONTROL__VI = 0x1E31; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_GRPH_B__VI = 0x1E30; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_GRPH_G__VI = 0x1E2F; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_GRPH_R__VI = 0x1E2E; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_OVL_CB__VI = 0x1E32; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_OVL_CR__VI = 0x1E34; +constexpr unsigned int mmDCP2_PRESCALE_VALUES_OVL_Y__VI = 0x1E33; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_END_CNTL1__VI = 0x1EA6; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_END_CNTL2__VI = 0x1EA7; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_0_1__VI = 0x1EA8; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_10_11__VI = 0x1EAD; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_12_13__VI = 0x1EAE; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_14_15__VI = 0x1EAF; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_2_3__VI = 0x1EA9; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_4_5__VI = 0x1EAA; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_6_7__VI = 0x1EAB; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_REGION_8_9__VI = 0x1EAC; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x1EA5; +constexpr unsigned int mmDCP2_REGAMMA_CNTLA_START_CNTL__VI = 0x1EA4; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_END_CNTL1__VI = 0x1EB2; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_END_CNTL2__VI = 0x1EB3; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_0_1__VI = 0x1EB4; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_10_11__VI = 0x1EB9; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_12_13__VI = 0x1EBA; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_14_15__VI = 0x1EBB; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_2_3__VI = 0x1EB5; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_4_5__VI = 0x1EB6; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_6_7__VI = 0x1EB7; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_REGION_8_9__VI = 0x1EB8; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x1EB1; +constexpr unsigned int mmDCP2_REGAMMA_CNTLB_START_CNTL__VI = 0x1EB0; +constexpr unsigned int mmDCP2_REGAMMA_CONTROL__VI = 0x1EA0; +constexpr unsigned int mmDCP2_REGAMMA_LUT_DATA__VI = 0x1EA2; +constexpr unsigned int mmDCP2_REGAMMA_LUT_INDEX__VI = 0x1EA1; +constexpr unsigned int mmDCP2_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x1EA3; +constexpr unsigned int mmDCP3_ALPHA_CONTROL__VI = 0x40BC; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C11_C12__VI = 0x4043; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C13_C14__VI = 0x4044; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C21_C22__VI = 0x4045; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C23_C24__VI = 0x4046; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C31_C32__VI = 0x4047; +constexpr unsigned int mmDCP3_COMM_MATRIXA_TRANS_C33_C34__VI = 0x4048; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C11_C12__VI = 0x4049; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C13_C14__VI = 0x404A; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C21_C22__VI = 0x404B; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C23_C24__VI = 0x404C; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C31_C32__VI = 0x404D; +constexpr unsigned int mmDCP3_COMM_MATRIXB_TRANS_C33_C34__VI = 0x404E; +constexpr unsigned int mmDCP3_CUR2_COLOR1__VI = 0x4075; +constexpr unsigned int mmDCP3_CUR2_COLOR2__VI = 0x4076; +constexpr unsigned int mmDCP3_CUR2_CONTROL__VI = 0x406F; +constexpr unsigned int mmDCP3_CUR2_HOT_SPOT__VI = 0x4074; +constexpr unsigned int mmDCP3_CUR2_POSITION__VI = 0x4073; +constexpr unsigned int mmDCP3_CUR2_SIZE__VI = 0x4071; +constexpr unsigned int mmDCP3_CUR2_STEREO_CONTROL__VI = 0x409B; +constexpr unsigned int mmDCP3_CUR2_SURFACE_ADDRESS__VI = 0x4070; +constexpr unsigned int mmDCP3_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x4072; +constexpr unsigned int mmDCP3_CUR2_UPDATE__VI = 0x4077; +constexpr unsigned int mmDCP3_CUR_COLOR1__VI = 0x406C; +constexpr unsigned int mmDCP3_CUR_COLOR2__VI = 0x406D; +constexpr unsigned int mmDCP3_CUR_CONTROL__VI = 0x4066; +constexpr unsigned int mmDCP3_CUR_HOT_SPOT__VI = 0x406B; +constexpr unsigned int mmDCP3_CUR_POSITION__VI = 0x406A; +constexpr unsigned int mmDCP3_CUR_REQUEST_FILTER_CNTL__VI = 0x4099; +constexpr unsigned int mmDCP3_CUR_SIZE__VI = 0x4068; +constexpr unsigned int mmDCP3_CUR_STEREO_CONTROL__VI = 0x409A; +constexpr unsigned int mmDCP3_CUR_SURFACE_ADDRESS__VI = 0x4067; +constexpr unsigned int mmDCP3_CUR_SURFACE_ADDRESS_HIGH__VI = 0x4069; +constexpr unsigned int mmDCP3_CUR_UPDATE__VI = 0x406E; +constexpr unsigned int mmDCP3_DCP_CRC_CONTROL__VI = 0x4087; +constexpr unsigned int mmDCP3_DCP_CRC_CURRENT__VI = 0x4089; +constexpr unsigned int mmDCP3_DCP_CRC_LAST__VI = 0x408B; +constexpr unsigned int mmDCP3_DCP_CRC_MASK__VI = 0x4088; +constexpr unsigned int mmDCP3_DCP_DEBUG__VI = 0x408D; +constexpr unsigned int mmDCP3_DCP_DEBUG2__VI = 0x4098; +constexpr unsigned int mmDCP3_DCP_FP_CONVERTED_FIELD__VI = 0x4065; +constexpr unsigned int mmDCP3_DCP_GSL_CONTROL__VI = 0x4090; +constexpr unsigned int mmDCP3_DCP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x4091; +constexpr unsigned int mmDCP3_DCP_RANDOM_SEEDS__VI = 0x4061; +constexpr unsigned int mmDCP3_DCP_SPATIAL_DITHER_CNTL__VI = 0x4060; +constexpr unsigned int mmDCP3_DCP_TEST_DEBUG_DATA__VI = 0x4096; +constexpr unsigned int mmDCP3_DCP_TEST_DEBUG_INDEX__VI = 0x4095; +constexpr unsigned int mmDCP3_DC_LUT_30_COLOR__VI = 0x407C; +constexpr unsigned int mmDCP3_DC_LUT_AUTOFILL__VI = 0x407F; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_BLUE__VI = 0x4081; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_GREEN__VI = 0x4082; +constexpr unsigned int mmDCP3_DC_LUT_BLACK_OFFSET_RED__VI = 0x4083; +constexpr unsigned int mmDCP3_DC_LUT_CONTROL__VI = 0x4080; +constexpr unsigned int mmDCP3_DC_LUT_PWL_DATA__VI = 0x407B; +constexpr unsigned int mmDCP3_DC_LUT_RW_INDEX__VI = 0x4079; +constexpr unsigned int mmDCP3_DC_LUT_RW_MODE__VI = 0x4078; +constexpr unsigned int mmDCP3_DC_LUT_SEQ_COLOR__VI = 0x407A; +constexpr unsigned int mmDCP3_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x407D; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_BLUE__VI = 0x4084; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_GREEN__VI = 0x4085; +constexpr unsigned int mmDCP3_DC_LUT_WHITE_OFFSET_RED__VI = 0x4086; +constexpr unsigned int mmDCP3_DC_LUT_WRITE_EN_MASK__VI = 0x407E; +constexpr unsigned int mmDCP3_DEGAMMA_CONTROL__VI = 0x4058; +constexpr unsigned int mmDCP3_DENORM_CONTROL__VI = 0x4050; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C11_C12__VI = 0x405A; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C13_C14__VI = 0x405B; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C21_C22__VI = 0x405C; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C23_C24__VI = 0x405D; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C31_C32__VI = 0x405E; +constexpr unsigned int mmDCP3_GAMUT_REMAP_C33_C34__VI = 0x405F; +constexpr unsigned int mmDCP3_GAMUT_REMAP_CONTROL__VI = 0x4059; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_PITCH__VI = 0x401A; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS__VI = 0x4019; +constexpr unsigned int mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__VI = 0x401B; +constexpr unsigned int mmDCP3_GRPH_CONTROL__SI__CI = 0x4301; +constexpr unsigned int mmDCP3_GRPH_CONTROL__VI = 0x4001; +constexpr unsigned int mmDCP3_GRPH_DFQ_CONTROL__VI = 0x4014; +constexpr unsigned int mmDCP3_GRPH_DFQ_STATUS__VI = 0x4015; +constexpr unsigned int mmDCP3_GRPH_ENABLE__VI = 0x4000; +constexpr unsigned int mmDCP3_GRPH_FLIP_CONTROL__SI__CI = 0x4312; +constexpr unsigned int mmDCP3_GRPH_FLIP_CONTROL__VI = 0x4012; +constexpr unsigned int mmDCP3_GRPH_FLIP_RATE_CNTL__VI = 0x408E; +constexpr unsigned int mmDCP3_GRPH_INTERRUPT_CONTROL__VI = 0x4017; +constexpr unsigned int mmDCP3_GRPH_INTERRUPT_STATUS__VI = 0x4016; +constexpr unsigned int mmDCP3_GRPH_LUT_10BIT_BYPASS__VI = 0x4002; +constexpr unsigned int mmDCP3_GRPH_PITCH__SI__CI = 0x4306; +constexpr unsigned int mmDCP3_GRPH_PITCH__VI = 0x4006; +constexpr unsigned int mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS__SI__CI = 0x4304; +constexpr unsigned int mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS__VI = 0x4004; +constexpr unsigned int mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__VI = 0x4007; +constexpr unsigned int mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS__VI = 0x4005; +constexpr unsigned int mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4008; +constexpr unsigned int mmDCP3_GRPH_STEREOSYNC_FLIP__VI = 0x4097; +constexpr unsigned int mmDCP3_GRPH_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x4018; +constexpr unsigned int mmDCP3_GRPH_SURFACE_ADDRESS_INUSE__VI = 0x4013; +constexpr unsigned int mmDCP3_GRPH_SURFACE_OFFSET_X__VI = 0x4009; +constexpr unsigned int mmDCP3_GRPH_SURFACE_OFFSET_Y__VI = 0x400A; +constexpr unsigned int mmDCP3_GRPH_SWAP_CNTL__VI = 0x4003; +constexpr unsigned int mmDCP3_GRPH_UPDATE__SI__CI = 0x4311; +constexpr unsigned int mmDCP3_GRPH_UPDATE__VI = 0x4011; +constexpr unsigned int mmDCP3_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x409F; +constexpr unsigned int mmDCP3_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x40BF; +constexpr unsigned int mmDCP3_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x40BD; +constexpr unsigned int mmDCP3_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x40BE; +constexpr unsigned int mmDCP3_GRPH_X_END__VI = 0x400D; +constexpr unsigned int mmDCP3_GRPH_X_START__VI = 0x400B; +constexpr unsigned int mmDCP3_GRPH_Y_END__VI = 0x400E; +constexpr unsigned int mmDCP3_GRPH_Y_START__VI = 0x400C; +constexpr unsigned int mmDCP3_HW_ROTATION__VI = 0x409E; +constexpr unsigned int mmDCP3_INPUT_CSC_C11_C12__VI = 0x4036; +constexpr unsigned int mmDCP3_INPUT_CSC_C13_C14__VI = 0x4037; +constexpr unsigned int mmDCP3_INPUT_CSC_C21_C22__VI = 0x4038; +constexpr unsigned int mmDCP3_INPUT_CSC_C23_C24__VI = 0x4039; +constexpr unsigned int mmDCP3_INPUT_CSC_C31_C32__VI = 0x403A; +constexpr unsigned int mmDCP3_INPUT_CSC_C33_C34__VI = 0x403B; +constexpr unsigned int mmDCP3_INPUT_CSC_CONTROL__VI = 0x4035; +constexpr unsigned int mmDCP3_INPUT_GAMMA_CONTROL__VI = 0x4010; +constexpr unsigned int mmDCP3_KEY_CONTROL__VI = 0x4053; +constexpr unsigned int mmDCP3_KEY_RANGE_ALPHA__VI = 0x4054; +constexpr unsigned int mmDCP3_KEY_RANGE_BLUE__VI = 0x4057; +constexpr unsigned int mmDCP3_KEY_RANGE_GREEN__VI = 0x4056; +constexpr unsigned int mmDCP3_KEY_RANGE_RED__VI = 0x4055; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C11_C12__VI = 0x403D; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C13_C14__VI = 0x403E; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C21_C22__VI = 0x403F; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C23_C24__VI = 0x4040; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C31_C32__VI = 0x4041; +constexpr unsigned int mmDCP3_OUTPUT_CSC_C33_C34__VI = 0x4042; +constexpr unsigned int mmDCP3_OUTPUT_CSC_CONTROL__VI = 0x403C; +constexpr unsigned int mmDCP3_OUT_CLAMP_CONTROL_B_CB__VI = 0x409D; +constexpr unsigned int mmDCP3_OUT_CLAMP_CONTROL_G_Y__VI = 0x409C; +constexpr unsigned int mmDCP3_OUT_CLAMP_CONTROL_R_CR__VI = 0x4052; +constexpr unsigned int mmDCP3_OUT_ROUND_CONTROL__VI = 0x4051; +constexpr unsigned int mmDCP3_OVLSCL_EDGE_PIXEL_CNTL__VI = 0x402C; +constexpr unsigned int mmDCP3_OVL_CONTROL1__VI = 0x401D; +constexpr unsigned int mmDCP3_OVL_CONTROL2__VI = 0x401E; +constexpr unsigned int mmDCP3_OVL_DFQ_CONTROL__VI = 0x4029; +constexpr unsigned int mmDCP3_OVL_DFQ_STATUS__VI = 0x402A; +constexpr unsigned int mmDCP3_OVL_ENABLE__VI = 0x401C; +constexpr unsigned int mmDCP3_OVL_END__VI = 0x4026; +constexpr unsigned int mmDCP3_OVL_PITCH__VI = 0x4021; +constexpr unsigned int mmDCP3_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x4092; +constexpr unsigned int mmDCP3_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4094; +constexpr unsigned int mmDCP3_OVL_START__VI = 0x4025; +constexpr unsigned int mmDCP3_OVL_STEREOSYNC_FLIP__VI = 0x4093; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS__SI__CI = 0x4320; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS__VI = 0x4020; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_HIGH__VI = 0x4022; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x402B; +constexpr unsigned int mmDCP3_OVL_SURFACE_ADDRESS_INUSE__VI = 0x4028; +constexpr unsigned int mmDCP3_OVL_SURFACE_OFFSET_X__VI = 0x4023; +constexpr unsigned int mmDCP3_OVL_SURFACE_OFFSET_Y__VI = 0x4024; +constexpr unsigned int mmDCP3_OVL_SWAP_CNTL__VI = 0x401F; +constexpr unsigned int mmDCP3_OVL_UPDATE__VI = 0x4027; +constexpr unsigned int mmDCP3_PRESCALE_GRPH_CONTROL__VI = 0x402D; +constexpr unsigned int mmDCP3_PRESCALE_OVL_CONTROL__VI = 0x4031; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_GRPH_B__VI = 0x4030; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_GRPH_G__VI = 0x402F; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_GRPH_R__VI = 0x402E; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_OVL_CB__VI = 0x4032; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_OVL_CR__VI = 0x4034; +constexpr unsigned int mmDCP3_PRESCALE_VALUES_OVL_Y__VI = 0x4033; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_END_CNTL1__VI = 0x40A6; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_END_CNTL2__VI = 0x40A7; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_0_1__VI = 0x40A8; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_10_11__VI = 0x40AD; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_12_13__VI = 0x40AE; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_14_15__VI = 0x40AF; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_2_3__VI = 0x40A9; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_4_5__VI = 0x40AA; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_6_7__VI = 0x40AB; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_REGION_8_9__VI = 0x40AC; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x40A5; +constexpr unsigned int mmDCP3_REGAMMA_CNTLA_START_CNTL__VI = 0x40A4; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_END_CNTL1__VI = 0x40B2; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_END_CNTL2__VI = 0x40B3; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_0_1__VI = 0x40B4; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_10_11__VI = 0x40B9; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_12_13__VI = 0x40BA; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_14_15__VI = 0x40BB; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_2_3__VI = 0x40B5; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_4_5__VI = 0x40B6; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_6_7__VI = 0x40B7; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_REGION_8_9__VI = 0x40B8; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x40B1; +constexpr unsigned int mmDCP3_REGAMMA_CNTLB_START_CNTL__VI = 0x40B0; +constexpr unsigned int mmDCP3_REGAMMA_CONTROL__VI = 0x40A0; +constexpr unsigned int mmDCP3_REGAMMA_LUT_DATA__VI = 0x40A2; +constexpr unsigned int mmDCP3_REGAMMA_LUT_INDEX__VI = 0x40A1; +constexpr unsigned int mmDCP3_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x40A3; +constexpr unsigned int mmDCP4_ALPHA_CONTROL__VI = 0x42BC; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C11_C12__VI = 0x4243; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C13_C14__VI = 0x4244; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C21_C22__VI = 0x4245; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C23_C24__VI = 0x4246; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C31_C32__VI = 0x4247; +constexpr unsigned int mmDCP4_COMM_MATRIXA_TRANS_C33_C34__VI = 0x4248; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C11_C12__VI = 0x4249; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C13_C14__VI = 0x424A; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C21_C22__VI = 0x424B; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C23_C24__VI = 0x424C; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C31_C32__VI = 0x424D; +constexpr unsigned int mmDCP4_COMM_MATRIXB_TRANS_C33_C34__VI = 0x424E; +constexpr unsigned int mmDCP4_CUR2_COLOR1__VI = 0x4275; +constexpr unsigned int mmDCP4_CUR2_COLOR2__VI = 0x4276; +constexpr unsigned int mmDCP4_CUR2_CONTROL__VI = 0x426F; +constexpr unsigned int mmDCP4_CUR2_HOT_SPOT__VI = 0x4274; +constexpr unsigned int mmDCP4_CUR2_POSITION__VI = 0x4273; +constexpr unsigned int mmDCP4_CUR2_SIZE__VI = 0x4271; +constexpr unsigned int mmDCP4_CUR2_STEREO_CONTROL__VI = 0x429B; +constexpr unsigned int mmDCP4_CUR2_SURFACE_ADDRESS__VI = 0x4270; +constexpr unsigned int mmDCP4_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x4272; +constexpr unsigned int mmDCP4_CUR2_UPDATE__VI = 0x4277; +constexpr unsigned int mmDCP4_CUR_COLOR1__VI = 0x426C; +constexpr unsigned int mmDCP4_CUR_COLOR2__VI = 0x426D; +constexpr unsigned int mmDCP4_CUR_CONTROL__VI = 0x4266; +constexpr unsigned int mmDCP4_CUR_HOT_SPOT__VI = 0x426B; +constexpr unsigned int mmDCP4_CUR_POSITION__VI = 0x426A; +constexpr unsigned int mmDCP4_CUR_REQUEST_FILTER_CNTL__VI = 0x4299; +constexpr unsigned int mmDCP4_CUR_SIZE__VI = 0x4268; +constexpr unsigned int mmDCP4_CUR_STEREO_CONTROL__VI = 0x429A; +constexpr unsigned int mmDCP4_CUR_SURFACE_ADDRESS__VI = 0x4267; +constexpr unsigned int mmDCP4_CUR_SURFACE_ADDRESS_HIGH__VI = 0x4269; +constexpr unsigned int mmDCP4_CUR_UPDATE__VI = 0x426E; +constexpr unsigned int mmDCP4_DCP_CRC_CONTROL__VI = 0x4287; +constexpr unsigned int mmDCP4_DCP_CRC_CURRENT__VI = 0x4289; +constexpr unsigned int mmDCP4_DCP_CRC_LAST__VI = 0x428B; +constexpr unsigned int mmDCP4_DCP_CRC_MASK__VI = 0x4288; +constexpr unsigned int mmDCP4_DCP_DEBUG__VI = 0x428D; +constexpr unsigned int mmDCP4_DCP_DEBUG2__VI = 0x4298; +constexpr unsigned int mmDCP4_DCP_FP_CONVERTED_FIELD__VI = 0x4265; +constexpr unsigned int mmDCP4_DCP_GSL_CONTROL__VI = 0x4290; +constexpr unsigned int mmDCP4_DCP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x4291; +constexpr unsigned int mmDCP4_DCP_RANDOM_SEEDS__VI = 0x4261; +constexpr unsigned int mmDCP4_DCP_SPATIAL_DITHER_CNTL__VI = 0x4260; +constexpr unsigned int mmDCP4_DCP_TEST_DEBUG_DATA__VI = 0x4296; +constexpr unsigned int mmDCP4_DCP_TEST_DEBUG_INDEX__VI = 0x4295; +constexpr unsigned int mmDCP4_DC_LUT_30_COLOR__VI = 0x427C; +constexpr unsigned int mmDCP4_DC_LUT_AUTOFILL__VI = 0x427F; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_BLUE__VI = 0x4281; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_GREEN__VI = 0x4282; +constexpr unsigned int mmDCP4_DC_LUT_BLACK_OFFSET_RED__VI = 0x4283; +constexpr unsigned int mmDCP4_DC_LUT_CONTROL__VI = 0x4280; +constexpr unsigned int mmDCP4_DC_LUT_PWL_DATA__VI = 0x427B; +constexpr unsigned int mmDCP4_DC_LUT_RW_INDEX__VI = 0x4279; +constexpr unsigned int mmDCP4_DC_LUT_RW_MODE__VI = 0x4278; +constexpr unsigned int mmDCP4_DC_LUT_SEQ_COLOR__VI = 0x427A; +constexpr unsigned int mmDCP4_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x427D; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_BLUE__VI = 0x4284; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_GREEN__VI = 0x4285; +constexpr unsigned int mmDCP4_DC_LUT_WHITE_OFFSET_RED__VI = 0x4286; +constexpr unsigned int mmDCP4_DC_LUT_WRITE_EN_MASK__VI = 0x427E; +constexpr unsigned int mmDCP4_DEGAMMA_CONTROL__VI = 0x4258; +constexpr unsigned int mmDCP4_DENORM_CONTROL__VI = 0x4250; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C11_C12__VI = 0x425A; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C13_C14__VI = 0x425B; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C21_C22__VI = 0x425C; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C23_C24__VI = 0x425D; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C31_C32__VI = 0x425E; +constexpr unsigned int mmDCP4_GAMUT_REMAP_C33_C34__VI = 0x425F; +constexpr unsigned int mmDCP4_GAMUT_REMAP_CONTROL__VI = 0x4259; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_PITCH__VI = 0x421A; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS__VI = 0x4219; +constexpr unsigned int mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__VI = 0x421B; +constexpr unsigned int mmDCP4_GRPH_CONTROL__SI__CI = 0x4601; +constexpr unsigned int mmDCP4_GRPH_CONTROL__VI = 0x4201; +constexpr unsigned int mmDCP4_GRPH_DFQ_CONTROL__VI = 0x4214; +constexpr unsigned int mmDCP4_GRPH_DFQ_STATUS__VI = 0x4215; +constexpr unsigned int mmDCP4_GRPH_ENABLE__VI = 0x4200; +constexpr unsigned int mmDCP4_GRPH_FLIP_CONTROL__SI__CI = 0x4612; +constexpr unsigned int mmDCP4_GRPH_FLIP_CONTROL__VI = 0x4212; +constexpr unsigned int mmDCP4_GRPH_FLIP_RATE_CNTL__VI = 0x428E; +constexpr unsigned int mmDCP4_GRPH_INTERRUPT_CONTROL__VI = 0x4217; +constexpr unsigned int mmDCP4_GRPH_INTERRUPT_STATUS__VI = 0x4216; +constexpr unsigned int mmDCP4_GRPH_LUT_10BIT_BYPASS__VI = 0x4202; +constexpr unsigned int mmDCP4_GRPH_PITCH__SI__CI = 0x4606; +constexpr unsigned int mmDCP4_GRPH_PITCH__VI = 0x4206; +constexpr unsigned int mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS__SI__CI = 0x4604; +constexpr unsigned int mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS__VI = 0x4204; +constexpr unsigned int mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__VI = 0x4207; +constexpr unsigned int mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS__VI = 0x4205; +constexpr unsigned int mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4208; +constexpr unsigned int mmDCP4_GRPH_STEREOSYNC_FLIP__VI = 0x4297; +constexpr unsigned int mmDCP4_GRPH_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x4218; +constexpr unsigned int mmDCP4_GRPH_SURFACE_ADDRESS_INUSE__VI = 0x4213; +constexpr unsigned int mmDCP4_GRPH_SURFACE_OFFSET_X__VI = 0x4209; +constexpr unsigned int mmDCP4_GRPH_SURFACE_OFFSET_Y__VI = 0x420A; +constexpr unsigned int mmDCP4_GRPH_SWAP_CNTL__VI = 0x4203; +constexpr unsigned int mmDCP4_GRPH_UPDATE__SI__CI = 0x4611; +constexpr unsigned int mmDCP4_GRPH_UPDATE__VI = 0x4211; +constexpr unsigned int mmDCP4_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x429F; +constexpr unsigned int mmDCP4_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x42BF; +constexpr unsigned int mmDCP4_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x42BD; +constexpr unsigned int mmDCP4_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x42BE; +constexpr unsigned int mmDCP4_GRPH_X_END__VI = 0x420D; +constexpr unsigned int mmDCP4_GRPH_X_START__VI = 0x420B; +constexpr unsigned int mmDCP4_GRPH_Y_END__VI = 0x420E; +constexpr unsigned int mmDCP4_GRPH_Y_START__VI = 0x420C; +constexpr unsigned int mmDCP4_HW_ROTATION__VI = 0x429E; +constexpr unsigned int mmDCP4_INPUT_CSC_C11_C12__VI = 0x4236; +constexpr unsigned int mmDCP4_INPUT_CSC_C13_C14__VI = 0x4237; +constexpr unsigned int mmDCP4_INPUT_CSC_C21_C22__VI = 0x4238; +constexpr unsigned int mmDCP4_INPUT_CSC_C23_C24__VI = 0x4239; +constexpr unsigned int mmDCP4_INPUT_CSC_C31_C32__VI = 0x423A; +constexpr unsigned int mmDCP4_INPUT_CSC_C33_C34__VI = 0x423B; +constexpr unsigned int mmDCP4_INPUT_CSC_CONTROL__VI = 0x4235; +constexpr unsigned int mmDCP4_INPUT_GAMMA_CONTROL__VI = 0x4210; +constexpr unsigned int mmDCP4_KEY_CONTROL__VI = 0x4253; +constexpr unsigned int mmDCP4_KEY_RANGE_ALPHA__VI = 0x4254; +constexpr unsigned int mmDCP4_KEY_RANGE_BLUE__VI = 0x4257; +constexpr unsigned int mmDCP4_KEY_RANGE_GREEN__VI = 0x4256; +constexpr unsigned int mmDCP4_KEY_RANGE_RED__VI = 0x4255; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C11_C12__VI = 0x423D; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C13_C14__VI = 0x423E; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C21_C22__VI = 0x423F; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C23_C24__VI = 0x4240; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C31_C32__VI = 0x4241; +constexpr unsigned int mmDCP4_OUTPUT_CSC_C33_C34__VI = 0x4242; +constexpr unsigned int mmDCP4_OUTPUT_CSC_CONTROL__VI = 0x423C; +constexpr unsigned int mmDCP4_OUT_CLAMP_CONTROL_B_CB__VI = 0x429D; +constexpr unsigned int mmDCP4_OUT_CLAMP_CONTROL_G_Y__VI = 0x429C; +constexpr unsigned int mmDCP4_OUT_CLAMP_CONTROL_R_CR__VI = 0x4252; +constexpr unsigned int mmDCP4_OUT_ROUND_CONTROL__VI = 0x4251; +constexpr unsigned int mmDCP4_OVLSCL_EDGE_PIXEL_CNTL__VI = 0x422C; +constexpr unsigned int mmDCP4_OVL_CONTROL1__VI = 0x421D; +constexpr unsigned int mmDCP4_OVL_CONTROL2__VI = 0x421E; +constexpr unsigned int mmDCP4_OVL_DFQ_CONTROL__VI = 0x4229; +constexpr unsigned int mmDCP4_OVL_DFQ_STATUS__VI = 0x422A; +constexpr unsigned int mmDCP4_OVL_ENABLE__VI = 0x421C; +constexpr unsigned int mmDCP4_OVL_END__VI = 0x4226; +constexpr unsigned int mmDCP4_OVL_PITCH__VI = 0x4221; +constexpr unsigned int mmDCP4_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x4292; +constexpr unsigned int mmDCP4_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4294; +constexpr unsigned int mmDCP4_OVL_START__VI = 0x4225; +constexpr unsigned int mmDCP4_OVL_STEREOSYNC_FLIP__VI = 0x4293; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS__SI__CI = 0x4620; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS__VI = 0x4220; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_HIGH__VI = 0x4222; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x422B; +constexpr unsigned int mmDCP4_OVL_SURFACE_ADDRESS_INUSE__VI = 0x4228; +constexpr unsigned int mmDCP4_OVL_SURFACE_OFFSET_X__VI = 0x4223; +constexpr unsigned int mmDCP4_OVL_SURFACE_OFFSET_Y__VI = 0x4224; +constexpr unsigned int mmDCP4_OVL_SWAP_CNTL__VI = 0x421F; +constexpr unsigned int mmDCP4_OVL_UPDATE__VI = 0x4227; +constexpr unsigned int mmDCP4_PRESCALE_GRPH_CONTROL__VI = 0x422D; +constexpr unsigned int mmDCP4_PRESCALE_OVL_CONTROL__VI = 0x4231; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_GRPH_B__VI = 0x4230; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_GRPH_G__VI = 0x422F; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_GRPH_R__VI = 0x422E; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_OVL_CB__VI = 0x4232; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_OVL_CR__VI = 0x4234; +constexpr unsigned int mmDCP4_PRESCALE_VALUES_OVL_Y__VI = 0x4233; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_END_CNTL1__VI = 0x42A6; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_END_CNTL2__VI = 0x42A7; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_0_1__VI = 0x42A8; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_10_11__VI = 0x42AD; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_12_13__VI = 0x42AE; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_14_15__VI = 0x42AF; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_2_3__VI = 0x42A9; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_4_5__VI = 0x42AA; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_6_7__VI = 0x42AB; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_REGION_8_9__VI = 0x42AC; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x42A5; +constexpr unsigned int mmDCP4_REGAMMA_CNTLA_START_CNTL__VI = 0x42A4; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_END_CNTL1__VI = 0x42B2; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_END_CNTL2__VI = 0x42B3; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_0_1__VI = 0x42B4; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_10_11__VI = 0x42B9; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_12_13__VI = 0x42BA; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_14_15__VI = 0x42BB; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_2_3__VI = 0x42B5; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_4_5__VI = 0x42B6; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_6_7__VI = 0x42B7; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_REGION_8_9__VI = 0x42B8; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x42B1; +constexpr unsigned int mmDCP4_REGAMMA_CNTLB_START_CNTL__VI = 0x42B0; +constexpr unsigned int mmDCP4_REGAMMA_CONTROL__VI = 0x42A0; +constexpr unsigned int mmDCP4_REGAMMA_LUT_DATA__VI = 0x42A2; +constexpr unsigned int mmDCP4_REGAMMA_LUT_INDEX__VI = 0x42A1; +constexpr unsigned int mmDCP4_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x42A3; +constexpr unsigned int mmDCP5_ALPHA_CONTROL__VI = 0x44BC; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C11_C12__VI = 0x4443; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C13_C14__VI = 0x4444; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C21_C22__VI = 0x4445; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C23_C24__VI = 0x4446; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C31_C32__VI = 0x4447; +constexpr unsigned int mmDCP5_COMM_MATRIXA_TRANS_C33_C34__VI = 0x4448; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C11_C12__VI = 0x4449; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C13_C14__VI = 0x444A; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C21_C22__VI = 0x444B; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C23_C24__VI = 0x444C; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C31_C32__VI = 0x444D; +constexpr unsigned int mmDCP5_COMM_MATRIXB_TRANS_C33_C34__VI = 0x444E; +constexpr unsigned int mmDCP5_CUR2_COLOR1__VI = 0x4475; +constexpr unsigned int mmDCP5_CUR2_COLOR2__VI = 0x4476; +constexpr unsigned int mmDCP5_CUR2_CONTROL__VI = 0x446F; +constexpr unsigned int mmDCP5_CUR2_HOT_SPOT__VI = 0x4474; +constexpr unsigned int mmDCP5_CUR2_POSITION__VI = 0x4473; +constexpr unsigned int mmDCP5_CUR2_SIZE__VI = 0x4471; +constexpr unsigned int mmDCP5_CUR2_STEREO_CONTROL__VI = 0x449B; +constexpr unsigned int mmDCP5_CUR2_SURFACE_ADDRESS__VI = 0x4470; +constexpr unsigned int mmDCP5_CUR2_SURFACE_ADDRESS_HIGH__VI = 0x4472; +constexpr unsigned int mmDCP5_CUR2_UPDATE__VI = 0x4477; +constexpr unsigned int mmDCP5_CUR_COLOR1__VI = 0x446C; +constexpr unsigned int mmDCP5_CUR_COLOR2__VI = 0x446D; +constexpr unsigned int mmDCP5_CUR_CONTROL__VI = 0x4466; +constexpr unsigned int mmDCP5_CUR_HOT_SPOT__VI = 0x446B; +constexpr unsigned int mmDCP5_CUR_POSITION__VI = 0x446A; +constexpr unsigned int mmDCP5_CUR_REQUEST_FILTER_CNTL__VI = 0x4499; +constexpr unsigned int mmDCP5_CUR_SIZE__VI = 0x4468; +constexpr unsigned int mmDCP5_CUR_STEREO_CONTROL__VI = 0x449A; +constexpr unsigned int mmDCP5_CUR_SURFACE_ADDRESS__VI = 0x4467; +constexpr unsigned int mmDCP5_CUR_SURFACE_ADDRESS_HIGH__VI = 0x4469; +constexpr unsigned int mmDCP5_CUR_UPDATE__VI = 0x446E; +constexpr unsigned int mmDCP5_DCP_CRC_CONTROL__VI = 0x4487; +constexpr unsigned int mmDCP5_DCP_CRC_CURRENT__VI = 0x4489; +constexpr unsigned int mmDCP5_DCP_CRC_LAST__VI = 0x448B; +constexpr unsigned int mmDCP5_DCP_CRC_MASK__VI = 0x4488; +constexpr unsigned int mmDCP5_DCP_DEBUG__VI = 0x448D; +constexpr unsigned int mmDCP5_DCP_DEBUG2__VI = 0x4498; +constexpr unsigned int mmDCP5_DCP_FP_CONVERTED_FIELD__VI = 0x4465; +constexpr unsigned int mmDCP5_DCP_GSL_CONTROL__VI = 0x4490; +constexpr unsigned int mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x4491; +constexpr unsigned int mmDCP5_DCP_RANDOM_SEEDS__VI = 0x4461; +constexpr unsigned int mmDCP5_DCP_SPATIAL_DITHER_CNTL__VI = 0x4460; +constexpr unsigned int mmDCP5_DCP_TEST_DEBUG_DATA__VI = 0x4496; +constexpr unsigned int mmDCP5_DCP_TEST_DEBUG_INDEX__VI = 0x4495; +constexpr unsigned int mmDCP5_DC_LUT_30_COLOR__VI = 0x447C; +constexpr unsigned int mmDCP5_DC_LUT_AUTOFILL__VI = 0x447F; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_BLUE__VI = 0x4481; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_GREEN__VI = 0x4482; +constexpr unsigned int mmDCP5_DC_LUT_BLACK_OFFSET_RED__VI = 0x4483; +constexpr unsigned int mmDCP5_DC_LUT_CONTROL__VI = 0x4480; +constexpr unsigned int mmDCP5_DC_LUT_PWL_DATA__VI = 0x447B; +constexpr unsigned int mmDCP5_DC_LUT_RW_INDEX__VI = 0x4479; +constexpr unsigned int mmDCP5_DC_LUT_RW_MODE__VI = 0x4478; +constexpr unsigned int mmDCP5_DC_LUT_SEQ_COLOR__VI = 0x447A; +constexpr unsigned int mmDCP5_DC_LUT_VGA_ACCESS_ENABLE__VI = 0x447D; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_BLUE__VI = 0x4484; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_GREEN__VI = 0x4485; +constexpr unsigned int mmDCP5_DC_LUT_WHITE_OFFSET_RED__VI = 0x4486; +constexpr unsigned int mmDCP5_DC_LUT_WRITE_EN_MASK__VI = 0x447E; +constexpr unsigned int mmDCP5_DEGAMMA_CONTROL__VI = 0x4458; +constexpr unsigned int mmDCP5_DENORM_CONTROL__VI = 0x4450; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C11_C12__VI = 0x445A; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C13_C14__VI = 0x445B; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C21_C22__VI = 0x445C; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C23_C24__VI = 0x445D; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C31_C32__VI = 0x445E; +constexpr unsigned int mmDCP5_GAMUT_REMAP_C33_C34__VI = 0x445F; +constexpr unsigned int mmDCP5_GAMUT_REMAP_CONTROL__VI = 0x4459; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_PITCH__VI = 0x441A; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS__VI = 0x4419; +constexpr unsigned int mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH__VI = 0x441B; +constexpr unsigned int mmDCP5_GRPH_CONTROL__SI__CI = 0x4901; +constexpr unsigned int mmDCP5_GRPH_CONTROL__VI = 0x4401; +constexpr unsigned int mmDCP5_GRPH_DFQ_CONTROL__VI = 0x4414; +constexpr unsigned int mmDCP5_GRPH_DFQ_STATUS__VI = 0x4415; +constexpr unsigned int mmDCP5_GRPH_ENABLE__VI = 0x4400; +constexpr unsigned int mmDCP5_GRPH_FLIP_CONTROL__SI__CI = 0x4912; +constexpr unsigned int mmDCP5_GRPH_FLIP_CONTROL__VI = 0x4412; +constexpr unsigned int mmDCP5_GRPH_FLIP_RATE_CNTL__VI = 0x448E; +constexpr unsigned int mmDCP5_GRPH_INTERRUPT_CONTROL__VI = 0x4417; +constexpr unsigned int mmDCP5_GRPH_INTERRUPT_STATUS__VI = 0x4416; +constexpr unsigned int mmDCP5_GRPH_LUT_10BIT_BYPASS__VI = 0x4402; +constexpr unsigned int mmDCP5_GRPH_PITCH__SI__CI = 0x4906; +constexpr unsigned int mmDCP5_GRPH_PITCH__VI = 0x4406; +constexpr unsigned int mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS__SI__CI = 0x4904; +constexpr unsigned int mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS__VI = 0x4404; +constexpr unsigned int mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH__VI = 0x4407; +constexpr unsigned int mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS__VI = 0x4405; +constexpr unsigned int mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4408; +constexpr unsigned int mmDCP5_GRPH_STEREOSYNC_FLIP__VI = 0x4497; +constexpr unsigned int mmDCP5_GRPH_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x4418; +constexpr unsigned int mmDCP5_GRPH_SURFACE_ADDRESS_INUSE__VI = 0x4413; +constexpr unsigned int mmDCP5_GRPH_SURFACE_OFFSET_X__VI = 0x4409; +constexpr unsigned int mmDCP5_GRPH_SURFACE_OFFSET_Y__VI = 0x440A; +constexpr unsigned int mmDCP5_GRPH_SWAP_CNTL__VI = 0x4403; +constexpr unsigned int mmDCP5_GRPH_UPDATE__SI__CI = 0x4911; +constexpr unsigned int mmDCP5_GRPH_UPDATE__VI = 0x4411; +constexpr unsigned int mmDCP5_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x449F; +constexpr unsigned int mmDCP5_GRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x44BF; +constexpr unsigned int mmDCP5_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x44BD; +constexpr unsigned int mmDCP5_GRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x44BE; +constexpr unsigned int mmDCP5_GRPH_X_END__VI = 0x440D; +constexpr unsigned int mmDCP5_GRPH_X_START__VI = 0x440B; +constexpr unsigned int mmDCP5_GRPH_Y_END__VI = 0x440E; +constexpr unsigned int mmDCP5_GRPH_Y_START__VI = 0x440C; +constexpr unsigned int mmDCP5_HW_ROTATION__VI = 0x449E; +constexpr unsigned int mmDCP5_INPUT_CSC_C11_C12__VI = 0x4436; +constexpr unsigned int mmDCP5_INPUT_CSC_C13_C14__VI = 0x4437; +constexpr unsigned int mmDCP5_INPUT_CSC_C21_C22__VI = 0x4438; +constexpr unsigned int mmDCP5_INPUT_CSC_C23_C24__VI = 0x4439; +constexpr unsigned int mmDCP5_INPUT_CSC_C31_C32__VI = 0x443A; +constexpr unsigned int mmDCP5_INPUT_CSC_C33_C34__VI = 0x443B; +constexpr unsigned int mmDCP5_INPUT_CSC_CONTROL__VI = 0x4435; +constexpr unsigned int mmDCP5_INPUT_GAMMA_CONTROL__VI = 0x4410; +constexpr unsigned int mmDCP5_KEY_CONTROL__VI = 0x4453; +constexpr unsigned int mmDCP5_KEY_RANGE_ALPHA__VI = 0x4454; +constexpr unsigned int mmDCP5_KEY_RANGE_BLUE__VI = 0x4457; +constexpr unsigned int mmDCP5_KEY_RANGE_GREEN__VI = 0x4456; +constexpr unsigned int mmDCP5_KEY_RANGE_RED__VI = 0x4455; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C11_C12__VI = 0x443D; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C13_C14__VI = 0x443E; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C21_C22__VI = 0x443F; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C23_C24__VI = 0x4440; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C31_C32__VI = 0x4441; +constexpr unsigned int mmDCP5_OUTPUT_CSC_C33_C34__VI = 0x4442; +constexpr unsigned int mmDCP5_OUTPUT_CSC_CONTROL__VI = 0x443C; +constexpr unsigned int mmDCP5_OUT_CLAMP_CONTROL_B_CB__VI = 0x449D; +constexpr unsigned int mmDCP5_OUT_CLAMP_CONTROL_G_Y__VI = 0x449C; +constexpr unsigned int mmDCP5_OUT_CLAMP_CONTROL_R_CR__VI = 0x4452; +constexpr unsigned int mmDCP5_OUT_ROUND_CONTROL__VI = 0x4451; +constexpr unsigned int mmDCP5_OVLSCL_EDGE_PIXEL_CNTL__VI = 0x442C; +constexpr unsigned int mmDCP5_OVL_CONTROL1__VI = 0x441D; +constexpr unsigned int mmDCP5_OVL_CONTROL2__VI = 0x441E; +constexpr unsigned int mmDCP5_OVL_DFQ_CONTROL__VI = 0x4429; +constexpr unsigned int mmDCP5_OVL_DFQ_STATUS__VI = 0x442A; +constexpr unsigned int mmDCP5_OVL_ENABLE__VI = 0x441C; +constexpr unsigned int mmDCP5_OVL_END__VI = 0x4426; +constexpr unsigned int mmDCP5_OVL_PITCH__VI = 0x4421; +constexpr unsigned int mmDCP5_OVL_SECONDARY_SURFACE_ADDRESS__VI = 0x4492; +constexpr unsigned int mmDCP5_OVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x4494; +constexpr unsigned int mmDCP5_OVL_START__VI = 0x4425; +constexpr unsigned int mmDCP5_OVL_STEREOSYNC_FLIP__VI = 0x4493; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS__SI__CI = 0x4920; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS__VI = 0x4420; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_HIGH__VI = 0x4422; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_HIGH_INUSE__VI = 0x442B; +constexpr unsigned int mmDCP5_OVL_SURFACE_ADDRESS_INUSE__VI = 0x4428; +constexpr unsigned int mmDCP5_OVL_SURFACE_OFFSET_X__VI = 0x4423; +constexpr unsigned int mmDCP5_OVL_SURFACE_OFFSET_Y__VI = 0x4424; +constexpr unsigned int mmDCP5_OVL_SWAP_CNTL__VI = 0x441F; +constexpr unsigned int mmDCP5_OVL_UPDATE__VI = 0x4427; +constexpr unsigned int mmDCP5_PRESCALE_GRPH_CONTROL__VI = 0x442D; +constexpr unsigned int mmDCP5_PRESCALE_OVL_CONTROL__VI = 0x4431; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_GRPH_B__VI = 0x4430; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_GRPH_G__VI = 0x442F; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_GRPH_R__VI = 0x442E; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_OVL_CB__VI = 0x4432; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_OVL_CR__VI = 0x4434; +constexpr unsigned int mmDCP5_PRESCALE_VALUES_OVL_Y__VI = 0x4433; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_END_CNTL1__VI = 0x44A6; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_END_CNTL2__VI = 0x44A7; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_0_1__VI = 0x44A8; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_10_11__VI = 0x44AD; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_12_13__VI = 0x44AE; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_14_15__VI = 0x44AF; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_2_3__VI = 0x44A9; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_4_5__VI = 0x44AA; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_6_7__VI = 0x44AB; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_REGION_8_9__VI = 0x44AC; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_SLOPE_CNTL__VI = 0x44A5; +constexpr unsigned int mmDCP5_REGAMMA_CNTLA_START_CNTL__VI = 0x44A4; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_END_CNTL1__VI = 0x44B2; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_END_CNTL2__VI = 0x44B3; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_0_1__VI = 0x44B4; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_10_11__VI = 0x44B9; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_12_13__VI = 0x44BA; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_14_15__VI = 0x44BB; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_2_3__VI = 0x44B5; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_4_5__VI = 0x44B6; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_6_7__VI = 0x44B7; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_REGION_8_9__VI = 0x44B8; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_SLOPE_CNTL__VI = 0x44B1; +constexpr unsigned int mmDCP5_REGAMMA_CNTLB_START_CNTL__VI = 0x44B0; +constexpr unsigned int mmDCP5_REGAMMA_CONTROL__VI = 0x44A0; +constexpr unsigned int mmDCP5_REGAMMA_LUT_DATA__VI = 0x44A2; +constexpr unsigned int mmDCP5_REGAMMA_LUT_INDEX__VI = 0x44A1; +constexpr unsigned int mmDCP5_REGAMMA_LUT_WRITE_EN_MASK__VI = 0x44A3; +constexpr unsigned int mmDCPG_TEST_DEBUG_DATA__VI = 0x02D7; +constexpr unsigned int mmDCPG_TEST_DEBUG_INDEX__VI = 0x02D6; +constexpr unsigned int mmDCP_DEBUG2__VI = 0x1A98; +constexpr unsigned int mmDCP_FP_CONVERTED_FIELD__VI = 0x1A65; +constexpr unsigned int mmDCP_GSL_CONTROL__VI = 0x1A90; +constexpr unsigned int mmDCP_RANDOM_SEEDS__VI = 0x1A61; +constexpr unsigned int mmDCP_SPATIAL_DITHER_CNTL__VI = 0x1A60; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED0__VI = 0x5A84; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED1__VI = 0x5A85; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED10__VI = 0x5A8E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED100__VI = 0x5AE8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED101__VI = 0x5AE9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED102__VI = 0x5AEA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED103__VI = 0x5AEB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED104__VI = 0x5AEC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED105__VI = 0x5AED; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED106__VI = 0x5AEE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED107__VI = 0x5AEF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED108__VI = 0x5AF0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED109__VI = 0x5AF1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED11__VI = 0x5A8F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED110__VI = 0x5AF2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED111__VI = 0x5AF3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED112__VI = 0x5AF4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED113__VI = 0x5AF5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED114__VI = 0x5AF6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED115__VI = 0x5AF7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED116__VI = 0x5AF8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED117__VI = 0x5AF9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED118__VI = 0x5AFA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED119__VI = 0x5AFB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED12__VI = 0x5A90; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED120__VI = 0x5AFC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED121__VI = 0x5AFD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED122__VI = 0x5AFE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED123__VI = 0x5AFF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED124__VI = 0x5B00; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED125__VI = 0x5B01; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED126__VI = 0x5B02; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED127__VI = 0x5B03; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED128__VI = 0x5B04; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED129__VI = 0x5B05; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED13__VI = 0x5A91; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED130__VI = 0x5B06; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED131__VI = 0x5B07; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED132__VI = 0x5B08; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED133__VI = 0x5B09; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED134__VI = 0x5B0A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED135__VI = 0x5B0B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED136__VI = 0x5B0C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED137__VI = 0x5B0D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED138__VI = 0x5B0E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED139__VI = 0x5B0F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED14__VI = 0x5A92; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED140__VI = 0x5B10; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED141__VI = 0x5B11; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED142__VI = 0x5B12; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED143__VI = 0x5B13; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED144__VI = 0x5B14; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED145__VI = 0x5B15; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED146__VI = 0x5B16; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED147__VI = 0x5B17; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED148__VI = 0x5B18; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED149__VI = 0x5B19; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED15__VI = 0x5A93; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED150__VI = 0x5B1A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED151__VI = 0x5B1B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED152__VI = 0x5B1C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED153__VI = 0x5B1D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED154__VI = 0x5B1E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED155__VI = 0x5B1F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED156__VI = 0x5B20; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED157__VI = 0x5B21; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED158__VI = 0x5B22; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED159__VI = 0x5B23; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED16__VI = 0x5A94; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED160__VI = 0x5B24; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED161__VI = 0x5B25; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED162__VI = 0x5B26; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED163__VI = 0x5B27; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED164__VI = 0x5B28; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED165__VI = 0x5B29; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED166__VI = 0x5B2A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED167__VI = 0x5B2B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED168__VI = 0x5B2C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED169__VI = 0x5B2D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED17__VI = 0x5A95; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED170__VI = 0x5B2E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED171__VI = 0x5B2F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED172__VI = 0x5B30; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED173__VI = 0x5B31; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED174__VI = 0x5B32; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED175__VI = 0x5B33; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED176__VI = 0x5B34; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED177__VI = 0x5B35; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED178__VI = 0x5B36; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED179__VI = 0x5B37; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED18__VI = 0x5A96; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED180__VI = 0x5B38; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED181__VI = 0x5B39; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED182__VI = 0x5B3A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED183__VI = 0x5B3B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED184__VI = 0x5B3C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED185__VI = 0x5B3D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED186__VI = 0x5B3E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED187__VI = 0x5B3F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED188__VI = 0x5B40; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED189__VI = 0x5B41; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED19__VI = 0x5A97; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED190__VI = 0x5B42; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED191__VI = 0x5B43; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED192__VI = 0x5B44; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED193__VI = 0x5B45; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED194__VI = 0x5B46; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED195__VI = 0x5B47; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED196__VI = 0x5B48; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED197__VI = 0x5B49; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED198__VI = 0x5B4A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED199__VI = 0x5B4B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED2__VI = 0x5A86; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED20__VI = 0x5A98; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED200__VI = 0x5B4C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED201__VI = 0x5B4D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED202__VI = 0x5B4E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED203__VI = 0x5B4F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED204__VI = 0x5B50; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED205__VI = 0x5B51; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED206__VI = 0x5B52; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED207__VI = 0x5B53; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED208__VI = 0x5B54; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED209__VI = 0x5B55; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED21__VI = 0x5A99; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED210__VI = 0x5B56; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED211__VI = 0x5B57; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED212__VI = 0x5B58; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED213__VI = 0x5B59; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED214__VI = 0x5B5A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED215__VI = 0x5B5B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED216__VI = 0x5B5C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED217__VI = 0x5B5D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED218__VI = 0x5B5E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED219__VI = 0x5B5F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED22__VI = 0x5A9A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED220__VI = 0x5B60; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED221__VI = 0x5B61; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED222__VI = 0x5B62; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED223__VI = 0x5B63; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED224__VI = 0x5B64; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED225__VI = 0x5B65; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED226__VI = 0x5B66; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED227__VI = 0x5B67; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED228__VI = 0x5B68; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED229__VI = 0x5B69; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED23__VI = 0x5A9B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED230__VI = 0x5B6A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED231__VI = 0x5B6B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED232__VI = 0x5B6C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED233__VI = 0x5B6D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED234__VI = 0x5B6E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED235__VI = 0x5B6F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED236__VI = 0x5B70; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED237__VI = 0x5B71; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED238__VI = 0x5B72; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED239__VI = 0x5B73; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED24__VI = 0x5A9C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED240__VI = 0x5B74; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED241__VI = 0x5B75; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED242__VI = 0x5B76; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED243__VI = 0x5B77; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED244__VI = 0x5B78; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED245__VI = 0x5B79; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED246__VI = 0x5B7A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED247__VI = 0x5B7B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED248__VI = 0x5B7C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED249__VI = 0x5B7D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED25__VI = 0x5A9D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED250__VI = 0x5B7E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED251__VI = 0x5B7F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED252__VI = 0x5B80; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED253__VI = 0x5B81; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED254__VI = 0x5B82; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED255__VI = 0x5B83; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED256__VI = 0x5B84; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED257__VI = 0x5B85; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED258__VI = 0x5B86; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED259__VI = 0x5B87; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED26__VI = 0x5A9E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED260__VI = 0x5B88; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED261__VI = 0x5B89; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED262__VI = 0x5B8A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED263__VI = 0x5B8B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED264__VI = 0x5B8C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED265__VI = 0x5B8D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED266__VI = 0x5B8E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED267__VI = 0x5B8F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED268__VI = 0x5B90; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED269__VI = 0x5B91; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED27__VI = 0x5A9F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED270__VI = 0x5B92; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED271__VI = 0x5B93; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED272__VI = 0x5B94; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED273__VI = 0x5B95; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED274__VI = 0x5B96; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED275__VI = 0x5B97; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED276__VI = 0x5B98; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED277__VI = 0x5B99; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED278__VI = 0x5B9A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED279__VI = 0x5B9B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED28__VI = 0x5AA0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED280__VI = 0x5B9C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED281__VI = 0x5B9D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED282__VI = 0x5B9E; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED283__VI = 0x5B9F; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED284__VI = 0x5BA0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED285__VI = 0x5BA1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED286__VI = 0x5BA2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED287__VI = 0x5BA3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED288__VI = 0x5BA4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED289__VI = 0x5BA5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED29__VI = 0x5AA1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED290__VI = 0x5BA6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED291__VI = 0x5BA7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED292__VI = 0x5BA8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED293__VI = 0x5BA9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED294__VI = 0x5BAA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED295__VI = 0x5BAB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED296__VI = 0x5BAC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED297__VI = 0x5BAD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED298__VI = 0x5BAE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED299__VI = 0x5BAF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED3__VI = 0x5A87; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED30__VI = 0x5AA2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED300__VI = 0x5BB0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED301__VI = 0x5BB1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED302__VI = 0x5BB2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED303__VI = 0x5BB3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED304__VI = 0x5BB4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED305__VI = 0x5BB5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED306__VI = 0x5BB6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED307__VI = 0x5BB7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED308__VI = 0x5BB8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED309__VI = 0x5BB9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED31__VI = 0x5AA3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED310__VI = 0x5BBA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED311__VI = 0x5BBB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED312__VI = 0x5BBC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED313__VI = 0x5BBD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED314__VI = 0x5BBE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED315__VI = 0x5BBF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED316__VI = 0x5BC0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED317__VI = 0x5BC1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED318__VI = 0x5BC2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED319__VI = 0x5BC3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED32__VI = 0x5AA4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED320__VI = 0x5BC4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED321__VI = 0x5BC5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED322__VI = 0x5BC6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED323__VI = 0x5BC7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED324__VI = 0x5BC8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED325__VI = 0x5BC9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED326__VI = 0x5BCA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED327__VI = 0x5BCB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED328__VI = 0x5BCC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED329__VI = 0x5BCD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED33__VI = 0x5AA5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED330__VI = 0x5BCE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED331__VI = 0x5BCF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED332__VI = 0x5BD0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED333__VI = 0x5BD1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED334__VI = 0x5BD2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED335__VI = 0x5BD3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED336__VI = 0x5BD4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED337__VI = 0x5BD5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED338__VI = 0x5BD6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED339__VI = 0x5BD7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED34__VI = 0x5AA6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED340__VI = 0x5BD8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED341__VI = 0x5BD9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED342__VI = 0x5BDA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED343__VI = 0x5BDB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED344__VI = 0x5BDC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED345__VI = 0x5BDD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED346__VI = 0x5BDE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED347__VI = 0x5BDF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED348__VI = 0x5BE0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED349__VI = 0x5BE1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED35__VI = 0x5AA7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED350__VI = 0x5BE2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED351__VI = 0x5BE3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED352__VI = 0x5BE4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED353__VI = 0x5BE5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED354__VI = 0x5BE6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED355__VI = 0x5BE7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED356__VI = 0x5BE8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED357__VI = 0x5BE9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED358__VI = 0x5BEA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED359__VI = 0x5BEB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED36__VI = 0x5AA8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED360__VI = 0x5BEC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED361__VI = 0x5BED; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED362__VI = 0x5BEE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED363__VI = 0x5BEF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED364__VI = 0x5BF0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED365__VI = 0x5BF1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED366__VI = 0x5BF2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED367__VI = 0x5BF3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED368__VI = 0x5BF4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED369__VI = 0x5BF5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED37__VI = 0x5AA9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED370__VI = 0x5BF6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED371__VI = 0x5BF7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED372__VI = 0x5BF8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED373__VI = 0x5BF9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED374__VI = 0x5BFA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED375__VI = 0x5BFB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED376__VI = 0x5BFC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED377__VI = 0x5BFD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED378__VI = 0x5BFE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED379__VI = 0x5BFF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED38__VI = 0x5AAA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED39__VI = 0x5AAB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED4__VI = 0x5A88; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED40__VI = 0x5AAC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED41__VI = 0x5AAD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED42__VI = 0x5AAE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED43__VI = 0x5AAF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED44__VI = 0x5AB0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED45__VI = 0x5AB1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED46__VI = 0x5AB2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED47__VI = 0x5AB3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED48__VI = 0x5AB4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED49__VI = 0x5AB5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED5__VI = 0x5A89; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED50__VI = 0x5AB6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED51__VI = 0x5AB7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED52__VI = 0x5AB8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED53__VI = 0x5AB9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED54__VI = 0x5ABA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED55__VI = 0x5ABB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED56__VI = 0x5ABC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED57__VI = 0x5ABD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED58__VI = 0x5ABE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED59__VI = 0x5ABF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED6__VI = 0x5A8A; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED60__VI = 0x5AC0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED61__VI = 0x5AC1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED62__VI = 0x5AC2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED63__VI = 0x5AC3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED64__VI = 0x5AC4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED65__VI = 0x5AC5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED66__VI = 0x5AC6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED67__VI = 0x5AC7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED68__VI = 0x5AC8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED69__VI = 0x5AC9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED7__VI = 0x5A8B; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED70__VI = 0x5ACA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED71__VI = 0x5ACB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED72__VI = 0x5ACC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED73__VI = 0x5ACD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED74__VI = 0x5ACE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED75__VI = 0x5ACF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED76__VI = 0x5AD0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED77__VI = 0x5AD1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED78__VI = 0x5AD2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED79__VI = 0x5AD3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED8__VI = 0x5A8C; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED80__VI = 0x5AD4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED81__VI = 0x5AD5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED82__VI = 0x5AD6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED83__VI = 0x5AD7; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED84__VI = 0x5AD8; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED85__VI = 0x5AD9; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED86__VI = 0x5ADA; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED87__VI = 0x5ADB; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED88__VI = 0x5ADC; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED89__VI = 0x5ADD; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED9__VI = 0x5A8D; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED90__VI = 0x5ADE; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED91__VI = 0x5ADF; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED92__VI = 0x5AE0; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED93__VI = 0x5AE1; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED94__VI = 0x5AE2; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED95__VI = 0x5AE3; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED96__VI = 0x5AE4; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED97__VI = 0x5AE5; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED98__VI = 0x5AE6; +constexpr unsigned int mmDCRX_PHY_MACRO_CNTL_RESERVED99__VI = 0x5AE7; +constexpr unsigned int mmDC_ABM1_OVERSCAN_PIXEL_VALUE__VI = 0x169B; +constexpr unsigned int mmDC_DVODATA_CONFIG__VI = 0x481A; +constexpr unsigned int mmDC_GENERICA__VI = 0x4800; +constexpr unsigned int mmDC_GENERICB__VI = 0x4801; +constexpr unsigned int mmDC_GPIO_DDC1_A__VI = 0x4869; +constexpr unsigned int mmDC_GPIO_DDC1_EN__VI = 0x486A; +constexpr unsigned int mmDC_GPIO_DDC1_MASK__VI = 0x4868; +constexpr unsigned int mmDC_GPIO_DDC1_Y__VI = 0x486B; +constexpr unsigned int mmDC_GPIO_DDC2_A__VI = 0x486D; +constexpr unsigned int mmDC_GPIO_DDC2_EN__VI = 0x486E; +constexpr unsigned int mmDC_GPIO_DDC2_MASK__VI = 0x486C; +constexpr unsigned int mmDC_GPIO_DDC2_Y__VI = 0x486F; +constexpr unsigned int mmDC_GPIO_DDC3_A__VI = 0x4871; +constexpr unsigned int mmDC_GPIO_DDC3_EN__VI = 0x4872; +constexpr unsigned int mmDC_GPIO_DDC3_MASK__VI = 0x4870; +constexpr unsigned int mmDC_GPIO_DDC3_Y__VI = 0x4873; +constexpr unsigned int mmDC_GPIO_DDC4_A__VI = 0x4875; +constexpr unsigned int mmDC_GPIO_DDC4_EN__VI = 0x4876; +constexpr unsigned int mmDC_GPIO_DDC4_MASK__VI = 0x4874; +constexpr unsigned int mmDC_GPIO_DDC4_Y__VI = 0x4877; +constexpr unsigned int mmDC_GPIO_DDC5_A__VI = 0x4879; +constexpr unsigned int mmDC_GPIO_DDC5_EN__VI = 0x487A; +constexpr unsigned int mmDC_GPIO_DDC5_MASK__VI = 0x4878; +constexpr unsigned int mmDC_GPIO_DDC5_Y__VI = 0x487B; +constexpr unsigned int mmDC_GPIO_DDC6_A__VI = 0x487D; +constexpr unsigned int mmDC_GPIO_DDC6_EN__VI = 0x487E; +constexpr unsigned int mmDC_GPIO_DDC6_MASK__VI = 0x487C; +constexpr unsigned int mmDC_GPIO_DDC6_Y__VI = 0x487F; +constexpr unsigned int mmDC_GPIO_DDCVGA_A__VI = 0x4881; +constexpr unsigned int mmDC_GPIO_DDCVGA_EN__VI = 0x4882; +constexpr unsigned int mmDC_GPIO_DDCVGA_MASK__VI = 0x4880; +constexpr unsigned int mmDC_GPIO_DDCVGA_Y__VI = 0x4883; +constexpr unsigned int mmDC_GPIO_DEBUG__VI = 0x4804; +constexpr unsigned int mmDC_GPIO_DVODATA_A__VI = 0x4865; +constexpr unsigned int mmDC_GPIO_DVODATA_EN__VI = 0x4866; +constexpr unsigned int mmDC_GPIO_DVODATA_MASK__VI = 0x4864; +constexpr unsigned int mmDC_GPIO_DVODATA_Y__VI = 0x4867; +constexpr unsigned int mmDC_GPIO_GENERIC_A__VI = 0x4861; +constexpr unsigned int mmDC_GPIO_GENERIC_EN__VI = 0x4862; +constexpr unsigned int mmDC_GPIO_GENERIC_MASK__VI = 0x4860; +constexpr unsigned int mmDC_GPIO_GENERIC_Y__VI = 0x4863; +constexpr unsigned int mmDC_GPIO_GENLK_A__VI = 0x4889; +constexpr unsigned int mmDC_GPIO_GENLK_EN__VI = 0x488A; +constexpr unsigned int mmDC_GPIO_GENLK_MASK__VI = 0x4888; +constexpr unsigned int mmDC_GPIO_GENLK_Y__VI = 0x488B; +constexpr unsigned int mmDC_GPIO_HPD_A__VI = 0x488D; +constexpr unsigned int mmDC_GPIO_HPD_EN__VI = 0x488E; +constexpr unsigned int mmDC_GPIO_HPD_MASK__VI = 0x488C; +constexpr unsigned int mmDC_GPIO_HPD_Y__VI = 0x488F; +constexpr unsigned int mmDC_GPIO_I2CPAD_A__VI = 0x4899; +constexpr unsigned int mmDC_GPIO_I2CPAD_EN__VI = 0x489A; +constexpr unsigned int mmDC_GPIO_I2CPAD_MASK__VI = 0x4898; +constexpr unsigned int mmDC_GPIO_I2CPAD_STRENGTH__VI = 0x489C; +constexpr unsigned int mmDC_GPIO_I2CPAD_Y__VI = 0x489B; +constexpr unsigned int mmDC_GPIO_PAD_STRENGTH_1__VI = 0x4894; +constexpr unsigned int mmDC_GPIO_PAD_STRENGTH_2__VI = 0x4895; +constexpr unsigned int mmDC_GPIO_PWRSEQ_A__VI = 0x4891; +constexpr unsigned int mmDC_GPIO_PWRSEQ_EN__VI = 0x4892; +constexpr unsigned int mmDC_GPIO_PWRSEQ_MASK__VI = 0x4890; +constexpr unsigned int mmDC_GPIO_PWRSEQ_Y__VI = 0x4893; +constexpr unsigned int mmDC_GPIO_SYNCA_A__VI = 0x4885; +constexpr unsigned int mmDC_GPIO_SYNCA_EN__VI = 0x4886; +constexpr unsigned int mmDC_GPIO_SYNCA_MASK__VI = 0x4884; +constexpr unsigned int mmDC_GPIO_SYNCA_Y__VI = 0x4887; +constexpr unsigned int mmDC_GPU_TIMER_READ__VI = 0x482B; +constexpr unsigned int mmDC_GPU_TIMER_READ_CNTL__VI = 0x482C; +constexpr unsigned int mmDC_GPU_TIMER_START_POSITION_P_FLIP__VI = 0x482A; +constexpr unsigned int mmDC_GPU_TIMER_START_POSITION_V_UPDATE__VI = 0x4829; +constexpr unsigned int mmDC_HPD_CONTROL__VI = 0x189A; +constexpr unsigned int mmDC_HPD_FAST_TRAIN_CNTL__VI = 0x189B; +constexpr unsigned int mmDC_HPD_INT_CONTROL__VI = 0x1899; +constexpr unsigned int mmDC_HPD_INT_STATUS__VI = 0x1898; +constexpr unsigned int mmDC_HPD_TOGGLE_FILT_CNTL__VI = 0x189C; +constexpr unsigned int mmDC_I2C_ARBITRATION__VI = 0x16D5; +constexpr unsigned int mmDC_I2C_CONTROL__VI = 0x16D4; +constexpr unsigned int mmDC_I2C_DATA__VI = 0x16EE; +constexpr unsigned int mmDC_I2C_DDC1_HW_STATUS__VI = 0x16D8; +constexpr unsigned int mmDC_I2C_DDC1_SETUP__VI = 0x16DF; +constexpr unsigned int mmDC_I2C_DDC1_SPEED__VI = 0x16DE; +constexpr unsigned int mmDC_I2C_DDC2_HW_STATUS__VI = 0x16D9; +constexpr unsigned int mmDC_I2C_DDC2_SETUP__VI = 0x16E1; +constexpr unsigned int mmDC_I2C_DDC2_SPEED__VI = 0x16E0; +constexpr unsigned int mmDC_I2C_DDC3_HW_STATUS__VI = 0x16DA; +constexpr unsigned int mmDC_I2C_DDC3_SETUP__VI = 0x16E3; +constexpr unsigned int mmDC_I2C_DDC3_SPEED__VI = 0x16E2; +constexpr unsigned int mmDC_I2C_DDC4_HW_STATUS__VI = 0x16DB; +constexpr unsigned int mmDC_I2C_DDC4_SETUP__VI = 0x16E5; +constexpr unsigned int mmDC_I2C_DDC4_SPEED__VI = 0x16E4; +constexpr unsigned int mmDC_I2C_DDC5_HW_STATUS__VI = 0x16DC; +constexpr unsigned int mmDC_I2C_DDC5_SETUP__VI = 0x16E7; +constexpr unsigned int mmDC_I2C_DDC5_SPEED__VI = 0x16E6; +constexpr unsigned int mmDC_I2C_DDC6_HW_STATUS__VI = 0x16DD; +constexpr unsigned int mmDC_I2C_DDC6_SETUP__VI = 0x16E9; +constexpr unsigned int mmDC_I2C_DDC6_SPEED__VI = 0x16E8; +constexpr unsigned int mmDC_I2C_DDCVGA_HW_STATUS__VI = 0x16EF; +constexpr unsigned int mmDC_I2C_DDCVGA_SETUP__VI = 0x16F1; +constexpr unsigned int mmDC_I2C_DDCVGA_SPEED__VI = 0x16F0; +constexpr unsigned int mmDC_I2C_EDID_DETECT_CTRL__VI = 0x16F2; +constexpr unsigned int mmDC_I2C_INTERRUPT_CONTROL__VI = 0x16D6; +constexpr unsigned int mmDC_I2C_SW_STATUS__VI = 0x16D7; +constexpr unsigned int mmDC_I2C_TRANSACTION0__VI = 0x16EA; +constexpr unsigned int mmDC_I2C_TRANSACTION1__VI = 0x16EB; +constexpr unsigned int mmDC_I2C_TRANSACTION2__VI = 0x16EC; +constexpr unsigned int mmDC_I2C_TRANSACTION3__VI = 0x16ED; +constexpr unsigned int mmDC_IP_REQUEST_CNTL__VI = 0x02D2; +constexpr unsigned int mmDC_LUT_VGA_ACCESS_ENABLE__VI = 0x1A7D; +constexpr unsigned int mmDC_MEM_GLOBAL_PWR_REQ_CNTL__VI = 0x0132; +constexpr unsigned int mmDC_MVP_LB_CONTROL__VI = 0x1AE3; +constexpr unsigned int mmDC_PAD_EXTERN_SIG__VI = 0x4802; +constexpr unsigned int mmDC_PERFMON0_PERFCOUNTER_CNTL__VI = 0x0170; +constexpr unsigned int mmDC_PERFMON0_PERFCOUNTER_STATE__VI = 0x0171; +constexpr unsigned int mmDC_PERFMON0_PERFMON_CNTL__VI = 0x0173; +constexpr unsigned int mmDC_PERFMON0_PERFMON_CNTL2__VI = 0x017A; +constexpr unsigned int mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC__VI = 0x0172; +constexpr unsigned int mmDC_PERFMON0_PERFMON_CVALUE_LOW__VI = 0x0174; +constexpr unsigned int mmDC_PERFMON0_PERFMON_HI__VI = 0x0175; +constexpr unsigned int mmDC_PERFMON0_PERFMON_LOW__VI = 0x0176; +constexpr unsigned int mmDC_PERFMON0_PERFMON_TEST_DEBUG_DATA__VI = 0x0178; +constexpr unsigned int mmDC_PERFMON0_PERFMON_TEST_DEBUG_INDEX__VI = 0x0177; +constexpr unsigned int mmDC_PERFMON10_PERFCOUNTER_CNTL__VI = 0x59A0; +constexpr unsigned int mmDC_PERFMON10_PERFCOUNTER_STATE__VI = 0x59A1; +constexpr unsigned int mmDC_PERFMON10_PERFMON_CNTL__VI = 0x59A3; +constexpr unsigned int mmDC_PERFMON10_PERFMON_CNTL2__VI = 0x59AA; +constexpr unsigned int mmDC_PERFMON10_PERFMON_CVALUE_INT_MISC__VI = 0x59A2; +constexpr unsigned int mmDC_PERFMON10_PERFMON_CVALUE_LOW__VI = 0x59A4; +constexpr unsigned int mmDC_PERFMON10_PERFMON_HI__VI = 0x59A5; +constexpr unsigned int mmDC_PERFMON10_PERFMON_LOW__VI = 0x59A6; +constexpr unsigned int mmDC_PERFMON10_PERFMON_TEST_DEBUG_DATA__VI = 0x59A8; +constexpr unsigned int mmDC_PERFMON10_PERFMON_TEST_DEBUG_INDEX__VI = 0x59A7; +constexpr unsigned int mmDC_PERFMON11_PERFCOUNTER_CNTL__VI = 0x4724; +constexpr unsigned int mmDC_PERFMON11_PERFCOUNTER_STATE__VI = 0x4725; +constexpr unsigned int mmDC_PERFMON11_PERFMON_CNTL__VI = 0x4727; +constexpr unsigned int mmDC_PERFMON11_PERFMON_CNTL2__VI = 0x472E; +constexpr unsigned int mmDC_PERFMON11_PERFMON_CVALUE_INT_MISC__VI = 0x4726; +constexpr unsigned int mmDC_PERFMON11_PERFMON_CVALUE_LOW__VI = 0x4728; +constexpr unsigned int mmDC_PERFMON11_PERFMON_HI__VI = 0x4729; +constexpr unsigned int mmDC_PERFMON11_PERFMON_LOW__VI = 0x472A; +constexpr unsigned int mmDC_PERFMON11_PERFMON_TEST_DEBUG_DATA__VI = 0x472C; +constexpr unsigned int mmDC_PERFMON11_PERFMON_TEST_DEBUG_INDEX__VI = 0x472B; +constexpr unsigned int mmDC_PERFMON1_PERFCOUNTER_CNTL__VI = 0x0364; +constexpr unsigned int mmDC_PERFMON1_PERFCOUNTER_STATE__VI = 0x0365; +constexpr unsigned int mmDC_PERFMON1_PERFMON_CNTL__VI = 0x0367; +constexpr unsigned int mmDC_PERFMON1_PERFMON_CNTL2__VI = 0x036E; +constexpr unsigned int mmDC_PERFMON1_PERFMON_CVALUE_INT_MISC__VI = 0x0366; +constexpr unsigned int mmDC_PERFMON1_PERFMON_CVALUE_LOW__VI = 0x0368; +constexpr unsigned int mmDC_PERFMON1_PERFMON_HI__VI = 0x0369; +constexpr unsigned int mmDC_PERFMON1_PERFMON_LOW__VI = 0x036A; +constexpr unsigned int mmDC_PERFMON1_PERFMON_TEST_DEBUG_DATA__VI = 0x036C; +constexpr unsigned int mmDC_PERFMON1_PERFMON_TEST_DEBUG_INDEX__VI = 0x036B; +constexpr unsigned int mmDC_PERFMON2_PERFCOUNTER_CNTL__VI = 0x18C8; +constexpr unsigned int mmDC_PERFMON2_PERFCOUNTER_STATE__VI = 0x18C9; +constexpr unsigned int mmDC_PERFMON2_PERFMON_CNTL__VI = 0x18CB; +constexpr unsigned int mmDC_PERFMON2_PERFMON_CNTL2__VI = 0x18D2; +constexpr unsigned int mmDC_PERFMON2_PERFMON_CVALUE_INT_MISC__VI = 0x18CA; +constexpr unsigned int mmDC_PERFMON2_PERFMON_CVALUE_LOW__VI = 0x18CC; +constexpr unsigned int mmDC_PERFMON2_PERFMON_HI__VI = 0x18CD; +constexpr unsigned int mmDC_PERFMON2_PERFMON_LOW__VI = 0x18CE; +constexpr unsigned int mmDC_PERFMON2_PERFMON_TEST_DEBUG_DATA__VI = 0x18D0; +constexpr unsigned int mmDC_PERFMON2_PERFMON_TEST_DEBUG_INDEX__VI = 0x18CF; +constexpr unsigned int mmDC_PERFMON3_PERFCOUNTER_CNTL__VI = 0x1B24; +constexpr unsigned int mmDC_PERFMON3_PERFCOUNTER_STATE__VI = 0x1B25; +constexpr unsigned int mmDC_PERFMON3_PERFMON_CNTL__VI = 0x1B27; +constexpr unsigned int mmDC_PERFMON3_PERFMON_CNTL2__VI = 0x1B2E; +constexpr unsigned int mmDC_PERFMON3_PERFMON_CVALUE_INT_MISC__VI = 0x1B26; +constexpr unsigned int mmDC_PERFMON3_PERFMON_CVALUE_LOW__VI = 0x1B28; +constexpr unsigned int mmDC_PERFMON3_PERFMON_HI__VI = 0x1B29; +constexpr unsigned int mmDC_PERFMON3_PERFMON_LOW__VI = 0x1B2A; +constexpr unsigned int mmDC_PERFMON3_PERFMON_TEST_DEBUG_DATA__VI = 0x1B2C; +constexpr unsigned int mmDC_PERFMON3_PERFMON_TEST_DEBUG_INDEX__VI = 0x1B2B; +constexpr unsigned int mmDC_PERFMON4_PERFCOUNTER_CNTL__VI = 0x1D24; +constexpr unsigned int mmDC_PERFMON4_PERFCOUNTER_STATE__VI = 0x1D25; +constexpr unsigned int mmDC_PERFMON4_PERFMON_CNTL__VI = 0x1D27; +constexpr unsigned int mmDC_PERFMON4_PERFMON_CNTL2__VI = 0x1D2E; +constexpr unsigned int mmDC_PERFMON4_PERFMON_CVALUE_INT_MISC__VI = 0x1D26; +constexpr unsigned int mmDC_PERFMON4_PERFMON_CVALUE_LOW__VI = 0x1D28; +constexpr unsigned int mmDC_PERFMON4_PERFMON_HI__VI = 0x1D29; +constexpr unsigned int mmDC_PERFMON4_PERFMON_LOW__VI = 0x1D2A; +constexpr unsigned int mmDC_PERFMON4_PERFMON_TEST_DEBUG_DATA__VI = 0x1D2C; +constexpr unsigned int mmDC_PERFMON4_PERFMON_TEST_DEBUG_INDEX__VI = 0x1D2B; +constexpr unsigned int mmDC_PERFMON5_PERFCOUNTER_CNTL__VI = 0x1F24; +constexpr unsigned int mmDC_PERFMON5_PERFCOUNTER_STATE__VI = 0x1F25; +constexpr unsigned int mmDC_PERFMON5_PERFMON_CNTL__VI = 0x1F27; +constexpr unsigned int mmDC_PERFMON5_PERFMON_CNTL2__VI = 0x1F2E; +constexpr unsigned int mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC__VI = 0x1F26; +constexpr unsigned int mmDC_PERFMON5_PERFMON_CVALUE_LOW__VI = 0x1F28; +constexpr unsigned int mmDC_PERFMON5_PERFMON_HI__VI = 0x1F29; +constexpr unsigned int mmDC_PERFMON5_PERFMON_LOW__VI = 0x1F2A; +constexpr unsigned int mmDC_PERFMON5_PERFMON_TEST_DEBUG_DATA__VI = 0x1F2C; +constexpr unsigned int mmDC_PERFMON5_PERFMON_TEST_DEBUG_INDEX__VI = 0x1F2B; +constexpr unsigned int mmDC_PERFMON6_PERFCOUNTER_CNTL__VI = 0x4124; +constexpr unsigned int mmDC_PERFMON6_PERFCOUNTER_STATE__VI = 0x4125; +constexpr unsigned int mmDC_PERFMON6_PERFMON_CNTL__VI = 0x4127; +constexpr unsigned int mmDC_PERFMON6_PERFMON_CNTL2__VI = 0x412E; +constexpr unsigned int mmDC_PERFMON6_PERFMON_CVALUE_INT_MISC__VI = 0x4126; +constexpr unsigned int mmDC_PERFMON6_PERFMON_CVALUE_LOW__VI = 0x4128; +constexpr unsigned int mmDC_PERFMON6_PERFMON_HI__VI = 0x4129; +constexpr unsigned int mmDC_PERFMON6_PERFMON_LOW__VI = 0x412A; +constexpr unsigned int mmDC_PERFMON6_PERFMON_TEST_DEBUG_DATA__VI = 0x412C; +constexpr unsigned int mmDC_PERFMON6_PERFMON_TEST_DEBUG_INDEX__VI = 0x412B; +constexpr unsigned int mmDC_PERFMON7_PERFCOUNTER_CNTL__VI = 0x4324; +constexpr unsigned int mmDC_PERFMON7_PERFCOUNTER_STATE__VI = 0x4325; +constexpr unsigned int mmDC_PERFMON7_PERFMON_CNTL__VI = 0x4327; +constexpr unsigned int mmDC_PERFMON7_PERFMON_CNTL2__VI = 0x432E; +constexpr unsigned int mmDC_PERFMON7_PERFMON_CVALUE_INT_MISC__VI = 0x4326; +constexpr unsigned int mmDC_PERFMON7_PERFMON_CVALUE_LOW__VI = 0x4328; +constexpr unsigned int mmDC_PERFMON7_PERFMON_HI__VI = 0x4329; +constexpr unsigned int mmDC_PERFMON7_PERFMON_LOW__VI = 0x432A; +constexpr unsigned int mmDC_PERFMON7_PERFMON_TEST_DEBUG_DATA__VI = 0x432C; +constexpr unsigned int mmDC_PERFMON7_PERFMON_TEST_DEBUG_INDEX__VI = 0x432B; +constexpr unsigned int mmDC_PERFMON8_PERFCOUNTER_CNTL__VI = 0x4524; +constexpr unsigned int mmDC_PERFMON8_PERFCOUNTER_STATE__VI = 0x4525; +constexpr unsigned int mmDC_PERFMON8_PERFMON_CNTL__VI = 0x4527; +constexpr unsigned int mmDC_PERFMON8_PERFMON_CNTL2__VI = 0x452E; +constexpr unsigned int mmDC_PERFMON8_PERFMON_CVALUE_INT_MISC__VI = 0x4526; +constexpr unsigned int mmDC_PERFMON8_PERFMON_CVALUE_LOW__VI = 0x4528; +constexpr unsigned int mmDC_PERFMON8_PERFMON_HI__VI = 0x4529; +constexpr unsigned int mmDC_PERFMON8_PERFMON_LOW__VI = 0x452A; +constexpr unsigned int mmDC_PERFMON8_PERFMON_TEST_DEBUG_DATA__VI = 0x452C; +constexpr unsigned int mmDC_PERFMON8_PERFMON_TEST_DEBUG_INDEX__VI = 0x452B; +constexpr unsigned int mmDC_PERFMON9_PERFCOUNTER_CNTL__VI = 0x5F68; +constexpr unsigned int mmDC_PERFMON9_PERFCOUNTER_STATE__VI = 0x5F69; +constexpr unsigned int mmDC_PERFMON9_PERFMON_CNTL__VI = 0x5F6B; +constexpr unsigned int mmDC_PERFMON9_PERFMON_CNTL2__VI = 0x5F72; +constexpr unsigned int mmDC_PERFMON9_PERFMON_CVALUE_INT_MISC__VI = 0x5F6A; +constexpr unsigned int mmDC_PERFMON9_PERFMON_CVALUE_LOW__VI = 0x5F6C; +constexpr unsigned int mmDC_PERFMON9_PERFMON_HI__VI = 0x5F6D; +constexpr unsigned int mmDC_PERFMON9_PERFMON_LOW__VI = 0x5F6E; +constexpr unsigned int mmDC_PERFMON9_PERFMON_TEST_DEBUG_DATA__VI = 0x5F70; +constexpr unsigned int mmDC_PERFMON9_PERFMON_TEST_DEBUG_INDEX__VI = 0x5F6F; +constexpr unsigned int mmDC_PGCNTL_STATUS_REG__VI = 0x02D5; +constexpr unsigned int mmDC_PGFSM_CONFIG_REG__VI = 0x02D3; +constexpr unsigned int mmDC_PGFSM_WRITE_REG__VI = 0x02D4; +constexpr unsigned int mmDC_PINSTRAPS__VI = 0x4818; +constexpr unsigned int mmDC_REF_CLK_CNTL__VI = 0x4803; +constexpr unsigned int mmDC_TEST_DEBUG_DATA__VI = 0x157D; +constexpr unsigned int mmDC_TEST_DEBUG_INDEX__VI = 0x157C; +constexpr unsigned int mmDEGAMMA_CONTROL__VI = 0x1A58; +constexpr unsigned int mmDENORM_CLAMP_CONTROL__VI = 0x46C3; +constexpr unsigned int mmDENORM_CLAMP_RANGE_B_CB__VI = 0x46C6; +constexpr unsigned int mmDENORM_CLAMP_RANGE_G_Y__VI = 0x46C5; +constexpr unsigned int mmDENORM_CLAMP_RANGE_R_CR__VI = 0x46C4; +constexpr unsigned int mmDENORM_CONTROL__VI = 0x1A50; +constexpr unsigned int mmDENTIST_DISPCLK_CNTL__VI = 0x0124; +constexpr unsigned int mmDIG0_AFMT_60958_0__VI = 0x4A38; +constexpr unsigned int mmDIG0_AFMT_60958_1__VI = 0x4A39; +constexpr unsigned int mmDIG0_AFMT_60958_2__VI = 0x4A3F; +constexpr unsigned int mmDIG0_AFMT_AUDIO_CRC_CONTROL__VI = 0x4A3A; +constexpr unsigned int mmDIG0_AFMT_AUDIO_CRC_RESULT__VI = 0x4A40; +constexpr unsigned int mmDIG0_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4A46; +constexpr unsigned int mmDIG0_AFMT_AUDIO_INFO0__VI = 0x4A36; +constexpr unsigned int mmDIG0_AFMT_AUDIO_INFO1__VI = 0x4A37; +constexpr unsigned int mmDIG0_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4A42; +constexpr unsigned int mmDIG0_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4A14; +constexpr unsigned int mmDIG0_AFMT_AUDIO_SRC_CONTROL__VI = 0x4A45; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO0__VI = 0x4A1E; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO1__VI = 0x4A1F; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO2__VI = 0x4A20; +constexpr unsigned int mmDIG0_AFMT_AVI_INFO3__VI = 0x4A21; +constexpr unsigned int mmDIG0_AFMT_GENERIC_0__VI = 0x4A25; +constexpr unsigned int mmDIG0_AFMT_GENERIC_1__VI = 0x4A26; +constexpr unsigned int mmDIG0_AFMT_GENERIC_2__VI = 0x4A27; +constexpr unsigned int mmDIG0_AFMT_GENERIC_3__VI = 0x4A28; +constexpr unsigned int mmDIG0_AFMT_GENERIC_4__VI = 0x4A29; +constexpr unsigned int mmDIG0_AFMT_GENERIC_5__VI = 0x4A2A; +constexpr unsigned int mmDIG0_AFMT_GENERIC_6__VI = 0x4A2B; +constexpr unsigned int mmDIG0_AFMT_GENERIC_7__VI = 0x4A2C; +constexpr unsigned int mmDIG0_AFMT_GENERIC_HDR__VI = 0x4A24; +constexpr unsigned int mmDIG0_AFMT_INFOFRAME_CONTROL0__VI = 0x4A44; +constexpr unsigned int mmDIG0_AFMT_ISRC1_0__VI = 0x4A15; +constexpr unsigned int mmDIG0_AFMT_ISRC1_1__VI = 0x4A16; +constexpr unsigned int mmDIG0_AFMT_ISRC1_2__VI = 0x4A17; +constexpr unsigned int mmDIG0_AFMT_ISRC1_3__VI = 0x4A18; +constexpr unsigned int mmDIG0_AFMT_ISRC1_4__VI = 0x4A19; +constexpr unsigned int mmDIG0_AFMT_ISRC2_0__VI = 0x4A1A; +constexpr unsigned int mmDIG0_AFMT_ISRC2_1__VI = 0x4A1B; +constexpr unsigned int mmDIG0_AFMT_ISRC2_2__VI = 0x4A1C; +constexpr unsigned int mmDIG0_AFMT_ISRC2_3__VI = 0x4A1D; +constexpr unsigned int mmDIG0_AFMT_MPEG_INFO0__VI = 0x4A22; +constexpr unsigned int mmDIG0_AFMT_MPEG_INFO1__VI = 0x4A23; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL0__VI = 0x4A3B; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL1__VI = 0x4A3C; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL2__VI = 0x4A3D; +constexpr unsigned int mmDIG0_AFMT_RAMP_CONTROL3__VI = 0x4A3E; +constexpr unsigned int mmDIG0_AFMT_STATUS__VI = 0x4A41; +constexpr unsigned int mmDIG0_AFMT_VBI_PACKET_CONTROL__VI = 0x4A43; +constexpr unsigned int mmDIG0_DIG_BE_CNTL__VI = 0x4A47; +constexpr unsigned int mmDIG0_DIG_BE_EN_CNTL__VI = 0x4A48; +constexpr unsigned int mmDIG0_DIG_CLOCK_PATTERN__VI = 0x4A03; +constexpr unsigned int mmDIG0_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4A07; +constexpr unsigned int mmDIG0_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4A08; +constexpr unsigned int mmDIG0_DIG_FE_CNTL__VI = 0x4A00; +constexpr unsigned int mmDIG0_DIG_FE_TEST_DEBUG_DATA__VI = 0x4A7D; +constexpr unsigned int mmDIG0_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4A7C; +constexpr unsigned int mmDIG0_DIG_FIFO_STATUS__VI = 0x4A06; +constexpr unsigned int mmDIG0_DIG_LANE_ENABLE__VI = 0x4A79; +constexpr unsigned int mmDIG0_DIG_OUTPUT_CRC_CNTL__VI = 0x4A01; +constexpr unsigned int mmDIG0_DIG_OUTPUT_CRC_RESULT__VI = 0x4A02; +constexpr unsigned int mmDIG0_DIG_RANDOM_PATTERN_SEED__VI = 0x4A05; +constexpr unsigned int mmDIG0_DIG_TEST_DEBUG_DATA__VI = 0x4A7B; +constexpr unsigned int mmDIG0_DIG_TEST_DEBUG_INDEX__VI = 0x4A7A; +constexpr unsigned int mmDIG0_DIG_TEST_PATTERN__VI = 0x4A04; +constexpr unsigned int mmDIG0_HDMI_ACR_32_0__VI = 0x4A2E; +constexpr unsigned int mmDIG0_HDMI_ACR_32_1__VI = 0x4A2F; +constexpr unsigned int mmDIG0_HDMI_ACR_44_0__VI = 0x4A30; +constexpr unsigned int mmDIG0_HDMI_ACR_44_1__VI = 0x4A31; +constexpr unsigned int mmDIG0_HDMI_ACR_48_0__VI = 0x4A32; +constexpr unsigned int mmDIG0_HDMI_ACR_48_1__VI = 0x4A33; +constexpr unsigned int mmDIG0_HDMI_ACR_PACKET_CONTROL__VI = 0x4A0C; +constexpr unsigned int mmDIG0_HDMI_ACR_STATUS_0__VI = 0x4A34; +constexpr unsigned int mmDIG0_HDMI_ACR_STATUS_1__VI = 0x4A35; +constexpr unsigned int mmDIG0_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4A0B; +constexpr unsigned int mmDIG0_HDMI_CONTROL__VI = 0x4A09; +constexpr unsigned int mmDIG0_HDMI_GC__VI = 0x4A13; +constexpr unsigned int mmDIG0_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4A10; +constexpr unsigned int mmDIG0_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4A2D; +constexpr unsigned int mmDIG0_HDMI_INFOFRAME_CONTROL0__VI = 0x4A0E; +constexpr unsigned int mmDIG0_HDMI_INFOFRAME_CONTROL1__VI = 0x4A0F; +constexpr unsigned int mmDIG0_HDMI_STATUS__VI = 0x4A0A; +constexpr unsigned int mmDIG0_HDMI_VBI_PACKET_CONTROL__VI = 0x4A0D; +constexpr unsigned int mmDIG0_LVDS_DATA_CNTL__VI = 0x4A78; +constexpr unsigned int mmDIG0_TMDS_CNTL__VI = 0x4A6B; +constexpr unsigned int mmDIG0_TMDS_CONTROL0_FEEDBACK__VI = 0x4A6D; +constexpr unsigned int mmDIG0_TMDS_CONTROL_CHAR__VI = 0x4A6C; +constexpr unsigned int mmDIG0_TMDS_CTL0_1_GEN_CNTL__VI = 0x4A75; +constexpr unsigned int mmDIG0_TMDS_CTL2_3_GEN_CNTL__VI = 0x4A76; +constexpr unsigned int mmDIG0_TMDS_CTL_BITS__VI = 0x4A72; +constexpr unsigned int mmDIG0_TMDS_DCBALANCER_CONTROL__VI = 0x4A73; +constexpr unsigned int mmDIG0_TMDS_DEBUG__VI = 0x4A71; +constexpr unsigned int mmDIG0_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4A6E; +constexpr unsigned int mmDIG0_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4A6F; +constexpr unsigned int mmDIG0_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4A70; +constexpr unsigned int mmDIG1_AFMT_60958_0__VI = 0x4B38; +constexpr unsigned int mmDIG1_AFMT_60958_1__VI = 0x4B39; +constexpr unsigned int mmDIG1_AFMT_60958_2__VI = 0x4B3F; +constexpr unsigned int mmDIG1_AFMT_AUDIO_CRC_CONTROL__VI = 0x4B3A; +constexpr unsigned int mmDIG1_AFMT_AUDIO_CRC_RESULT__VI = 0x4B40; +constexpr unsigned int mmDIG1_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4B46; +constexpr unsigned int mmDIG1_AFMT_AUDIO_INFO0__VI = 0x4B36; +constexpr unsigned int mmDIG1_AFMT_AUDIO_INFO1__VI = 0x4B37; +constexpr unsigned int mmDIG1_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4B42; +constexpr unsigned int mmDIG1_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4B14; +constexpr unsigned int mmDIG1_AFMT_AUDIO_SRC_CONTROL__VI = 0x4B45; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO0__VI = 0x4B1E; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO1__VI = 0x4B1F; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO2__VI = 0x4B20; +constexpr unsigned int mmDIG1_AFMT_AVI_INFO3__VI = 0x4B21; +constexpr unsigned int mmDIG1_AFMT_GENERIC_0__VI = 0x4B25; +constexpr unsigned int mmDIG1_AFMT_GENERIC_1__VI = 0x4B26; +constexpr unsigned int mmDIG1_AFMT_GENERIC_2__VI = 0x4B27; +constexpr unsigned int mmDIG1_AFMT_GENERIC_3__VI = 0x4B28; +constexpr unsigned int mmDIG1_AFMT_GENERIC_4__VI = 0x4B29; +constexpr unsigned int mmDIG1_AFMT_GENERIC_5__VI = 0x4B2A; +constexpr unsigned int mmDIG1_AFMT_GENERIC_6__VI = 0x4B2B; +constexpr unsigned int mmDIG1_AFMT_GENERIC_7__VI = 0x4B2C; +constexpr unsigned int mmDIG1_AFMT_GENERIC_HDR__VI = 0x4B24; +constexpr unsigned int mmDIG1_AFMT_INFOFRAME_CONTROL0__VI = 0x4B44; +constexpr unsigned int mmDIG1_AFMT_ISRC1_0__VI = 0x4B15; +constexpr unsigned int mmDIG1_AFMT_ISRC1_1__VI = 0x4B16; +constexpr unsigned int mmDIG1_AFMT_ISRC1_2__VI = 0x4B17; +constexpr unsigned int mmDIG1_AFMT_ISRC1_3__VI = 0x4B18; +constexpr unsigned int mmDIG1_AFMT_ISRC1_4__VI = 0x4B19; +constexpr unsigned int mmDIG1_AFMT_ISRC2_0__VI = 0x4B1A; +constexpr unsigned int mmDIG1_AFMT_ISRC2_1__VI = 0x4B1B; +constexpr unsigned int mmDIG1_AFMT_ISRC2_2__VI = 0x4B1C; +constexpr unsigned int mmDIG1_AFMT_ISRC2_3__VI = 0x4B1D; +constexpr unsigned int mmDIG1_AFMT_MPEG_INFO0__VI = 0x4B22; +constexpr unsigned int mmDIG1_AFMT_MPEG_INFO1__VI = 0x4B23; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL0__VI = 0x4B3B; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL1__VI = 0x4B3C; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL2__VI = 0x4B3D; +constexpr unsigned int mmDIG1_AFMT_RAMP_CONTROL3__VI = 0x4B3E; +constexpr unsigned int mmDIG1_AFMT_STATUS__VI = 0x4B41; +constexpr unsigned int mmDIG1_AFMT_VBI_PACKET_CONTROL__VI = 0x4B43; +constexpr unsigned int mmDIG1_DIG_BE_CNTL__VI = 0x4B47; +constexpr unsigned int mmDIG1_DIG_BE_EN_CNTL__VI = 0x4B48; +constexpr unsigned int mmDIG1_DIG_CLOCK_PATTERN__VI = 0x4B03; +constexpr unsigned int mmDIG1_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4B07; +constexpr unsigned int mmDIG1_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4B08; +constexpr unsigned int mmDIG1_DIG_FE_CNTL__VI = 0x4B00; +constexpr unsigned int mmDIG1_DIG_FE_TEST_DEBUG_DATA__VI = 0x4B7D; +constexpr unsigned int mmDIG1_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4B7C; +constexpr unsigned int mmDIG1_DIG_FIFO_STATUS__VI = 0x4B06; +constexpr unsigned int mmDIG1_DIG_LANE_ENABLE__VI = 0x4B79; +constexpr unsigned int mmDIG1_DIG_OUTPUT_CRC_CNTL__VI = 0x4B01; +constexpr unsigned int mmDIG1_DIG_OUTPUT_CRC_RESULT__VI = 0x4B02; +constexpr unsigned int mmDIG1_DIG_RANDOM_PATTERN_SEED__VI = 0x4B05; +constexpr unsigned int mmDIG1_DIG_TEST_DEBUG_DATA__VI = 0x4B7B; +constexpr unsigned int mmDIG1_DIG_TEST_DEBUG_INDEX__VI = 0x4B7A; +constexpr unsigned int mmDIG1_DIG_TEST_PATTERN__VI = 0x4B04; +constexpr unsigned int mmDIG1_HDMI_ACR_32_0__VI = 0x4B2E; +constexpr unsigned int mmDIG1_HDMI_ACR_32_1__VI = 0x4B2F; +constexpr unsigned int mmDIG1_HDMI_ACR_44_0__VI = 0x4B30; +constexpr unsigned int mmDIG1_HDMI_ACR_44_1__VI = 0x4B31; +constexpr unsigned int mmDIG1_HDMI_ACR_48_0__VI = 0x4B32; +constexpr unsigned int mmDIG1_HDMI_ACR_48_1__VI = 0x4B33; +constexpr unsigned int mmDIG1_HDMI_ACR_PACKET_CONTROL__VI = 0x4B0C; +constexpr unsigned int mmDIG1_HDMI_ACR_STATUS_0__VI = 0x4B34; +constexpr unsigned int mmDIG1_HDMI_ACR_STATUS_1__VI = 0x4B35; +constexpr unsigned int mmDIG1_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4B0B; +constexpr unsigned int mmDIG1_HDMI_CONTROL__VI = 0x4B09; +constexpr unsigned int mmDIG1_HDMI_GC__VI = 0x4B13; +constexpr unsigned int mmDIG1_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4B10; +constexpr unsigned int mmDIG1_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4B2D; +constexpr unsigned int mmDIG1_HDMI_INFOFRAME_CONTROL0__VI = 0x4B0E; +constexpr unsigned int mmDIG1_HDMI_INFOFRAME_CONTROL1__VI = 0x4B0F; +constexpr unsigned int mmDIG1_HDMI_STATUS__VI = 0x4B0A; +constexpr unsigned int mmDIG1_HDMI_VBI_PACKET_CONTROL__VI = 0x4B0D; +constexpr unsigned int mmDIG1_LVDS_DATA_CNTL__VI = 0x4B78; +constexpr unsigned int mmDIG1_TMDS_CNTL__VI = 0x4B6B; +constexpr unsigned int mmDIG1_TMDS_CONTROL0_FEEDBACK__VI = 0x4B6D; +constexpr unsigned int mmDIG1_TMDS_CONTROL_CHAR__VI = 0x4B6C; +constexpr unsigned int mmDIG1_TMDS_CTL0_1_GEN_CNTL__VI = 0x4B75; +constexpr unsigned int mmDIG1_TMDS_CTL2_3_GEN_CNTL__VI = 0x4B76; +constexpr unsigned int mmDIG1_TMDS_CTL_BITS__VI = 0x4B72; +constexpr unsigned int mmDIG1_TMDS_DCBALANCER_CONTROL__VI = 0x4B73; +constexpr unsigned int mmDIG1_TMDS_DEBUG__VI = 0x4B71; +constexpr unsigned int mmDIG1_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4B6E; +constexpr unsigned int mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4B6F; +constexpr unsigned int mmDIG1_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4B70; +constexpr unsigned int mmDIG2_AFMT_60958_0__VI = 0x4C38; +constexpr unsigned int mmDIG2_AFMT_60958_1__VI = 0x4C39; +constexpr unsigned int mmDIG2_AFMT_60958_2__VI = 0x4C3F; +constexpr unsigned int mmDIG2_AFMT_AUDIO_CRC_CONTROL__VI = 0x4C3A; +constexpr unsigned int mmDIG2_AFMT_AUDIO_CRC_RESULT__VI = 0x4C40; +constexpr unsigned int mmDIG2_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4C46; +constexpr unsigned int mmDIG2_AFMT_AUDIO_INFO0__VI = 0x4C36; +constexpr unsigned int mmDIG2_AFMT_AUDIO_INFO1__VI = 0x4C37; +constexpr unsigned int mmDIG2_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4C42; +constexpr unsigned int mmDIG2_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4C14; +constexpr unsigned int mmDIG2_AFMT_AUDIO_SRC_CONTROL__VI = 0x4C45; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO0__VI = 0x4C1E; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO1__VI = 0x4C1F; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO2__VI = 0x4C20; +constexpr unsigned int mmDIG2_AFMT_AVI_INFO3__VI = 0x4C21; +constexpr unsigned int mmDIG2_AFMT_GENERIC_0__VI = 0x4C25; +constexpr unsigned int mmDIG2_AFMT_GENERIC_1__VI = 0x4C26; +constexpr unsigned int mmDIG2_AFMT_GENERIC_2__VI = 0x4C27; +constexpr unsigned int mmDIG2_AFMT_GENERIC_3__VI = 0x4C28; +constexpr unsigned int mmDIG2_AFMT_GENERIC_4__VI = 0x4C29; +constexpr unsigned int mmDIG2_AFMT_GENERIC_5__VI = 0x4C2A; +constexpr unsigned int mmDIG2_AFMT_GENERIC_6__VI = 0x4C2B; +constexpr unsigned int mmDIG2_AFMT_GENERIC_7__VI = 0x4C2C; +constexpr unsigned int mmDIG2_AFMT_GENERIC_HDR__VI = 0x4C24; +constexpr unsigned int mmDIG2_AFMT_INFOFRAME_CONTROL0__VI = 0x4C44; +constexpr unsigned int mmDIG2_AFMT_ISRC1_0__VI = 0x4C15; +constexpr unsigned int mmDIG2_AFMT_ISRC1_1__VI = 0x4C16; +constexpr unsigned int mmDIG2_AFMT_ISRC1_2__VI = 0x4C17; +constexpr unsigned int mmDIG2_AFMT_ISRC1_3__VI = 0x4C18; +constexpr unsigned int mmDIG2_AFMT_ISRC1_4__VI = 0x4C19; +constexpr unsigned int mmDIG2_AFMT_ISRC2_0__VI = 0x4C1A; +constexpr unsigned int mmDIG2_AFMT_ISRC2_1__VI = 0x4C1B; +constexpr unsigned int mmDIG2_AFMT_ISRC2_2__VI = 0x4C1C; +constexpr unsigned int mmDIG2_AFMT_ISRC2_3__VI = 0x4C1D; +constexpr unsigned int mmDIG2_AFMT_MPEG_INFO0__VI = 0x4C22; +constexpr unsigned int mmDIG2_AFMT_MPEG_INFO1__VI = 0x4C23; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL0__VI = 0x4C3B; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL1__VI = 0x4C3C; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL2__VI = 0x4C3D; +constexpr unsigned int mmDIG2_AFMT_RAMP_CONTROL3__VI = 0x4C3E; +constexpr unsigned int mmDIG2_AFMT_STATUS__VI = 0x4C41; +constexpr unsigned int mmDIG2_AFMT_VBI_PACKET_CONTROL__VI = 0x4C43; +constexpr unsigned int mmDIG2_DIG_BE_CNTL__VI = 0x4C47; +constexpr unsigned int mmDIG2_DIG_BE_EN_CNTL__VI = 0x4C48; +constexpr unsigned int mmDIG2_DIG_CLOCK_PATTERN__VI = 0x4C03; +constexpr unsigned int mmDIG2_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4C07; +constexpr unsigned int mmDIG2_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4C08; +constexpr unsigned int mmDIG2_DIG_FE_CNTL__VI = 0x4C00; +constexpr unsigned int mmDIG2_DIG_FE_TEST_DEBUG_DATA__VI = 0x4C7D; +constexpr unsigned int mmDIG2_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4C7C; +constexpr unsigned int mmDIG2_DIG_FIFO_STATUS__VI = 0x4C06; +constexpr unsigned int mmDIG2_DIG_LANE_ENABLE__VI = 0x4C79; +constexpr unsigned int mmDIG2_DIG_OUTPUT_CRC_CNTL__VI = 0x4C01; +constexpr unsigned int mmDIG2_DIG_OUTPUT_CRC_RESULT__VI = 0x4C02; +constexpr unsigned int mmDIG2_DIG_RANDOM_PATTERN_SEED__VI = 0x4C05; +constexpr unsigned int mmDIG2_DIG_TEST_DEBUG_DATA__VI = 0x4C7B; +constexpr unsigned int mmDIG2_DIG_TEST_DEBUG_INDEX__VI = 0x4C7A; +constexpr unsigned int mmDIG2_DIG_TEST_PATTERN__VI = 0x4C04; +constexpr unsigned int mmDIG2_HDMI_ACR_32_0__VI = 0x4C2E; +constexpr unsigned int mmDIG2_HDMI_ACR_32_1__VI = 0x4C2F; +constexpr unsigned int mmDIG2_HDMI_ACR_44_0__VI = 0x4C30; +constexpr unsigned int mmDIG2_HDMI_ACR_44_1__VI = 0x4C31; +constexpr unsigned int mmDIG2_HDMI_ACR_48_0__VI = 0x4C32; +constexpr unsigned int mmDIG2_HDMI_ACR_48_1__VI = 0x4C33; +constexpr unsigned int mmDIG2_HDMI_ACR_PACKET_CONTROL__VI = 0x4C0C; +constexpr unsigned int mmDIG2_HDMI_ACR_STATUS_0__VI = 0x4C34; +constexpr unsigned int mmDIG2_HDMI_ACR_STATUS_1__VI = 0x4C35; +constexpr unsigned int mmDIG2_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4C0B; +constexpr unsigned int mmDIG2_HDMI_CONTROL__VI = 0x4C09; +constexpr unsigned int mmDIG2_HDMI_GC__VI = 0x4C13; +constexpr unsigned int mmDIG2_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4C10; +constexpr unsigned int mmDIG2_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4C2D; +constexpr unsigned int mmDIG2_HDMI_INFOFRAME_CONTROL0__VI = 0x4C0E; +constexpr unsigned int mmDIG2_HDMI_INFOFRAME_CONTROL1__VI = 0x4C0F; +constexpr unsigned int mmDIG2_HDMI_STATUS__VI = 0x4C0A; +constexpr unsigned int mmDIG2_HDMI_VBI_PACKET_CONTROL__VI = 0x4C0D; +constexpr unsigned int mmDIG2_LVDS_DATA_CNTL__VI = 0x4C78; +constexpr unsigned int mmDIG2_TMDS_CNTL__VI = 0x4C6B; +constexpr unsigned int mmDIG2_TMDS_CONTROL0_FEEDBACK__VI = 0x4C6D; +constexpr unsigned int mmDIG2_TMDS_CONTROL_CHAR__VI = 0x4C6C; +constexpr unsigned int mmDIG2_TMDS_CTL0_1_GEN_CNTL__VI = 0x4C75; +constexpr unsigned int mmDIG2_TMDS_CTL2_3_GEN_CNTL__VI = 0x4C76; +constexpr unsigned int mmDIG2_TMDS_CTL_BITS__VI = 0x4C72; +constexpr unsigned int mmDIG2_TMDS_DCBALANCER_CONTROL__VI = 0x4C73; +constexpr unsigned int mmDIG2_TMDS_DEBUG__VI = 0x4C71; +constexpr unsigned int mmDIG2_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4C6E; +constexpr unsigned int mmDIG2_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4C6F; +constexpr unsigned int mmDIG2_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4C70; +constexpr unsigned int mmDIG3_AFMT_60958_0__VI = 0x4D38; +constexpr unsigned int mmDIG3_AFMT_60958_1__VI = 0x4D39; +constexpr unsigned int mmDIG3_AFMT_60958_2__VI = 0x4D3F; +constexpr unsigned int mmDIG3_AFMT_AUDIO_CRC_CONTROL__VI = 0x4D3A; +constexpr unsigned int mmDIG3_AFMT_AUDIO_CRC_RESULT__VI = 0x4D40; +constexpr unsigned int mmDIG3_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4D46; +constexpr unsigned int mmDIG3_AFMT_AUDIO_INFO0__VI = 0x4D36; +constexpr unsigned int mmDIG3_AFMT_AUDIO_INFO1__VI = 0x4D37; +constexpr unsigned int mmDIG3_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4D42; +constexpr unsigned int mmDIG3_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4D14; +constexpr unsigned int mmDIG3_AFMT_AUDIO_SRC_CONTROL__VI = 0x4D45; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO0__VI = 0x4D1E; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO1__VI = 0x4D1F; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO2__VI = 0x4D20; +constexpr unsigned int mmDIG3_AFMT_AVI_INFO3__VI = 0x4D21; +constexpr unsigned int mmDIG3_AFMT_GENERIC_0__VI = 0x4D25; +constexpr unsigned int mmDIG3_AFMT_GENERIC_1__VI = 0x4D26; +constexpr unsigned int mmDIG3_AFMT_GENERIC_2__VI = 0x4D27; +constexpr unsigned int mmDIG3_AFMT_GENERIC_3__VI = 0x4D28; +constexpr unsigned int mmDIG3_AFMT_GENERIC_4__VI = 0x4D29; +constexpr unsigned int mmDIG3_AFMT_GENERIC_5__VI = 0x4D2A; +constexpr unsigned int mmDIG3_AFMT_GENERIC_6__VI = 0x4D2B; +constexpr unsigned int mmDIG3_AFMT_GENERIC_7__VI = 0x4D2C; +constexpr unsigned int mmDIG3_AFMT_GENERIC_HDR__VI = 0x4D24; +constexpr unsigned int mmDIG3_AFMT_INFOFRAME_CONTROL0__VI = 0x4D44; +constexpr unsigned int mmDIG3_AFMT_ISRC1_0__VI = 0x4D15; +constexpr unsigned int mmDIG3_AFMT_ISRC1_1__VI = 0x4D16; +constexpr unsigned int mmDIG3_AFMT_ISRC1_2__VI = 0x4D17; +constexpr unsigned int mmDIG3_AFMT_ISRC1_3__VI = 0x4D18; +constexpr unsigned int mmDIG3_AFMT_ISRC1_4__VI = 0x4D19; +constexpr unsigned int mmDIG3_AFMT_ISRC2_0__VI = 0x4D1A; +constexpr unsigned int mmDIG3_AFMT_ISRC2_1__VI = 0x4D1B; +constexpr unsigned int mmDIG3_AFMT_ISRC2_2__VI = 0x4D1C; +constexpr unsigned int mmDIG3_AFMT_ISRC2_3__VI = 0x4D1D; +constexpr unsigned int mmDIG3_AFMT_MPEG_INFO0__VI = 0x4D22; +constexpr unsigned int mmDIG3_AFMT_MPEG_INFO1__VI = 0x4D23; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL0__VI = 0x4D3B; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL1__VI = 0x4D3C; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL2__VI = 0x4D3D; +constexpr unsigned int mmDIG3_AFMT_RAMP_CONTROL3__VI = 0x4D3E; +constexpr unsigned int mmDIG3_AFMT_STATUS__VI = 0x4D41; +constexpr unsigned int mmDIG3_AFMT_VBI_PACKET_CONTROL__VI = 0x4D43; +constexpr unsigned int mmDIG3_DIG_BE_CNTL__VI = 0x4D47; +constexpr unsigned int mmDIG3_DIG_BE_EN_CNTL__VI = 0x4D48; +constexpr unsigned int mmDIG3_DIG_CLOCK_PATTERN__VI = 0x4D03; +constexpr unsigned int mmDIG3_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4D07; +constexpr unsigned int mmDIG3_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4D08; +constexpr unsigned int mmDIG3_DIG_FE_CNTL__VI = 0x4D00; +constexpr unsigned int mmDIG3_DIG_FE_TEST_DEBUG_DATA__VI = 0x4D7D; +constexpr unsigned int mmDIG3_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4D7C; +constexpr unsigned int mmDIG3_DIG_FIFO_STATUS__VI = 0x4D06; +constexpr unsigned int mmDIG3_DIG_LANE_ENABLE__VI = 0x4D79; +constexpr unsigned int mmDIG3_DIG_OUTPUT_CRC_CNTL__VI = 0x4D01; +constexpr unsigned int mmDIG3_DIG_OUTPUT_CRC_RESULT__VI = 0x4D02; +constexpr unsigned int mmDIG3_DIG_RANDOM_PATTERN_SEED__VI = 0x4D05; +constexpr unsigned int mmDIG3_DIG_TEST_DEBUG_DATA__VI = 0x4D7B; +constexpr unsigned int mmDIG3_DIG_TEST_DEBUG_INDEX__VI = 0x4D7A; +constexpr unsigned int mmDIG3_DIG_TEST_PATTERN__VI = 0x4D04; +constexpr unsigned int mmDIG3_HDMI_ACR_32_0__VI = 0x4D2E; +constexpr unsigned int mmDIG3_HDMI_ACR_32_1__VI = 0x4D2F; +constexpr unsigned int mmDIG3_HDMI_ACR_44_0__VI = 0x4D30; +constexpr unsigned int mmDIG3_HDMI_ACR_44_1__VI = 0x4D31; +constexpr unsigned int mmDIG3_HDMI_ACR_48_0__VI = 0x4D32; +constexpr unsigned int mmDIG3_HDMI_ACR_48_1__VI = 0x4D33; +constexpr unsigned int mmDIG3_HDMI_ACR_PACKET_CONTROL__VI = 0x4D0C; +constexpr unsigned int mmDIG3_HDMI_ACR_STATUS_0__VI = 0x4D34; +constexpr unsigned int mmDIG3_HDMI_ACR_STATUS_1__VI = 0x4D35; +constexpr unsigned int mmDIG3_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4D0B; +constexpr unsigned int mmDIG3_HDMI_CONTROL__VI = 0x4D09; +constexpr unsigned int mmDIG3_HDMI_GC__VI = 0x4D13; +constexpr unsigned int mmDIG3_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4D10; +constexpr unsigned int mmDIG3_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4D2D; +constexpr unsigned int mmDIG3_HDMI_INFOFRAME_CONTROL0__VI = 0x4D0E; +constexpr unsigned int mmDIG3_HDMI_INFOFRAME_CONTROL1__VI = 0x4D0F; +constexpr unsigned int mmDIG3_HDMI_STATUS__VI = 0x4D0A; +constexpr unsigned int mmDIG3_HDMI_VBI_PACKET_CONTROL__VI = 0x4D0D; +constexpr unsigned int mmDIG3_LVDS_DATA_CNTL__VI = 0x4D78; +constexpr unsigned int mmDIG3_TMDS_CNTL__VI = 0x4D6B; +constexpr unsigned int mmDIG3_TMDS_CONTROL0_FEEDBACK__VI = 0x4D6D; +constexpr unsigned int mmDIG3_TMDS_CONTROL_CHAR__VI = 0x4D6C; +constexpr unsigned int mmDIG3_TMDS_CTL0_1_GEN_CNTL__VI = 0x4D75; +constexpr unsigned int mmDIG3_TMDS_CTL2_3_GEN_CNTL__VI = 0x4D76; +constexpr unsigned int mmDIG3_TMDS_CTL_BITS__VI = 0x4D72; +constexpr unsigned int mmDIG3_TMDS_DCBALANCER_CONTROL__VI = 0x4D73; +constexpr unsigned int mmDIG3_TMDS_DEBUG__VI = 0x4D71; +constexpr unsigned int mmDIG3_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4D6E; +constexpr unsigned int mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4D6F; +constexpr unsigned int mmDIG3_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4D70; +constexpr unsigned int mmDIG4_AFMT_60958_0__VI = 0x4E38; +constexpr unsigned int mmDIG4_AFMT_60958_1__VI = 0x4E39; +constexpr unsigned int mmDIG4_AFMT_60958_2__VI = 0x4E3F; +constexpr unsigned int mmDIG4_AFMT_AUDIO_CRC_CONTROL__VI = 0x4E3A; +constexpr unsigned int mmDIG4_AFMT_AUDIO_CRC_RESULT__VI = 0x4E40; +constexpr unsigned int mmDIG4_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4E46; +constexpr unsigned int mmDIG4_AFMT_AUDIO_INFO0__VI = 0x4E36; +constexpr unsigned int mmDIG4_AFMT_AUDIO_INFO1__VI = 0x4E37; +constexpr unsigned int mmDIG4_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4E42; +constexpr unsigned int mmDIG4_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4E14; +constexpr unsigned int mmDIG4_AFMT_AUDIO_SRC_CONTROL__VI = 0x4E45; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO0__VI = 0x4E1E; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO1__VI = 0x4E1F; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO2__VI = 0x4E20; +constexpr unsigned int mmDIG4_AFMT_AVI_INFO3__VI = 0x4E21; +constexpr unsigned int mmDIG4_AFMT_GENERIC_0__VI = 0x4E25; +constexpr unsigned int mmDIG4_AFMT_GENERIC_1__VI = 0x4E26; +constexpr unsigned int mmDIG4_AFMT_GENERIC_2__VI = 0x4E27; +constexpr unsigned int mmDIG4_AFMT_GENERIC_3__VI = 0x4E28; +constexpr unsigned int mmDIG4_AFMT_GENERIC_4__VI = 0x4E29; +constexpr unsigned int mmDIG4_AFMT_GENERIC_5__VI = 0x4E2A; +constexpr unsigned int mmDIG4_AFMT_GENERIC_6__VI = 0x4E2B; +constexpr unsigned int mmDIG4_AFMT_GENERIC_7__VI = 0x4E2C; +constexpr unsigned int mmDIG4_AFMT_GENERIC_HDR__VI = 0x4E24; +constexpr unsigned int mmDIG4_AFMT_INFOFRAME_CONTROL0__VI = 0x4E44; +constexpr unsigned int mmDIG4_AFMT_ISRC1_0__VI = 0x4E15; +constexpr unsigned int mmDIG4_AFMT_ISRC1_1__VI = 0x4E16; +constexpr unsigned int mmDIG4_AFMT_ISRC1_2__VI = 0x4E17; +constexpr unsigned int mmDIG4_AFMT_ISRC1_3__VI = 0x4E18; +constexpr unsigned int mmDIG4_AFMT_ISRC1_4__VI = 0x4E19; +constexpr unsigned int mmDIG4_AFMT_ISRC2_0__VI = 0x4E1A; +constexpr unsigned int mmDIG4_AFMT_ISRC2_1__VI = 0x4E1B; +constexpr unsigned int mmDIG4_AFMT_ISRC2_2__VI = 0x4E1C; +constexpr unsigned int mmDIG4_AFMT_ISRC2_3__VI = 0x4E1D; +constexpr unsigned int mmDIG4_AFMT_MPEG_INFO0__VI = 0x4E22; +constexpr unsigned int mmDIG4_AFMT_MPEG_INFO1__VI = 0x4E23; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL0__VI = 0x4E3B; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL1__VI = 0x4E3C; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL2__VI = 0x4E3D; +constexpr unsigned int mmDIG4_AFMT_RAMP_CONTROL3__VI = 0x4E3E; +constexpr unsigned int mmDIG4_AFMT_STATUS__VI = 0x4E41; +constexpr unsigned int mmDIG4_AFMT_VBI_PACKET_CONTROL__VI = 0x4E43; +constexpr unsigned int mmDIG4_DIG_BE_CNTL__VI = 0x4E47; +constexpr unsigned int mmDIG4_DIG_BE_EN_CNTL__VI = 0x4E48; +constexpr unsigned int mmDIG4_DIG_CLOCK_PATTERN__VI = 0x4E03; +constexpr unsigned int mmDIG4_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4E07; +constexpr unsigned int mmDIG4_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4E08; +constexpr unsigned int mmDIG4_DIG_FE_CNTL__VI = 0x4E00; +constexpr unsigned int mmDIG4_DIG_FE_TEST_DEBUG_DATA__VI = 0x4E7D; +constexpr unsigned int mmDIG4_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4E7C; +constexpr unsigned int mmDIG4_DIG_FIFO_STATUS__VI = 0x4E06; +constexpr unsigned int mmDIG4_DIG_LANE_ENABLE__VI = 0x4E79; +constexpr unsigned int mmDIG4_DIG_OUTPUT_CRC_CNTL__VI = 0x4E01; +constexpr unsigned int mmDIG4_DIG_OUTPUT_CRC_RESULT__VI = 0x4E02; +constexpr unsigned int mmDIG4_DIG_RANDOM_PATTERN_SEED__VI = 0x4E05; +constexpr unsigned int mmDIG4_DIG_TEST_DEBUG_DATA__VI = 0x4E7B; +constexpr unsigned int mmDIG4_DIG_TEST_DEBUG_INDEX__VI = 0x4E7A; +constexpr unsigned int mmDIG4_DIG_TEST_PATTERN__VI = 0x4E04; +constexpr unsigned int mmDIG4_HDMI_ACR_32_0__VI = 0x4E2E; +constexpr unsigned int mmDIG4_HDMI_ACR_32_1__VI = 0x4E2F; +constexpr unsigned int mmDIG4_HDMI_ACR_44_0__VI = 0x4E30; +constexpr unsigned int mmDIG4_HDMI_ACR_44_1__VI = 0x4E31; +constexpr unsigned int mmDIG4_HDMI_ACR_48_0__VI = 0x4E32; +constexpr unsigned int mmDIG4_HDMI_ACR_48_1__VI = 0x4E33; +constexpr unsigned int mmDIG4_HDMI_ACR_PACKET_CONTROL__VI = 0x4E0C; +constexpr unsigned int mmDIG4_HDMI_ACR_STATUS_0__VI = 0x4E34; +constexpr unsigned int mmDIG4_HDMI_ACR_STATUS_1__VI = 0x4E35; +constexpr unsigned int mmDIG4_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4E0B; +constexpr unsigned int mmDIG4_HDMI_CONTROL__VI = 0x4E09; +constexpr unsigned int mmDIG4_HDMI_GC__VI = 0x4E13; +constexpr unsigned int mmDIG4_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4E10; +constexpr unsigned int mmDIG4_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4E2D; +constexpr unsigned int mmDIG4_HDMI_INFOFRAME_CONTROL0__VI = 0x4E0E; +constexpr unsigned int mmDIG4_HDMI_INFOFRAME_CONTROL1__VI = 0x4E0F; +constexpr unsigned int mmDIG4_HDMI_STATUS__VI = 0x4E0A; +constexpr unsigned int mmDIG4_HDMI_VBI_PACKET_CONTROL__VI = 0x4E0D; +constexpr unsigned int mmDIG4_LVDS_DATA_CNTL__VI = 0x4E78; +constexpr unsigned int mmDIG4_TMDS_CNTL__VI = 0x4E6B; +constexpr unsigned int mmDIG4_TMDS_CONTROL0_FEEDBACK__VI = 0x4E6D; +constexpr unsigned int mmDIG4_TMDS_CONTROL_CHAR__VI = 0x4E6C; +constexpr unsigned int mmDIG4_TMDS_CTL0_1_GEN_CNTL__VI = 0x4E75; +constexpr unsigned int mmDIG4_TMDS_CTL2_3_GEN_CNTL__VI = 0x4E76; +constexpr unsigned int mmDIG4_TMDS_CTL_BITS__VI = 0x4E72; +constexpr unsigned int mmDIG4_TMDS_DCBALANCER_CONTROL__VI = 0x4E73; +constexpr unsigned int mmDIG4_TMDS_DEBUG__VI = 0x4E71; +constexpr unsigned int mmDIG4_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4E6E; +constexpr unsigned int mmDIG4_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4E6F; +constexpr unsigned int mmDIG4_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4E70; +constexpr unsigned int mmDIG5_AFMT_60958_0__VI = 0x4F38; +constexpr unsigned int mmDIG5_AFMT_60958_1__VI = 0x4F39; +constexpr unsigned int mmDIG5_AFMT_60958_2__VI = 0x4F3F; +constexpr unsigned int mmDIG5_AFMT_AUDIO_CRC_CONTROL__VI = 0x4F3A; +constexpr unsigned int mmDIG5_AFMT_AUDIO_CRC_RESULT__VI = 0x4F40; +constexpr unsigned int mmDIG5_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x4F46; +constexpr unsigned int mmDIG5_AFMT_AUDIO_INFO0__VI = 0x4F36; +constexpr unsigned int mmDIG5_AFMT_AUDIO_INFO1__VI = 0x4F37; +constexpr unsigned int mmDIG5_AFMT_AUDIO_PACKET_CONTROL__VI = 0x4F42; +constexpr unsigned int mmDIG5_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x4F14; +constexpr unsigned int mmDIG5_AFMT_AUDIO_SRC_CONTROL__VI = 0x4F45; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO0__VI = 0x4F1E; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO1__VI = 0x4F1F; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO2__VI = 0x4F20; +constexpr unsigned int mmDIG5_AFMT_AVI_INFO3__VI = 0x4F21; +constexpr unsigned int mmDIG5_AFMT_GENERIC_0__VI = 0x4F25; +constexpr unsigned int mmDIG5_AFMT_GENERIC_1__VI = 0x4F26; +constexpr unsigned int mmDIG5_AFMT_GENERIC_2__VI = 0x4F27; +constexpr unsigned int mmDIG5_AFMT_GENERIC_3__VI = 0x4F28; +constexpr unsigned int mmDIG5_AFMT_GENERIC_4__VI = 0x4F29; +constexpr unsigned int mmDIG5_AFMT_GENERIC_5__VI = 0x4F2A; +constexpr unsigned int mmDIG5_AFMT_GENERIC_6__VI = 0x4F2B; +constexpr unsigned int mmDIG5_AFMT_GENERIC_7__VI = 0x4F2C; +constexpr unsigned int mmDIG5_AFMT_GENERIC_HDR__VI = 0x4F24; +constexpr unsigned int mmDIG5_AFMT_INFOFRAME_CONTROL0__VI = 0x4F44; +constexpr unsigned int mmDIG5_AFMT_ISRC1_0__VI = 0x4F15; +constexpr unsigned int mmDIG5_AFMT_ISRC1_1__VI = 0x4F16; +constexpr unsigned int mmDIG5_AFMT_ISRC1_2__VI = 0x4F17; +constexpr unsigned int mmDIG5_AFMT_ISRC1_3__VI = 0x4F18; +constexpr unsigned int mmDIG5_AFMT_ISRC1_4__VI = 0x4F19; +constexpr unsigned int mmDIG5_AFMT_ISRC2_0__VI = 0x4F1A; +constexpr unsigned int mmDIG5_AFMT_ISRC2_1__VI = 0x4F1B; +constexpr unsigned int mmDIG5_AFMT_ISRC2_2__VI = 0x4F1C; +constexpr unsigned int mmDIG5_AFMT_ISRC2_3__VI = 0x4F1D; +constexpr unsigned int mmDIG5_AFMT_MPEG_INFO0__VI = 0x4F22; +constexpr unsigned int mmDIG5_AFMT_MPEG_INFO1__VI = 0x4F23; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL0__VI = 0x4F3B; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL1__VI = 0x4F3C; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL2__VI = 0x4F3D; +constexpr unsigned int mmDIG5_AFMT_RAMP_CONTROL3__VI = 0x4F3E; +constexpr unsigned int mmDIG5_AFMT_STATUS__VI = 0x4F41; +constexpr unsigned int mmDIG5_AFMT_VBI_PACKET_CONTROL__VI = 0x4F43; +constexpr unsigned int mmDIG5_DIG_BE_CNTL__VI = 0x4F47; +constexpr unsigned int mmDIG5_DIG_BE_EN_CNTL__VI = 0x4F48; +constexpr unsigned int mmDIG5_DIG_CLOCK_PATTERN__VI = 0x4F03; +constexpr unsigned int mmDIG5_DIG_DISPCLK_SWITCH_CNTL__VI = 0x4F07; +constexpr unsigned int mmDIG5_DIG_DISPCLK_SWITCH_STATUS__VI = 0x4F08; +constexpr unsigned int mmDIG5_DIG_FE_CNTL__VI = 0x4F00; +constexpr unsigned int mmDIG5_DIG_FE_TEST_DEBUG_DATA__VI = 0x4F7D; +constexpr unsigned int mmDIG5_DIG_FE_TEST_DEBUG_INDEX__VI = 0x4F7C; +constexpr unsigned int mmDIG5_DIG_FIFO_STATUS__VI = 0x4F06; +constexpr unsigned int mmDIG5_DIG_LANE_ENABLE__VI = 0x4F79; +constexpr unsigned int mmDIG5_DIG_OUTPUT_CRC_CNTL__VI = 0x4F01; +constexpr unsigned int mmDIG5_DIG_OUTPUT_CRC_RESULT__VI = 0x4F02; +constexpr unsigned int mmDIG5_DIG_RANDOM_PATTERN_SEED__VI = 0x4F05; +constexpr unsigned int mmDIG5_DIG_TEST_DEBUG_DATA__VI = 0x4F7B; +constexpr unsigned int mmDIG5_DIG_TEST_DEBUG_INDEX__VI = 0x4F7A; +constexpr unsigned int mmDIG5_DIG_TEST_PATTERN__VI = 0x4F04; +constexpr unsigned int mmDIG5_HDMI_ACR_32_0__VI = 0x4F2E; +constexpr unsigned int mmDIG5_HDMI_ACR_32_1__VI = 0x4F2F; +constexpr unsigned int mmDIG5_HDMI_ACR_44_0__VI = 0x4F30; +constexpr unsigned int mmDIG5_HDMI_ACR_44_1__VI = 0x4F31; +constexpr unsigned int mmDIG5_HDMI_ACR_48_0__VI = 0x4F32; +constexpr unsigned int mmDIG5_HDMI_ACR_48_1__VI = 0x4F33; +constexpr unsigned int mmDIG5_HDMI_ACR_PACKET_CONTROL__VI = 0x4F0C; +constexpr unsigned int mmDIG5_HDMI_ACR_STATUS_0__VI = 0x4F34; +constexpr unsigned int mmDIG5_HDMI_ACR_STATUS_1__VI = 0x4F35; +constexpr unsigned int mmDIG5_HDMI_AUDIO_PACKET_CONTROL__VI = 0x4F0B; +constexpr unsigned int mmDIG5_HDMI_CONTROL__VI = 0x4F09; +constexpr unsigned int mmDIG5_HDMI_GC__VI = 0x4F13; +constexpr unsigned int mmDIG5_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x4F10; +constexpr unsigned int mmDIG5_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x4F2D; +constexpr unsigned int mmDIG5_HDMI_INFOFRAME_CONTROL0__VI = 0x4F0E; +constexpr unsigned int mmDIG5_HDMI_INFOFRAME_CONTROL1__VI = 0x4F0F; +constexpr unsigned int mmDIG5_HDMI_STATUS__VI = 0x4F0A; +constexpr unsigned int mmDIG5_HDMI_VBI_PACKET_CONTROL__VI = 0x4F0D; +constexpr unsigned int mmDIG5_LVDS_DATA_CNTL__VI = 0x4F78; +constexpr unsigned int mmDIG5_TMDS_CNTL__VI = 0x4F6B; +constexpr unsigned int mmDIG5_TMDS_CONTROL0_FEEDBACK__VI = 0x4F6D; +constexpr unsigned int mmDIG5_TMDS_CONTROL_CHAR__VI = 0x4F6C; +constexpr unsigned int mmDIG5_TMDS_CTL0_1_GEN_CNTL__VI = 0x4F75; +constexpr unsigned int mmDIG5_TMDS_CTL2_3_GEN_CNTL__VI = 0x4F76; +constexpr unsigned int mmDIG5_TMDS_CTL_BITS__VI = 0x4F72; +constexpr unsigned int mmDIG5_TMDS_DCBALANCER_CONTROL__VI = 0x4F73; +constexpr unsigned int mmDIG5_TMDS_DEBUG__VI = 0x4F71; +constexpr unsigned int mmDIG5_TMDS_STEREOSYNC_CTL_SEL__VI = 0x4F6E; +constexpr unsigned int mmDIG5_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4F6F; +constexpr unsigned int mmDIG5_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4F70; +constexpr unsigned int mmDIG6_AFMT_60958_0__VI = 0x5438; +constexpr unsigned int mmDIG6_AFMT_60958_1__VI = 0x5439; +constexpr unsigned int mmDIG6_AFMT_60958_2__VI = 0x543F; +constexpr unsigned int mmDIG6_AFMT_AUDIO_CRC_CONTROL__VI = 0x543A; +constexpr unsigned int mmDIG6_AFMT_AUDIO_CRC_RESULT__VI = 0x5440; +constexpr unsigned int mmDIG6_AFMT_AUDIO_DBG_DTO_CNTL__VI = 0x5446; +constexpr unsigned int mmDIG6_AFMT_AUDIO_INFO0__VI = 0x5436; +constexpr unsigned int mmDIG6_AFMT_AUDIO_INFO1__VI = 0x5437; +constexpr unsigned int mmDIG6_AFMT_AUDIO_PACKET_CONTROL__VI = 0x5442; +constexpr unsigned int mmDIG6_AFMT_AUDIO_PACKET_CONTROL2__VI = 0x5414; +constexpr unsigned int mmDIG6_AFMT_AUDIO_SRC_CONTROL__VI = 0x5445; +constexpr unsigned int mmDIG6_AFMT_AVI_INFO0__VI = 0x541E; +constexpr unsigned int mmDIG6_AFMT_AVI_INFO1__VI = 0x541F; +constexpr unsigned int mmDIG6_AFMT_AVI_INFO2__VI = 0x5420; +constexpr unsigned int mmDIG6_AFMT_AVI_INFO3__VI = 0x5421; +constexpr unsigned int mmDIG6_AFMT_GENERIC_0__VI = 0x5425; +constexpr unsigned int mmDIG6_AFMT_GENERIC_1__VI = 0x5426; +constexpr unsigned int mmDIG6_AFMT_GENERIC_2__VI = 0x5427; +constexpr unsigned int mmDIG6_AFMT_GENERIC_3__VI = 0x5428; +constexpr unsigned int mmDIG6_AFMT_GENERIC_4__VI = 0x5429; +constexpr unsigned int mmDIG6_AFMT_GENERIC_5__VI = 0x542A; +constexpr unsigned int mmDIG6_AFMT_GENERIC_6__VI = 0x542B; +constexpr unsigned int mmDIG6_AFMT_GENERIC_7__VI = 0x542C; +constexpr unsigned int mmDIG6_AFMT_GENERIC_HDR__VI = 0x5424; +constexpr unsigned int mmDIG6_AFMT_INFOFRAME_CONTROL0__VI = 0x5444; +constexpr unsigned int mmDIG6_AFMT_ISRC1_0__VI = 0x5415; +constexpr unsigned int mmDIG6_AFMT_ISRC1_1__VI = 0x5416; +constexpr unsigned int mmDIG6_AFMT_ISRC1_2__VI = 0x5417; +constexpr unsigned int mmDIG6_AFMT_ISRC1_3__VI = 0x5418; +constexpr unsigned int mmDIG6_AFMT_ISRC1_4__VI = 0x5419; +constexpr unsigned int mmDIG6_AFMT_ISRC2_0__VI = 0x541A; +constexpr unsigned int mmDIG6_AFMT_ISRC2_1__VI = 0x541B; +constexpr unsigned int mmDIG6_AFMT_ISRC2_2__VI = 0x541C; +constexpr unsigned int mmDIG6_AFMT_ISRC2_3__VI = 0x541D; +constexpr unsigned int mmDIG6_AFMT_MPEG_INFO0__VI = 0x5422; +constexpr unsigned int mmDIG6_AFMT_MPEG_INFO1__VI = 0x5423; +constexpr unsigned int mmDIG6_AFMT_RAMP_CONTROL0__VI = 0x543B; +constexpr unsigned int mmDIG6_AFMT_RAMP_CONTROL1__VI = 0x543C; +constexpr unsigned int mmDIG6_AFMT_RAMP_CONTROL2__VI = 0x543D; +constexpr unsigned int mmDIG6_AFMT_RAMP_CONTROL3__VI = 0x543E; +constexpr unsigned int mmDIG6_AFMT_STATUS__VI = 0x5441; +constexpr unsigned int mmDIG6_AFMT_VBI_PACKET_CONTROL__VI = 0x5443; +constexpr unsigned int mmDIG6_DIG_BE_CNTL__VI = 0x5447; +constexpr unsigned int mmDIG6_DIG_BE_EN_CNTL__VI = 0x5448; +constexpr unsigned int mmDIG6_DIG_CLOCK_PATTERN__VI = 0x5403; +constexpr unsigned int mmDIG6_DIG_DISPCLK_SWITCH_CNTL__VI = 0x5407; +constexpr unsigned int mmDIG6_DIG_DISPCLK_SWITCH_STATUS__VI = 0x5408; +constexpr unsigned int mmDIG6_DIG_FE_CNTL__VI = 0x5400; +constexpr unsigned int mmDIG6_DIG_FE_TEST_DEBUG_DATA__VI = 0x547D; +constexpr unsigned int mmDIG6_DIG_FE_TEST_DEBUG_INDEX__VI = 0x547C; +constexpr unsigned int mmDIG6_DIG_FIFO_STATUS__VI = 0x5406; +constexpr unsigned int mmDIG6_DIG_LANE_ENABLE__VI = 0x5479; +constexpr unsigned int mmDIG6_DIG_OUTPUT_CRC_CNTL__VI = 0x5401; +constexpr unsigned int mmDIG6_DIG_OUTPUT_CRC_RESULT__VI = 0x5402; +constexpr unsigned int mmDIG6_DIG_RANDOM_PATTERN_SEED__VI = 0x5405; +constexpr unsigned int mmDIG6_DIG_TEST_DEBUG_DATA__VI = 0x547B; +constexpr unsigned int mmDIG6_DIG_TEST_DEBUG_INDEX__VI = 0x547A; +constexpr unsigned int mmDIG6_DIG_TEST_PATTERN__VI = 0x5404; +constexpr unsigned int mmDIG6_HDMI_ACR_32_0__VI = 0x542E; +constexpr unsigned int mmDIG6_HDMI_ACR_32_1__VI = 0x542F; +constexpr unsigned int mmDIG6_HDMI_ACR_44_0__VI = 0x5430; +constexpr unsigned int mmDIG6_HDMI_ACR_44_1__VI = 0x5431; +constexpr unsigned int mmDIG6_HDMI_ACR_48_0__VI = 0x5432; +constexpr unsigned int mmDIG6_HDMI_ACR_48_1__VI = 0x5433; +constexpr unsigned int mmDIG6_HDMI_ACR_PACKET_CONTROL__VI = 0x540C; +constexpr unsigned int mmDIG6_HDMI_ACR_STATUS_0__VI = 0x5434; +constexpr unsigned int mmDIG6_HDMI_ACR_STATUS_1__VI = 0x5435; +constexpr unsigned int mmDIG6_HDMI_AUDIO_PACKET_CONTROL__VI = 0x540B; +constexpr unsigned int mmDIG6_HDMI_CONTROL__VI = 0x5409; +constexpr unsigned int mmDIG6_HDMI_GC__VI = 0x5413; +constexpr unsigned int mmDIG6_HDMI_GENERIC_PACKET_CONTROL0__VI = 0x5410; +constexpr unsigned int mmDIG6_HDMI_GENERIC_PACKET_CONTROL1__VI = 0x542D; +constexpr unsigned int mmDIG6_HDMI_INFOFRAME_CONTROL0__VI = 0x540E; +constexpr unsigned int mmDIG6_HDMI_INFOFRAME_CONTROL1__VI = 0x540F; +constexpr unsigned int mmDIG6_HDMI_STATUS__VI = 0x540A; +constexpr unsigned int mmDIG6_HDMI_VBI_PACKET_CONTROL__VI = 0x540D; +constexpr unsigned int mmDIG6_LVDS_DATA_CNTL__VI = 0x5478; +constexpr unsigned int mmDIG6_TMDS_CNTL__VI = 0x546B; +constexpr unsigned int mmDIG6_TMDS_CONTROL0_FEEDBACK__VI = 0x546D; +constexpr unsigned int mmDIG6_TMDS_CONTROL_CHAR__VI = 0x546C; +constexpr unsigned int mmDIG6_TMDS_CTL0_1_GEN_CNTL__VI = 0x5475; +constexpr unsigned int mmDIG6_TMDS_CTL2_3_GEN_CNTL__VI = 0x5476; +constexpr unsigned int mmDIG6_TMDS_CTL_BITS__VI = 0x5472; +constexpr unsigned int mmDIG6_TMDS_DCBALANCER_CONTROL__VI = 0x5473; +constexpr unsigned int mmDIG6_TMDS_DEBUG__VI = 0x5471; +constexpr unsigned int mmDIG6_TMDS_STEREOSYNC_CTL_SEL__VI = 0x546E; +constexpr unsigned int mmDIG6_TMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x546F; +constexpr unsigned int mmDIG6_TMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x5470; +constexpr unsigned int mmDIG_BE_CNTL__VI = 0x4A47; +constexpr unsigned int mmDIG_BE_EN_CNTL__VI = 0x4A48; +constexpr unsigned int mmDIG_CLOCK_PATTERN__VI = 0x4A03; +constexpr unsigned int mmDIG_DISPCLK_SWITCH_CNTL__VI = 0x4A07; +constexpr unsigned int mmDIG_DISPCLK_SWITCH_STATUS__VI = 0x4A08; +constexpr unsigned int mmDIG_FE_CNTL__VI = 0x4A00; +constexpr unsigned int mmDIG_FE_TEST_DEBUG_DATA__VI = 0x4A7D; +constexpr unsigned int mmDIG_FE_TEST_DEBUG_INDEX__VI = 0x4A7C; +constexpr unsigned int mmDIG_FIFO_STATUS__VI = 0x4A06; +constexpr unsigned int mmDIG_LANE_ENABLE__VI = 0x4A79; +constexpr unsigned int mmDIG_OUTPUT_CRC_CNTL__VI = 0x4A01; +constexpr unsigned int mmDIG_OUTPUT_CRC_RESULT__VI = 0x4A02; +constexpr unsigned int mmDIG_RANDOM_PATTERN_SEED__VI = 0x4A05; +constexpr unsigned int mmDIG_SOFT_RESET__VI = 0x1872; +constexpr unsigned int mmDIG_TEST_DEBUG_DATA__VI = 0x4A7B; +constexpr unsigned int mmDIG_TEST_DEBUG_INDEX__VI = 0x4A7A; +constexpr unsigned int mmDIG_TEST_PATTERN__VI = 0x4A04; +constexpr unsigned int mmDISPCLK_CGTT_BLK_CTRL_REG__VI = 0x0135; +constexpr unsigned int mmDISPCLK_FREQ_CHANGE_CNTL__VI = 0x0131; +constexpr unsigned int mmDISPPLL_BG_CNTL__VI = 0x171E; +constexpr unsigned int mmDISP_INTERRUPT_STATUS__VI = 0x1857; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE__VI = 0x1858; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE2__VI = 0x1859; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE3__VI = 0x185A; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE4__VI = 0x185B; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE5__VI = 0x185C; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE6__VI = 0x185D; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE7__VI = 0x185E; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE8__VI = 0x185F; +constexpr unsigned int mmDISP_INTERRUPT_STATUS_CONTINUE9__VI = 0x1860; +constexpr unsigned int mmDMCU_DPRX_INTERRUPT_STATUS1__VI = 0x1634; +constexpr unsigned int mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1__VI = 0x1635; +constexpr unsigned int mmDMCU_DPRX_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1__VI = 0x1636; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_STATUS1__VI = 0x1644; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_STATUS2__VI = 0x1645; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_STATUS3__VI = 0x1646; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_STATUS4__VI = 0x1647; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_STATUS5__VI = 0x1642; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK1__VI = 0x167C; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK2__VI = 0x167D; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK3__VI = 0x167E; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK4__VI = 0x167F; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK5__VI = 0x1633; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1__VI = 0x1674; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK2__VI = 0x1675; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK3__VI = 0x1676; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4__VI = 0x1677; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5__VI = 0x1643; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1__VI = 0x1678; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL2__VI = 0x1679; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL3__VI = 0x167A; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4__VI = 0x167B; +constexpr unsigned int mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL5__VI = 0x1673; +constexpr unsigned int mmDMCU_SMU_INTERRUPT_CNTL__VI = 0x012C; +constexpr unsigned int mmDMCU_SS_INTERRUPT_CNTL_STATUS__VI = 0x1613; +constexpr unsigned int mmDMCU_UC_CLK_GATING_CNTL__VI = 0x161B; +constexpr unsigned int mmDMIF_ADDR_CALC__VI = 0x0303; +constexpr unsigned int mmDMIF_ADDR_CONFIG__VI = 0x02F5; +constexpr unsigned int mmDMIF_PG0_DPG_HW_DEBUG_11__VI = 0x1B3D; +constexpr unsigned int mmDMIF_PG0_DPG_HW_DEBUG_A__VI = 0x1B3B; +constexpr unsigned int mmDMIF_PG0_DPG_HW_DEBUG_B__VI = 0x1B3C; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x1B30; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x1B31; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_DPM_CONTROL__VI = 0x1B34; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x1B36; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL__VI = 0x1B35; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x1B37; +constexpr unsigned int mmDMIF_PG0_DPG_PIPE_URGENCY_CONTROL__VI = 0x1B33; +constexpr unsigned int mmDMIF_PG0_DPG_REPEATER_PROGRAM__VI = 0x1B3A; +constexpr unsigned int mmDMIF_PG0_DPG_TEST_DEBUG_DATA__VI = 0x1B39; +constexpr unsigned int mmDMIF_PG0_DPG_TEST_DEBUG_INDEX__VI = 0x1B38; +constexpr unsigned int mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL__VI = 0x1B32; +constexpr unsigned int mmDMIF_PG1_DPG_HW_DEBUG_11__VI = 0x1D3D; +constexpr unsigned int mmDMIF_PG1_DPG_HW_DEBUG_A__VI = 0x1D3B; +constexpr unsigned int mmDMIF_PG1_DPG_HW_DEBUG_B__VI = 0x1D3C; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x1D30; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x1D31; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_DPM_CONTROL__VI = 0x1D34; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x1D36; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL__VI = 0x1D35; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x1D37; +constexpr unsigned int mmDMIF_PG1_DPG_PIPE_URGENCY_CONTROL__VI = 0x1D33; +constexpr unsigned int mmDMIF_PG1_DPG_REPEATER_PROGRAM__VI = 0x1D3A; +constexpr unsigned int mmDMIF_PG1_DPG_TEST_DEBUG_DATA__VI = 0x1D39; +constexpr unsigned int mmDMIF_PG1_DPG_TEST_DEBUG_INDEX__VI = 0x1D38; +constexpr unsigned int mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL__VI = 0x1D32; +constexpr unsigned int mmDMIF_PG2_DPG_HW_DEBUG_11__VI = 0x1F3D; +constexpr unsigned int mmDMIF_PG2_DPG_HW_DEBUG_A__VI = 0x1F3B; +constexpr unsigned int mmDMIF_PG2_DPG_HW_DEBUG_B__VI = 0x1F3C; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x1F30; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x1F31; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_DPM_CONTROL__VI = 0x1F34; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x1F36; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL__VI = 0x1F35; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x1F37; +constexpr unsigned int mmDMIF_PG2_DPG_PIPE_URGENCY_CONTROL__VI = 0x1F33; +constexpr unsigned int mmDMIF_PG2_DPG_REPEATER_PROGRAM__VI = 0x1F3A; +constexpr unsigned int mmDMIF_PG2_DPG_TEST_DEBUG_DATA__VI = 0x1F39; +constexpr unsigned int mmDMIF_PG2_DPG_TEST_DEBUG_INDEX__VI = 0x1F38; +constexpr unsigned int mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL__VI = 0x1F32; +constexpr unsigned int mmDMIF_PG3_DPG_HW_DEBUG_11__VI = 0x413D; +constexpr unsigned int mmDMIF_PG3_DPG_HW_DEBUG_A__VI = 0x413B; +constexpr unsigned int mmDMIF_PG3_DPG_HW_DEBUG_B__VI = 0x413C; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x4130; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x4131; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_DPM_CONTROL__VI = 0x4134; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x4136; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL__VI = 0x4135; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x4137; +constexpr unsigned int mmDMIF_PG3_DPG_PIPE_URGENCY_CONTROL__VI = 0x4133; +constexpr unsigned int mmDMIF_PG3_DPG_REPEATER_PROGRAM__VI = 0x413A; +constexpr unsigned int mmDMIF_PG3_DPG_TEST_DEBUG_DATA__VI = 0x4139; +constexpr unsigned int mmDMIF_PG3_DPG_TEST_DEBUG_INDEX__VI = 0x4138; +constexpr unsigned int mmDMIF_PG3_DPG_WATERMARK_MASK_CONTROL__VI = 0x4132; +constexpr unsigned int mmDMIF_PG4_DPG_HW_DEBUG_11__VI = 0x433D; +constexpr unsigned int mmDMIF_PG4_DPG_HW_DEBUG_A__VI = 0x433B; +constexpr unsigned int mmDMIF_PG4_DPG_HW_DEBUG_B__VI = 0x433C; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x4330; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x4331; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_DPM_CONTROL__VI = 0x4334; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x4336; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL__VI = 0x4335; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x4337; +constexpr unsigned int mmDMIF_PG4_DPG_PIPE_URGENCY_CONTROL__VI = 0x4333; +constexpr unsigned int mmDMIF_PG4_DPG_REPEATER_PROGRAM__VI = 0x433A; +constexpr unsigned int mmDMIF_PG4_DPG_TEST_DEBUG_DATA__VI = 0x4339; +constexpr unsigned int mmDMIF_PG4_DPG_TEST_DEBUG_INDEX__VI = 0x4338; +constexpr unsigned int mmDMIF_PG4_DPG_WATERMARK_MASK_CONTROL__VI = 0x4332; +constexpr unsigned int mmDMIF_PG5_DPG_HW_DEBUG_11__VI = 0x453D; +constexpr unsigned int mmDMIF_PG5_DPG_HW_DEBUG_A__VI = 0x453B; +constexpr unsigned int mmDMIF_PG5_DPG_HW_DEBUG_B__VI = 0x453C; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x4530; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x4531; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_DPM_CONTROL__VI = 0x4534; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x4536; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL__VI = 0x4535; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x4537; +constexpr unsigned int mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL__VI = 0x4533; +constexpr unsigned int mmDMIF_PG5_DPG_REPEATER_PROGRAM__VI = 0x453A; +constexpr unsigned int mmDMIF_PG5_DPG_TEST_DEBUG_DATA__VI = 0x4539; +constexpr unsigned int mmDMIF_PG5_DPG_TEST_DEBUG_INDEX__VI = 0x4538; +constexpr unsigned int mmDMIF_PG5_DPG_WATERMARK_MASK_CONTROL__VI = 0x4532; +constexpr unsigned int mmDMIF_PG6_DPG_HW_DEBUG_11__VI = 0x473D; +constexpr unsigned int mmDMIF_PG6_DPG_HW_DEBUG_A__VI = 0x473B; +constexpr unsigned int mmDMIF_PG6_DPG_HW_DEBUG_B__VI = 0x473C; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_ARBITRATION_CONTROL1__VI = 0x4730; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_ARBITRATION_CONTROL2__VI = 0x4731; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_DPM_CONTROL__VI = 0x4734; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x4736; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_STUTTER_CONTROL__VI = 0x4735; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x4737; +constexpr unsigned int mmDMIF_PG6_DPG_PIPE_URGENCY_CONTROL__VI = 0x4733; +constexpr unsigned int mmDMIF_PG6_DPG_REPEATER_PROGRAM__VI = 0x473A; +constexpr unsigned int mmDMIF_PG6_DPG_TEST_DEBUG_DATA__VI = 0x4739; +constexpr unsigned int mmDMIF_PG6_DPG_TEST_DEBUG_INDEX__VI = 0x4738; +constexpr unsigned int mmDMIF_PG6_DPG_WATERMARK_MASK_CONTROL__VI = 0x4732; +constexpr unsigned int mmDMIF_P_VMID__VI = 0x0300; +constexpr unsigned int mmDMIF_STATUS2__VI = 0x0304; +constexpr unsigned int mmDMIF_TEST_DEBUG_DATA__VI = 0x0302; +constexpr unsigned int mmDMIF_TEST_DEBUG_INDEX__VI = 0x0301; +constexpr unsigned int mmDMIF_URG_OVERRIDE__VI = 0x0329; +constexpr unsigned int mmDP0_DP_CONFIG__VI = 0x4AA3; +constexpr unsigned int mmDP0_DP_DPHY_8B10B_CNTL__VI = 0x4AB4; +constexpr unsigned int mmDP0_DP_DPHY_CNTL__VI = 0x4AAF; +constexpr unsigned int mmDP0_DP_DPHY_CRC_CNTL__VI = 0x4AB8; +constexpr unsigned int mmDP0_DP_DPHY_CRC_EN__VI = 0x4AB7; +constexpr unsigned int mmDP0_DP_DPHY_CRC_MST_CNTL__VI = 0x4ABA; +constexpr unsigned int mmDP0_DP_DPHY_CRC_MST_STATUS__VI = 0x4ABB; +constexpr unsigned int mmDP0_DP_DPHY_CRC_RESULT__VI = 0x4AB9; +constexpr unsigned int mmDP0_DP_DPHY_FAST_TRAINING__VI = 0x4ABC; +constexpr unsigned int mmDP0_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4ABD; +constexpr unsigned int mmDP0_DP_DPHY_PRBS_CNTL__VI = 0x4AB5; +constexpr unsigned int mmDP0_DP_DPHY_SYM0__VI = 0x4AB1; +constexpr unsigned int mmDP0_DP_DPHY_SYM1__VI = 0x4AB2; +constexpr unsigned int mmDP0_DP_DPHY_SYM2__VI = 0x4AB3; +constexpr unsigned int mmDP0_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4AB0; +constexpr unsigned int mmDP0_DP_FE_TEST_DEBUG_DATA__VI = 0x4ADB; +constexpr unsigned int mmDP0_DP_FE_TEST_DEBUG_INDEX__VI = 0x4ADA; +constexpr unsigned int mmDP0_DP_HBR2_EYE_PATTERN__VI = 0x4AAC; +constexpr unsigned int mmDP0_DP_LINK_CNTL__VI = 0x4AA0; +constexpr unsigned int mmDP0_DP_LINK_FRAMING_CNTL__VI = 0x4AAB; +constexpr unsigned int mmDP0_DP_MSA_COLORIMETRY__VI = 0x4AA2; +constexpr unsigned int mmDP0_DP_MSA_MISC__VI = 0x4AA6; +constexpr unsigned int mmDP0_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4ABE; +constexpr unsigned int mmDP0_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4ABF; +constexpr unsigned int mmDP0_DP_MSE_LINK_TIMING__VI = 0x4AD6; +constexpr unsigned int mmDP0_DP_MSE_MISC_CNTL__VI = 0x4AD7; +constexpr unsigned int mmDP0_DP_MSE_RATE_CNTL__VI = 0x4ACF; +constexpr unsigned int mmDP0_DP_MSE_RATE_UPDATE__VI = 0x4AD1; +constexpr unsigned int mmDP0_DP_MSE_SAT0__VI = 0x4AD2; +constexpr unsigned int mmDP0_DP_MSE_SAT1__VI = 0x4AD3; +constexpr unsigned int mmDP0_DP_MSE_SAT2__VI = 0x4AD4; +constexpr unsigned int mmDP0_DP_MSE_SAT_UPDATE__VI = 0x4AD5; +constexpr unsigned int mmDP0_DP_PIXEL_FORMAT__VI = 0x4AA1; +constexpr unsigned int mmDP0_DP_SEC_AUD_M__VI = 0x4ACB; +constexpr unsigned int mmDP0_DP_SEC_AUD_M_READBACK__VI = 0x4ACC; +constexpr unsigned int mmDP0_DP_SEC_AUD_N__VI = 0x4AC9; +constexpr unsigned int mmDP0_DP_SEC_AUD_N_READBACK__VI = 0x4ACA; +constexpr unsigned int mmDP0_DP_SEC_CNTL__VI = 0x4AC3; +constexpr unsigned int mmDP0_DP_SEC_CNTL1__VI = 0x4AC4; +constexpr unsigned int mmDP0_DP_SEC_FRAMING1__VI = 0x4AC5; +constexpr unsigned int mmDP0_DP_SEC_FRAMING2__VI = 0x4AC6; +constexpr unsigned int mmDP0_DP_SEC_FRAMING3__VI = 0x4AC7; +constexpr unsigned int mmDP0_DP_SEC_FRAMING4__VI = 0x4AC8; +constexpr unsigned int mmDP0_DP_SEC_PACKET_CNTL__VI = 0x4ACE; +constexpr unsigned int mmDP0_DP_SEC_TIMESTAMP__VI = 0x4ACD; +constexpr unsigned int mmDP0_DP_STEER_FIFO__VI = 0x4AA5; +constexpr unsigned int mmDP0_DP_TEST_DEBUG_DATA__VI = 0x4AD9; +constexpr unsigned int mmDP0_DP_TEST_DEBUG_INDEX__VI = 0x4AD8; +constexpr unsigned int mmDP0_DP_VID_INTERRUPT_CNTL__VI = 0x4AAE; +constexpr unsigned int mmDP0_DP_VID_M__VI = 0x4AAA; +constexpr unsigned int mmDP0_DP_VID_MSA_VBID__VI = 0x4AAD; +constexpr unsigned int mmDP0_DP_VID_N__VI = 0x4AA9; +constexpr unsigned int mmDP0_DP_VID_STREAM_CNTL__VI = 0x4AA4; +constexpr unsigned int mmDP0_DP_VID_TIMING__VI = 0x4AA8; +constexpr unsigned int mmDP1_DP_CONFIG__VI = 0x4BA3; +constexpr unsigned int mmDP1_DP_DPHY_8B10B_CNTL__VI = 0x4BB4; +constexpr unsigned int mmDP1_DP_DPHY_CNTL__VI = 0x4BAF; +constexpr unsigned int mmDP1_DP_DPHY_CRC_CNTL__VI = 0x4BB8; +constexpr unsigned int mmDP1_DP_DPHY_CRC_EN__VI = 0x4BB7; +constexpr unsigned int mmDP1_DP_DPHY_CRC_MST_CNTL__VI = 0x4BBA; +constexpr unsigned int mmDP1_DP_DPHY_CRC_MST_STATUS__VI = 0x4BBB; +constexpr unsigned int mmDP1_DP_DPHY_CRC_RESULT__VI = 0x4BB9; +constexpr unsigned int mmDP1_DP_DPHY_FAST_TRAINING__VI = 0x4BBC; +constexpr unsigned int mmDP1_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4BBD; +constexpr unsigned int mmDP1_DP_DPHY_PRBS_CNTL__VI = 0x4BB5; +constexpr unsigned int mmDP1_DP_DPHY_SYM0__VI = 0x4BB1; +constexpr unsigned int mmDP1_DP_DPHY_SYM1__VI = 0x4BB2; +constexpr unsigned int mmDP1_DP_DPHY_SYM2__VI = 0x4BB3; +constexpr unsigned int mmDP1_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4BB0; +constexpr unsigned int mmDP1_DP_FE_TEST_DEBUG_DATA__VI = 0x4BDB; +constexpr unsigned int mmDP1_DP_FE_TEST_DEBUG_INDEX__VI = 0x4BDA; +constexpr unsigned int mmDP1_DP_HBR2_EYE_PATTERN__VI = 0x4BAC; +constexpr unsigned int mmDP1_DP_LINK_CNTL__VI = 0x4BA0; +constexpr unsigned int mmDP1_DP_LINK_FRAMING_CNTL__VI = 0x4BAB; +constexpr unsigned int mmDP1_DP_MSA_COLORIMETRY__VI = 0x4BA2; +constexpr unsigned int mmDP1_DP_MSA_MISC__VI = 0x4BA6; +constexpr unsigned int mmDP1_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4BBE; +constexpr unsigned int mmDP1_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4BBF; +constexpr unsigned int mmDP1_DP_MSE_LINK_TIMING__VI = 0x4BD6; +constexpr unsigned int mmDP1_DP_MSE_MISC_CNTL__VI = 0x4BD7; +constexpr unsigned int mmDP1_DP_MSE_RATE_CNTL__VI = 0x4BCF; +constexpr unsigned int mmDP1_DP_MSE_RATE_UPDATE__VI = 0x4BD1; +constexpr unsigned int mmDP1_DP_MSE_SAT0__VI = 0x4BD2; +constexpr unsigned int mmDP1_DP_MSE_SAT1__VI = 0x4BD3; +constexpr unsigned int mmDP1_DP_MSE_SAT2__VI = 0x4BD4; +constexpr unsigned int mmDP1_DP_MSE_SAT_UPDATE__VI = 0x4BD5; +constexpr unsigned int mmDP1_DP_PIXEL_FORMAT__VI = 0x4BA1; +constexpr unsigned int mmDP1_DP_SEC_AUD_M__VI = 0x4BCB; +constexpr unsigned int mmDP1_DP_SEC_AUD_M_READBACK__VI = 0x4BCC; +constexpr unsigned int mmDP1_DP_SEC_AUD_N__VI = 0x4BC9; +constexpr unsigned int mmDP1_DP_SEC_AUD_N_READBACK__VI = 0x4BCA; +constexpr unsigned int mmDP1_DP_SEC_CNTL__VI = 0x4BC3; +constexpr unsigned int mmDP1_DP_SEC_CNTL1__VI = 0x4BC4; +constexpr unsigned int mmDP1_DP_SEC_FRAMING1__VI = 0x4BC5; +constexpr unsigned int mmDP1_DP_SEC_FRAMING2__VI = 0x4BC6; +constexpr unsigned int mmDP1_DP_SEC_FRAMING3__VI = 0x4BC7; +constexpr unsigned int mmDP1_DP_SEC_FRAMING4__VI = 0x4BC8; +constexpr unsigned int mmDP1_DP_SEC_PACKET_CNTL__VI = 0x4BCE; +constexpr unsigned int mmDP1_DP_SEC_TIMESTAMP__VI = 0x4BCD; +constexpr unsigned int mmDP1_DP_STEER_FIFO__VI = 0x4BA5; +constexpr unsigned int mmDP1_DP_TEST_DEBUG_DATA__VI = 0x4BD9; +constexpr unsigned int mmDP1_DP_TEST_DEBUG_INDEX__VI = 0x4BD8; +constexpr unsigned int mmDP1_DP_VID_INTERRUPT_CNTL__VI = 0x4BAE; +constexpr unsigned int mmDP1_DP_VID_M__VI = 0x4BAA; +constexpr unsigned int mmDP1_DP_VID_MSA_VBID__VI = 0x4BAD; +constexpr unsigned int mmDP1_DP_VID_N__VI = 0x4BA9; +constexpr unsigned int mmDP1_DP_VID_STREAM_CNTL__VI = 0x4BA4; +constexpr unsigned int mmDP1_DP_VID_TIMING__VI = 0x4BA8; +constexpr unsigned int mmDP2_DP_CONFIG__VI = 0x4CA3; +constexpr unsigned int mmDP2_DP_DPHY_8B10B_CNTL__VI = 0x4CB4; +constexpr unsigned int mmDP2_DP_DPHY_CNTL__VI = 0x4CAF; +constexpr unsigned int mmDP2_DP_DPHY_CRC_CNTL__VI = 0x4CB8; +constexpr unsigned int mmDP2_DP_DPHY_CRC_EN__VI = 0x4CB7; +constexpr unsigned int mmDP2_DP_DPHY_CRC_MST_CNTL__VI = 0x4CBA; +constexpr unsigned int mmDP2_DP_DPHY_CRC_MST_STATUS__VI = 0x4CBB; +constexpr unsigned int mmDP2_DP_DPHY_CRC_RESULT__VI = 0x4CB9; +constexpr unsigned int mmDP2_DP_DPHY_FAST_TRAINING__VI = 0x4CBC; +constexpr unsigned int mmDP2_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4CBD; +constexpr unsigned int mmDP2_DP_DPHY_PRBS_CNTL__VI = 0x4CB5; +constexpr unsigned int mmDP2_DP_DPHY_SYM0__VI = 0x4CB1; +constexpr unsigned int mmDP2_DP_DPHY_SYM1__VI = 0x4CB2; +constexpr unsigned int mmDP2_DP_DPHY_SYM2__VI = 0x4CB3; +constexpr unsigned int mmDP2_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4CB0; +constexpr unsigned int mmDP2_DP_FE_TEST_DEBUG_DATA__VI = 0x4CDB; +constexpr unsigned int mmDP2_DP_FE_TEST_DEBUG_INDEX__VI = 0x4CDA; +constexpr unsigned int mmDP2_DP_HBR2_EYE_PATTERN__VI = 0x4CAC; +constexpr unsigned int mmDP2_DP_LINK_CNTL__VI = 0x4CA0; +constexpr unsigned int mmDP2_DP_LINK_FRAMING_CNTL__VI = 0x4CAB; +constexpr unsigned int mmDP2_DP_MSA_COLORIMETRY__VI = 0x4CA2; +constexpr unsigned int mmDP2_DP_MSA_MISC__VI = 0x4CA6; +constexpr unsigned int mmDP2_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4CBE; +constexpr unsigned int mmDP2_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4CBF; +constexpr unsigned int mmDP2_DP_MSE_LINK_TIMING__VI = 0x4CD6; +constexpr unsigned int mmDP2_DP_MSE_MISC_CNTL__VI = 0x4CD7; +constexpr unsigned int mmDP2_DP_MSE_RATE_CNTL__VI = 0x4CCF; +constexpr unsigned int mmDP2_DP_MSE_RATE_UPDATE__VI = 0x4CD1; +constexpr unsigned int mmDP2_DP_MSE_SAT0__VI = 0x4CD2; +constexpr unsigned int mmDP2_DP_MSE_SAT1__VI = 0x4CD3; +constexpr unsigned int mmDP2_DP_MSE_SAT2__VI = 0x4CD4; +constexpr unsigned int mmDP2_DP_MSE_SAT_UPDATE__VI = 0x4CD5; +constexpr unsigned int mmDP2_DP_PIXEL_FORMAT__VI = 0x4CA1; +constexpr unsigned int mmDP2_DP_SEC_AUD_M__VI = 0x4CCB; +constexpr unsigned int mmDP2_DP_SEC_AUD_M_READBACK__VI = 0x4CCC; +constexpr unsigned int mmDP2_DP_SEC_AUD_N__VI = 0x4CC9; +constexpr unsigned int mmDP2_DP_SEC_AUD_N_READBACK__VI = 0x4CCA; +constexpr unsigned int mmDP2_DP_SEC_CNTL__VI = 0x4CC3; +constexpr unsigned int mmDP2_DP_SEC_CNTL1__VI = 0x4CC4; +constexpr unsigned int mmDP2_DP_SEC_FRAMING1__VI = 0x4CC5; +constexpr unsigned int mmDP2_DP_SEC_FRAMING2__VI = 0x4CC6; +constexpr unsigned int mmDP2_DP_SEC_FRAMING3__VI = 0x4CC7; +constexpr unsigned int mmDP2_DP_SEC_FRAMING4__VI = 0x4CC8; +constexpr unsigned int mmDP2_DP_SEC_PACKET_CNTL__VI = 0x4CCE; +constexpr unsigned int mmDP2_DP_SEC_TIMESTAMP__VI = 0x4CCD; +constexpr unsigned int mmDP2_DP_STEER_FIFO__VI = 0x4CA5; +constexpr unsigned int mmDP2_DP_TEST_DEBUG_DATA__VI = 0x4CD9; +constexpr unsigned int mmDP2_DP_TEST_DEBUG_INDEX__VI = 0x4CD8; +constexpr unsigned int mmDP2_DP_VID_INTERRUPT_CNTL__VI = 0x4CAE; +constexpr unsigned int mmDP2_DP_VID_M__VI = 0x4CAA; +constexpr unsigned int mmDP2_DP_VID_MSA_VBID__VI = 0x4CAD; +constexpr unsigned int mmDP2_DP_VID_N__VI = 0x4CA9; +constexpr unsigned int mmDP2_DP_VID_STREAM_CNTL__VI = 0x4CA4; +constexpr unsigned int mmDP2_DP_VID_TIMING__VI = 0x4CA8; +constexpr unsigned int mmDP3_DP_CONFIG__VI = 0x4DA3; +constexpr unsigned int mmDP3_DP_DPHY_8B10B_CNTL__VI = 0x4DB4; +constexpr unsigned int mmDP3_DP_DPHY_CNTL__VI = 0x4DAF; +constexpr unsigned int mmDP3_DP_DPHY_CRC_CNTL__VI = 0x4DB8; +constexpr unsigned int mmDP3_DP_DPHY_CRC_EN__VI = 0x4DB7; +constexpr unsigned int mmDP3_DP_DPHY_CRC_MST_CNTL__VI = 0x4DBA; +constexpr unsigned int mmDP3_DP_DPHY_CRC_MST_STATUS__VI = 0x4DBB; +constexpr unsigned int mmDP3_DP_DPHY_CRC_RESULT__VI = 0x4DB9; +constexpr unsigned int mmDP3_DP_DPHY_FAST_TRAINING__VI = 0x4DBC; +constexpr unsigned int mmDP3_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4DBD; +constexpr unsigned int mmDP3_DP_DPHY_PRBS_CNTL__VI = 0x4DB5; +constexpr unsigned int mmDP3_DP_DPHY_SYM0__VI = 0x4DB1; +constexpr unsigned int mmDP3_DP_DPHY_SYM1__VI = 0x4DB2; +constexpr unsigned int mmDP3_DP_DPHY_SYM2__VI = 0x4DB3; +constexpr unsigned int mmDP3_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4DB0; +constexpr unsigned int mmDP3_DP_FE_TEST_DEBUG_DATA__VI = 0x4DDB; +constexpr unsigned int mmDP3_DP_FE_TEST_DEBUG_INDEX__VI = 0x4DDA; +constexpr unsigned int mmDP3_DP_HBR2_EYE_PATTERN__VI = 0x4DAC; +constexpr unsigned int mmDP3_DP_LINK_CNTL__VI = 0x4DA0; +constexpr unsigned int mmDP3_DP_LINK_FRAMING_CNTL__VI = 0x4DAB; +constexpr unsigned int mmDP3_DP_MSA_COLORIMETRY__VI = 0x4DA2; +constexpr unsigned int mmDP3_DP_MSA_MISC__VI = 0x4DA6; +constexpr unsigned int mmDP3_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4DBE; +constexpr unsigned int mmDP3_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4DBF; +constexpr unsigned int mmDP3_DP_MSE_LINK_TIMING__VI = 0x4DD6; +constexpr unsigned int mmDP3_DP_MSE_MISC_CNTL__VI = 0x4DD7; +constexpr unsigned int mmDP3_DP_MSE_RATE_CNTL__VI = 0x4DCF; +constexpr unsigned int mmDP3_DP_MSE_RATE_UPDATE__VI = 0x4DD1; +constexpr unsigned int mmDP3_DP_MSE_SAT0__VI = 0x4DD2; +constexpr unsigned int mmDP3_DP_MSE_SAT1__VI = 0x4DD3; +constexpr unsigned int mmDP3_DP_MSE_SAT2__VI = 0x4DD4; +constexpr unsigned int mmDP3_DP_MSE_SAT_UPDATE__VI = 0x4DD5; +constexpr unsigned int mmDP3_DP_PIXEL_FORMAT__VI = 0x4DA1; +constexpr unsigned int mmDP3_DP_SEC_AUD_M__VI = 0x4DCB; +constexpr unsigned int mmDP3_DP_SEC_AUD_M_READBACK__VI = 0x4DCC; +constexpr unsigned int mmDP3_DP_SEC_AUD_N__VI = 0x4DC9; +constexpr unsigned int mmDP3_DP_SEC_AUD_N_READBACK__VI = 0x4DCA; +constexpr unsigned int mmDP3_DP_SEC_CNTL__VI = 0x4DC3; +constexpr unsigned int mmDP3_DP_SEC_CNTL1__VI = 0x4DC4; +constexpr unsigned int mmDP3_DP_SEC_FRAMING1__VI = 0x4DC5; +constexpr unsigned int mmDP3_DP_SEC_FRAMING2__VI = 0x4DC6; +constexpr unsigned int mmDP3_DP_SEC_FRAMING3__VI = 0x4DC7; +constexpr unsigned int mmDP3_DP_SEC_FRAMING4__VI = 0x4DC8; +constexpr unsigned int mmDP3_DP_SEC_PACKET_CNTL__VI = 0x4DCE; +constexpr unsigned int mmDP3_DP_SEC_TIMESTAMP__VI = 0x4DCD; +constexpr unsigned int mmDP3_DP_STEER_FIFO__VI = 0x4DA5; +constexpr unsigned int mmDP3_DP_TEST_DEBUG_DATA__VI = 0x4DD9; +constexpr unsigned int mmDP3_DP_TEST_DEBUG_INDEX__VI = 0x4DD8; +constexpr unsigned int mmDP3_DP_VID_INTERRUPT_CNTL__VI = 0x4DAE; +constexpr unsigned int mmDP3_DP_VID_M__VI = 0x4DAA; +constexpr unsigned int mmDP3_DP_VID_MSA_VBID__VI = 0x4DAD; +constexpr unsigned int mmDP3_DP_VID_N__VI = 0x4DA9; +constexpr unsigned int mmDP3_DP_VID_STREAM_CNTL__VI = 0x4DA4; +constexpr unsigned int mmDP3_DP_VID_TIMING__VI = 0x4DA8; +constexpr unsigned int mmDP4_DP_CONFIG__VI = 0x4EA3; +constexpr unsigned int mmDP4_DP_DPHY_8B10B_CNTL__VI = 0x4EB4; +constexpr unsigned int mmDP4_DP_DPHY_CNTL__VI = 0x4EAF; +constexpr unsigned int mmDP4_DP_DPHY_CRC_CNTL__VI = 0x4EB8; +constexpr unsigned int mmDP4_DP_DPHY_CRC_EN__VI = 0x4EB7; +constexpr unsigned int mmDP4_DP_DPHY_CRC_MST_CNTL__VI = 0x4EBA; +constexpr unsigned int mmDP4_DP_DPHY_CRC_MST_STATUS__VI = 0x4EBB; +constexpr unsigned int mmDP4_DP_DPHY_CRC_RESULT__VI = 0x4EB9; +constexpr unsigned int mmDP4_DP_DPHY_FAST_TRAINING__VI = 0x4EBC; +constexpr unsigned int mmDP4_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4EBD; +constexpr unsigned int mmDP4_DP_DPHY_PRBS_CNTL__VI = 0x4EB5; +constexpr unsigned int mmDP4_DP_DPHY_SYM0__VI = 0x4EB1; +constexpr unsigned int mmDP4_DP_DPHY_SYM1__VI = 0x4EB2; +constexpr unsigned int mmDP4_DP_DPHY_SYM2__VI = 0x4EB3; +constexpr unsigned int mmDP4_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4EB0; +constexpr unsigned int mmDP4_DP_FE_TEST_DEBUG_DATA__VI = 0x4EDB; +constexpr unsigned int mmDP4_DP_FE_TEST_DEBUG_INDEX__VI = 0x4EDA; +constexpr unsigned int mmDP4_DP_HBR2_EYE_PATTERN__VI = 0x4EAC; +constexpr unsigned int mmDP4_DP_LINK_CNTL__VI = 0x4EA0; +constexpr unsigned int mmDP4_DP_LINK_FRAMING_CNTL__VI = 0x4EAB; +constexpr unsigned int mmDP4_DP_MSA_COLORIMETRY__VI = 0x4EA2; +constexpr unsigned int mmDP4_DP_MSA_MISC__VI = 0x4EA6; +constexpr unsigned int mmDP4_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4EBE; +constexpr unsigned int mmDP4_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4EBF; +constexpr unsigned int mmDP4_DP_MSE_LINK_TIMING__VI = 0x4ED6; +constexpr unsigned int mmDP4_DP_MSE_MISC_CNTL__VI = 0x4ED7; +constexpr unsigned int mmDP4_DP_MSE_RATE_CNTL__VI = 0x4ECF; +constexpr unsigned int mmDP4_DP_MSE_RATE_UPDATE__VI = 0x4ED1; +constexpr unsigned int mmDP4_DP_MSE_SAT0__VI = 0x4ED2; +constexpr unsigned int mmDP4_DP_MSE_SAT1__VI = 0x4ED3; +constexpr unsigned int mmDP4_DP_MSE_SAT2__VI = 0x4ED4; +constexpr unsigned int mmDP4_DP_MSE_SAT_UPDATE__VI = 0x4ED5; +constexpr unsigned int mmDP4_DP_PIXEL_FORMAT__VI = 0x4EA1; +constexpr unsigned int mmDP4_DP_SEC_AUD_M__VI = 0x4ECB; +constexpr unsigned int mmDP4_DP_SEC_AUD_M_READBACK__VI = 0x4ECC; +constexpr unsigned int mmDP4_DP_SEC_AUD_N__VI = 0x4EC9; +constexpr unsigned int mmDP4_DP_SEC_AUD_N_READBACK__VI = 0x4ECA; +constexpr unsigned int mmDP4_DP_SEC_CNTL__VI = 0x4EC3; +constexpr unsigned int mmDP4_DP_SEC_CNTL1__VI = 0x4EC4; +constexpr unsigned int mmDP4_DP_SEC_FRAMING1__VI = 0x4EC5; +constexpr unsigned int mmDP4_DP_SEC_FRAMING2__VI = 0x4EC6; +constexpr unsigned int mmDP4_DP_SEC_FRAMING3__VI = 0x4EC7; +constexpr unsigned int mmDP4_DP_SEC_FRAMING4__VI = 0x4EC8; +constexpr unsigned int mmDP4_DP_SEC_PACKET_CNTL__VI = 0x4ECE; +constexpr unsigned int mmDP4_DP_SEC_TIMESTAMP__VI = 0x4ECD; +constexpr unsigned int mmDP4_DP_STEER_FIFO__VI = 0x4EA5; +constexpr unsigned int mmDP4_DP_TEST_DEBUG_DATA__VI = 0x4ED9; +constexpr unsigned int mmDP4_DP_TEST_DEBUG_INDEX__VI = 0x4ED8; +constexpr unsigned int mmDP4_DP_VID_INTERRUPT_CNTL__VI = 0x4EAE; +constexpr unsigned int mmDP4_DP_VID_M__VI = 0x4EAA; +constexpr unsigned int mmDP4_DP_VID_MSA_VBID__VI = 0x4EAD; +constexpr unsigned int mmDP4_DP_VID_N__VI = 0x4EA9; +constexpr unsigned int mmDP4_DP_VID_STREAM_CNTL__VI = 0x4EA4; +constexpr unsigned int mmDP4_DP_VID_TIMING__VI = 0x4EA8; +constexpr unsigned int mmDP5_DP_CONFIG__VI = 0x4FA3; +constexpr unsigned int mmDP5_DP_DPHY_8B10B_CNTL__VI = 0x4FB4; +constexpr unsigned int mmDP5_DP_DPHY_CNTL__VI = 0x4FAF; +constexpr unsigned int mmDP5_DP_DPHY_CRC_CNTL__VI = 0x4FB8; +constexpr unsigned int mmDP5_DP_DPHY_CRC_EN__VI = 0x4FB7; +constexpr unsigned int mmDP5_DP_DPHY_CRC_MST_CNTL__VI = 0x4FBA; +constexpr unsigned int mmDP5_DP_DPHY_CRC_MST_STATUS__VI = 0x4FBB; +constexpr unsigned int mmDP5_DP_DPHY_CRC_RESULT__VI = 0x4FB9; +constexpr unsigned int mmDP5_DP_DPHY_FAST_TRAINING__VI = 0x4FBC; +constexpr unsigned int mmDP5_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x4FBD; +constexpr unsigned int mmDP5_DP_DPHY_PRBS_CNTL__VI = 0x4FB5; +constexpr unsigned int mmDP5_DP_DPHY_SYM0__VI = 0x4FB1; +constexpr unsigned int mmDP5_DP_DPHY_SYM1__VI = 0x4FB2; +constexpr unsigned int mmDP5_DP_DPHY_SYM2__VI = 0x4FB3; +constexpr unsigned int mmDP5_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4FB0; +constexpr unsigned int mmDP5_DP_FE_TEST_DEBUG_DATA__VI = 0x4FDB; +constexpr unsigned int mmDP5_DP_FE_TEST_DEBUG_INDEX__VI = 0x4FDA; +constexpr unsigned int mmDP5_DP_HBR2_EYE_PATTERN__VI = 0x4FAC; +constexpr unsigned int mmDP5_DP_LINK_CNTL__VI = 0x4FA0; +constexpr unsigned int mmDP5_DP_LINK_FRAMING_CNTL__VI = 0x4FAB; +constexpr unsigned int mmDP5_DP_MSA_COLORIMETRY__VI = 0x4FA2; +constexpr unsigned int mmDP5_DP_MSA_MISC__VI = 0x4FA6; +constexpr unsigned int mmDP5_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x4FBE; +constexpr unsigned int mmDP5_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x4FBF; +constexpr unsigned int mmDP5_DP_MSE_LINK_TIMING__VI = 0x4FD6; +constexpr unsigned int mmDP5_DP_MSE_MISC_CNTL__VI = 0x4FD7; +constexpr unsigned int mmDP5_DP_MSE_RATE_CNTL__VI = 0x4FCF; +constexpr unsigned int mmDP5_DP_MSE_RATE_UPDATE__VI = 0x4FD1; +constexpr unsigned int mmDP5_DP_MSE_SAT0__VI = 0x4FD2; +constexpr unsigned int mmDP5_DP_MSE_SAT1__VI = 0x4FD3; +constexpr unsigned int mmDP5_DP_MSE_SAT2__VI = 0x4FD4; +constexpr unsigned int mmDP5_DP_MSE_SAT_UPDATE__VI = 0x4FD5; +constexpr unsigned int mmDP5_DP_PIXEL_FORMAT__VI = 0x4FA1; +constexpr unsigned int mmDP5_DP_SEC_AUD_M__VI = 0x4FCB; +constexpr unsigned int mmDP5_DP_SEC_AUD_M_READBACK__VI = 0x4FCC; +constexpr unsigned int mmDP5_DP_SEC_AUD_N__VI = 0x4FC9; +constexpr unsigned int mmDP5_DP_SEC_AUD_N_READBACK__VI = 0x4FCA; +constexpr unsigned int mmDP5_DP_SEC_CNTL__VI = 0x4FC3; +constexpr unsigned int mmDP5_DP_SEC_CNTL1__VI = 0x4FC4; +constexpr unsigned int mmDP5_DP_SEC_FRAMING1__VI = 0x4FC5; +constexpr unsigned int mmDP5_DP_SEC_FRAMING2__VI = 0x4FC6; +constexpr unsigned int mmDP5_DP_SEC_FRAMING3__VI = 0x4FC7; +constexpr unsigned int mmDP5_DP_SEC_FRAMING4__VI = 0x4FC8; +constexpr unsigned int mmDP5_DP_SEC_PACKET_CNTL__VI = 0x4FCE; +constexpr unsigned int mmDP5_DP_SEC_TIMESTAMP__VI = 0x4FCD; +constexpr unsigned int mmDP5_DP_STEER_FIFO__VI = 0x4FA5; +constexpr unsigned int mmDP5_DP_TEST_DEBUG_DATA__VI = 0x4FD9; +constexpr unsigned int mmDP5_DP_TEST_DEBUG_INDEX__VI = 0x4FD8; +constexpr unsigned int mmDP5_DP_VID_INTERRUPT_CNTL__VI = 0x4FAE; +constexpr unsigned int mmDP5_DP_VID_M__VI = 0x4FAA; +constexpr unsigned int mmDP5_DP_VID_MSA_VBID__VI = 0x4FAD; +constexpr unsigned int mmDP5_DP_VID_N__VI = 0x4FA9; +constexpr unsigned int mmDP5_DP_VID_STREAM_CNTL__VI = 0x4FA4; +constexpr unsigned int mmDP5_DP_VID_TIMING__VI = 0x4FA8; +constexpr unsigned int mmDP6_DP_CONFIG__VI = 0x54A3; +constexpr unsigned int mmDP6_DP_DPHY_8B10B_CNTL__VI = 0x54B4; +constexpr unsigned int mmDP6_DP_DPHY_CNTL__VI = 0x54AF; +constexpr unsigned int mmDP6_DP_DPHY_CRC_CNTL__VI = 0x54B8; +constexpr unsigned int mmDP6_DP_DPHY_CRC_EN__VI = 0x54B7; +constexpr unsigned int mmDP6_DP_DPHY_CRC_MST_CNTL__VI = 0x54BA; +constexpr unsigned int mmDP6_DP_DPHY_CRC_MST_STATUS__VI = 0x54BB; +constexpr unsigned int mmDP6_DP_DPHY_CRC_RESULT__VI = 0x54B9; +constexpr unsigned int mmDP6_DP_DPHY_FAST_TRAINING__VI = 0x54BC; +constexpr unsigned int mmDP6_DP_DPHY_FAST_TRAINING_STATUS__VI = 0x54BD; +constexpr unsigned int mmDP6_DP_DPHY_PRBS_CNTL__VI = 0x54B5; +constexpr unsigned int mmDP6_DP_DPHY_SYM0__VI = 0x54B1; +constexpr unsigned int mmDP6_DP_DPHY_SYM1__VI = 0x54B2; +constexpr unsigned int mmDP6_DP_DPHY_SYM2__VI = 0x54B3; +constexpr unsigned int mmDP6_DP_DPHY_TRAINING_PATTERN_SEL__VI = 0x54B0; +constexpr unsigned int mmDP6_DP_FE_TEST_DEBUG_DATA__VI = 0x54DB; +constexpr unsigned int mmDP6_DP_FE_TEST_DEBUG_INDEX__VI = 0x54DA; +constexpr unsigned int mmDP6_DP_HBR2_EYE_PATTERN__VI = 0x54AC; +constexpr unsigned int mmDP6_DP_LINK_CNTL__VI = 0x54A0; +constexpr unsigned int mmDP6_DP_LINK_FRAMING_CNTL__VI = 0x54AB; +constexpr unsigned int mmDP6_DP_MSA_COLORIMETRY__VI = 0x54A2; +constexpr unsigned int mmDP6_DP_MSA_MISC__VI = 0x54A6; +constexpr unsigned int mmDP6_DP_MSA_V_TIMING_OVERRIDE1__VI = 0x54BE; +constexpr unsigned int mmDP6_DP_MSA_V_TIMING_OVERRIDE2__VI = 0x54BF; +constexpr unsigned int mmDP6_DP_MSE_LINK_TIMING__VI = 0x54D6; +constexpr unsigned int mmDP6_DP_MSE_MISC_CNTL__VI = 0x54D7; +constexpr unsigned int mmDP6_DP_MSE_RATE_CNTL__VI = 0x54CF; +constexpr unsigned int mmDP6_DP_MSE_RATE_UPDATE__VI = 0x54D1; +constexpr unsigned int mmDP6_DP_MSE_SAT0__VI = 0x54D2; +constexpr unsigned int mmDP6_DP_MSE_SAT1__VI = 0x54D3; +constexpr unsigned int mmDP6_DP_MSE_SAT2__VI = 0x54D4; +constexpr unsigned int mmDP6_DP_MSE_SAT_UPDATE__VI = 0x54D5; +constexpr unsigned int mmDP6_DP_PIXEL_FORMAT__VI = 0x54A1; +constexpr unsigned int mmDP6_DP_SEC_AUD_M__VI = 0x54CB; +constexpr unsigned int mmDP6_DP_SEC_AUD_M_READBACK__VI = 0x54CC; +constexpr unsigned int mmDP6_DP_SEC_AUD_N__VI = 0x54C9; +constexpr unsigned int mmDP6_DP_SEC_AUD_N_READBACK__VI = 0x54CA; +constexpr unsigned int mmDP6_DP_SEC_CNTL__VI = 0x54C3; +constexpr unsigned int mmDP6_DP_SEC_CNTL1__VI = 0x54C4; +constexpr unsigned int mmDP6_DP_SEC_FRAMING1__VI = 0x54C5; +constexpr unsigned int mmDP6_DP_SEC_FRAMING2__VI = 0x54C6; +constexpr unsigned int mmDP6_DP_SEC_FRAMING3__VI = 0x54C7; +constexpr unsigned int mmDP6_DP_SEC_FRAMING4__VI = 0x54C8; +constexpr unsigned int mmDP6_DP_SEC_PACKET_CNTL__VI = 0x54CE; +constexpr unsigned int mmDP6_DP_SEC_TIMESTAMP__VI = 0x54CD; +constexpr unsigned int mmDP6_DP_STEER_FIFO__VI = 0x54A5; +constexpr unsigned int mmDP6_DP_TEST_DEBUG_DATA__VI = 0x54D9; +constexpr unsigned int mmDP6_DP_TEST_DEBUG_INDEX__VI = 0x54D8; +constexpr unsigned int mmDP6_DP_VID_INTERRUPT_CNTL__VI = 0x54AE; +constexpr unsigned int mmDP6_DP_VID_M__VI = 0x54AA; +constexpr unsigned int mmDP6_DP_VID_MSA_VBID__VI = 0x54AD; +constexpr unsigned int mmDP6_DP_VID_N__VI = 0x54A9; +constexpr unsigned int mmDP6_DP_VID_STREAM_CNTL__VI = 0x54A4; +constexpr unsigned int mmDP6_DP_VID_TIMING__VI = 0x54A8; +constexpr unsigned int mmDPDBG_CLK_FORCE_CONTROL__VI = 0x010D; +constexpr unsigned int mmDPDBG_CNTL__VI = 0x1866; +constexpr unsigned int mmDPDBG_INTERRUPT__VI = 0x1867; +constexpr unsigned int mmDPG_HW_DEBUG_11__VI = 0x1B3D; +constexpr unsigned int mmDPG_HW_DEBUG_A__VI = 0x1B3B; +constexpr unsigned int mmDPG_HW_DEBUG_B__VI = 0x1B3C; +constexpr unsigned int mmDPG_PIPE_ARBITRATION_CONTROL1__VI = 0x1B30; +constexpr unsigned int mmDPG_PIPE_ARBITRATION_CONTROL2__VI = 0x1B31; +constexpr unsigned int mmDPG_PIPE_DPM_CONTROL__VI = 0x1B34; +constexpr unsigned int mmDPG_PIPE_NB_PSTATE_CHANGE_CONTROL__VI = 0x1B36; +constexpr unsigned int mmDPG_PIPE_STUTTER_CONTROL__VI = 0x1B35; +constexpr unsigned int mmDPG_PIPE_STUTTER_CONTROL_NONLPTCH__VI = 0x1B37; +constexpr unsigned int mmDPG_PIPE_URGENCY_CONTROL__VI = 0x1B33; +constexpr unsigned int mmDPG_REPEATER_PROGRAM__VI = 0x1B3A; +constexpr unsigned int mmDPG_TEST_DEBUG_DATA__VI = 0x1B39; +constexpr unsigned int mmDPG_TEST_DEBUG_INDEX__VI = 0x1B38; +constexpr unsigned int mmDPG_WATERMARK_MASK_CONTROL__VI = 0x1B32; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED0__VI = 0x5D98; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED1__VI = 0x5D99; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED10__VI = 0x5DA2; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED11__VI = 0x5DA3; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED12__VI = 0x5DA4; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED13__VI = 0x5DA5; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED14__VI = 0x5DA6; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED15__VI = 0x5DA7; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED16__VI = 0x5DA8; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED17__VI = 0x5DA9; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED18__VI = 0x5DAA; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED19__VI = 0x5DAB; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED2__VI = 0x5D9A; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED20__VI = 0x5DAC; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED21__VI = 0x5DAD; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED22__VI = 0x5DAE; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED23__VI = 0x5DAF; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED24__VI = 0x5DB0; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED25__VI = 0x5DB1; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED26__VI = 0x5DB2; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED27__VI = 0x5DB3; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED28__VI = 0x5DB4; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED29__VI = 0x5DB5; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED3__VI = 0x5D9B; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED30__VI = 0x5DB6; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED31__VI = 0x5DB7; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED32__VI = 0x5DB8; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED33__VI = 0x5DB9; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED34__VI = 0x5DBA; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED35__VI = 0x5DBB; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED36__VI = 0x5DBC; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED37__VI = 0x5DBD; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED38__VI = 0x5DBE; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED39__VI = 0x5DBF; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED4__VI = 0x5D9C; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED40__VI = 0x5DC0; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED41__VI = 0x5DC1; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED42__VI = 0x5DC2; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED43__VI = 0x5DC3; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED44__VI = 0x5DC4; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED45__VI = 0x5DC5; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED46__VI = 0x5DC6; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED47__VI = 0x5DC7; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED48__VI = 0x5DC8; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED49__VI = 0x5DC9; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED5__VI = 0x5D9D; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED50__VI = 0x5DCA; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED51__VI = 0x5DCB; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED52__VI = 0x5DCC; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED53__VI = 0x5DCD; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED54__VI = 0x5DCE; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED55__VI = 0x5DCF; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED56__VI = 0x5DD0; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED57__VI = 0x5DD1; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED58__VI = 0x5DD2; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED59__VI = 0x5DD3; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED6__VI = 0x5D9E; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED60__VI = 0x5DD4; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED61__VI = 0x5DD5; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED62__VI = 0x5DD6; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED63__VI = 0x5DD7; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED7__VI = 0x5D9F; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED8__VI = 0x5DA0; +constexpr unsigned int mmDPHY_MACRO_CNTL_RESERVED9__VI = 0x5DA1; +constexpr unsigned int mmDPREFCLK_CGTT_BLK_CTRL_REG__VI = 0x0108; +constexpr unsigned int mmDPREFCLK_CNTL__VI = 0x0118; +constexpr unsigned int mmDP_AUX0_AUX_ARB_CONTROL__VI = 0x5C02; +constexpr unsigned int mmDP_AUX0_AUX_CONTROL__VI = 0x5C00; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_CONTROL0__VI = 0x5C0A; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_CONTROL1__VI = 0x5C0B; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_RX_STATUS__VI = 0x5C0D; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_CONTROL__VI = 0x5C09; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C08; +constexpr unsigned int mmDP_AUX0_AUX_DPHY_TX_STATUS__VI = 0x5C0C; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_CONTROL__VI = 0x5C0E; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C10; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_DATA__VI = 0x5C12; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C0F; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C13; +constexpr unsigned int mmDP_AUX0_AUX_GTC_SYNC_STATUS__VI = 0x5C11; +constexpr unsigned int mmDP_AUX0_AUX_INTERRUPT_CONTROL__VI = 0x5C03; +constexpr unsigned int mmDP_AUX0_AUX_LS_DATA__VI = 0x5C07; +constexpr unsigned int mmDP_AUX0_AUX_LS_STATUS__VI = 0x5C05; +constexpr unsigned int mmDP_AUX0_AUX_SW_CONTROL__VI = 0x5C01; +constexpr unsigned int mmDP_AUX0_AUX_SW_DATA__VI = 0x5C06; +constexpr unsigned int mmDP_AUX0_AUX_SW_STATUS__VI = 0x5C04; +constexpr unsigned int mmDP_AUX0_AUX_TEST_DEBUG_DATA__VI = 0x5C15; +constexpr unsigned int mmDP_AUX0_AUX_TEST_DEBUG_INDEX__VI = 0x5C14; +constexpr unsigned int mmDP_AUX1_AUX_ARB_CONTROL__VI = 0x5C1E; +constexpr unsigned int mmDP_AUX1_AUX_CONTROL__VI = 0x5C1C; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_CONTROL0__VI = 0x5C26; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_CONTROL1__VI = 0x5C27; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_RX_STATUS__VI = 0x5C29; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_CONTROL__VI = 0x5C25; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C24; +constexpr unsigned int mmDP_AUX1_AUX_DPHY_TX_STATUS__VI = 0x5C28; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_CONTROL__VI = 0x5C2A; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C2C; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_DATA__VI = 0x5C2E; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C2B; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C2F; +constexpr unsigned int mmDP_AUX1_AUX_GTC_SYNC_STATUS__VI = 0x5C2D; +constexpr unsigned int mmDP_AUX1_AUX_INTERRUPT_CONTROL__VI = 0x5C1F; +constexpr unsigned int mmDP_AUX1_AUX_LS_DATA__VI = 0x5C23; +constexpr unsigned int mmDP_AUX1_AUX_LS_STATUS__VI = 0x5C21; +constexpr unsigned int mmDP_AUX1_AUX_SW_CONTROL__VI = 0x5C1D; +constexpr unsigned int mmDP_AUX1_AUX_SW_DATA__VI = 0x5C22; +constexpr unsigned int mmDP_AUX1_AUX_SW_STATUS__VI = 0x5C20; +constexpr unsigned int mmDP_AUX1_AUX_TEST_DEBUG_DATA__VI = 0x5C31; +constexpr unsigned int mmDP_AUX1_AUX_TEST_DEBUG_INDEX__VI = 0x5C30; +constexpr unsigned int mmDP_AUX2_AUX_ARB_CONTROL__VI = 0x5C3A; +constexpr unsigned int mmDP_AUX2_AUX_CONTROL__VI = 0x5C38; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_CONTROL0__VI = 0x5C42; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_CONTROL1__VI = 0x5C43; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_RX_STATUS__VI = 0x5C45; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_CONTROL__VI = 0x5C41; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C40; +constexpr unsigned int mmDP_AUX2_AUX_DPHY_TX_STATUS__VI = 0x5C44; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_CONTROL__VI = 0x5C46; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C48; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_DATA__VI = 0x5C4A; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C47; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C4B; +constexpr unsigned int mmDP_AUX2_AUX_GTC_SYNC_STATUS__VI = 0x5C49; +constexpr unsigned int mmDP_AUX2_AUX_INTERRUPT_CONTROL__VI = 0x5C3B; +constexpr unsigned int mmDP_AUX2_AUX_LS_DATA__VI = 0x5C3F; +constexpr unsigned int mmDP_AUX2_AUX_LS_STATUS__VI = 0x5C3D; +constexpr unsigned int mmDP_AUX2_AUX_SW_CONTROL__VI = 0x5C39; +constexpr unsigned int mmDP_AUX2_AUX_SW_DATA__VI = 0x5C3E; +constexpr unsigned int mmDP_AUX2_AUX_SW_STATUS__VI = 0x5C3C; +constexpr unsigned int mmDP_AUX2_AUX_TEST_DEBUG_DATA__VI = 0x5C4D; +constexpr unsigned int mmDP_AUX2_AUX_TEST_DEBUG_INDEX__VI = 0x5C4C; +constexpr unsigned int mmDP_AUX3_AUX_ARB_CONTROL__VI = 0x5C56; +constexpr unsigned int mmDP_AUX3_AUX_CONTROL__VI = 0x5C54; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_CONTROL0__VI = 0x5C5E; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_CONTROL1__VI = 0x5C5F; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_RX_STATUS__VI = 0x5C61; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_CONTROL__VI = 0x5C5D; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C5C; +constexpr unsigned int mmDP_AUX3_AUX_DPHY_TX_STATUS__VI = 0x5C60; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_CONTROL__VI = 0x5C62; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C64; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_DATA__VI = 0x5C66; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C63; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C67; +constexpr unsigned int mmDP_AUX3_AUX_GTC_SYNC_STATUS__VI = 0x5C65; +constexpr unsigned int mmDP_AUX3_AUX_INTERRUPT_CONTROL__VI = 0x5C57; +constexpr unsigned int mmDP_AUX3_AUX_LS_DATA__VI = 0x5C5B; +constexpr unsigned int mmDP_AUX3_AUX_LS_STATUS__VI = 0x5C59; +constexpr unsigned int mmDP_AUX3_AUX_SW_CONTROL__VI = 0x5C55; +constexpr unsigned int mmDP_AUX3_AUX_SW_DATA__VI = 0x5C5A; +constexpr unsigned int mmDP_AUX3_AUX_SW_STATUS__VI = 0x5C58; +constexpr unsigned int mmDP_AUX3_AUX_TEST_DEBUG_DATA__VI = 0x5C69; +constexpr unsigned int mmDP_AUX3_AUX_TEST_DEBUG_INDEX__VI = 0x5C68; +constexpr unsigned int mmDP_AUX4_AUX_ARB_CONTROL__VI = 0x5C72; +constexpr unsigned int mmDP_AUX4_AUX_CONTROL__VI = 0x5C70; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_CONTROL0__VI = 0x5C7A; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_CONTROL1__VI = 0x5C7B; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_RX_STATUS__VI = 0x5C7D; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_CONTROL__VI = 0x5C79; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C78; +constexpr unsigned int mmDP_AUX4_AUX_DPHY_TX_STATUS__VI = 0x5C7C; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_CONTROL__VI = 0x5C7E; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C80; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_DATA__VI = 0x5C82; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C7F; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C83; +constexpr unsigned int mmDP_AUX4_AUX_GTC_SYNC_STATUS__VI = 0x5C81; +constexpr unsigned int mmDP_AUX4_AUX_INTERRUPT_CONTROL__VI = 0x5C73; +constexpr unsigned int mmDP_AUX4_AUX_LS_DATA__VI = 0x5C77; +constexpr unsigned int mmDP_AUX4_AUX_LS_STATUS__VI = 0x5C75; +constexpr unsigned int mmDP_AUX4_AUX_SW_CONTROL__VI = 0x5C71; +constexpr unsigned int mmDP_AUX4_AUX_SW_DATA__VI = 0x5C76; +constexpr unsigned int mmDP_AUX4_AUX_SW_STATUS__VI = 0x5C74; +constexpr unsigned int mmDP_AUX4_AUX_TEST_DEBUG_DATA__VI = 0x5C85; +constexpr unsigned int mmDP_AUX4_AUX_TEST_DEBUG_INDEX__VI = 0x5C84; +constexpr unsigned int mmDP_AUX5_AUX_ARB_CONTROL__VI = 0x5C8E; +constexpr unsigned int mmDP_AUX5_AUX_CONTROL__VI = 0x5C8C; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_CONTROL0__VI = 0x5C96; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_CONTROL1__VI = 0x5C97; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_RX_STATUS__VI = 0x5C99; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_CONTROL__VI = 0x5C95; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_REF_CONTROL__VI = 0x5C94; +constexpr unsigned int mmDP_AUX5_AUX_DPHY_TX_STATUS__VI = 0x5C98; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_CONTROL__VI = 0x5C9A; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_CONTROLLER_STATUS__VI = 0x5C9C; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_DATA__VI = 0x5C9E; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_ERROR_CONTROL__VI = 0x5C9B; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_PHASE_OFFSET_OVERRIDE__VI = 0x5C9F; +constexpr unsigned int mmDP_AUX5_AUX_GTC_SYNC_STATUS__VI = 0x5C9D; +constexpr unsigned int mmDP_AUX5_AUX_INTERRUPT_CONTROL__VI = 0x5C8F; +constexpr unsigned int mmDP_AUX5_AUX_LS_DATA__VI = 0x5C93; +constexpr unsigned int mmDP_AUX5_AUX_LS_STATUS__VI = 0x5C91; +constexpr unsigned int mmDP_AUX5_AUX_SW_CONTROL__VI = 0x5C8D; +constexpr unsigned int mmDP_AUX5_AUX_SW_DATA__VI = 0x5C92; +constexpr unsigned int mmDP_AUX5_AUX_SW_STATUS__VI = 0x5C90; +constexpr unsigned int mmDP_AUX5_AUX_TEST_DEBUG_DATA__VI = 0x5CA1; +constexpr unsigned int mmDP_AUX5_AUX_TEST_DEBUG_INDEX__VI = 0x5CA0; +constexpr unsigned int mmDP_CONFIG__VI = 0x4AA3; +constexpr unsigned int mmDP_DPHY_8B10B_CNTL__VI = 0x4AB4; +constexpr unsigned int mmDP_DPHY_CNTL__VI = 0x4AAF; +constexpr unsigned int mmDP_DPHY_CRC_CNTL__VI = 0x4AB8; +constexpr unsigned int mmDP_DPHY_CRC_EN__VI = 0x4AB7; +constexpr unsigned int mmDP_DPHY_CRC_MST_CNTL__VI = 0x4ABA; +constexpr unsigned int mmDP_DPHY_CRC_MST_STATUS__VI = 0x4ABB; +constexpr unsigned int mmDP_DPHY_CRC_RESULT__VI = 0x4AB9; +constexpr unsigned int mmDP_DPHY_FAST_TRAINING__VI = 0x4ABC; +constexpr unsigned int mmDP_DPHY_FAST_TRAINING_STATUS__VI = 0x4ABD; +constexpr unsigned int mmDP_DPHY_PRBS_CNTL__VI = 0x4AB5; +constexpr unsigned int mmDP_DPHY_SYM0__VI = 0x4AB1; +constexpr unsigned int mmDP_DPHY_SYM1__VI = 0x4AB2; +constexpr unsigned int mmDP_DPHY_SYM2__VI = 0x4AB3; +constexpr unsigned int mmDP_DPHY_TRAINING_PATTERN_SEL__VI = 0x4AB0; +constexpr unsigned int mmDP_DTO0_MODULO__VI = 0x0142; +constexpr unsigned int mmDP_DTO0_PHASE__VI = 0x0141; +constexpr unsigned int mmDP_DTO1_MODULO__VI = 0x0146; +constexpr unsigned int mmDP_DTO1_PHASE__VI = 0x0145; +constexpr unsigned int mmDP_DTO2_MODULO__VI = 0x014A; +constexpr unsigned int mmDP_DTO2_PHASE__VI = 0x0149; +constexpr unsigned int mmDP_DTO3_MODULO__VI = 0x014E; +constexpr unsigned int mmDP_DTO3_PHASE__VI = 0x014D; +constexpr unsigned int mmDP_DTO4_MODULO__VI = 0x0152; +constexpr unsigned int mmDP_DTO4_PHASE__VI = 0x0151; +constexpr unsigned int mmDP_DTO5_MODULO__VI = 0x0156; +constexpr unsigned int mmDP_DTO5_PHASE__VI = 0x0155; +constexpr unsigned int mmDP_FE_TEST_DEBUG_DATA__VI = 0x4ADB; +constexpr unsigned int mmDP_FE_TEST_DEBUG_INDEX__VI = 0x4ADA; +constexpr unsigned int mmDP_HBR2_EYE_PATTERN__VI = 0x4AAC; +constexpr unsigned int mmDP_LINK_CNTL__VI = 0x4AA0; +constexpr unsigned int mmDP_LINK_FRAMING_CNTL__VI = 0x4AAB; +constexpr unsigned int mmDP_MSA_COLORIMETRY__VI = 0x4AA2; +constexpr unsigned int mmDP_MSA_MISC__VI = 0x4AA6; +constexpr unsigned int mmDP_MSA_V_TIMING_OVERRIDE1__VI = 0x4ABE; +constexpr unsigned int mmDP_MSA_V_TIMING_OVERRIDE2__VI = 0x4ABF; +constexpr unsigned int mmDP_MSE_LINK_TIMING__VI = 0x4AD6; +constexpr unsigned int mmDP_MSE_MISC_CNTL__VI = 0x4AD7; +constexpr unsigned int mmDP_MSE_RATE_CNTL__VI = 0x4ACF; +constexpr unsigned int mmDP_MSE_RATE_UPDATE__VI = 0x4AD1; +constexpr unsigned int mmDP_MSE_SAT0__VI = 0x4AD2; +constexpr unsigned int mmDP_MSE_SAT1__VI = 0x4AD3; +constexpr unsigned int mmDP_MSE_SAT2__VI = 0x4AD4; +constexpr unsigned int mmDP_MSE_SAT_UPDATE__VI = 0x4AD5; +constexpr unsigned int mmDP_PIXEL_FORMAT__VI = 0x4AA1; +constexpr unsigned int mmDP_SEC_AUD_M__VI = 0x4ACB; +constexpr unsigned int mmDP_SEC_AUD_M_READBACK__VI = 0x4ACC; +constexpr unsigned int mmDP_SEC_AUD_N__VI = 0x4AC9; +constexpr unsigned int mmDP_SEC_AUD_N_READBACK__VI = 0x4ACA; +constexpr unsigned int mmDP_SEC_CNTL__VI = 0x4AC3; +constexpr unsigned int mmDP_SEC_CNTL1__VI = 0x4AC4; +constexpr unsigned int mmDP_SEC_FRAMING1__VI = 0x4AC5; +constexpr unsigned int mmDP_SEC_FRAMING2__VI = 0x4AC6; +constexpr unsigned int mmDP_SEC_FRAMING3__VI = 0x4AC7; +constexpr unsigned int mmDP_SEC_FRAMING4__VI = 0x4AC8; +constexpr unsigned int mmDP_SEC_PACKET_CNTL__VI = 0x4ACE; +constexpr unsigned int mmDP_SEC_TIMESTAMP__VI = 0x4ACD; +constexpr unsigned int mmDP_STEER_FIFO__VI = 0x4AA5; +constexpr unsigned int mmDP_TEST_DEBUG_DATA__VI = 0x4AD9; +constexpr unsigned int mmDP_TEST_DEBUG_INDEX__VI = 0x4AD8; +constexpr unsigned int mmDP_VID_INTERRUPT_CNTL__VI = 0x4AAE; +constexpr unsigned int mmDP_VID_M__VI = 0x4AAA; +constexpr unsigned int mmDP_VID_MSA_VBID__VI = 0x4AAD; +constexpr unsigned int mmDP_VID_N__VI = 0x4AA9; +constexpr unsigned int mmDP_VID_STREAM_CNTL__VI = 0x4AA4; +constexpr unsigned int mmDP_VID_TIMING__VI = 0x4AA8; +constexpr unsigned int mmDVOACLKC_CNTL__VI = 0x016A; +constexpr unsigned int mmDVOACLKC_MVP_CNTL__VI = 0x0169; +constexpr unsigned int mmDVOACLKD_CNTL__VI = 0x0168; +constexpr unsigned int mmDVO_CLK_ENABLE__VI = 0x0129; +constexpr unsigned int mmDVO_CONTROL__VI = 0x16A3; +constexpr unsigned int mmDVO_CRC2_SIG_MASK__VI = 0x16A5; +constexpr unsigned int mmDVO_CRC2_SIG_RESULT__VI = 0x16A6; +constexpr unsigned int mmDVO_CRC_EN__VI = 0x16A4; +constexpr unsigned int mmDVO_ENABLE__VI = 0x16A0; +constexpr unsigned int mmDVO_FIFO_ERROR_STATUS__VI = 0x16A7; +constexpr unsigned int mmDVO_OUTPUT__VI = 0x16A2; +constexpr unsigned int mmDVO_SKEW_ADJUST__VI = 0x489F; +constexpr unsigned int mmDVO_SOURCE_SELECT__VI = 0x16A1; +constexpr unsigned int mmDVO_STRENGTH_CONTROL__VI = 0x489D; +constexpr unsigned int mmDVO_TEST_DEBUG_DATA__VI = 0x16A9; +constexpr unsigned int mmDVO_TEST_DEBUG_INDEX__VI = 0x16A8; +constexpr unsigned int mmDVO_VREF_CONTROL__VI = 0x489E; +constexpr unsigned int mmFBC_CLIENT_REGION_MASK__VI = 0x029B; +constexpr unsigned int mmFBC_CNTL__VI = 0x0280; +constexpr unsigned int mmFBC_COMP_CNTL__VI = 0x0284; +constexpr unsigned int mmFBC_COMP_MODE__VI = 0x0285; +constexpr unsigned int mmFBC_CSM_REGION_OFFSET_01__VI = 0x0299; +constexpr unsigned int mmFBC_CSM_REGION_OFFSET_23__VI = 0x029A; +constexpr unsigned int mmFBC_DEBUG0__VI = 0x0286; +constexpr unsigned int mmFBC_DEBUG1__VI = 0x0287; +constexpr unsigned int mmFBC_DEBUG2__VI = 0x0288; +constexpr unsigned int mmFBC_DEBUG_COMP__VI = 0x029C; +constexpr unsigned int mmFBC_DEBUG_CSR__VI = 0x029D; +constexpr unsigned int mmFBC_DEBUG_CSR_RDATA__VI = 0x029E; +constexpr unsigned int mmFBC_DEBUG_CSR_RDATA_HI__VI = 0x02A0; +constexpr unsigned int mmFBC_DEBUG_CSR_WDATA__VI = 0x029F; +constexpr unsigned int mmFBC_DEBUG_CSR_WDATA_HI__VI = 0x02A1; +constexpr unsigned int mmFBC_IDLE_FORCE_CLEAR_MASK__VI = 0x0282; +constexpr unsigned int mmFBC_IDLE_MASK__VI = 0x0281; +constexpr unsigned int mmFBC_IND_LUT0__VI = 0x0289; +constexpr unsigned int mmFBC_IND_LUT1__VI = 0x028A; +constexpr unsigned int mmFBC_IND_LUT10__VI = 0x0293; +constexpr unsigned int mmFBC_IND_LUT11__VI = 0x0294; +constexpr unsigned int mmFBC_IND_LUT12__VI = 0x0295; +constexpr unsigned int mmFBC_IND_LUT13__VI = 0x0296; +constexpr unsigned int mmFBC_IND_LUT14__VI = 0x0297; +constexpr unsigned int mmFBC_IND_LUT15__VI = 0x0298; +constexpr unsigned int mmFBC_IND_LUT2__VI = 0x028B; +constexpr unsigned int mmFBC_IND_LUT3__VI = 0x028C; +constexpr unsigned int mmFBC_IND_LUT4__VI = 0x028D; +constexpr unsigned int mmFBC_IND_LUT5__VI = 0x028E; +constexpr unsigned int mmFBC_IND_LUT6__VI = 0x028F; +constexpr unsigned int mmFBC_IND_LUT7__VI = 0x0290; +constexpr unsigned int mmFBC_IND_LUT8__VI = 0x0291; +constexpr unsigned int mmFBC_IND_LUT9__VI = 0x0292; +constexpr unsigned int mmFBC_MISC__VI = 0x02A2; +constexpr unsigned int mmFBC_START_STOP_DELAY__VI = 0x0283; +constexpr unsigned int mmFBC_STATUS__VI = 0x02A3; +constexpr unsigned int mmFBC_TEST_DEBUG_DATA__VI = 0x02A5; +constexpr unsigned int mmFBC_TEST_DEBUG_INDEX__VI = 0x02A4; +constexpr unsigned int mmFMT0_FMT_CLAMP_COMPONENT_B__VI = 0x1BEA; +constexpr unsigned int mmFMT0_FMT_CLAMP_COMPONENT_G__VI = 0x1BE9; +constexpr unsigned int mmFMT0_FMT_CLAMP_COMPONENT_R__VI = 0x1BE8; +constexpr unsigned int mmFMT0_FMT_TEST_DEBUG_DATA__VI = 0x1BEC; +constexpr unsigned int mmFMT0_FMT_TEST_DEBUG_INDEX__VI = 0x1BEB; +constexpr unsigned int mmFMT1_FMT_BIT_DEPTH_CONTROL__VI = 0x1DF2; +constexpr unsigned int mmFMT1_FMT_CLAMP_CNTL__VI = 0x1DF9; +constexpr unsigned int mmFMT1_FMT_CLAMP_COMPONENT_B__VI = 0x1DEA; +constexpr unsigned int mmFMT1_FMT_CLAMP_COMPONENT_G__VI = 0x1DE9; +constexpr unsigned int mmFMT1_FMT_CLAMP_COMPONENT_R__VI = 0x1DE8; +constexpr unsigned int mmFMT1_FMT_CONTROL__VI = 0x1DEE; +constexpr unsigned int mmFMT1_FMT_CRC_CNTL__VI = 0x1DFA; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_BLUE_CONTROL__VI = 0x1DFE; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_BLUE_CONTROL_MASK__VI = 0x1DFC; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_RED_GREEN__VI = 0x1DFD; +constexpr unsigned int mmFMT1_FMT_CRC_SIG_RED_GREEN_MASK__VI = 0x1DFB; +constexpr unsigned int mmFMT1_FMT_DEBUG_CNTL__VI = 0x1DFF; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_B_SEED__VI = 0x1DF5; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_G_SEED__VI = 0x1DF4; +constexpr unsigned int mmFMT1_FMT_DITHER_RAND_R_SEED__VI = 0x1DF3; +constexpr unsigned int mmFMT1_FMT_DYNAMIC_EXP_CNTL__VI = 0x1DED; +constexpr unsigned int mmFMT1_FMT_FORCE_DATA_0_1__VI = 0x1DF0; +constexpr unsigned int mmFMT1_FMT_FORCE_DATA_2_3__VI = 0x1DF1; +constexpr unsigned int mmFMT1_FMT_FORCE_OUTPUT_CNTL__VI = 0x1DEF; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__VI = 0x1DF6; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__VI = 0x1DF7; +constexpr unsigned int mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__VI = 0x1DF8; +constexpr unsigned int mmFMT1_FMT_TEST_DEBUG_DATA__VI = 0x1DEC; +constexpr unsigned int mmFMT1_FMT_TEST_DEBUG_INDEX__VI = 0x1DEB; +constexpr unsigned int mmFMT2_FMT_BIT_DEPTH_CONTROL__VI = 0x1FF2; +constexpr unsigned int mmFMT2_FMT_CLAMP_CNTL__VI = 0x1FF9; +constexpr unsigned int mmFMT2_FMT_CLAMP_COMPONENT_B__VI = 0x1FEA; +constexpr unsigned int mmFMT2_FMT_CLAMP_COMPONENT_G__VI = 0x1FE9; +constexpr unsigned int mmFMT2_FMT_CLAMP_COMPONENT_R__VI = 0x1FE8; +constexpr unsigned int mmFMT2_FMT_CONTROL__VI = 0x1FEE; +constexpr unsigned int mmFMT2_FMT_CRC_CNTL__VI = 0x1FFA; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_BLUE_CONTROL__VI = 0x1FFE; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_BLUE_CONTROL_MASK__VI = 0x1FFC; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_RED_GREEN__VI = 0x1FFD; +constexpr unsigned int mmFMT2_FMT_CRC_SIG_RED_GREEN_MASK__VI = 0x1FFB; +constexpr unsigned int mmFMT2_FMT_DEBUG_CNTL__VI = 0x1FFF; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_B_SEED__VI = 0x1FF5; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_G_SEED__VI = 0x1FF4; +constexpr unsigned int mmFMT2_FMT_DITHER_RAND_R_SEED__VI = 0x1FF3; +constexpr unsigned int mmFMT2_FMT_DYNAMIC_EXP_CNTL__VI = 0x1FED; +constexpr unsigned int mmFMT2_FMT_FORCE_DATA_0_1__VI = 0x1FF0; +constexpr unsigned int mmFMT2_FMT_FORCE_DATA_2_3__VI = 0x1FF1; +constexpr unsigned int mmFMT2_FMT_FORCE_OUTPUT_CNTL__VI = 0x1FEF; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__VI = 0x1FF6; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__VI = 0x1FF7; +constexpr unsigned int mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__VI = 0x1FF8; +constexpr unsigned int mmFMT2_FMT_TEST_DEBUG_DATA__VI = 0x1FEC; +constexpr unsigned int mmFMT2_FMT_TEST_DEBUG_INDEX__VI = 0x1FEB; +constexpr unsigned int mmFMT3_FMT_BIT_DEPTH_CONTROL__VI = 0x41F2; +constexpr unsigned int mmFMT3_FMT_CLAMP_CNTL__VI = 0x41F9; +constexpr unsigned int mmFMT3_FMT_CLAMP_COMPONENT_B__VI = 0x41EA; +constexpr unsigned int mmFMT3_FMT_CLAMP_COMPONENT_G__VI = 0x41E9; +constexpr unsigned int mmFMT3_FMT_CLAMP_COMPONENT_R__VI = 0x41E8; +constexpr unsigned int mmFMT3_FMT_CONTROL__VI = 0x41EE; +constexpr unsigned int mmFMT3_FMT_CRC_CNTL__VI = 0x41FA; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_BLUE_CONTROL__VI = 0x41FE; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_BLUE_CONTROL_MASK__VI = 0x41FC; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_RED_GREEN__VI = 0x41FD; +constexpr unsigned int mmFMT3_FMT_CRC_SIG_RED_GREEN_MASK__VI = 0x41FB; +constexpr unsigned int mmFMT3_FMT_DEBUG_CNTL__VI = 0x41FF; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_B_SEED__VI = 0x41F5; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_G_SEED__VI = 0x41F4; +constexpr unsigned int mmFMT3_FMT_DITHER_RAND_R_SEED__VI = 0x41F3; +constexpr unsigned int mmFMT3_FMT_DYNAMIC_EXP_CNTL__VI = 0x41ED; +constexpr unsigned int mmFMT3_FMT_FORCE_DATA_0_1__VI = 0x41F0; +constexpr unsigned int mmFMT3_FMT_FORCE_DATA_2_3__VI = 0x41F1; +constexpr unsigned int mmFMT3_FMT_FORCE_OUTPUT_CNTL__VI = 0x41EF; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__VI = 0x41F6; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__VI = 0x41F7; +constexpr unsigned int mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__VI = 0x41F8; +constexpr unsigned int mmFMT3_FMT_TEST_DEBUG_DATA__VI = 0x41EC; +constexpr unsigned int mmFMT3_FMT_TEST_DEBUG_INDEX__VI = 0x41EB; +constexpr unsigned int mmFMT4_FMT_BIT_DEPTH_CONTROL__VI = 0x43F2; +constexpr unsigned int mmFMT4_FMT_CLAMP_CNTL__VI = 0x43F9; +constexpr unsigned int mmFMT4_FMT_CLAMP_COMPONENT_B__VI = 0x43EA; +constexpr unsigned int mmFMT4_FMT_CLAMP_COMPONENT_G__VI = 0x43E9; +constexpr unsigned int mmFMT4_FMT_CLAMP_COMPONENT_R__VI = 0x43E8; +constexpr unsigned int mmFMT4_FMT_CONTROL__VI = 0x43EE; +constexpr unsigned int mmFMT4_FMT_CRC_CNTL__VI = 0x43FA; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_BLUE_CONTROL__VI = 0x43FE; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_BLUE_CONTROL_MASK__VI = 0x43FC; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_RED_GREEN__VI = 0x43FD; +constexpr unsigned int mmFMT4_FMT_CRC_SIG_RED_GREEN_MASK__VI = 0x43FB; +constexpr unsigned int mmFMT4_FMT_DEBUG_CNTL__VI = 0x43FF; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_B_SEED__VI = 0x43F5; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_G_SEED__VI = 0x43F4; +constexpr unsigned int mmFMT4_FMT_DITHER_RAND_R_SEED__VI = 0x43F3; +constexpr unsigned int mmFMT4_FMT_DYNAMIC_EXP_CNTL__VI = 0x43ED; +constexpr unsigned int mmFMT4_FMT_FORCE_DATA_0_1__VI = 0x43F0; +constexpr unsigned int mmFMT4_FMT_FORCE_DATA_2_3__VI = 0x43F1; +constexpr unsigned int mmFMT4_FMT_FORCE_OUTPUT_CNTL__VI = 0x43EF; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__VI = 0x43F6; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__VI = 0x43F7; +constexpr unsigned int mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__VI = 0x43F8; +constexpr unsigned int mmFMT4_FMT_TEST_DEBUG_DATA__VI = 0x43EC; +constexpr unsigned int mmFMT4_FMT_TEST_DEBUG_INDEX__VI = 0x43EB; +constexpr unsigned int mmFMT5_FMT_BIT_DEPTH_CONTROL__VI = 0x45F2; +constexpr unsigned int mmFMT5_FMT_CLAMP_CNTL__VI = 0x45F9; +constexpr unsigned int mmFMT5_FMT_CLAMP_COMPONENT_B__VI = 0x45EA; +constexpr unsigned int mmFMT5_FMT_CLAMP_COMPONENT_G__VI = 0x45E9; +constexpr unsigned int mmFMT5_FMT_CLAMP_COMPONENT_R__VI = 0x45E8; +constexpr unsigned int mmFMT5_FMT_CONTROL__VI = 0x45EE; +constexpr unsigned int mmFMT5_FMT_CRC_CNTL__VI = 0x45FA; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_BLUE_CONTROL__VI = 0x45FE; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_BLUE_CONTROL_MASK__VI = 0x45FC; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_RED_GREEN__VI = 0x45FD; +constexpr unsigned int mmFMT5_FMT_CRC_SIG_RED_GREEN_MASK__VI = 0x45FB; +constexpr unsigned int mmFMT5_FMT_DEBUG_CNTL__VI = 0x45FF; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_B_SEED__VI = 0x45F5; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_G_SEED__VI = 0x45F4; +constexpr unsigned int mmFMT5_FMT_DITHER_RAND_R_SEED__VI = 0x45F3; +constexpr unsigned int mmFMT5_FMT_DYNAMIC_EXP_CNTL__VI = 0x45ED; +constexpr unsigned int mmFMT5_FMT_FORCE_DATA_0_1__VI = 0x45F0; +constexpr unsigned int mmFMT5_FMT_FORCE_DATA_2_3__VI = 0x45F1; +constexpr unsigned int mmFMT5_FMT_FORCE_OUTPUT_CNTL__VI = 0x45EF; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PATTERN_CONTROL__VI = 0x45F6; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX__VI = 0x45F7; +constexpr unsigned int mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX__VI = 0x45F8; +constexpr unsigned int mmFMT5_FMT_TEST_DEBUG_DATA__VI = 0x45EC; +constexpr unsigned int mmFMT5_FMT_TEST_DEBUG_INDEX__VI = 0x45EB; +constexpr unsigned int mmFMT_CLAMP_COMPONENT_B__VI = 0x1BEA; +constexpr unsigned int mmFMT_CLAMP_COMPONENT_G__VI = 0x1BE9; +constexpr unsigned int mmFMT_CLAMP_COMPONENT_R__VI = 0x1BE8; +constexpr unsigned int mmFMT_TEST_DEBUG_DATA__VI = 0x1BEC; +constexpr unsigned int mmFMT_TEST_DEBUG_INDEX__VI = 0x1BEB; +constexpr unsigned int mmGAMMA_CORR_CNTLA_END_CNTL1__VI = 0x46CE; +constexpr unsigned int mmGAMMA_CORR_CNTLA_END_CNTL2__VI = 0x46CF; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_0_1__VI = 0x46D0; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_10_11__VI = 0x46D5; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_12_13__VI = 0x46D6; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_14_15__VI = 0x46D7; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_2_3__VI = 0x46D1; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_4_5__VI = 0x46D2; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_6_7__VI = 0x46D3; +constexpr unsigned int mmGAMMA_CORR_CNTLA_REGION_8_9__VI = 0x46D4; +constexpr unsigned int mmGAMMA_CORR_CNTLA_SLOPE_CNTL__VI = 0x46CD; +constexpr unsigned int mmGAMMA_CORR_CNTLA_START_CNTL__VI = 0x46CC; +constexpr unsigned int mmGAMMA_CORR_CNTLB_END_CNTL1__VI = 0x46DA; +constexpr unsigned int mmGAMMA_CORR_CNTLB_END_CNTL2__VI = 0x46DB; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_0_1__VI = 0x46DC; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_10_11__VI = 0x46E1; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_12_13__VI = 0x46E2; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_14_15__VI = 0x46E3; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_2_3__VI = 0x46DD; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_4_5__VI = 0x46DE; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_6_7__VI = 0x46DF; +constexpr unsigned int mmGAMMA_CORR_CNTLB_REGION_8_9__VI = 0x46E0; +constexpr unsigned int mmGAMMA_CORR_CNTLB_SLOPE_CNTL__VI = 0x46D9; +constexpr unsigned int mmGAMMA_CORR_CNTLB_START_CNTL__VI = 0x46D8; +constexpr unsigned int mmGAMMA_CORR_CONTROL__VI = 0x46C8; +constexpr unsigned int mmGAMMA_CORR_LUT_DATA__VI = 0x46CA; +constexpr unsigned int mmGAMMA_CORR_LUT_INDEX__VI = 0x46C9; +constexpr unsigned int mmGAMMA_CORR_LUT_WRITE_EN_MASK__VI = 0x46CB; +constexpr unsigned int mmGAMUT_REMAP_C11_C12__VI = 0x1A5A; +constexpr unsigned int mmGAMUT_REMAP_C13_C14__VI = 0x1A5B; +constexpr unsigned int mmGAMUT_REMAP_C21_C22__VI = 0x1A5C; +constexpr unsigned int mmGAMUT_REMAP_C23_C24__VI = 0x1A5D; +constexpr unsigned int mmGAMUT_REMAP_C31_C32__VI = 0x1A5E; +constexpr unsigned int mmGAMUT_REMAP_C33_C34__VI = 0x1A5F; +constexpr unsigned int mmGAMUT_REMAP_CONTROL__VI = 0x1A59; +constexpr unsigned int mmGARLIC_COHE_CP_DMA_ME_COMMAND__VI = 0x141B; +constexpr unsigned int mmGARLIC_COHE_CP_DMA_PFP_COMMAND__VI = 0x141C; +constexpr unsigned int mmGARLIC_COHE_CP_DMA_PIO_COMMAND__VI = 0x1424; +constexpr unsigned int mmGARLIC_COHE_CP_RB0_WPTR__VI = 0x1415; +constexpr unsigned int mmGARLIC_COHE_CP_RB1_WPTR__VI = 0x1416; +constexpr unsigned int mmGARLIC_COHE_CP_RB2_WPTR__VI = 0x1417; +constexpr unsigned int mmGARLIC_COHE_GARLIC_FLUSH_REQ__VI = 0x1425; +constexpr unsigned int mmGARLIC_COHE_SAM_SAB_RBI_WPTR__VI = 0x141D; +constexpr unsigned int mmGARLIC_COHE_SAM_SAB_RBO_WPTR__VI = 0x141E; +constexpr unsigned int mmGARLIC_COHE_SDMA0_GFX_RB_WPTR__VI = 0x1419; +constexpr unsigned int mmGARLIC_COHE_SDMA1_GFX_RB_WPTR__VI = 0x141A; +constexpr unsigned int mmGARLIC_COHE_SDMA2_GFX_RB_WPTR__VI = 0x1422; +constexpr unsigned int mmGARLIC_COHE_SDMA3_GFX_RB_WPTR__VI = 0x1423; +constexpr unsigned int mmGARLIC_COHE_UVD_RBC_RB_WPTR__VI = 0x1418; +constexpr unsigned int mmGARLIC_COHE_VCE_OUT_RB_WPTR__VI = 0x141F; +constexpr unsigned int mmGARLIC_COHE_VCE_RB_WPTR__VI = 0x1421; +constexpr unsigned int mmGARLIC_COHE_VCE_RB_WPTR2__VI = 0x1420; +constexpr unsigned int mmGC_CAC_CGTT_CLK_CTRL__VI = 0x3292; +constexpr unsigned int mmGC_CAC_LKG_AGGR_LOWER__VI = 0x3296; +constexpr unsigned int mmGC_CAC_LKG_AGGR_UPPER__VI = 0x3297; +constexpr unsigned int mmGC_USER_SHADER_RATE_CONFIG__VI = 0x2313; +constexpr unsigned int mmGDS_CS_CTXSW_CNT0__VI = 0x334E; +constexpr unsigned int mmGDS_CS_CTXSW_CNT1__VI = 0x334F; +constexpr unsigned int mmGDS_CS_CTXSW_CNT2__VI = 0x3350; +constexpr unsigned int mmGDS_CS_CTXSW_CNT3__VI = 0x3351; +constexpr unsigned int mmGDS_CS_CTXSW_STATUS__VI = 0x334D; +constexpr unsigned int mmGDS_DSM_CNTL__VI = 0x25CA; +constexpr unsigned int mmGDS_EDC_CNT__VI = 0x25C5; +constexpr unsigned int mmGDS_EDC_GRBM_CNT__VI = 0x25C6; +constexpr unsigned int mmGDS_EDC_OA_DED__VI = 0x25C7; +constexpr unsigned int mmGDS_GFX_CTXSW_STATUS__VI = 0x3352; +constexpr unsigned int mmGDS_PS0_CTXSW_CNT0__VI = 0x3357; +constexpr unsigned int mmGDS_PS0_CTXSW_CNT1__VI = 0x3358; +constexpr unsigned int mmGDS_PS0_CTXSW_CNT2__VI = 0x3359; +constexpr unsigned int mmGDS_PS0_CTXSW_CNT3__VI = 0x335A; +constexpr unsigned int mmGDS_PS1_CTXSW_CNT0__VI = 0x335B; +constexpr unsigned int mmGDS_PS1_CTXSW_CNT1__VI = 0x335C; +constexpr unsigned int mmGDS_PS1_CTXSW_CNT2__VI = 0x335D; +constexpr unsigned int mmGDS_PS1_CTXSW_CNT3__VI = 0x335E; +constexpr unsigned int mmGDS_PS2_CTXSW_CNT0__VI = 0x335F; +constexpr unsigned int mmGDS_PS2_CTXSW_CNT1__VI = 0x3360; +constexpr unsigned int mmGDS_PS2_CTXSW_CNT2__VI = 0x3361; +constexpr unsigned int mmGDS_PS2_CTXSW_CNT3__VI = 0x3362; +constexpr unsigned int mmGDS_PS3_CTXSW_CNT0__VI = 0x3363; +constexpr unsigned int mmGDS_PS3_CTXSW_CNT1__VI = 0x3364; +constexpr unsigned int mmGDS_PS3_CTXSW_CNT2__VI = 0x3365; +constexpr unsigned int mmGDS_PS3_CTXSW_CNT3__VI = 0x3366; +constexpr unsigned int mmGDS_PS4_CTXSW_CNT0__VI = 0x3367; +constexpr unsigned int mmGDS_PS4_CTXSW_CNT1__VI = 0x3368; +constexpr unsigned int mmGDS_PS4_CTXSW_CNT2__VI = 0x3369; +constexpr unsigned int mmGDS_PS4_CTXSW_CNT3__VI = 0x336A; +constexpr unsigned int mmGDS_PS5_CTXSW_CNT0__VI = 0x336B; +constexpr unsigned int mmGDS_PS5_CTXSW_CNT1__VI = 0x336C; +constexpr unsigned int mmGDS_PS5_CTXSW_CNT2__VI = 0x336D; +constexpr unsigned int mmGDS_PS5_CTXSW_CNT3__VI = 0x336E; +constexpr unsigned int mmGDS_PS6_CTXSW_CNT0__VI = 0x336F; +constexpr unsigned int mmGDS_PS6_CTXSW_CNT1__VI = 0x3370; +constexpr unsigned int mmGDS_PS6_CTXSW_CNT2__VI = 0x3371; +constexpr unsigned int mmGDS_PS6_CTXSW_CNT3__VI = 0x3372; +constexpr unsigned int mmGDS_PS7_CTXSW_CNT0__VI = 0x3373; +constexpr unsigned int mmGDS_PS7_CTXSW_CNT1__VI = 0x3374; +constexpr unsigned int mmGDS_PS7_CTXSW_CNT2__VI = 0x3375; +constexpr unsigned int mmGDS_PS7_CTXSW_CNT3__VI = 0x3376; +constexpr unsigned int mmGDS_VS_CTXSW_CNT0__VI = 0x3353; +constexpr unsigned int mmGDS_VS_CTXSW_CNT1__VI = 0x3354; +constexpr unsigned int mmGDS_VS_CTXSW_CNT2__VI = 0x3355; +constexpr unsigned int mmGDS_VS_CTXSW_CNT3__VI = 0x3356; +constexpr unsigned int mmGENERIC_I2C_CONTROL__VI = 0x16F4; +constexpr unsigned int mmGENERIC_I2C_DATA__VI = 0x16FA; +constexpr unsigned int mmGENERIC_I2C_INTERRUPT_CONTROL__VI = 0x16F5; +constexpr unsigned int mmGENERIC_I2C_PIN_DEBUG__VI = 0x16FC; +constexpr unsigned int mmGENERIC_I2C_PIN_SELECTION__VI = 0x16FB; +constexpr unsigned int mmGENERIC_I2C_SETUP__VI = 0x16F8; +constexpr unsigned int mmGENERIC_I2C_SPEED__VI = 0x16F7; +constexpr unsigned int mmGENERIC_I2C_STATUS__VI = 0x16F6; +constexpr unsigned int mmGENERIC_I2C_TRANSACTION__VI = 0x16F9; +constexpr unsigned int mmGMCON_LPT_TARGET__VI = 0x0D53; +constexpr unsigned int mmGPU_BIST_CONTROL__VI = 0xF835; +constexpr unsigned int mmGRBM_CAM_DATA__SI__CI = 0x3001; +constexpr unsigned int mmGRBM_CAM_DATA__VI = 0xF83F; +constexpr unsigned int mmGRBM_CAM_INDEX__SI__CI = 0x3000; +constexpr unsigned int mmGRBM_CAM_INDEX__VI = 0xF83E; +constexpr unsigned int mmGRBM_DSM_BYPASS__VI = 0x201E; +constexpr unsigned int mmGRBM_HYP_CAM_DATA__VI = 0xF83F; +constexpr unsigned int mmGRBM_HYP_CAM_INDEX__VI = 0xF83E; +constexpr unsigned int mmGRBM_TRAP_ADDR__VI = 0x201A; +constexpr unsigned int mmGRBM_TRAP_ADDR_MSK__VI = 0x201B; +constexpr unsigned int mmGRBM_TRAP_OP__VI = 0x2019; +constexpr unsigned int mmGRBM_TRAP_WD__VI = 0x201C; +constexpr unsigned int mmGRBM_TRAP_WD_MSK__VI = 0x201D; +constexpr unsigned int mmGRBM_WRITE_ERROR__VI = 0x201F; +constexpr unsigned int mmGRPH_FLIP_RATE_CNTL__VI = 0x1A8E; +constexpr unsigned int mmGRPH_STEREOSYNC_FLIP__VI = 0x1A97; +constexpr unsigned int mmGRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL__VI = 0x1A9F; +constexpr unsigned int mmGRPH_XDMA_CACHE_UNDERFLOW_DET_STATUS__VI = 0x1ABF; +constexpr unsigned int mmGRPH_XDMA_RECOVERY_SURFACE_ADDRESS__VI = 0x1ABD; +constexpr unsigned int mmGRPH_XDMA_RECOVERY_SURFACE_ADDRESS_HIGH__VI = 0x1ABE; +constexpr unsigned int mmGSKT_CONTROL__VI = 0x14BF; +constexpr unsigned int mmHDMI_ACR_32_0__VI = 0x4A2E; +constexpr unsigned int mmHDMI_ACR_32_1__VI = 0x4A2F; +constexpr unsigned int mmHDMI_ACR_44_0__VI = 0x4A30; +constexpr unsigned int mmHDMI_ACR_44_1__VI = 0x4A31; +constexpr unsigned int mmHDMI_ACR_48_0__VI = 0x4A32; +constexpr unsigned int mmHDMI_ACR_48_1__VI = 0x4A33; +constexpr unsigned int mmHDMI_ACR_PACKET_CONTROL__VI = 0x4A0C; +constexpr unsigned int mmHDMI_ACR_STATUS_0__VI = 0x4A34; +constexpr unsigned int mmHDMI_ACR_STATUS_1__VI = 0x4A35; +constexpr unsigned int mmHDMI_AUDIO_PACKET_CONTROL__VI = 0x4A0B; +constexpr unsigned int mmHDMI_CONTROL__VI = 0x4A09; +constexpr unsigned int mmHDMI_GC__VI = 0x4A13; +constexpr unsigned int mmHDMI_GENERIC_PACKET_CONTROL0__VI = 0x4A10; +constexpr unsigned int mmHDMI_GENERIC_PACKET_CONTROL1__VI = 0x4A2D; +constexpr unsigned int mmHDMI_INFOFRAME_CONTROL0__VI = 0x4A0E; +constexpr unsigned int mmHDMI_INFOFRAME_CONTROL1__VI = 0x4A0F; +constexpr unsigned int mmHDMI_STATUS__VI = 0x4A0A; +constexpr unsigned int mmHDMI_VBI_PACKET_CONTROL__VI = 0x4A0D; +constexpr unsigned int mmHDP_ADDR_CONFIG__VI = 0x0BD2; +constexpr unsigned int mmHDP_MEMIO_ADDR__VI = 0x0BF7; +constexpr unsigned int mmHDP_MEMIO_CNTL__VI = 0x0BF6; +constexpr unsigned int mmHDP_MEMIO_RD_DATA__VI = 0x0BFA; +constexpr unsigned int mmHDP_MEMIO_STATUS__VI = 0x0BF8; +constexpr unsigned int mmHDP_MEMIO_WR_DATA__VI = 0x0BF9; +constexpr unsigned int mmHDP_MEM_POWER_LS__VI = 0x0BD4; +constexpr unsigned int mmHDP_MISC_CNTL__VI = 0x0BD3; +constexpr unsigned int mmHDP_NONSURFACE_PREFETCH__VI = 0x0BD5; +constexpr unsigned int mmHDP_VF_ENABLE__VI = 0x0BFB; +constexpr unsigned int mmHDP_XDP_BARS_ADDR_39_36__VI = 0x0C44; +constexpr unsigned int mmHPD0_DC_HPD_CONTROL__VI = 0x189A; +constexpr unsigned int mmHPD0_DC_HPD_FAST_TRAIN_CNTL__VI = 0x189B; +constexpr unsigned int mmHPD0_DC_HPD_INT_CONTROL__VI = 0x1899; +constexpr unsigned int mmHPD0_DC_HPD_INT_STATUS__VI = 0x1898; +constexpr unsigned int mmHPD0_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x189C; +constexpr unsigned int mmHPD1_DC_HPD_CONTROL__VI = 0x18A2; +constexpr unsigned int mmHPD1_DC_HPD_FAST_TRAIN_CNTL__VI = 0x18A3; +constexpr unsigned int mmHPD1_DC_HPD_INT_CONTROL__VI = 0x18A1; +constexpr unsigned int mmHPD1_DC_HPD_INT_STATUS__VI = 0x18A0; +constexpr unsigned int mmHPD1_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x18A4; +constexpr unsigned int mmHPD2_DC_HPD_CONTROL__VI = 0x18AA; +constexpr unsigned int mmHPD2_DC_HPD_FAST_TRAIN_CNTL__VI = 0x18AB; +constexpr unsigned int mmHPD2_DC_HPD_INT_CONTROL__VI = 0x18A9; +constexpr unsigned int mmHPD2_DC_HPD_INT_STATUS__VI = 0x18A8; +constexpr unsigned int mmHPD2_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x18AC; +constexpr unsigned int mmHPD3_DC_HPD_CONTROL__VI = 0x18B2; +constexpr unsigned int mmHPD3_DC_HPD_FAST_TRAIN_CNTL__VI = 0x18B3; +constexpr unsigned int mmHPD3_DC_HPD_INT_CONTROL__VI = 0x18B1; +constexpr unsigned int mmHPD3_DC_HPD_INT_STATUS__VI = 0x18B0; +constexpr unsigned int mmHPD3_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x18B4; +constexpr unsigned int mmHPD4_DC_HPD_CONTROL__VI = 0x18BA; +constexpr unsigned int mmHPD4_DC_HPD_FAST_TRAIN_CNTL__VI = 0x18BB; +constexpr unsigned int mmHPD4_DC_HPD_INT_CONTROL__VI = 0x18B9; +constexpr unsigned int mmHPD4_DC_HPD_INT_STATUS__VI = 0x18B8; +constexpr unsigned int mmHPD4_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x18BC; +constexpr unsigned int mmHPD5_DC_HPD_CONTROL__VI = 0x18C2; +constexpr unsigned int mmHPD5_DC_HPD_FAST_TRAIN_CNTL__VI = 0x18C3; +constexpr unsigned int mmHPD5_DC_HPD_INT_CONTROL__VI = 0x18C1; +constexpr unsigned int mmHPD5_DC_HPD_INT_STATUS__VI = 0x18C0; +constexpr unsigned int mmHPD5_DC_HPD_TOGGLE_FILT_CNTL__VI = 0x18C4; +constexpr unsigned int mmHW_ROTATION__VI = 0x1A9E; +constexpr unsigned int mmIH_ACTIVE_FCN_ID__VI = 0x0E43; +constexpr unsigned int mmIH_CLIENT_MAY_SEND_INCOMPLETE_INT__VI = 0x0E4B; +constexpr unsigned int mmIH_CNTL__SI__CI = 0x0F86; +constexpr unsigned int mmIH_CNTL__VI = 0x0E36; +constexpr unsigned int mmIH_DEBUG__VI = 0x0E3C; +constexpr unsigned int mmIH_DOORBELL_RPTR__VI = 0x0E42; +constexpr unsigned int mmIH_DSM_MATCH_DATA_CONTROL__VI = 0x0E41; +constexpr unsigned int mmIH_DSM_MATCH_FIELD_CONTROL__VI = 0x0E40; +constexpr unsigned int mmIH_DSM_MATCH_VALUE_BIT_31_0__VI = 0x0E3D; +constexpr unsigned int mmIH_DSM_MATCH_VALUE_BIT_63_32__VI = 0x0E3E; +constexpr unsigned int mmIH_DSM_MATCH_VALUE_BIT_95_64__VI = 0x0E3F; +constexpr unsigned int mmIH_LEVEL_INTR_MASK__VI = 0x0E49; +constexpr unsigned int mmIH_LEVEL_STATUS__SI__CI = 0x0F87; +constexpr unsigned int mmIH_LEVEL_STATUS__VI = 0x0E37; +constexpr unsigned int mmIH_PERFCOUNTER0_RESULT__VI = 0x0E3A; +constexpr unsigned int mmIH_PERFCOUNTER1_RESULT__VI = 0x0E3B; +constexpr unsigned int mmIH_PERFMON_CNTL__VI = 0x0E39; +constexpr unsigned int mmIH_RB_BASE__SI__CI = 0x0F81; +constexpr unsigned int mmIH_RB_BASE__VI = 0x0E31; +constexpr unsigned int mmIH_RB_CNTL__SI__CI = 0x0F80; +constexpr unsigned int mmIH_RB_CNTL__VI = 0x0E30; +constexpr unsigned int mmIH_RB_RPTR__SI__CI = 0x0F82; +constexpr unsigned int mmIH_RB_RPTR__VI = 0x0E32; +constexpr unsigned int mmIH_RB_WPTR__SI__CI = 0x0F83; +constexpr unsigned int mmIH_RB_WPTR__VI = 0x0E33; +constexpr unsigned int mmIH_RB_WPTR_ADDR_HI__SI__CI = 0x0F84; +constexpr unsigned int mmIH_RB_WPTR_ADDR_HI__VI = 0x0E34; +constexpr unsigned int mmIH_RB_WPTR_ADDR_LO__SI__CI = 0x0F85; +constexpr unsigned int mmIH_RB_WPTR_ADDR_LO__VI = 0x0E35; +constexpr unsigned int mmIH_RESET_INCOMPLETE_INT_CNTL__VI = 0x0E4A; +constexpr unsigned int mmIH_STATUS__SI__CI = 0x0F88; +constexpr unsigned int mmIH_STATUS__VI = 0x0E38; +constexpr unsigned int mmIH_VERSION__VI = 0x0E48; +constexpr unsigned int mmIH_VF_ENABLE__VI = 0x0E45; +constexpr unsigned int mmIH_VF_RB_BIF_STATUS__VI = 0x0E47; +constexpr unsigned int mmIH_VF_RB_STATUS__VI = 0x0E44; +constexpr unsigned int mmIH_VIRT_RESET_REQ__VI = 0x0E46; +constexpr unsigned int mmIH_VMID_0_LUT__VI = 0x0E00; +constexpr unsigned int mmIH_VMID_10_LUT__VI = 0x0E0A; +constexpr unsigned int mmIH_VMID_11_LUT__VI = 0x0E0B; +constexpr unsigned int mmIH_VMID_12_LUT__VI = 0x0E0C; +constexpr unsigned int mmIH_VMID_13_LUT__VI = 0x0E0D; +constexpr unsigned int mmIH_VMID_14_LUT__VI = 0x0E0E; +constexpr unsigned int mmIH_VMID_15_LUT__VI = 0x0E0F; +constexpr unsigned int mmIH_VMID_1_LUT__VI = 0x0E01; +constexpr unsigned int mmIH_VMID_2_LUT__VI = 0x0E02; +constexpr unsigned int mmIH_VMID_3_LUT__VI = 0x0E03; +constexpr unsigned int mmIH_VMID_4_LUT__VI = 0x0E04; +constexpr unsigned int mmIH_VMID_5_LUT__VI = 0x0E05; +constexpr unsigned int mmIH_VMID_6_LUT__VI = 0x0E06; +constexpr unsigned int mmIH_VMID_7_LUT__VI = 0x0E07; +constexpr unsigned int mmIH_VMID_8_LUT__VI = 0x0E08; +constexpr unsigned int mmIH_VMID_9_LUT__VI = 0x0E09; +constexpr unsigned int mmINPUT_CSC_C11_C12__VI = 0x1A36; +constexpr unsigned int mmINPUT_CSC_C11_C12_A__VI = 0x46A6; +constexpr unsigned int mmINPUT_CSC_C11_C12_B__VI = 0x46AC; +constexpr unsigned int mmINPUT_CSC_C13_C14__VI = 0x1A37; +constexpr unsigned int mmINPUT_CSC_C13_C14_A__VI = 0x46A7; +constexpr unsigned int mmINPUT_CSC_C13_C14_B__VI = 0x46AD; +constexpr unsigned int mmINPUT_CSC_C21_C22__VI = 0x1A38; +constexpr unsigned int mmINPUT_CSC_C21_C22_A__VI = 0x46A8; +constexpr unsigned int mmINPUT_CSC_C21_C22_B__VI = 0x46AE; +constexpr unsigned int mmINPUT_CSC_C23_C24__VI = 0x1A39; +constexpr unsigned int mmINPUT_CSC_C23_C24_A__VI = 0x46A9; +constexpr unsigned int mmINPUT_CSC_C23_C24_B__VI = 0x46AF; +constexpr unsigned int mmINPUT_CSC_C31_C32__VI = 0x1A3A; +constexpr unsigned int mmINPUT_CSC_C31_C32_A__VI = 0x46AA; +constexpr unsigned int mmINPUT_CSC_C31_C32_B__VI = 0x46B0; +constexpr unsigned int mmINPUT_CSC_C33_C34__VI = 0x1A3B; +constexpr unsigned int mmINPUT_CSC_C33_C34_A__VI = 0x46AB; +constexpr unsigned int mmINPUT_CSC_C33_C34_B__VI = 0x46B1; +constexpr unsigned int mmINPUT_CSC_CONTROL__VI = 0x1A35; +constexpr unsigned int mmINPUT_GAMMA_CONTROL__VI = 0x1A10; +constexpr unsigned int mmKEY_CONTROL__VI = 0x1A53; +constexpr unsigned int mmKEY_RANGE_ALPHA__VI = 0x1A54; +constexpr unsigned int mmKEY_RANGE_BLUE__VI = 0x1A57; +constexpr unsigned int mmKEY_RANGE_GREEN__VI = 0x1A56; +constexpr unsigned int mmKEY_RANGE_RED__VI = 0x1A55; +constexpr unsigned int mmLB0_DC_MVP_LB_CONTROL__VI = 0x1AE3; +constexpr unsigned int mmLB0_LB_BLACK_KEYER_B_CB__VI = 0x1ACF; +constexpr unsigned int mmLB0_LB_BLACK_KEYER_G_Y__VI = 0x1ACE; +constexpr unsigned int mmLB0_LB_BLACK_KEYER_R_CR__VI = 0x1ACD; +constexpr unsigned int mmLB0_LB_BUFFER_LEVEL_STATUS__VI = 0x1AD7; +constexpr unsigned int mmLB0_LB_BUFFER_STATUS__VI = 0x1ADA; +constexpr unsigned int mmLB0_LB_BUFFER_URGENCY_CTRL__VI = 0x1AD8; +constexpr unsigned int mmLB0_LB_BUFFER_URGENCY_STATUS__VI = 0x1AD9; +constexpr unsigned int mmLB0_LB_DATA_FORMAT__VI = 0x1AC0; +constexpr unsigned int mmLB0_LB_DEBUG__VI = 0x1AE4; +constexpr unsigned int mmLB0_LB_DEBUG2__VI = 0x1AE5; +constexpr unsigned int mmLB0_LB_DEBUG3__VI = 0x1AE6; +constexpr unsigned int mmLB0_LB_DESKTOP_HEIGHT__VI = 0x1AC3; +constexpr unsigned int mmLB0_LB_INTERRUPT_MASK__VI = 0x1AC8; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_B_CB__VI = 0x1AD3; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_CTRL__VI = 0x1AD0; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_G_Y__VI = 0x1AD2; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_REP_B_CB__VI = 0x1AD6; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_REP_G_Y__VI = 0x1AD5; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_REP_R_CR__VI = 0x1AD4; +constexpr unsigned int mmLB0_LB_KEYER_COLOR_R_CR__VI = 0x1AD1; +constexpr unsigned int mmLB0_LB_MEMORY_CTRL__VI = 0x1AC1; +constexpr unsigned int mmLB0_LB_MEMORY_SIZE_STATUS__VI = 0x1AC2; +constexpr unsigned int mmLB0_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x1ADC; +constexpr unsigned int mmLB0_LB_SNAPSHOT_V_COUNTER__VI = 0x1AC7; +constexpr unsigned int mmLB0_LB_SYNC_RESET_SEL__VI = 0x1ACC; +constexpr unsigned int mmLB0_LB_VBLANK_STATUS__VI = 0x1ACB; +constexpr unsigned int mmLB0_LB_VLINE2_START_END__VI = 0x1AC5; +constexpr unsigned int mmLB0_LB_VLINE2_STATUS__VI = 0x1ACA; +constexpr unsigned int mmLB0_LB_VLINE_START_END__VI = 0x1AC4; +constexpr unsigned int mmLB0_LB_VLINE_STATUS__VI = 0x1AC9; +constexpr unsigned int mmLB0_LB_V_COUNTER__VI = 0x1AC6; +constexpr unsigned int mmLB0_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x1AE1; +constexpr unsigned int mmLB0_MVP_AFR_FLIP_MODE__VI = 0x1AE0; +constexpr unsigned int mmLB0_MVP_FLIP_LINE_NUM_INSERT__VI = 0x1AE2; +constexpr unsigned int mmLB1_DC_MVP_LB_CONTROL__VI = 0x1CE3; +constexpr unsigned int mmLB1_LB_BLACK_KEYER_B_CB__VI = 0x1CCF; +constexpr unsigned int mmLB1_LB_BLACK_KEYER_G_Y__VI = 0x1CCE; +constexpr unsigned int mmLB1_LB_BLACK_KEYER_R_CR__VI = 0x1CCD; +constexpr unsigned int mmLB1_LB_BUFFER_LEVEL_STATUS__VI = 0x1CD7; +constexpr unsigned int mmLB1_LB_BUFFER_STATUS__VI = 0x1CDA; +constexpr unsigned int mmLB1_LB_BUFFER_URGENCY_CTRL__VI = 0x1CD8; +constexpr unsigned int mmLB1_LB_BUFFER_URGENCY_STATUS__VI = 0x1CD9; +constexpr unsigned int mmLB1_LB_DATA_FORMAT__VI = 0x1CC0; +constexpr unsigned int mmLB1_LB_DEBUG__VI = 0x1CE4; +constexpr unsigned int mmLB1_LB_DEBUG2__VI = 0x1CE5; +constexpr unsigned int mmLB1_LB_DEBUG3__VI = 0x1CE6; +constexpr unsigned int mmLB1_LB_DESKTOP_HEIGHT__VI = 0x1CC3; +constexpr unsigned int mmLB1_LB_INTERRUPT_MASK__VI = 0x1CC8; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_B_CB__VI = 0x1CD3; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_CTRL__VI = 0x1CD0; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_G_Y__VI = 0x1CD2; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_REP_B_CB__VI = 0x1CD6; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_REP_G_Y__VI = 0x1CD5; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_REP_R_CR__VI = 0x1CD4; +constexpr unsigned int mmLB1_LB_KEYER_COLOR_R_CR__VI = 0x1CD1; +constexpr unsigned int mmLB1_LB_MEMORY_CTRL__VI = 0x1CC1; +constexpr unsigned int mmLB1_LB_MEMORY_SIZE_STATUS__VI = 0x1CC2; +constexpr unsigned int mmLB1_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x1CDC; +constexpr unsigned int mmLB1_LB_SNAPSHOT_V_COUNTER__VI = 0x1CC7; +constexpr unsigned int mmLB1_LB_SYNC_RESET_SEL__VI = 0x1CCC; +constexpr unsigned int mmLB1_LB_TEST_DEBUG_DATA__VI = 0x1CFF; +constexpr unsigned int mmLB1_LB_TEST_DEBUG_INDEX__VI = 0x1CFE; +constexpr unsigned int mmLB1_LB_VBLANK_STATUS__VI = 0x1CCB; +constexpr unsigned int mmLB1_LB_VLINE2_START_END__VI = 0x1CC5; +constexpr unsigned int mmLB1_LB_VLINE2_STATUS__VI = 0x1CCA; +constexpr unsigned int mmLB1_LB_VLINE_START_END__VI = 0x1CC4; +constexpr unsigned int mmLB1_LB_VLINE_STATUS__VI = 0x1CC9; +constexpr unsigned int mmLB1_LB_V_COUNTER__VI = 0x1CC6; +constexpr unsigned int mmLB1_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x1CE1; +constexpr unsigned int mmLB1_MVP_AFR_FLIP_MODE__VI = 0x1CE0; +constexpr unsigned int mmLB1_MVP_FLIP_LINE_NUM_INSERT__VI = 0x1CE2; +constexpr unsigned int mmLB2_DC_MVP_LB_CONTROL__VI = 0x1EE3; +constexpr unsigned int mmLB2_LB_BLACK_KEYER_B_CB__VI = 0x1ECF; +constexpr unsigned int mmLB2_LB_BLACK_KEYER_G_Y__VI = 0x1ECE; +constexpr unsigned int mmLB2_LB_BLACK_KEYER_R_CR__VI = 0x1ECD; +constexpr unsigned int mmLB2_LB_BUFFER_LEVEL_STATUS__VI = 0x1ED7; +constexpr unsigned int mmLB2_LB_BUFFER_STATUS__VI = 0x1EDA; +constexpr unsigned int mmLB2_LB_BUFFER_URGENCY_CTRL__VI = 0x1ED8; +constexpr unsigned int mmLB2_LB_BUFFER_URGENCY_STATUS__VI = 0x1ED9; +constexpr unsigned int mmLB2_LB_DATA_FORMAT__VI = 0x1EC0; +constexpr unsigned int mmLB2_LB_DEBUG__VI = 0x1EE4; +constexpr unsigned int mmLB2_LB_DEBUG2__VI = 0x1EE5; +constexpr unsigned int mmLB2_LB_DEBUG3__VI = 0x1EE6; +constexpr unsigned int mmLB2_LB_DESKTOP_HEIGHT__VI = 0x1EC3; +constexpr unsigned int mmLB2_LB_INTERRUPT_MASK__VI = 0x1EC8; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_B_CB__VI = 0x1ED3; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_CTRL__VI = 0x1ED0; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_G_Y__VI = 0x1ED2; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_REP_B_CB__VI = 0x1ED6; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_REP_G_Y__VI = 0x1ED5; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_REP_R_CR__VI = 0x1ED4; +constexpr unsigned int mmLB2_LB_KEYER_COLOR_R_CR__VI = 0x1ED1; +constexpr unsigned int mmLB2_LB_MEMORY_CTRL__VI = 0x1EC1; +constexpr unsigned int mmLB2_LB_MEMORY_SIZE_STATUS__VI = 0x1EC2; +constexpr unsigned int mmLB2_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x1EDC; +constexpr unsigned int mmLB2_LB_SNAPSHOT_V_COUNTER__VI = 0x1EC7; +constexpr unsigned int mmLB2_LB_SYNC_RESET_SEL__VI = 0x1ECC; +constexpr unsigned int mmLB2_LB_TEST_DEBUG_DATA__VI = 0x1EFF; +constexpr unsigned int mmLB2_LB_TEST_DEBUG_INDEX__VI = 0x1EFE; +constexpr unsigned int mmLB2_LB_VBLANK_STATUS__VI = 0x1ECB; +constexpr unsigned int mmLB2_LB_VLINE2_START_END__VI = 0x1EC5; +constexpr unsigned int mmLB2_LB_VLINE2_STATUS__VI = 0x1ECA; +constexpr unsigned int mmLB2_LB_VLINE_START_END__VI = 0x1EC4; +constexpr unsigned int mmLB2_LB_VLINE_STATUS__VI = 0x1EC9; +constexpr unsigned int mmLB2_LB_V_COUNTER__VI = 0x1EC6; +constexpr unsigned int mmLB2_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x1EE1; +constexpr unsigned int mmLB2_MVP_AFR_FLIP_MODE__VI = 0x1EE0; +constexpr unsigned int mmLB2_MVP_FLIP_LINE_NUM_INSERT__VI = 0x1EE2; +constexpr unsigned int mmLB3_DC_MVP_LB_CONTROL__VI = 0x40E3; +constexpr unsigned int mmLB3_LB_BLACK_KEYER_B_CB__VI = 0x40CF; +constexpr unsigned int mmLB3_LB_BLACK_KEYER_G_Y__VI = 0x40CE; +constexpr unsigned int mmLB3_LB_BLACK_KEYER_R_CR__VI = 0x40CD; +constexpr unsigned int mmLB3_LB_BUFFER_LEVEL_STATUS__VI = 0x40D7; +constexpr unsigned int mmLB3_LB_BUFFER_STATUS__VI = 0x40DA; +constexpr unsigned int mmLB3_LB_BUFFER_URGENCY_CTRL__VI = 0x40D8; +constexpr unsigned int mmLB3_LB_BUFFER_URGENCY_STATUS__VI = 0x40D9; +constexpr unsigned int mmLB3_LB_DATA_FORMAT__VI = 0x40C0; +constexpr unsigned int mmLB3_LB_DEBUG__VI = 0x40E4; +constexpr unsigned int mmLB3_LB_DEBUG2__VI = 0x40E5; +constexpr unsigned int mmLB3_LB_DEBUG3__VI = 0x40E6; +constexpr unsigned int mmLB3_LB_DESKTOP_HEIGHT__VI = 0x40C3; +constexpr unsigned int mmLB3_LB_INTERRUPT_MASK__VI = 0x40C8; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_B_CB__VI = 0x40D3; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_CTRL__VI = 0x40D0; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_G_Y__VI = 0x40D2; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_REP_B_CB__VI = 0x40D6; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_REP_G_Y__VI = 0x40D5; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_REP_R_CR__VI = 0x40D4; +constexpr unsigned int mmLB3_LB_KEYER_COLOR_R_CR__VI = 0x40D1; +constexpr unsigned int mmLB3_LB_MEMORY_CTRL__VI = 0x40C1; +constexpr unsigned int mmLB3_LB_MEMORY_SIZE_STATUS__VI = 0x40C2; +constexpr unsigned int mmLB3_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x40DC; +constexpr unsigned int mmLB3_LB_SNAPSHOT_V_COUNTER__VI = 0x40C7; +constexpr unsigned int mmLB3_LB_SYNC_RESET_SEL__VI = 0x40CC; +constexpr unsigned int mmLB3_LB_TEST_DEBUG_DATA__VI = 0x40FF; +constexpr unsigned int mmLB3_LB_TEST_DEBUG_INDEX__VI = 0x40FE; +constexpr unsigned int mmLB3_LB_VBLANK_STATUS__VI = 0x40CB; +constexpr unsigned int mmLB3_LB_VLINE2_START_END__VI = 0x40C5; +constexpr unsigned int mmLB3_LB_VLINE2_STATUS__VI = 0x40CA; +constexpr unsigned int mmLB3_LB_VLINE_START_END__VI = 0x40C4; +constexpr unsigned int mmLB3_LB_VLINE_STATUS__VI = 0x40C9; +constexpr unsigned int mmLB3_LB_V_COUNTER__VI = 0x40C6; +constexpr unsigned int mmLB3_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x40E1; +constexpr unsigned int mmLB3_MVP_AFR_FLIP_MODE__VI = 0x40E0; +constexpr unsigned int mmLB3_MVP_FLIP_LINE_NUM_INSERT__VI = 0x40E2; +constexpr unsigned int mmLB4_DC_MVP_LB_CONTROL__VI = 0x42E3; +constexpr unsigned int mmLB4_LB_BLACK_KEYER_B_CB__VI = 0x42CF; +constexpr unsigned int mmLB4_LB_BLACK_KEYER_G_Y__VI = 0x42CE; +constexpr unsigned int mmLB4_LB_BLACK_KEYER_R_CR__VI = 0x42CD; +constexpr unsigned int mmLB4_LB_BUFFER_LEVEL_STATUS__VI = 0x42D7; +constexpr unsigned int mmLB4_LB_BUFFER_STATUS__VI = 0x42DA; +constexpr unsigned int mmLB4_LB_BUFFER_URGENCY_CTRL__VI = 0x42D8; +constexpr unsigned int mmLB4_LB_BUFFER_URGENCY_STATUS__VI = 0x42D9; +constexpr unsigned int mmLB4_LB_DATA_FORMAT__VI = 0x42C0; +constexpr unsigned int mmLB4_LB_DEBUG__VI = 0x42E4; +constexpr unsigned int mmLB4_LB_DEBUG2__VI = 0x42E5; +constexpr unsigned int mmLB4_LB_DEBUG3__VI = 0x42E6; +constexpr unsigned int mmLB4_LB_DESKTOP_HEIGHT__VI = 0x42C3; +constexpr unsigned int mmLB4_LB_INTERRUPT_MASK__VI = 0x42C8; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_B_CB__VI = 0x42D3; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_CTRL__VI = 0x42D0; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_G_Y__VI = 0x42D2; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_REP_B_CB__VI = 0x42D6; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_REP_G_Y__VI = 0x42D5; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_REP_R_CR__VI = 0x42D4; +constexpr unsigned int mmLB4_LB_KEYER_COLOR_R_CR__VI = 0x42D1; +constexpr unsigned int mmLB4_LB_MEMORY_CTRL__VI = 0x42C1; +constexpr unsigned int mmLB4_LB_MEMORY_SIZE_STATUS__VI = 0x42C2; +constexpr unsigned int mmLB4_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x42DC; +constexpr unsigned int mmLB4_LB_SNAPSHOT_V_COUNTER__VI = 0x42C7; +constexpr unsigned int mmLB4_LB_SYNC_RESET_SEL__VI = 0x42CC; +constexpr unsigned int mmLB4_LB_TEST_DEBUG_DATA__VI = 0x42FF; +constexpr unsigned int mmLB4_LB_TEST_DEBUG_INDEX__VI = 0x42FE; +constexpr unsigned int mmLB4_LB_VBLANK_STATUS__VI = 0x42CB; +constexpr unsigned int mmLB4_LB_VLINE2_START_END__VI = 0x42C5; +constexpr unsigned int mmLB4_LB_VLINE2_STATUS__VI = 0x42CA; +constexpr unsigned int mmLB4_LB_VLINE_START_END__VI = 0x42C4; +constexpr unsigned int mmLB4_LB_VLINE_STATUS__VI = 0x42C9; +constexpr unsigned int mmLB4_LB_V_COUNTER__VI = 0x42C6; +constexpr unsigned int mmLB4_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x42E1; +constexpr unsigned int mmLB4_MVP_AFR_FLIP_MODE__VI = 0x42E0; +constexpr unsigned int mmLB4_MVP_FLIP_LINE_NUM_INSERT__VI = 0x42E2; +constexpr unsigned int mmLB5_DC_MVP_LB_CONTROL__VI = 0x44E3; +constexpr unsigned int mmLB5_LB_BLACK_KEYER_B_CB__VI = 0x44CF; +constexpr unsigned int mmLB5_LB_BLACK_KEYER_G_Y__VI = 0x44CE; +constexpr unsigned int mmLB5_LB_BLACK_KEYER_R_CR__VI = 0x44CD; +constexpr unsigned int mmLB5_LB_BUFFER_LEVEL_STATUS__VI = 0x44D7; +constexpr unsigned int mmLB5_LB_BUFFER_STATUS__VI = 0x44DA; +constexpr unsigned int mmLB5_LB_BUFFER_URGENCY_CTRL__VI = 0x44D8; +constexpr unsigned int mmLB5_LB_BUFFER_URGENCY_STATUS__VI = 0x44D9; +constexpr unsigned int mmLB5_LB_DATA_FORMAT__VI = 0x44C0; +constexpr unsigned int mmLB5_LB_DEBUG__VI = 0x44E4; +constexpr unsigned int mmLB5_LB_DEBUG2__VI = 0x44E5; +constexpr unsigned int mmLB5_LB_DEBUG3__VI = 0x44E6; +constexpr unsigned int mmLB5_LB_DESKTOP_HEIGHT__VI = 0x44C3; +constexpr unsigned int mmLB5_LB_INTERRUPT_MASK__VI = 0x44C8; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_B_CB__VI = 0x44D3; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_CTRL__VI = 0x44D0; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_G_Y__VI = 0x44D2; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_REP_B_CB__VI = 0x44D6; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_REP_G_Y__VI = 0x44D5; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_REP_R_CR__VI = 0x44D4; +constexpr unsigned int mmLB5_LB_KEYER_COLOR_R_CR__VI = 0x44D1; +constexpr unsigned int mmLB5_LB_MEMORY_CTRL__VI = 0x44C1; +constexpr unsigned int mmLB5_LB_MEMORY_SIZE_STATUS__VI = 0x44C2; +constexpr unsigned int mmLB5_LB_NO_OUTSTANDING_REQ_STATUS__VI = 0x44DC; +constexpr unsigned int mmLB5_LB_SNAPSHOT_V_COUNTER__VI = 0x44C7; +constexpr unsigned int mmLB5_LB_SYNC_RESET_SEL__VI = 0x44CC; +constexpr unsigned int mmLB5_LB_TEST_DEBUG_DATA__VI = 0x44FF; +constexpr unsigned int mmLB5_LB_TEST_DEBUG_INDEX__VI = 0x44FE; +constexpr unsigned int mmLB5_LB_VBLANK_STATUS__VI = 0x44CB; +constexpr unsigned int mmLB5_LB_VLINE2_START_END__VI = 0x44C5; +constexpr unsigned int mmLB5_LB_VLINE2_STATUS__VI = 0x44CA; +constexpr unsigned int mmLB5_LB_VLINE_START_END__VI = 0x44C4; +constexpr unsigned int mmLB5_LB_VLINE_STATUS__VI = 0x44C9; +constexpr unsigned int mmLB5_LB_V_COUNTER__VI = 0x44C6; +constexpr unsigned int mmLB5_MVP_AFR_FLIP_FIFO_CNTL__VI = 0x44E1; +constexpr unsigned int mmLB5_MVP_AFR_FLIP_MODE__VI = 0x44E0; +constexpr unsigned int mmLB5_MVP_FLIP_LINE_NUM_INSERT__VI = 0x44E2; +constexpr unsigned int mmLBV_BLACK_KEYER_B_CB__VI = 0x464D; +constexpr unsigned int mmLBV_BLACK_KEYER_G_Y__VI = 0x464C; +constexpr unsigned int mmLBV_BLACK_KEYER_R_CR__VI = 0x464B; +constexpr unsigned int mmLBV_BUFFER_LEVEL_STATUS__VI = 0x4655; +constexpr unsigned int mmLBV_BUFFER_STATUS__VI = 0x4658; +constexpr unsigned int mmLBV_BUFFER_URGENCY_CTRL__VI = 0x4656; +constexpr unsigned int mmLBV_BUFFER_URGENCY_STATUS__VI = 0x4657; +constexpr unsigned int mmLBV_DATA_FORMAT__VI = 0x463C; +constexpr unsigned int mmLBV_DEBUG__VI = 0x465A; +constexpr unsigned int mmLBV_DEBUG2__VI = 0x465B; +constexpr unsigned int mmLBV_DEBUG3__VI = 0x465C; +constexpr unsigned int mmLBV_DESKTOP_HEIGHT__VI = 0x463F; +constexpr unsigned int mmLBV_INTERRUPT_MASK__VI = 0x4646; +constexpr unsigned int mmLBV_KEYER_COLOR_B_CB__VI = 0x4651; +constexpr unsigned int mmLBV_KEYER_COLOR_CTRL__VI = 0x464E; +constexpr unsigned int mmLBV_KEYER_COLOR_G_Y__VI = 0x4650; +constexpr unsigned int mmLBV_KEYER_COLOR_REP_B_CB__VI = 0x4654; +constexpr unsigned int mmLBV_KEYER_COLOR_REP_G_Y__VI = 0x4653; +constexpr unsigned int mmLBV_KEYER_COLOR_REP_R_CR__VI = 0x4652; +constexpr unsigned int mmLBV_KEYER_COLOR_R_CR__VI = 0x464F; +constexpr unsigned int mmLBV_MEMORY_CTRL__VI = 0x463D; +constexpr unsigned int mmLBV_MEMORY_SIZE_STATUS__VI = 0x463E; +constexpr unsigned int mmLBV_NO_OUTSTANDING_REQ_STATUS__VI = 0x4659; +constexpr unsigned int mmLBV_SNAPSHOT_V_COUNTER__VI = 0x4643; +constexpr unsigned int mmLBV_SNAPSHOT_V_COUNTER_CHROMA__VI = 0x4645; +constexpr unsigned int mmLBV_SYNC_RESET_SEL__VI = 0x464A; +constexpr unsigned int mmLBV_TEST_DEBUG_DATA__VI = 0x4667; +constexpr unsigned int mmLBV_TEST_DEBUG_INDEX__VI = 0x4666; +constexpr unsigned int mmLBV_VBLANK_STATUS__VI = 0x4649; +constexpr unsigned int mmLBV_VLINE2_START_END__VI = 0x4641; +constexpr unsigned int mmLBV_VLINE2_STATUS__VI = 0x4648; +constexpr unsigned int mmLBV_VLINE_START_END__VI = 0x4640; +constexpr unsigned int mmLBV_VLINE_STATUS__VI = 0x4647; +constexpr unsigned int mmLBV_V_COUNTER__VI = 0x4642; +constexpr unsigned int mmLBV_V_COUNTER_CHROMA__VI = 0x4644; +constexpr unsigned int mmLB_BLACK_KEYER_B_CB__VI = 0x1ACF; +constexpr unsigned int mmLB_BLACK_KEYER_G_Y__VI = 0x1ACE; +constexpr unsigned int mmLB_BLACK_KEYER_R_CR__VI = 0x1ACD; +constexpr unsigned int mmLB_BUFFER_LEVEL_STATUS__VI = 0x1AD7; +constexpr unsigned int mmLB_BUFFER_STATUS__VI = 0x1ADA; +constexpr unsigned int mmLB_BUFFER_URGENCY_CTRL__VI = 0x1AD8; +constexpr unsigned int mmLB_BUFFER_URGENCY_STATUS__VI = 0x1AD9; +constexpr unsigned int mmLB_DATA_FORMAT__VI = 0x1AC0; +constexpr unsigned int mmLB_DEBUG__VI = 0x1AE4; +constexpr unsigned int mmLB_DEBUG2__VI = 0x1AE5; +constexpr unsigned int mmLB_DEBUG3__VI = 0x1AE6; +constexpr unsigned int mmLB_DESKTOP_HEIGHT__VI = 0x1AC3; +constexpr unsigned int mmLB_INTERRUPT_MASK__VI = 0x1AC8; +constexpr unsigned int mmLB_KEYER_COLOR_B_CB__VI = 0x1AD3; +constexpr unsigned int mmLB_KEYER_COLOR_CTRL__VI = 0x1AD0; +constexpr unsigned int mmLB_KEYER_COLOR_G_Y__VI = 0x1AD2; +constexpr unsigned int mmLB_KEYER_COLOR_REP_B_CB__VI = 0x1AD6; +constexpr unsigned int mmLB_KEYER_COLOR_REP_G_Y__VI = 0x1AD5; +constexpr unsigned int mmLB_KEYER_COLOR_REP_R_CR__VI = 0x1AD4; +constexpr unsigned int mmLB_KEYER_COLOR_R_CR__VI = 0x1AD1; +constexpr unsigned int mmLB_MEMORY_CTRL__VI = 0x1AC1; +constexpr unsigned int mmLB_MEMORY_SIZE_STATUS__VI = 0x1AC2; +constexpr unsigned int mmLB_NO_OUTSTANDING_REQ_STATUS__VI = 0x1ADC; +constexpr unsigned int mmLB_SNAPSHOT_V_COUNTER__VI = 0x1AC7; +constexpr unsigned int mmLB_SYNC_RESET_SEL__VI = 0x1ACC; +constexpr unsigned int mmLB_VBLANK_STATUS__VI = 0x1ACB; +constexpr unsigned int mmLB_VLINE2_START_END__VI = 0x1AC5; +constexpr unsigned int mmLB_VLINE2_STATUS__VI = 0x1ACA; +constexpr unsigned int mmLB_VLINE_START_END__VI = 0x1AC4; +constexpr unsigned int mmLB_VLINE_STATUS__VI = 0x1AC9; +constexpr unsigned int mmLB_V_COUNTER__VI = 0x1AC6; +constexpr unsigned int mmLOW_POWER_TILING_CONTROL__VI = 0x030B; +constexpr unsigned int mmLVDS_DATA_CNTL__VI = 0x4A78; +constexpr unsigned int mmLVTMA_PWRSEQ_CNTL__VI = 0x481B; +constexpr unsigned int mmLVTMA_PWRSEQ_DELAY1__VI = 0x481E; +constexpr unsigned int mmLVTMA_PWRSEQ_DELAY2__VI = 0x481F; +constexpr unsigned int mmLVTMA_PWRSEQ_REF_DIV__VI = 0x481D; +constexpr unsigned int mmLVTMA_PWRSEQ_STATE__VI = 0x481C; +constexpr unsigned int mmMAILBOX_CONTROL__VI = 0x14D0; +constexpr unsigned int mmMAILBOX_INDEX__VI = 0x14C6; +constexpr unsigned int mmMAILBOX_INT_CNTL__VI = 0x14D1; +constexpr unsigned int mmMAILBOX_MSGBUF_RCV_DW0__VI = 0x14CC; +constexpr unsigned int mmMAILBOX_MSGBUF_RCV_DW1__VI = 0x14CD; +constexpr unsigned int mmMAILBOX_MSGBUF_RCV_DW2__VI = 0x14CE; +constexpr unsigned int mmMAILBOX_MSGBUF_RCV_DW3__VI = 0x14CF; +constexpr unsigned int mmMAILBOX_MSGBUF_TRN_DW0__VI = 0x14C8; +constexpr unsigned int mmMAILBOX_MSGBUF_TRN_DW1__VI = 0x14C9; +constexpr unsigned int mmMAILBOX_MSGBUF_TRN_DW2__VI = 0x14CA; +constexpr unsigned int mmMAILBOX_MSGBUF_TRN_DW3__VI = 0x14CB; +constexpr unsigned int mmMCIF_CONTROL__VI = 0x030C; +constexpr unsigned int mmMCIF_MEM_CONTROL__VI = 0x0311; +constexpr unsigned int mmMCIF_TEST_DEBUG_DATA__VI = 0x030F; +constexpr unsigned int mmMCIF_TEST_DEBUG_INDEX__VI = 0x030E; +constexpr unsigned int mmMCIF_VMID__VI = 0x0310; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_ARBITRATION_CONTROL__VI = 0x5E84; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUFMGR_CUR_LINE_R__VI = 0x5E79; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUFMGR_STATUS__VI = 0x5E7A; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL__VI = 0x5E78; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUFMGR_VCE_CONTROL__VI = 0x5E98; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C__VI = 0x5E8A; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_OFFSET__VI = 0x5E8B; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y__VI = 0x5E88; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_OFFSET__VI = 0x5E89; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_STATUS__VI = 0x5E7C; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_1_STATUS2__VI = 0x5E7D; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C__VI = 0x5E8E; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_OFFSET__VI = 0x5E8F; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y__VI = 0x5E8C; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_OFFSET__VI = 0x5E8D; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_STATUS__VI = 0x5E7E; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_2_STATUS2__VI = 0x5E7F; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C__VI = 0x5E92; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_OFFSET__VI = 0x5E93; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y__VI = 0x5E90; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_OFFSET__VI = 0x5E91; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_STATUS__VI = 0x5E80; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_3_STATUS2__VI = 0x5E81; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C__VI = 0x5E96; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_OFFSET__VI = 0x5E97; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y__VI = 0x5E94; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_OFFSET__VI = 0x5E95; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_STATUS__VI = 0x5E82; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_4_STATUS2__VI = 0x5E83; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_BUF_PITCH__VI = 0x5E7B; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_HVVMID_CONTROL__VI = 0x5E99; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_TEST_DEBUG_DATA__VI = 0x5E87; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_TEST_DEBUG_INDEX__VI = 0x5E86; +constexpr unsigned int mmMCIF_WB0_MCIF_WB_URGENCY_WATERMARK__VI = 0x5E85; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_ARBITRATION_CONTROL__VI = 0x5EC4; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUFMGR_CUR_LINE_R__VI = 0x5EB9; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUFMGR_STATUS__VI = 0x5EBA; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUFMGR_SW_CONTROL__VI = 0x5EB8; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL__VI = 0x5ED8; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C__VI = 0x5ECA; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_OFFSET__VI = 0x5ECB; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y__VI = 0x5EC8; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET__VI = 0x5EC9; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_STATUS__VI = 0x5EBC; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_1_STATUS2__VI = 0x5EBD; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C__VI = 0x5ECE; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_OFFSET__VI = 0x5ECF; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y__VI = 0x5ECC; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_OFFSET__VI = 0x5ECD; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_STATUS__VI = 0x5EBE; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_2_STATUS2__VI = 0x5EBF; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C__VI = 0x5ED2; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_OFFSET__VI = 0x5ED3; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y__VI = 0x5ED0; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_OFFSET__VI = 0x5ED1; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_STATUS__VI = 0x5EC0; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_3_STATUS2__VI = 0x5EC1; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C__VI = 0x5ED6; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_OFFSET__VI = 0x5ED7; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y__VI = 0x5ED4; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_OFFSET__VI = 0x5ED5; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_STATUS__VI = 0x5EC2; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_4_STATUS2__VI = 0x5EC3; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_BUF_PITCH__VI = 0x5EBB; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_HVVMID_CONTROL__VI = 0x5ED9; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_TEST_DEBUG_DATA__VI = 0x5EC7; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_TEST_DEBUG_INDEX__VI = 0x5EC6; +constexpr unsigned int mmMCIF_WB1_MCIF_WB_URGENCY_WATERMARK__VI = 0x5EC5; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_ARBITRATION_CONTROL__VI = 0x5F04; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUFMGR_CUR_LINE_R__VI = 0x5EF9; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUFMGR_STATUS__VI = 0x5EFA; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUFMGR_SW_CONTROL__VI = 0x5EF8; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUFMGR_VCE_CONTROL__VI = 0x5F18; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_ADDR_C__VI = 0x5F0A; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_ADDR_C_OFFSET__VI = 0x5F0B; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_ADDR_Y__VI = 0x5F08; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_ADDR_Y_OFFSET__VI = 0x5F09; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_STATUS__VI = 0x5EFC; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_1_STATUS2__VI = 0x5EFD; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_ADDR_C__VI = 0x5F0E; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_ADDR_C_OFFSET__VI = 0x5F0F; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_ADDR_Y__VI = 0x5F0C; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_ADDR_Y_OFFSET__VI = 0x5F0D; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_STATUS__VI = 0x5EFE; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_2_STATUS2__VI = 0x5EFF; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_ADDR_C__VI = 0x5F12; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_ADDR_C_OFFSET__VI = 0x5F13; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_ADDR_Y__VI = 0x5F10; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_ADDR_Y_OFFSET__VI = 0x5F11; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_STATUS__VI = 0x5F00; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_3_STATUS2__VI = 0x5F01; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_ADDR_C__VI = 0x5F16; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_ADDR_C_OFFSET__VI = 0x5F17; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_ADDR_Y__VI = 0x5F14; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_ADDR_Y_OFFSET__VI = 0x5F15; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_STATUS__VI = 0x5F02; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_4_STATUS2__VI = 0x5F03; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_BUF_PITCH__VI = 0x5EFB; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_HVVMID_CONTROL__VI = 0x5F19; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_TEST_DEBUG_DATA__VI = 0x5F07; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_TEST_DEBUG_INDEX__VI = 0x5F06; +constexpr unsigned int mmMCIF_WB2_MCIF_WB_URGENCY_WATERMARK__VI = 0x5F05; +constexpr unsigned int mmMCIF_WB_ARBITRATION_CONTROL__VI = 0x5E84; +constexpr unsigned int mmMCIF_WB_BUFMGR_CUR_LINE_R__VI = 0x5E79; +constexpr unsigned int mmMCIF_WB_BUFMGR_STATUS__VI = 0x5E7A; +constexpr unsigned int mmMCIF_WB_BUFMGR_SW_CONTROL__VI = 0x5E78; +constexpr unsigned int mmMCIF_WB_BUFMGR_VCE_CONTROL__VI = 0x5E98; +constexpr unsigned int mmMCIF_WB_BUF_1_ADDR_C__VI = 0x5E8A; +constexpr unsigned int mmMCIF_WB_BUF_1_ADDR_C_OFFSET__VI = 0x5E8B; +constexpr unsigned int mmMCIF_WB_BUF_1_ADDR_Y__VI = 0x5E88; +constexpr unsigned int mmMCIF_WB_BUF_1_ADDR_Y_OFFSET__VI = 0x5E89; +constexpr unsigned int mmMCIF_WB_BUF_1_STATUS__VI = 0x5E7C; +constexpr unsigned int mmMCIF_WB_BUF_1_STATUS2__VI = 0x5E7D; +constexpr unsigned int mmMCIF_WB_BUF_2_ADDR_C__VI = 0x5E8E; +constexpr unsigned int mmMCIF_WB_BUF_2_ADDR_C_OFFSET__VI = 0x5E8F; +constexpr unsigned int mmMCIF_WB_BUF_2_ADDR_Y__VI = 0x5E8C; +constexpr unsigned int mmMCIF_WB_BUF_2_ADDR_Y_OFFSET__VI = 0x5E8D; +constexpr unsigned int mmMCIF_WB_BUF_2_STATUS__VI = 0x5E7E; +constexpr unsigned int mmMCIF_WB_BUF_2_STATUS2__VI = 0x5E7F; +constexpr unsigned int mmMCIF_WB_BUF_3_ADDR_C__VI = 0x5E92; +constexpr unsigned int mmMCIF_WB_BUF_3_ADDR_C_OFFSET__VI = 0x5E93; +constexpr unsigned int mmMCIF_WB_BUF_3_ADDR_Y__VI = 0x5E90; +constexpr unsigned int mmMCIF_WB_BUF_3_ADDR_Y_OFFSET__VI = 0x5E91; +constexpr unsigned int mmMCIF_WB_BUF_3_STATUS__VI = 0x5E80; +constexpr unsigned int mmMCIF_WB_BUF_3_STATUS2__VI = 0x5E81; +constexpr unsigned int mmMCIF_WB_BUF_4_ADDR_C__VI = 0x5E96; +constexpr unsigned int mmMCIF_WB_BUF_4_ADDR_C_OFFSET__VI = 0x5E97; +constexpr unsigned int mmMCIF_WB_BUF_4_ADDR_Y__VI = 0x5E94; +constexpr unsigned int mmMCIF_WB_BUF_4_ADDR_Y_OFFSET__VI = 0x5E95; +constexpr unsigned int mmMCIF_WB_BUF_4_STATUS__VI = 0x5E82; +constexpr unsigned int mmMCIF_WB_BUF_4_STATUS2__VI = 0x5E83; +constexpr unsigned int mmMCIF_WB_BUF_PITCH__VI = 0x5E7B; +constexpr unsigned int mmMCIF_WB_HVVMID_CONTROL__VI = 0x5E99; +constexpr unsigned int mmMCIF_WB_TEST_DEBUG_DATA__VI = 0x5E87; +constexpr unsigned int mmMCIF_WB_TEST_DEBUG_INDEX__VI = 0x5E86; +constexpr unsigned int mmMCIF_WB_URGENCY_WATERMARK__VI = 0x5E85; +constexpr unsigned int mmMCIF_WRITE_COMBINE_CONTROL__VI = 0x030D; +constexpr unsigned int mmMC_ARB_ATOMIC__VI = 0x09BE; +constexpr unsigned int mmMC_ARB_GRUB__VI = 0x09C8; +constexpr unsigned int mmMC_ARB_GRUB2__VI = 0x0A01; +constexpr unsigned int mmMC_ARB_GRUB_PRIORITY1_RD__VI = 0x0DD8; +constexpr unsigned int mmMC_ARB_GRUB_PRIORITY1_WR__VI = 0x0DD9; +constexpr unsigned int mmMC_ARB_GRUB_PRIORITY2_RD__VI = 0x0DDA; +constexpr unsigned int mmMC_ARB_GRUB_PRIORITY2_WR__VI = 0x0DDB; +constexpr unsigned int mmMC_ARB_GRUB_PROMOTE__VI = 0x09CE; +constexpr unsigned int mmMC_ARB_GRUB_REALTIME_RD__VI = 0x09F9; +constexpr unsigned int mmMC_ARB_GRUB_REALTIME_WR__VI = 0x09FB; +constexpr unsigned int mmMC_ARB_PERF_CID__VI = 0x09C6; +constexpr unsigned int mmMC_ARB_SNOOP__VI = 0x09C7; +constexpr unsigned int mmMC_BIST_CMD__VI = 0x0A85; +constexpr unsigned int mmMC_BIST_CNTL__SI__CI = 0x0A05; +constexpr unsigned int mmMC_BIST_CNTL__VI = 0x0A84; +constexpr unsigned int mmMC_BIST_DAT__VI = 0x0A86; +constexpr unsigned int mmMC_BIST_DATA_WORD0__SI__CI = 0x0A0A; +constexpr unsigned int mmMC_BIST_DATA_WORD0__VI = 0x0A8A; +constexpr unsigned int mmMC_BIST_DATA_WORD1__SI__CI = 0x0A0B; +constexpr unsigned int mmMC_BIST_DATA_WORD1__VI = 0x0A8B; +constexpr unsigned int mmMC_BIST_DATA_WORD2__SI__CI = 0x0A0C; +constexpr unsigned int mmMC_BIST_DATA_WORD2__VI = 0x0A8C; +constexpr unsigned int mmMC_BIST_DATA_WORD3__SI__CI = 0x0A0D; +constexpr unsigned int mmMC_BIST_DATA_WORD3__VI = 0x0A8D; +constexpr unsigned int mmMC_BIST_DATA_WORD4__SI__CI = 0x0A0E; +constexpr unsigned int mmMC_BIST_DATA_WORD4__VI = 0x0A8E; +constexpr unsigned int mmMC_BIST_DATA_WORD5__SI__CI = 0x0A0F; +constexpr unsigned int mmMC_BIST_DATA_WORD5__VI = 0x0A8F; +constexpr unsigned int mmMC_BIST_DATA_WORD6__SI__CI = 0x0A10; +constexpr unsigned int mmMC_BIST_DATA_WORD6__VI = 0x0A90; +constexpr unsigned int mmMC_BIST_DATA_WORD7__SI__CI = 0x0A11; +constexpr unsigned int mmMC_BIST_DATA_WORD7__VI = 0x0A91; +constexpr unsigned int mmMC_BIST_MISMATCH_ADDR__SI__CI = 0x0A13; +constexpr unsigned int mmMC_BIST_MISMATCH_ADDR__VI = 0x0A93; +constexpr unsigned int mmMC_BIST_RDATA_WORD0__SI__CI = 0x0A14; +constexpr unsigned int mmMC_BIST_RDATA_WORD0__VI = 0x0A94; +constexpr unsigned int mmMC_BIST_RDATA_WORD1__SI__CI = 0x0A15; +constexpr unsigned int mmMC_BIST_RDATA_WORD1__VI = 0x0A95; +constexpr unsigned int mmMC_BIST_RDATA_WORD2__SI__CI = 0x0A16; +constexpr unsigned int mmMC_BIST_RDATA_WORD2__VI = 0x0A96; +constexpr unsigned int mmMC_BIST_RDATA_WORD3__SI__CI = 0x0A17; +constexpr unsigned int mmMC_BIST_RDATA_WORD3__VI = 0x0A97; +constexpr unsigned int mmMC_BIST_RDATA_WORD4__SI__CI = 0x0A18; +constexpr unsigned int mmMC_BIST_RDATA_WORD4__VI = 0x0A98; +constexpr unsigned int mmMC_BIST_RDATA_WORD5__SI__CI = 0x0A19; +constexpr unsigned int mmMC_BIST_RDATA_WORD5__VI = 0x0A99; +constexpr unsigned int mmMC_BIST_RDATA_WORD6__SI__CI = 0x0A1A; +constexpr unsigned int mmMC_BIST_RDATA_WORD6__VI = 0x0A9A; +constexpr unsigned int mmMC_BIST_RDATA_WORD7__SI__CI = 0x0A1B; +constexpr unsigned int mmMC_BIST_RDATA_WORD7__VI = 0x0A9B; +constexpr unsigned int mmMC_CG_DATAPORT__SI__CI = 0x0A21; +constexpr unsigned int mmMC_CG_DATAPORT__VI = 0x0A32; +constexpr unsigned int mmMC_CITF_CREDITS_ARB_RD2__VI = 0x097E; +constexpr unsigned int mmMC_DC_INTERFACE_NACK_STATUS__VI = 0x0313; +constexpr unsigned int mmMC_FUS_ARB_GARLIC_CNTL__VI = 0x0A20; +constexpr unsigned int mmMC_FUS_ARB_GARLIC_ISOC_PRI__VI = 0x0A1F; +constexpr unsigned int mmMC_FUS_ARB_GARLIC_WR_PRI__VI = 0x0A21; +constexpr unsigned int mmMC_FUS_ARB_GARLIC_WR_PRI2__VI = 0x0A22; +constexpr unsigned int mmMC_FUS_DRAM0_BANK_ADDR_MAPPING__VI = 0x0A11; +constexpr unsigned int mmMC_FUS_DRAM0_CS0_BASE__VI = 0x0A05; +constexpr unsigned int mmMC_FUS_DRAM0_CS1_BASE__VI = 0x0A07; +constexpr unsigned int mmMC_FUS_DRAM0_CS2_BASE__VI = 0x0A09; +constexpr unsigned int mmMC_FUS_DRAM0_CS3_BASE__VI = 0x0A0B; +constexpr unsigned int mmMC_FUS_DRAM0_CTL_BASE__VI = 0x0A13; +constexpr unsigned int mmMC_FUS_DRAM0_CTL_LIMIT__VI = 0x0A15; +constexpr unsigned int mmMC_FUS_DRAM1_BANK_ADDR_MAPPING__VI = 0x0A12; +constexpr unsigned int mmMC_FUS_DRAM1_CS0_BASE__VI = 0x0A06; +constexpr unsigned int mmMC_FUS_DRAM1_CS1_BASE__VI = 0x0A08; +constexpr unsigned int mmMC_FUS_DRAM1_CS2_BASE__VI = 0x0A0A; +constexpr unsigned int mmMC_FUS_DRAM1_CS3_BASE__VI = 0x0A0C; +constexpr unsigned int mmMC_FUS_DRAM1_CTL_BASE__VI = 0x0A14; +constexpr unsigned int mmMC_FUS_DRAM1_CTL_LIMIT__VI = 0x0A16; +constexpr unsigned int mmMC_FUS_DRAM_APER_BASE__VI = 0x0A1A; +constexpr unsigned int mmMC_FUS_DRAM_APER_DEF__VI = 0x0A1E; +constexpr unsigned int mmMC_FUS_DRAM_APER_TOP__VI = 0x0A1B; +constexpr unsigned int mmMC_FUS_DRAM_CTL_HIGH_01__VI = 0x0A17; +constexpr unsigned int mmMC_FUS_DRAM_CTL_HIGH_23__VI = 0x0A18; +constexpr unsigned int mmMC_FUS_DRAM_MODE__VI = 0x0A19; +constexpr unsigned int mmMC_GRUB_FEATURES__VI = 0x0A36; +constexpr unsigned int mmMC_GRUB_PERFCOUNTER0_CFG__VI = 0x07E6; +constexpr unsigned int mmMC_GRUB_PERFCOUNTER1_CFG__VI = 0x07E7; +constexpr unsigned int mmMC_GRUB_PERFCOUNTER_HI__VI = 0x07E5; +constexpr unsigned int mmMC_GRUB_PERFCOUNTER_LO__VI = 0x07E4; +constexpr unsigned int mmMC_GRUB_PERFCOUNTER_RSLT_CNTL__VI = 0x07E8; +constexpr unsigned int mmMC_GRUB_POST_PROBE_DELAY__VI = 0x0A34; +constexpr unsigned int mmMC_GRUB_PROBE_CREDITS__VI = 0x0A35; +constexpr unsigned int mmMC_GRUB_PROBE_MAP__VI = 0x0A33; +constexpr unsigned int mmMC_GRUB_TCB_DATA_HI__VI = 0x0A3A; +constexpr unsigned int mmMC_GRUB_TCB_DATA_LO__VI = 0x0A39; +constexpr unsigned int mmMC_GRUB_TCB_INDEX__VI = 0x0A38; +constexpr unsigned int mmMC_GRUB_TX_CREDITS__VI = 0x0A37; +constexpr unsigned int mmMC_HUB_MISC_ATOMIC_IDLE_STATUS__VI = 0x084F; +constexpr unsigned int mmMC_HUB_RDREQ_ACPG__VI = 0x0881; +constexpr unsigned int mmMC_HUB_RDREQ_ACPO__VI = 0x0882; +constexpr unsigned int mmMC_HUB_RDREQ_BYPASS_GBL0__VI = 0x084C; +constexpr unsigned int mmMC_HUB_RDREQ_DMIF__VI = 0x0862; +constexpr unsigned int mmMC_HUB_RDREQ_HDP__VI = 0x085A; +constexpr unsigned int mmMC_HUB_RDREQ_ISP_CCPU__VI = 0x0DE2; +constexpr unsigned int mmMC_HUB_RDREQ_ISP_MPM__VI = 0x0DE1; +constexpr unsigned int mmMC_HUB_RDREQ_ISP_SPM__VI = 0x0DE0; +constexpr unsigned int mmMC_HUB_RDREQ_MCDS__VI = 0x0DE7; +constexpr unsigned int mmMC_HUB_RDREQ_MCDT__VI = 0x0DE8; +constexpr unsigned int mmMC_HUB_RDREQ_MCDU__VI = 0x0DE9; +constexpr unsigned int mmMC_HUB_RDREQ_MCDV__VI = 0x0DEA; +constexpr unsigned int mmMC_HUB_RDREQ_MCIF__VI = 0x0863; +constexpr unsigned int mmMC_HUB_RDREQ_RLC__VI = 0x085C; +constexpr unsigned int mmMC_HUB_RDREQ_SAMMSP__VI = 0x0883; +constexpr unsigned int mmMC_HUB_RDREQ_SDMA0__VI = 0x0859; +constexpr unsigned int mmMC_HUB_RDREQ_SDMA1__VI = 0x085B; +constexpr unsigned int mmMC_HUB_RDREQ_SEM__VI = 0x085D; +constexpr unsigned int mmMC_HUB_RDREQ_TLS__VI = 0x0861; +constexpr unsigned int mmMC_HUB_RDREQ_UMC__VI = 0x085F; +constexpr unsigned int mmMC_HUB_RDREQ_UVD__VI = 0x0860; +constexpr unsigned int mmMC_HUB_RDREQ_VCE0__VI = 0x085E; +constexpr unsigned int mmMC_HUB_RDREQ_VCE1__VI = 0x0DFC; +constexpr unsigned int mmMC_HUB_RDREQ_VCEU0__VI = 0x0865; +constexpr unsigned int mmMC_HUB_RDREQ_VCEU1__VI = 0x0DFD; +constexpr unsigned int mmMC_HUB_RDREQ_VMC__VI = 0x0864; +constexpr unsigned int mmMC_HUB_RDREQ_VP8__VI = 0x0884; +constexpr unsigned int mmMC_HUB_RDREQ_VP8U__VI = 0x0885; +constexpr unsigned int mmMC_HUB_RDREQ_XDMAM__VI = 0x0880; +constexpr unsigned int mmMC_HUB_WDP_ACPG__VI = 0x0885; +constexpr unsigned int mmMC_HUB_WDP_ACPO__VI = 0x0886; +constexpr unsigned int mmMC_HUB_WDP_BP2__VI = 0x0DFB; +constexpr unsigned int mmMC_HUB_WDP_BYPASS_GBL0__VI = 0x084A; +constexpr unsigned int mmMC_HUB_WDP_BYPASS_GBL1__VI = 0x084B; +constexpr unsigned int mmMC_HUB_WDP_CREDITS2__VI = 0x0840; +constexpr unsigned int mmMC_HUB_WDP_CREDITS3__VI = 0x0843; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDS__VI = 0x0DF7; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDT__VI = 0x0DF8; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDU__VI = 0x0DF9; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDV__VI = 0x0DFA; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDW__VI = 0x0DF3; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDX__VI = 0x0DF4; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDY__VI = 0x0DF5; +constexpr unsigned int mmMC_HUB_WDP_CREDITS_MCDZ__VI = 0x0DF6; +constexpr unsigned int mmMC_HUB_WDP_HDP__VI = 0x0877; +constexpr unsigned int mmMC_HUB_WDP_IH__VI = 0x0870; +constexpr unsigned int mmMC_HUB_WDP_ISP_CCPU__VI = 0x0DE6; +constexpr unsigned int mmMC_HUB_WDP_ISP_MPM__VI = 0x0DE5; +constexpr unsigned int mmMC_HUB_WDP_ISP_MPS__VI = 0x0DE4; +constexpr unsigned int mmMC_HUB_WDP_ISP_SPM__VI = 0x0DE3; +constexpr unsigned int mmMC_HUB_WDP_MCDS__VI = 0x0DEB; +constexpr unsigned int mmMC_HUB_WDP_MCDT__VI = 0x0DEC; +constexpr unsigned int mmMC_HUB_WDP_MCDU__VI = 0x0DED; +constexpr unsigned int mmMC_HUB_WDP_MCDV__VI = 0x0DEE; +constexpr unsigned int mmMC_HUB_WDP_MCDW__VI = 0x0866; +constexpr unsigned int mmMC_HUB_WDP_MCDX__VI = 0x0867; +constexpr unsigned int mmMC_HUB_WDP_MCDY__VI = 0x0868; +constexpr unsigned int mmMC_HUB_WDP_MCDZ__VI = 0x0869; +constexpr unsigned int mmMC_HUB_WDP_MCIF__VI = 0x086D; +constexpr unsigned int mmMC_HUB_WDP_RLC__VI = 0x0871; +constexpr unsigned int mmMC_HUB_WDP_SAMMSP__VI = 0x0887; +constexpr unsigned int mmMC_HUB_WDP_SDMA0__VI = 0x0878; +constexpr unsigned int mmMC_HUB_WDP_SDMA1__VI = 0x086B; +constexpr unsigned int mmMC_HUB_WDP_SEM__VI = 0x0872; +constexpr unsigned int mmMC_HUB_WDP_SH0__VI = 0x086C; +constexpr unsigned int mmMC_HUB_WDP_SH1__VI = 0x0874; +constexpr unsigned int mmMC_HUB_WDP_SIP__VI = 0x086A; +constexpr unsigned int mmMC_HUB_WDP_SMU__VI = 0x0873; +constexpr unsigned int mmMC_HUB_WDP_UMC__VI = 0x0875; +constexpr unsigned int mmMC_HUB_WDP_UVD__VI = 0x0876; +constexpr unsigned int mmMC_HUB_WDP_VCE0__VI = 0x086E; +constexpr unsigned int mmMC_HUB_WDP_VCE1__VI = 0x0DFE; +constexpr unsigned int mmMC_HUB_WDP_VCEU0__VI = 0x087D; +constexpr unsigned int mmMC_HUB_WDP_VCEU1__VI = 0x0DFF; +constexpr unsigned int mmMC_HUB_WDP_VIN0__VI = 0x0850; +constexpr unsigned int mmMC_HUB_WDP_VP8__VI = 0x0888; +constexpr unsigned int mmMC_HUB_WDP_VP8U__VI = 0x088A; +constexpr unsigned int mmMC_HUB_WDP_XDMA__VI = 0x087F; +constexpr unsigned int mmMC_HUB_WDP_XDMAM__VI = 0x087E; +constexpr unsigned int mmMC_HUB_WDP_XDP__VI = 0x086F; +constexpr unsigned int mmMC_HUB_WRRET_MCDS__VI = 0x0DEF; +constexpr unsigned int mmMC_HUB_WRRET_MCDT__VI = 0x0DF0; +constexpr unsigned int mmMC_HUB_WRRET_MCDU__VI = 0x0DF1; +constexpr unsigned int mmMC_HUB_WRRET_MCDV__VI = 0x0DF2; +constexpr unsigned int mmMC_HUB_WRRET_MCDW__VI = 0x0879; +constexpr unsigned int mmMC_HUB_WRRET_MCDX__VI = 0x087A; +constexpr unsigned int mmMC_HUB_WRRET_MCDY__VI = 0x087B; +constexpr unsigned int mmMC_HUB_WRRET_MCDZ__VI = 0x087C; +constexpr unsigned int mmMC_PMG_CFG__SI__CI = 0x0A84; +constexpr unsigned int mmMC_PMG_CFG__VI = 0x0A54; +constexpr unsigned int mmMC_PMG_CMD_EMRS__SI__CI = 0x0A83; +constexpr unsigned int mmMC_PMG_CMD_EMRS__VI = 0x0A4A; +constexpr unsigned int mmMC_PMG_CMD_MRS__SI__CI = 0x0AAB; +constexpr unsigned int mmMC_PMG_CMD_MRS__VI = 0x0A4C; +constexpr unsigned int mmMC_PMG_CMD_MRS1__SI__CI = 0x0AD1; +constexpr unsigned int mmMC_PMG_CMD_MRS1__VI = 0x0A4E; +constexpr unsigned int mmMC_PMG_CMD_MRS2__SI__CI = 0x0AD7; +constexpr unsigned int mmMC_PMG_CMD_MRS2__VI = 0x0A50; +constexpr unsigned int mmMC_RPB_TCI_CNTL__VI = 0x095C; +constexpr unsigned int mmMC_RPB_TCI_CNTL2__VI = 0x095D; +constexpr unsigned int mmMC_SEQ_CAS_TIMING__SI__CI = 0x0A29; +constexpr unsigned int mmMC_SEQ_CAS_TIMING__VI = 0x0A2B; +constexpr unsigned int mmMC_SEQ_CAS_TIMING_LP__SI__CI = 0x0A9C; +constexpr unsigned int mmMC_SEQ_CAS_TIMING_LP__VI = 0x0A2C; +constexpr unsigned int mmMC_SEQ_CG__SI__CI = 0x0A9A; +constexpr unsigned int mmMC_SEQ_CG__VI = 0x0A7B; +constexpr unsigned int mmMC_SEQ_CMD__SI__CI = 0x0A31; +constexpr unsigned int mmMC_SEQ_CMD__VI = 0x0A47; +constexpr unsigned int mmMC_SEQ_CNTL__SI__CI = 0x0A25; +constexpr unsigned int mmMC_SEQ_CNTL__VI = 0x0A24; +constexpr unsigned int mmMC_SEQ_CNTL_2__SI__CI = 0x0AD4; +constexpr unsigned int mmMC_SEQ_CNTL_2__VI = 0x0A25; +constexpr unsigned int mmMC_SEQ_CNTL_3__VI = 0x0A26; +constexpr unsigned int mmMC_SEQ_DRAM__SI__CI = 0x0A26; +constexpr unsigned int mmMC_SEQ_DRAM__VI = 0x0A27; +constexpr unsigned int mmMC_SEQ_DRAM_2__SI__CI = 0x0A27; +constexpr unsigned int mmMC_SEQ_DRAM_2__VI = 0x0A28; +constexpr unsigned int mmMC_SEQ_FIFO_CTL__SI__CI = 0x0A57; +constexpr unsigned int mmMC_SEQ_FIFO_CTL__VI = 0x0A5D; +constexpr unsigned int mmMC_SEQ_IO_DEBUG_DATA__SI__CI = 0x0A92; +constexpr unsigned int mmMC_SEQ_IO_DEBUG_DATA__VI = 0x0ABD; +constexpr unsigned int mmMC_SEQ_IO_DEBUG_INDEX__SI__CI = 0x0A91; +constexpr unsigned int mmMC_SEQ_IO_DEBUG_INDEX__VI = 0x0ABC; +constexpr unsigned int mmMC_SEQ_IO_RESERVE__VI = 0x0A61; +constexpr unsigned int mmMC_SEQ_MISC0__SI__CI = 0x0A80; +constexpr unsigned int mmMC_SEQ_MISC0__VI = 0x0A71; +constexpr unsigned int mmMC_SEQ_MISC1__SI__CI = 0x0A81; +constexpr unsigned int mmMC_SEQ_MISC1__VI = 0x0A72; +constexpr unsigned int mmMC_SEQ_MISC3__SI__CI = 0x0A8B; +constexpr unsigned int mmMC_SEQ_MISC3__VI = 0x0A74; +constexpr unsigned int mmMC_SEQ_MISC4__SI__CI = 0x0A8C; +constexpr unsigned int mmMC_SEQ_MISC4__VI = 0x0A75; +constexpr unsigned int mmMC_SEQ_MISC5__SI__CI = 0x0A95; +constexpr unsigned int mmMC_SEQ_MISC5__VI = 0x0A76; +constexpr unsigned int mmMC_SEQ_MISC6__SI__CI = 0x0A96; +constexpr unsigned int mmMC_SEQ_MISC6__VI = 0x0A77; +constexpr unsigned int mmMC_SEQ_MISC7__SI__CI = 0x0A99; +constexpr unsigned int mmMC_SEQ_MISC7__VI = 0x0A78; +constexpr unsigned int mmMC_SEQ_MISC8__SI__CI = 0x0A5F; +constexpr unsigned int mmMC_SEQ_MISC8__VI = 0x0A79; +constexpr unsigned int mmMC_SEQ_MISC9__SI__CI = 0x0AE7; +constexpr unsigned int mmMC_SEQ_MISC9__VI = 0x0A7A; +constexpr unsigned int mmMC_SEQ_MISC_TIMING__SI__CI = 0x0A2A; +constexpr unsigned int mmMC_SEQ_MISC_TIMING__VI = 0x0A2D; +constexpr unsigned int mmMC_SEQ_MISC_TIMING2__SI__CI = 0x0A2B; +constexpr unsigned int mmMC_SEQ_MISC_TIMING2__VI = 0x0A2F; +constexpr unsigned int mmMC_SEQ_MISC_TIMING2_LP__SI__CI = 0x0A9E; +constexpr unsigned int mmMC_SEQ_MISC_TIMING2_LP__VI = 0x0A30; +constexpr unsigned int mmMC_SEQ_MISC_TIMING_LP__SI__CI = 0x0A9D; +constexpr unsigned int mmMC_SEQ_MISC_TIMING_LP__VI = 0x0A2E; +constexpr unsigned int mmMC_SEQ_PMG_TIMING__SI__CI = 0x0A2C; +constexpr unsigned int mmMC_SEQ_PMG_TIMING__VI = 0x0A31; +constexpr unsigned int mmMC_SEQ_PMG_TIMING_LP__SI__CI = 0x0AD3; +constexpr unsigned int mmMC_SEQ_PMG_TIMING_LP__VI = 0x0A32; +constexpr unsigned int mmMC_SEQ_RAS_TIMING__SI__CI = 0x0A28; +constexpr unsigned int mmMC_SEQ_RAS_TIMING__VI = 0x0A29; +constexpr unsigned int mmMC_SEQ_RAS_TIMING_LP__SI__CI = 0x0A9B; +constexpr unsigned int mmMC_SEQ_RAS_TIMING_LP__VI = 0x0A2A; +constexpr unsigned int mmMC_SEQ_RD_CTL_D0__SI__CI = 0x0A2D; +constexpr unsigned int mmMC_SEQ_RD_CTL_D0__VI = 0x0A33; +constexpr unsigned int mmMC_SEQ_RD_CTL_D0_LP__SI__CI = 0x0AC7; +constexpr unsigned int mmMC_SEQ_RD_CTL_D0_LP__VI = 0x0A34; +constexpr unsigned int mmMC_SEQ_RD_CTL_D1__SI__CI = 0x0A2E; +constexpr unsigned int mmMC_SEQ_RD_CTL_D1__VI = 0x0A35; +constexpr unsigned int mmMC_SEQ_RD_CTL_D1_LP__SI__CI = 0x0AC8; +constexpr unsigned int mmMC_SEQ_RD_CTL_D1_LP__VI = 0x0A36; +constexpr unsigned int mmMC_SEQ_RESERVE_0_S__SI__CI = 0x0A1E; +constexpr unsigned int mmMC_SEQ_RESERVE_0_S__VI = 0x0A07; +constexpr unsigned int mmMC_SEQ_RESERVE_1_S__SI__CI = 0x0A1F; +constexpr unsigned int mmMC_SEQ_RESERVE_1_S__VI = 0x0A08; +constexpr unsigned int mmMC_SEQ_RESERVE_M__SI__CI = 0x0A82; +constexpr unsigned int mmMC_SEQ_RESERVE_M__VI = 0x0A60; +constexpr unsigned int mmMC_SEQ_SREG_READ__VI = 0x0A7F; +constexpr unsigned int mmMC_SEQ_SREG_STATUS__VI = 0x0A80; +constexpr unsigned int mmMC_SEQ_STATUS_M__SI__CI = 0x0A7D; +constexpr unsigned int mmMC_SEQ_STATUS_M__VI = 0x0A5E; +constexpr unsigned int mmMC_SEQ_STATUS_S__SI__CI = 0x0A20; +constexpr unsigned int mmMC_SEQ_STATUS_S__VI = 0x0A05; +constexpr unsigned int mmMC_SEQ_SUP_CNTL__SI__CI = 0x0A32; +constexpr unsigned int mmMC_SEQ_SUP_CNTL__VI = 0x0A63; +constexpr unsigned int mmMC_SEQ_SUP_DEC_STAT__SI__CI = 0x0A88; +constexpr unsigned int mmMC_SEQ_SUP_DEC_STAT__VI = 0x0A6A; +constexpr unsigned int mmMC_SEQ_SUP_GP0_STAT__SI__CI = 0x0A8F; +constexpr unsigned int mmMC_SEQ_SUP_GP0_STAT__VI = 0x0A65; +constexpr unsigned int mmMC_SEQ_SUP_GP1_STAT__SI__CI = 0x0A90; +constexpr unsigned int mmMC_SEQ_SUP_GP1_STAT__VI = 0x0A66; +constexpr unsigned int mmMC_SEQ_SUP_GP2_STAT__SI__CI = 0x0A85; +constexpr unsigned int mmMC_SEQ_SUP_GP2_STAT__VI = 0x0A67; +constexpr unsigned int mmMC_SEQ_SUP_GP3_STAT__SI__CI = 0x0A86; +constexpr unsigned int mmMC_SEQ_SUP_GP3_STAT__VI = 0x0A68; +constexpr unsigned int mmMC_SEQ_SUP_IR_STAT__SI__CI = 0x0A87; +constexpr unsigned int mmMC_SEQ_SUP_IR_STAT__VI = 0x0A69; +constexpr unsigned int mmMC_SEQ_SUP_PGM__SI__CI = 0x0A33; +constexpr unsigned int mmMC_SEQ_SUP_PGM__VI = 0x0A64; +constexpr unsigned int mmMC_SEQ_SUP_PGM_STAT__SI__CI = 0x0A89; +constexpr unsigned int mmMC_SEQ_SUP_PGM_STAT__VI = 0x0A6B; +constexpr unsigned int mmMC_SEQ_SUP_R_PGM__SI__CI = 0x0A8A; +constexpr unsigned int mmMC_SEQ_SUP_R_PGM__VI = 0x0A6C; +constexpr unsigned int mmMC_SEQ_TIMER_RD__SI__CI = 0x0ACA; +constexpr unsigned int mmMC_SEQ_TIMER_RD__VI = 0x0A7D; +constexpr unsigned int mmMC_SEQ_TIMER_WR__SI__CI = 0x0AC9; +constexpr unsigned int mmMC_SEQ_TIMER_WR__VI = 0x0A7C; +constexpr unsigned int mmMC_SEQ_TRAIN_CAPTURE__SI__CI = 0x0A3E; +constexpr unsigned int mmMC_SEQ_TRAIN_CAPTURE__VI = 0x0A5B; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_CLEAR__SI__CI = 0x0A3F; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_CLEAR__VI = 0x0A5C; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_CNTL__SI__CI = 0x0A3A; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_CNTL__VI = 0x0A57; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_EDGE__SI__CI = 0x0A3C; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_EDGE__VI = 0x0A58; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_MASK__SI__CI = 0x0A3D; +constexpr unsigned int mmMC_SEQ_TRAIN_WAKEUP_MASK__VI = 0x0A59; +constexpr unsigned int mmMC_SEQ_WR_CTL_D0__SI__CI = 0x0A2F; +constexpr unsigned int mmMC_SEQ_WR_CTL_D0__VI = 0x0A3B; +constexpr unsigned int mmMC_SEQ_WR_CTL_D0_LP__SI__CI = 0x0A9F; +constexpr unsigned int mmMC_SEQ_WR_CTL_D0_LP__VI = 0x0A3C; +constexpr unsigned int mmMC_SEQ_WR_CTL_D1__SI__CI = 0x0A30; +constexpr unsigned int mmMC_SEQ_WR_CTL_D1__VI = 0x0A3D; +constexpr unsigned int mmMC_SEQ_WR_CTL_D1_LP__SI__CI = 0x0AA0; +constexpr unsigned int mmMC_SEQ_WR_CTL_D1_LP__VI = 0x0A3E; +constexpr unsigned int mmMC_SHARED_ACTIVE_FCN_ID__VI = 0x081F; +constexpr unsigned int mmMC_SHARED_CHREMAP2__VI = 0x081C; +constexpr unsigned int mmMC_SHARED_VF_ENABLE__VI = 0x081D; +constexpr unsigned int mmMC_SHARED_VIRT_RESET_REQ__VI = 0x081E; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF0__VI = 0xF980; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF1__VI = 0xF981; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF10__VI = 0xF98A; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF11__VI = 0xF98B; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF12__VI = 0xF98C; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF13__VI = 0xF98D; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF14__VI = 0xF98E; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF15__VI = 0xF98F; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF2__VI = 0xF982; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF3__VI = 0xF983; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF4__VI = 0xF984; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF5__VI = 0xF985; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF6__VI = 0xF986; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF7__VI = 0xF987; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF8__VI = 0xF988; +constexpr unsigned int mmMC_VM_FB_SIZE_OFFSET_VF9__VI = 0xF989; +constexpr unsigned int mmMC_VM_MARC_BASE_HI_0__VI = 0xF999; +constexpr unsigned int mmMC_VM_MARC_BASE_HI_1__VI = 0xF99F; +constexpr unsigned int mmMC_VM_MARC_BASE_HI_2__VI = 0xF9A5; +constexpr unsigned int mmMC_VM_MARC_BASE_HI_3__VI = 0xF9AB; +constexpr unsigned int mmMC_VM_MARC_BASE_LO_0__VI = 0xF998; +constexpr unsigned int mmMC_VM_MARC_BASE_LO_1__VI = 0xF99E; +constexpr unsigned int mmMC_VM_MARC_BASE_LO_2__VI = 0xF9A4; +constexpr unsigned int mmMC_VM_MARC_BASE_LO_3__VI = 0xF9AA; +constexpr unsigned int mmMC_VM_MARC_CNTL__VI = 0xF9B0; +constexpr unsigned int mmMC_VM_MARC_LEN_HI_0__VI = 0xF99D; +constexpr unsigned int mmMC_VM_MARC_LEN_HI_1__VI = 0xF9A3; +constexpr unsigned int mmMC_VM_MARC_LEN_HI_2__VI = 0xF9A9; +constexpr unsigned int mmMC_VM_MARC_LEN_HI_3__VI = 0xF9AF; +constexpr unsigned int mmMC_VM_MARC_LEN_LO_0__VI = 0xF99C; +constexpr unsigned int mmMC_VM_MARC_LEN_LO_1__VI = 0xF9A2; +constexpr unsigned int mmMC_VM_MARC_LEN_LO_2__VI = 0xF9A8; +constexpr unsigned int mmMC_VM_MARC_LEN_LO_3__VI = 0xF9AE; +constexpr unsigned int mmMC_VM_MARC_RELOC_HI_0__VI = 0xF99B; +constexpr unsigned int mmMC_VM_MARC_RELOC_HI_1__VI = 0xF9A1; +constexpr unsigned int mmMC_VM_MARC_RELOC_HI_2__VI = 0xF9A7; +constexpr unsigned int mmMC_VM_MARC_RELOC_HI_3__VI = 0xF9AD; +constexpr unsigned int mmMC_VM_MARC_RELOC_LO_0__VI = 0xF99A; +constexpr unsigned int mmMC_VM_MARC_RELOC_LO_1__VI = 0xF9A0; +constexpr unsigned int mmMC_VM_MARC_RELOC_LO_2__VI = 0xF9A6; +constexpr unsigned int mmMC_VM_MARC_RELOC_LO_3__VI = 0xF9AC; +constexpr unsigned int mmMC_VM_MB_L1_TLB1_DEBUG__VI = 0x0892; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL0__VI = 0xF9B1; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL1__VI = 0xF9B4; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL2__VI = 0xF9B7; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL3__VI = 0xF9BA; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL4__VI = 0xF9BD; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL5__VI = 0xF9C0; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL6__VI = 0xF9C3; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL7__VI = 0xF9C6; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_CNTL8__VI = 0xF9C9; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR0__VI = 0xF9B3; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR1__VI = 0xF9B6; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR2__VI = 0xF9B9; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR3__VI = 0xF9BC; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR4__VI = 0xF9BF; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR5__VI = 0xF9C2; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR6__VI = 0xF9C5; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR7__VI = 0xF9C8; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_END_ADDR8__VI = 0xF9CB; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_PROTECTION_FAULT_ADDR__VI = 0xF9CD; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_PROTECTION_FAULT_STATUS__VI = 0xF9CC; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR0__VI = 0xF9B2; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR1__VI = 0xF9B5; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR2__VI = 0xF9B8; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR3__VI = 0xF9BB; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR4__VI = 0xF9BE; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR5__VI = 0xF9C1; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR6__VI = 0xF9C4; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR7__VI = 0xF9C7; +constexpr unsigned int mmMC_VM_MB_L1_TLS0_START_ADDR8__VI = 0xF9CA; +constexpr unsigned int mmMC_VM_NB_LOWER_TOP_OF_DRAM2__VI = 0xF995; +constexpr unsigned int mmMC_VM_NB_MMIOBASE__VI = 0xF990; +constexpr unsigned int mmMC_VM_NB_MMIOLIMIT__VI = 0xF991; +constexpr unsigned int mmMC_VM_NB_PCI_ARB__VI = 0xF993; +constexpr unsigned int mmMC_VM_NB_PCI_CTRL__VI = 0xF992; +constexpr unsigned int mmMC_VM_NB_TOP_OF_DRAM3__VI = 0xF997; +constexpr unsigned int mmMC_VM_NB_TOP_OF_DRAM_SLOT1__VI = 0xF994; +constexpr unsigned int mmMC_VM_NB_UPPER_TOP_OF_DRAM2__VI = 0xF996; +constexpr unsigned int mmMC_XBAR_FIFO_MON_CNTL0__VI = 0x0C8F; +constexpr unsigned int mmMC_XBAR_FIFO_MON_CNTL1__VI = 0x0C90; +constexpr unsigned int mmMC_XBAR_FIFO_MON_CNTL2__VI = 0x0C91; +constexpr unsigned int mmMC_XBAR_FIFO_MON_MAX_THSH__VI = 0x0C96; +constexpr unsigned int mmMC_XBAR_FIFO_MON_RSLT0__VI = 0x0C92; +constexpr unsigned int mmMC_XBAR_FIFO_MON_RSLT1__VI = 0x0C93; +constexpr unsigned int mmMC_XBAR_FIFO_MON_RSLT2__VI = 0x0C94; +constexpr unsigned int mmMC_XBAR_FIFO_MON_RSLT3__VI = 0x0C95; +constexpr unsigned int mmMICROSECOND_TIME_BASE_DIV__VI = 0x013B; +constexpr unsigned int mmMILLISECOND_TIME_BASE_DIV__VI = 0x0130; +constexpr unsigned int mmMP_FPS_CNT__VI = 0x0235; +constexpr unsigned int mmMVP_AFR_FLIP_FIFO_CNTL__VI = 0x1AE1; +constexpr unsigned int mmMVP_AFR_FLIP_MODE__VI = 0x1AE0; +constexpr unsigned int mmMVP_BLACK_KEYER__VI = 0x02B2; +constexpr unsigned int mmMVP_CONTROL1__VI = 0x02AC; +constexpr unsigned int mmMVP_CONTROL2__VI = 0x02AD; +constexpr unsigned int mmMVP_CONTROL3__VI = 0x02B6; +constexpr unsigned int mmMVP_CRC_CNTL__VI = 0x02B3; +constexpr unsigned int mmMVP_CRC_RESULT_BLUE_GREEN__VI = 0x02B4; +constexpr unsigned int mmMVP_CRC_RESULT_RED__VI = 0x02B5; +constexpr unsigned int mmMVP_DEBUG__VI = 0x02BB; +constexpr unsigned int mmMVP_FIFO_CONTROL__VI = 0x02AE; +constexpr unsigned int mmMVP_FIFO_STATUS__VI = 0x02AF; +constexpr unsigned int mmMVP_FLIP_LINE_NUM_INSERT__VI = 0x1AE2; +constexpr unsigned int mmMVP_INBAND_CNTL_CAP__VI = 0x02B1; +constexpr unsigned int mmMVP_RECEIVE_CNT_CNTL1__VI = 0x02B7; +constexpr unsigned int mmMVP_RECEIVE_CNT_CNTL2__VI = 0x02B8; +constexpr unsigned int mmMVP_SLAVE_STATUS__VI = 0x02B0; +constexpr unsigned int mmMVP_TEST_DEBUG_DATA__VI = 0x02BA; +constexpr unsigned int mmMVP_TEST_DEBUG_INDEX__VI = 0x02B9; +constexpr unsigned int mmOUTPUT_CSC_C11_C12__VI = 0x1A3D; +constexpr unsigned int mmOUTPUT_CSC_C11_C12_A__VI = 0x46B7; +constexpr unsigned int mmOUTPUT_CSC_C11_C12_B__VI = 0x46BD; +constexpr unsigned int mmOUTPUT_CSC_C13_C14__VI = 0x1A3E; +constexpr unsigned int mmOUTPUT_CSC_C13_C14_A__VI = 0x46B8; +constexpr unsigned int mmOUTPUT_CSC_C13_C14_B__VI = 0x46BE; +constexpr unsigned int mmOUTPUT_CSC_C21_C22__VI = 0x1A3F; +constexpr unsigned int mmOUTPUT_CSC_C21_C22_A__VI = 0x46B9; +constexpr unsigned int mmOUTPUT_CSC_C21_C22_B__VI = 0x46BF; +constexpr unsigned int mmOUTPUT_CSC_C23_C24__VI = 0x1A40; +constexpr unsigned int mmOUTPUT_CSC_C23_C24_A__VI = 0x46BA; +constexpr unsigned int mmOUTPUT_CSC_C23_C24_B__VI = 0x46C0; +constexpr unsigned int mmOUTPUT_CSC_C31_C32__VI = 0x1A41; +constexpr unsigned int mmOUTPUT_CSC_C31_C32_A__VI = 0x46BB; +constexpr unsigned int mmOUTPUT_CSC_C31_C32_B__VI = 0x46C1; +constexpr unsigned int mmOUTPUT_CSC_C33_C34__VI = 0x1A42; +constexpr unsigned int mmOUTPUT_CSC_C33_C34_A__VI = 0x46BC; +constexpr unsigned int mmOUTPUT_CSC_C33_C34_B__VI = 0x46C2; +constexpr unsigned int mmOUTPUT_CSC_CONTROL__VI = 0x1A3C; +constexpr unsigned int mmOUT_CLAMP_CONTROL_B_CB__VI = 0x1A9D; +constexpr unsigned int mmOUT_CLAMP_CONTROL_G_Y__VI = 0x1A9C; +constexpr unsigned int mmOUT_CLAMP_CONTROL_R_CR__VI = 0x1A52; +constexpr unsigned int mmOUT_ROUND_CONTROL__VI = 0x1A51; +constexpr unsigned int mmOVL_SECONDARY_SURFACE_ADDRESS__VI = 0x1A92; +constexpr unsigned int mmOVL_SECONDARY_SURFACE_ADDRESS_HIGH__VI = 0x1A94; +constexpr unsigned int mmOVL_STEREOSYNC_FLIP__VI = 0x1A93; +constexpr unsigned int mmPCIE_EFUSE__VI = 0x0FC0; +constexpr unsigned int mmPCIE_EFUSE2__VI = 0x0FC1; +constexpr unsigned int mmPCIE_EFUSE3__VI = 0x0FC2; +constexpr unsigned int mmPCIE_EFUSE4__VI = 0x0FC3; +constexpr unsigned int mmPCIE_EFUSE5__VI = 0x0FC4; +constexpr unsigned int mmPCIE_EFUSE6__VI = 0x0FC5; +constexpr unsigned int mmPCIE_EFUSE7__VI = 0x0FC6; +constexpr unsigned int mmPERFCOUNTER_CNTL__VI = 0x0170; +constexpr unsigned int mmPERFCOUNTER_STATE__VI = 0x0171; +constexpr unsigned int mmPERFMON_CNTL__VI = 0x0173; +constexpr unsigned int mmPERFMON_CNTL2__VI = 0x017A; +constexpr unsigned int mmPERFMON_CVALUE_INT_MISC__VI = 0x0172; +constexpr unsigned int mmPERFMON_CVALUE_LOW__VI = 0x0174; +constexpr unsigned int mmPERFMON_HI__VI = 0x0175; +constexpr unsigned int mmPERFMON_LOW__VI = 0x0176; +constexpr unsigned int mmPERFMON_TEST_DEBUG_DATA__VI = 0x0178; +constexpr unsigned int mmPERFMON_TEST_DEBUG_INDEX__VI = 0x0177; +constexpr unsigned int mmPHY_AUX_CNTL__VI = 0x4897; +constexpr unsigned int mmPIPE0_ARBITRATION_CONTROL3__VI = 0x02FA; +constexpr unsigned int mmPIPE0_DMIF_BUFFER_CONTROL__VI = 0x0321; +constexpr unsigned int mmPIPE0_MAX_REQUESTS__VI = 0x0305; +constexpr unsigned int mmPIPE0_PG_CONFIG__VI = 0x02C0; +constexpr unsigned int mmPIPE0_PG_ENABLE__VI = 0x02C1; +constexpr unsigned int mmPIPE0_PG_STATUS__VI = 0x02C2; +constexpr unsigned int mmPIPE1_ARBITRATION_CONTROL3__VI = 0x02FB; +constexpr unsigned int mmPIPE1_DMIF_BUFFER_CONTROL__VI = 0x0322; +constexpr unsigned int mmPIPE1_MAX_REQUESTS__VI = 0x0306; +constexpr unsigned int mmPIPE1_PG_CONFIG__VI = 0x02C3; +constexpr unsigned int mmPIPE1_PG_ENABLE__VI = 0x02C4; +constexpr unsigned int mmPIPE1_PG_STATUS__VI = 0x02C5; +constexpr unsigned int mmPIPE2_ARBITRATION_CONTROL3__VI = 0x02FC; +constexpr unsigned int mmPIPE2_DMIF_BUFFER_CONTROL__VI = 0x0323; +constexpr unsigned int mmPIPE2_MAX_REQUESTS__VI = 0x0307; +constexpr unsigned int mmPIPE2_PG_CONFIG__VI = 0x02C6; +constexpr unsigned int mmPIPE2_PG_ENABLE__VI = 0x02C7; +constexpr unsigned int mmPIPE2_PG_STATUS__VI = 0x02C8; +constexpr unsigned int mmPIPE3_ARBITRATION_CONTROL3__VI = 0x02FD; +constexpr unsigned int mmPIPE3_DMIF_BUFFER_CONTROL__VI = 0x0324; +constexpr unsigned int mmPIPE3_MAX_REQUESTS__VI = 0x0308; +constexpr unsigned int mmPIPE3_PG_CONFIG__VI = 0x02C9; +constexpr unsigned int mmPIPE3_PG_ENABLE__VI = 0x02CA; +constexpr unsigned int mmPIPE3_PG_STATUS__VI = 0x02CB; +constexpr unsigned int mmPIPE4_ARBITRATION_CONTROL3__VI = 0x02FE; +constexpr unsigned int mmPIPE4_DMIF_BUFFER_CONTROL__VI = 0x0325; +constexpr unsigned int mmPIPE4_MAX_REQUESTS__VI = 0x0309; +constexpr unsigned int mmPIPE4_PG_CONFIG__VI = 0x02CC; +constexpr unsigned int mmPIPE4_PG_ENABLE__VI = 0x02CD; +constexpr unsigned int mmPIPE4_PG_STATUS__VI = 0x02CE; +constexpr unsigned int mmPIPE5_ARBITRATION_CONTROL3__VI = 0x02FF; +constexpr unsigned int mmPIPE5_DMIF_BUFFER_CONTROL__VI = 0x0326; +constexpr unsigned int mmPIPE5_MAX_REQUESTS__VI = 0x030A; +constexpr unsigned int mmPIPE5_PG_CONFIG__VI = 0x02CF; +constexpr unsigned int mmPIPE5_PG_ENABLE__VI = 0x02D0; +constexpr unsigned int mmPIPE5_PG_STATUS__VI = 0x02D1; +constexpr unsigned int mmPIPE6_ARBITRATION_CONTROL3__VI = 0x032A; +constexpr unsigned int mmPIPE6_MAX_REQUESTS__VI = 0x032C; +constexpr unsigned int mmPIPE7_ARBITRATION_CONTROL3__VI = 0x032B; +constexpr unsigned int mmPIPE7_MAX_REQUESTS__VI = 0x032D; +constexpr unsigned int mmPIXCLK0_RESYNC_CNTL__VI = 0x013A; +constexpr unsigned int mmPIXCLK1_RESYNC_CNTL__VI = 0x0138; +constexpr unsigned int mmPIXCLK2_RESYNC_CNTL__VI = 0x0139; +constexpr unsigned int mmPLL_ANALOG__VI = 0x1708; +constexpr unsigned int mmPLL_ANALOG_CNTL__VI = 0x1711; +constexpr unsigned int mmPLL_CNTL__VI = 0x1707; +constexpr unsigned int mmPLL_DEBUG_CNTL__VI = 0x170B; +constexpr unsigned int mmPLL_DS_CNTL__VI = 0x1705; +constexpr unsigned int mmPLL_FB_DIV__VI = 0x1701; +constexpr unsigned int mmPLL_IDCLK_CNTL__VI = 0x1706; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED0__VI = 0x1700; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED1__VI = 0x1701; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED10__VI = 0x170A; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED11__VI = 0x170B; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED12__VI = 0x170C; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED13__VI = 0x170D; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED14__VI = 0x170E; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED15__VI = 0x170F; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED16__VI = 0x1710; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED17__VI = 0x1711; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED18__VI = 0x1712; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED19__VI = 0x1713; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED2__VI = 0x1702; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED20__VI = 0x1714; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED21__VI = 0x1715; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED22__VI = 0x1716; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED23__VI = 0x1717; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED24__VI = 0x1718; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED25__VI = 0x1719; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED26__VI = 0x171A; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED27__VI = 0x171B; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED28__VI = 0x171C; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED29__VI = 0x171D; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED3__VI = 0x1703; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED30__VI = 0x171E; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED31__VI = 0x171F; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED32__VI = 0x1720; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED33__VI = 0x1721; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED34__VI = 0x1722; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED35__VI = 0x1723; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED36__VI = 0x1724; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED37__VI = 0x1725; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED38__VI = 0x1726; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED39__VI = 0x1727; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED4__VI = 0x1704; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED40__VI = 0x1728; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED41__VI = 0x1729; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED5__VI = 0x1705; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED6__VI = 0x1706; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED7__VI = 0x1707; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED8__VI = 0x1708; +constexpr unsigned int mmPLL_MACRO_CNTL_RESERVED9__VI = 0x1709; +constexpr unsigned int mmPLL_POST_DIV__VI = 0x1702; +constexpr unsigned int mmPLL_REF_DIV__VI = 0x1700; +constexpr unsigned int mmPLL_SS_AMOUNT_DSFRAC__VI = 0x1703; +constexpr unsigned int mmPLL_SS_CNTL__VI = 0x1704; +constexpr unsigned int mmPLL_UNLOCK_DETECT_CNTL__VI = 0x170A; +constexpr unsigned int mmPLL_UPDATE_CNTL__VI = 0x170D; +constexpr unsigned int mmPLL_UPDATE_LOCK__VI = 0x170C; +constexpr unsigned int mmPLL_VREG_CNTL__VI = 0x1709; +constexpr unsigned int mmPLL_XOR_LOCK__VI = 0x1710; +constexpr unsigned int mmPPLL_DEBUG_MUX_CNTL__VI = 0x1721; +constexpr unsigned int mmPPLL_DIV_UPDATE_DEBUG__VI = 0x171F; +constexpr unsigned int mmPPLL_SPARE0__VI = 0x1722; +constexpr unsigned int mmPPLL_SPARE1__VI = 0x1723; +constexpr unsigned int mmPPLL_STATUS_DEBUG__VI = 0x1720; +constexpr unsigned int mmPRESCALE_CONTROL__VI = 0x46B2; +constexpr unsigned int mmPRESCALE_GRPH_CONTROL__VI = 0x1A2D; +constexpr unsigned int mmPRESCALE_OVL_CONTROL__VI = 0x1A31; +constexpr unsigned int mmPRESCALE_VALUES_B__VI = 0x46B5; +constexpr unsigned int mmPRESCALE_VALUES_G__VI = 0x46B4; +constexpr unsigned int mmPRESCALE_VALUES_GRPH_B__VI = 0x1A30; +constexpr unsigned int mmPRESCALE_VALUES_GRPH_G__VI = 0x1A2F; +constexpr unsigned int mmPRESCALE_VALUES_GRPH_R__VI = 0x1A2E; +constexpr unsigned int mmPRESCALE_VALUES_OVL_CB__VI = 0x1A32; +constexpr unsigned int mmPRESCALE_VALUES_OVL_CR__VI = 0x1A34; +constexpr unsigned int mmPRESCALE_VALUES_OVL_Y__VI = 0x1A33; +constexpr unsigned int mmPRESCALE_VALUES_R__VI = 0x46B3; +constexpr unsigned int mmRAS_TA_SIGNATURE1__VI = 0x33A0; +constexpr unsigned int mmRBBMIF_STATUS__VI = 0x0315; +constexpr unsigned int mmRBBMIF_STATUS_FLAG__VI = 0x0327; +constexpr unsigned int mmRBBMIF_TIMEOUT__VI = 0x0314; +constexpr unsigned int mmRBBMIF_TIMEOUT_DIS__VI = 0x0316; +constexpr unsigned int mmREFCLK_CGTT_BLK_CTRL_REG__VI = 0x010B; +constexpr unsigned int mmREFCLK_CNTL__VI = 0x0109; +constexpr unsigned int mmREGAMMA_CNTLA_END_CNTL1__VI = 0x1AA6; +constexpr unsigned int mmREGAMMA_CNTLA_END_CNTL2__VI = 0x1AA7; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_0_1__VI = 0x1AA8; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_10_11__VI = 0x1AAD; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_12_13__VI = 0x1AAE; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_14_15__VI = 0x1AAF; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_2_3__VI = 0x1AA9; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_4_5__VI = 0x1AAA; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_6_7__VI = 0x1AAB; +constexpr unsigned int mmREGAMMA_CNTLA_REGION_8_9__VI = 0x1AAC; +constexpr unsigned int mmREGAMMA_CNTLA_SLOPE_CNTL__VI = 0x1AA5; +constexpr unsigned int mmREGAMMA_CNTLA_START_CNTL__VI = 0x1AA4; +constexpr unsigned int mmREGAMMA_CNTLB_END_CNTL1__VI = 0x1AB2; +constexpr unsigned int mmREGAMMA_CNTLB_END_CNTL2__VI = 0x1AB3; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_0_1__VI = 0x1AB4; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_10_11__VI = 0x1AB9; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_12_13__VI = 0x1ABA; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_14_15__VI = 0x1ABB; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_2_3__VI = 0x1AB5; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_4_5__VI = 0x1AB6; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_6_7__VI = 0x1AB7; +constexpr unsigned int mmREGAMMA_CNTLB_REGION_8_9__VI = 0x1AB8; +constexpr unsigned int mmREGAMMA_CNTLB_SLOPE_CNTL__VI = 0x1AB1; +constexpr unsigned int mmREGAMMA_CNTLB_START_CNTL__VI = 0x1AB0; +constexpr unsigned int mmREGAMMA_CONTROL__VI = 0x1AA0; +constexpr unsigned int mmREGAMMA_LUT_DATA__VI = 0x1AA2; +constexpr unsigned int mmREGAMMA_LUT_INDEX__VI = 0x1AA1; +constexpr unsigned int mmREGAMMA_LUT_WRITE_EN_MASK__VI = 0x1AA3; +constexpr unsigned int mmREMAP_HDP_MEM_FLUSH_CNTL__VI = 0x1426; +constexpr unsigned int mmREMAP_HDP_REG_FLUSH_CNTL__VI = 0x1427; +constexpr unsigned int mmRLC_AUTO_PG_CTRL__VI = 0xEC55; +constexpr unsigned int mmRLC_CAPTURE_GPU_CLOCK_COUNT__VI = 0xEC26; +constexpr unsigned int mmRLC_CGCG_CGLS_CTRL__VI = 0xEC49; +constexpr unsigned int mmRLC_CGCG_RAMP_CTRL__VI = 0xEC4A; +constexpr unsigned int mmRLC_CGTT_MGCG_OVERRIDE__VI = 0xEC48; +constexpr unsigned int mmRLC_CNTL__SI__CI = 0x30C0; +constexpr unsigned int mmRLC_CNTL__VI = 0xEC00; +constexpr unsigned int mmRLC_CP_RESPONSE0__VI = 0xECA5; +constexpr unsigned int mmRLC_CP_RESPONSE1__VI = 0xECA6; +constexpr unsigned int mmRLC_CP_RESPONSE2__VI = 0xECA7; +constexpr unsigned int mmRLC_CP_RESPONSE3__VI = 0xECA8; +constexpr unsigned int mmRLC_CP_SCHEDULERS__VI = 0xECAA; +constexpr unsigned int mmRLC_CSIB_ADDR_HI__VI = 0xECA3; +constexpr unsigned int mmRLC_CSIB_ADDR_LO__VI = 0xECA2; +constexpr unsigned int mmRLC_CSIB_LENGTH__VI = 0xECA4; +constexpr unsigned int mmRLC_CU_STATUS__VI = 0xEC4E; +constexpr unsigned int mmRLC_DEBUG__VI = 0xEC02; +constexpr unsigned int mmRLC_DEBUG_SELECT__VI = 0xEC01; +constexpr unsigned int mmRLC_DRIVER_CPDMA_STATUS__VI = 0xEC1E; +constexpr unsigned int mmRLC_DYN_PG_REQUEST__VI = 0xEC4C; +constexpr unsigned int mmRLC_DYN_PG_STATUS__VI = 0xEC4B; +constexpr unsigned int mmRLC_GPM_CU_PD_TIMEOUT__VI = 0xEC6B; +constexpr unsigned int mmRLC_GPM_DEBUG__VI = 0xEC21; +constexpr unsigned int mmRLC_GPM_DEBUG_SELECT__VI = 0xEC20; +constexpr unsigned int mmRLC_GPM_GENERAL_0__VI = 0xEC63; +constexpr unsigned int mmRLC_GPM_GENERAL_1__VI = 0xEC64; +constexpr unsigned int mmRLC_GPM_GENERAL_2__VI = 0xEC65; +constexpr unsigned int mmRLC_GPM_GENERAL_3__VI = 0xEC66; +constexpr unsigned int mmRLC_GPM_GENERAL_4__VI = 0xEC67; +constexpr unsigned int mmRLC_GPM_GENERAL_5__VI = 0xEC68; +constexpr unsigned int mmRLC_GPM_GENERAL_6__VI = 0xEC69; +constexpr unsigned int mmRLC_GPM_GENERAL_7__VI = 0xEC6A; +constexpr unsigned int mmRLC_GPM_INT_DISABLE_TH0__VI = 0xEC7C; +constexpr unsigned int mmRLC_GPM_INT_DISABLE_TH1__VI = 0xEC7D; +constexpr unsigned int mmRLC_GPM_INT_FORCE_TH0__VI = 0xEC7E; +constexpr unsigned int mmRLC_GPM_INT_FORCE_TH1__VI = 0xEC7F; +constexpr unsigned int mmRLC_GPM_LOG_ADDR__VI = 0xEC76; +constexpr unsigned int mmRLC_GPM_LOG_CONT__VI = 0xEC7B; +constexpr unsigned int mmRLC_GPM_LOG_SIZE__VI = 0xEC77; +constexpr unsigned int mmRLC_GPM_PERF_COUNT_0__VI = 0xEC6F; +constexpr unsigned int mmRLC_GPM_PERF_COUNT_1__VI = 0xEC70; +constexpr unsigned int mmRLC_GPM_SCRATCH_ADDR__VI = 0xEC6C; +constexpr unsigned int mmRLC_GPM_SCRATCH_DATA__VI = 0xEC6D; +constexpr unsigned int mmRLC_GPM_STAT__VI = 0xEC40; +constexpr unsigned int mmRLC_GPM_THREAD_ENABLE__VI = 0xEC45; +constexpr unsigned int mmRLC_GPM_THREAD_PRIORITY__VI = 0xEC44; +constexpr unsigned int mmRLC_GPM_THREAD_RESET__VI = 0xEC28; +constexpr unsigned int mmRLC_GPM_UCODE_ADDR__VI = 0xF83C; +constexpr unsigned int mmRLC_GPM_UCODE_DATA__VI = 0xF83D; +constexpr unsigned int mmRLC_GPM_VMID_THREAD0__VI = 0xEC46; +constexpr unsigned int mmRLC_GPM_VMID_THREAD1__VI = 0xEC47; +constexpr unsigned int mmRLC_GPM_VMID_THREAD2__VI = 0xFB41; +constexpr unsigned int mmRLC_GPR_REG1__VI = 0xEC79; +constexpr unsigned int mmRLC_GPR_REG2__VI = 0xEC7A; +constexpr unsigned int mmRLC_GPU_CLOCK_32__VI = 0xEC42; +constexpr unsigned int mmRLC_GPU_CLOCK_32_RES_SEL__VI = 0xEC41; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_LSB__VI = 0xEC24; +constexpr unsigned int mmRLC_GPU_CLOCK_COUNT_MSB__VI = 0xEC25; +constexpr unsigned int mmRLC_GPU_IOV_ACTIVE_FCN_ID__VI = 0xFB40; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG1__VI = 0xFB01; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG10__VI = 0xFB22; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG11__VI = 0xFB23; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG12__VI = 0xFB24; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG13__VI = 0xFB25; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG14__VI = 0xFB26; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG15__VI = 0xFB27; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG2__VI = 0xFB02; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG6__VI = 0xFB06; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG8__VI = 0xFB08; +constexpr unsigned int mmRLC_GPU_IOV_CFG_REG9__VI = 0xFB21; +constexpr unsigned int mmRLC_GPU_IOV_F32_CNTL__VI = 0xFB46; +constexpr unsigned int mmRLC_GPU_IOV_F32_RESET__VI = 0xFB47; +constexpr unsigned int mmRLC_GPU_IOV_INT_DISABLE__VI = 0xFB4E; +constexpr unsigned int mmRLC_GPU_IOV_INT_FORCE__VI = 0xFB4F; +constexpr unsigned int mmRLC_GPU_IOV_RLC_RESPONSE__VI = 0xFB4D; +constexpr unsigned int mmRLC_GPU_IOV_SCH_0__VI = 0xFB52; +constexpr unsigned int mmRLC_GPU_IOV_SCH_1__VI = 0xFB53; +constexpr unsigned int mmRLC_GPU_IOV_SCH_2__VI = 0xFB54; +constexpr unsigned int mmRLC_GPU_IOV_SCH_3__VI = 0xFB55; +constexpr unsigned int mmRLC_GPU_IOV_SCH_INT__VI = 0xFB56; +constexpr unsigned int mmRLC_GPU_IOV_SCRATCH_ADDR__VI = 0xFB44; +constexpr unsigned int mmRLC_GPU_IOV_SCRATCH_DATA__VI = 0xFB45; +constexpr unsigned int mmRLC_GPU_IOV_SDMA0_BUSY_STATUS__VI = 0xFB50; +constexpr unsigned int mmRLC_GPU_IOV_SDMA0_STATUS__VI = 0xFB48; +constexpr unsigned int mmRLC_GPU_IOV_SDMA1_BUSY_STATUS__VI = 0xFB51; +constexpr unsigned int mmRLC_GPU_IOV_SDMA1_STATUS__VI = 0xFB49; +constexpr unsigned int mmRLC_GPU_IOV_SMU_RESPONSE__VI = 0xFB4A; +constexpr unsigned int mmRLC_GPU_IOV_UCODE_ADDR__VI = 0xFB42; +constexpr unsigned int mmRLC_GPU_IOV_UCODE_DATA__VI = 0xFB43; +constexpr unsigned int mmRLC_GPU_IOV_VF_ENABLE__VI = 0xFB00; +constexpr unsigned int mmRLC_GPU_IOV_VIRT_RESET_REQ__VI = 0xFB4C; +constexpr unsigned int mmRLC_HYP_GPM_UCODE_ADDR__VI = 0xF83C; +constexpr unsigned int mmRLC_HYP_GPM_UCODE_DATA__VI = 0xF83D; +constexpr unsigned int mmRLC_JUMP_TABLE_RESTORE__VI = 0xEC1E; +constexpr unsigned int mmRLC_LB_ALWAYS_ACTIVE_CU_MASK__VI = 0xEC50; +constexpr unsigned int mmRLC_LB_CNTL__VI = 0xEC19; +constexpr unsigned int mmRLC_LB_CNTR_INIT__VI = 0xEC1B; +constexpr unsigned int mmRLC_LB_CNTR_MAX__VI = 0xEC12; +constexpr unsigned int mmRLC_LB_INIT_CU_MASK__VI = 0xEC4F; +constexpr unsigned int mmRLC_LB_PARAMS__VI = 0xEC51; +constexpr unsigned int mmRLC_LOAD_BALANCE_CNTR__VI = 0xEC1C; +constexpr unsigned int mmRLC_MAX_PG_CU__VI = 0xEC54; +constexpr unsigned int mmRLC_MC_CNTL__VI = 0xEC03; +constexpr unsigned int mmRLC_MEM_SLP_CNTL__VI = 0xEC06; +constexpr unsigned int mmRLC_MGCG_CTRL__VI = 0xEC1A; +constexpr unsigned int mmRLC_PERFMON_CLK_CNTL__VI = 0xDCBF; +constexpr unsigned int mmRLC_PG_ALWAYS_ON_CU_MASK__VI = 0xEC53; +constexpr unsigned int mmRLC_PG_CNTL__VI = 0xEC43; +constexpr unsigned int mmRLC_PG_DELAY__VI = 0xEC4D; +constexpr unsigned int mmRLC_PG_DELAY_2__VI = 0xEC1F; +constexpr unsigned int mmRLC_PG_DELAY_3__VI = 0xEC78; +constexpr unsigned int mmRLC_RLCV_COMMAND__VI = 0xEC0A; +constexpr unsigned int mmRLC_RLCV_SAFE_MODE__VI = 0xEC08; +constexpr unsigned int mmRLC_ROM_CNTL__VI = 0xF836; +constexpr unsigned int mmRLC_SAFE_MODE__VI = 0xEC05; +constexpr unsigned int mmRLC_SAVE_AND_RESTORE_BASE__VI = 0xEC1D; +constexpr unsigned int mmRLC_SERDES_CU_MASTER_BUSY__VI = 0xEC61; +constexpr unsigned int mmRLC_SERDES_NONCU_MASTER_BUSY__VI = 0xEC62; +constexpr unsigned int mmRLC_SERDES_RD_DATA_0__VI = 0xEC5A; +constexpr unsigned int mmRLC_SERDES_RD_DATA_1__VI = 0xEC5B; +constexpr unsigned int mmRLC_SERDES_RD_DATA_2__VI = 0xEC5C; +constexpr unsigned int mmRLC_SERDES_RD_MASTER_INDEX__VI = 0xEC59; +constexpr unsigned int mmRLC_SERDES_WR_CTRL__VI = 0xEC5F; +constexpr unsigned int mmRLC_SERDES_WR_CU_MASTER_MASK__VI = 0xEC5D; +constexpr unsigned int mmRLC_SERDES_WR_DATA__VI = 0xEC60; +constexpr unsigned int mmRLC_SERDES_WR_NONCU_MASTER_MASK__VI = 0xEC5E; +constexpr unsigned int mmRLC_SMU_COMMAND__VI = 0xECA9; +constexpr unsigned int mmRLC_SMU_GRBM_REG_SAVE_CTRL__VI = 0xEC56; +constexpr unsigned int mmRLC_SMU_MESSAGE__VI = 0xEC76; +constexpr unsigned int mmRLC_SMU_PG_CTRL__VI = 0xEC57; +constexpr unsigned int mmRLC_SMU_PG_WAKE_UP_CTRL__VI = 0xEC58; +constexpr unsigned int mmRLC_SMU_SAFE_MODE__VI = 0xEC09; +constexpr unsigned int mmRLC_SOFT_RESET_GPU__VI = 0xEC05; +constexpr unsigned int mmRLC_SPM_CBR0_PERFMON_SAMPLE_DELAY__VI = 0xDCA1; +constexpr unsigned int mmRLC_SPM_CBR1_PERFMON_SAMPLE_DELAY__VI = 0xDCA2; +constexpr unsigned int mmRLC_SPM_DBR0_PERFMON_SAMPLE_DELAY__VI = 0xDC9F; +constexpr unsigned int mmRLC_SPM_DBR1_PERFMON_SAMPLE_DELAY__VI = 0xDCA0; +constexpr unsigned int mmRLC_SPM_DEBUG__VI = 0xEC75; +constexpr unsigned int mmRLC_SPM_DEBUG_SELECT__VI = 0xEC74; +constexpr unsigned int mmRLC_SPM_INT_CNTL__VI = 0xEC72; +constexpr unsigned int mmRLC_SPM_INT_STATUS__VI = 0xEC73; +constexpr unsigned int mmRLC_SPM_VMID__VI = 0xEC71; +constexpr unsigned int mmRLC_SRM_ARAM_ADDR__VI = 0xEC83; +constexpr unsigned int mmRLC_SRM_ARAM_DATA__VI = 0xEC84; +constexpr unsigned int mmRLC_SRM_CNTL__VI = 0xEC80; +constexpr unsigned int mmRLC_SRM_DEBUG__VI = 0xEC82; +constexpr unsigned int mmRLC_SRM_DEBUG_SELECT__VI = 0xEC81; +constexpr unsigned int mmRLC_SRM_DRAM_ADDR__VI = 0xEC85; +constexpr unsigned int mmRLC_SRM_DRAM_DATA__VI = 0xEC86; +constexpr unsigned int mmRLC_SRM_GPM_ABORT__VI = 0xEC9C; +constexpr unsigned int mmRLC_SRM_GPM_COMMAND__VI = 0xEC87; +constexpr unsigned int mmRLC_SRM_GPM_COMMAND_STATUS__VI = 0xEC88; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_0__VI = 0xEC8B; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_1__VI = 0xEC8C; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_2__VI = 0xEC8D; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_3__VI = 0xEC8E; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_4__VI = 0xEC8F; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_5__VI = 0xEC90; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_6__VI = 0xEC91; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_ADDR_7__VI = 0xEC92; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_0__VI = 0xEC93; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_1__VI = 0xEC94; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_2__VI = 0xEC95; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_3__VI = 0xEC96; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_4__VI = 0xEC97; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_5__VI = 0xEC98; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_6__VI = 0xEC99; +constexpr unsigned int mmRLC_SRM_INDEX_CNTL_DATA_7__VI = 0xEC9A; +constexpr unsigned int mmRLC_SRM_RLCV_COMMAND__VI = 0xEC89; +constexpr unsigned int mmRLC_SRM_RLCV_COMMAND_STATUS__VI = 0xEC8A; +constexpr unsigned int mmRLC_SRM_STAT__VI = 0xEC9B; +constexpr unsigned int mmRLC_STAT__VI = 0xEC04; +constexpr unsigned int mmRLC_STATIC_PG_STATUS__VI = 0xEC6E; +constexpr unsigned int mmRLC_THREAD1_DELAY__VI = 0xEC52; +constexpr unsigned int mmRLC_UCODE_CNTL__VI = 0xEC27; +constexpr unsigned int mmSAM_IH_EXT_ERR_INTR__VI = 0x8810; +constexpr unsigned int mmSAM_IH_EXT_ERR_INTR_STATUS__VI = 0x8812; +constexpr unsigned int mmSCL0_SCL_DEBUG2__VI = 0x1B69; +constexpr unsigned int mmSCL0_SCL_HORZ_FILTER_CONTROL__VI = 0x1B48; +constexpr unsigned int mmSCL0_SCL_HORZ_FILTER_INIT__VI = 0x1B4A; +constexpr unsigned int mmSCL0_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x1B49; +constexpr unsigned int mmSCL0_SCL_MODE__VI = 0x1B42; +constexpr unsigned int mmSCL0_SCL_ROUND_OFFSET__VI = 0x1B4F; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_CONTROL__VI = 0x1B4B; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_INIT__VI = 0x1B4D; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_INIT_BOT__VI = 0x1B4E; +constexpr unsigned int mmSCL0_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x1B4C; +constexpr unsigned int mmSCL0_VIEWPORT_START_SECONDARY__VI = 0x1B5B; +constexpr unsigned int mmSCL1_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x1D5E; +constexpr unsigned int mmSCL1_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x1D5F; +constexpr unsigned int mmSCL1_SCL_ALU_CONTROL__VI = 0x1D54; +constexpr unsigned int mmSCL1_SCL_AUTOMATIC_MODE_CONTROL__VI = 0x1D47; +constexpr unsigned int mmSCL1_SCL_BYPASS_CONTROL__VI = 0x1D45; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_CONFLICT_STATUS__VI = 0x1D55; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_SELECT__VI = 0x1D40; +constexpr unsigned int mmSCL1_SCL_COEF_RAM_TAP_DATA__VI = 0x1D41; +constexpr unsigned int mmSCL1_SCL_CONTROL__VI = 0x1D44; +constexpr unsigned int mmSCL1_SCL_DEBUG__VI = 0x1D6A; +constexpr unsigned int mmSCL1_SCL_DEBUG2__VI = 0x1D69; +constexpr unsigned int mmSCL1_SCL_F_SHARP_CONTROL__VI = 0x1D53; +constexpr unsigned int mmSCL1_SCL_HORZ_FILTER_CONTROL__VI = 0x1D48; +constexpr unsigned int mmSCL1_SCL_HORZ_FILTER_INIT__VI = 0x1D4A; +constexpr unsigned int mmSCL1_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x1D49; +constexpr unsigned int mmSCL1_SCL_MANUAL_REPLICATE_CONTROL__VI = 0x1D46; +constexpr unsigned int mmSCL1_SCL_MODE__VI = 0x1D42; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET1__VI = 0x1D60; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET2__VI = 0x1D61; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_DET3__VI = 0x1D62; +constexpr unsigned int mmSCL1_SCL_MODE_CHANGE_MASK__VI = 0x1D63; +constexpr unsigned int mmSCL1_SCL_ROUND_OFFSET__VI = 0x1D4F; +constexpr unsigned int mmSCL1_SCL_TAP_CONTROL__VI = 0x1D43; +constexpr unsigned int mmSCL1_SCL_TEST_DEBUG_DATA__VI = 0x1D6C; +constexpr unsigned int mmSCL1_SCL_TEST_DEBUG_INDEX__VI = 0x1D6B; +constexpr unsigned int mmSCL1_SCL_UPDATE__VI = 0x1D51; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_CONTROL__VI = 0x1D4B; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_INIT__VI = 0x1D4D; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_INIT_BOT__VI = 0x1D4E; +constexpr unsigned int mmSCL1_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x1D4C; +constexpr unsigned int mmSCL1_VIEWPORT_SIZE__VI = 0x1D5D; +constexpr unsigned int mmSCL1_VIEWPORT_START__VI = 0x1D5C; +constexpr unsigned int mmSCL1_VIEWPORT_START_SECONDARY__VI = 0x1D5B; +constexpr unsigned int mmSCL2_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x1F5E; +constexpr unsigned int mmSCL2_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x1F5F; +constexpr unsigned int mmSCL2_SCL_ALU_CONTROL__VI = 0x1F54; +constexpr unsigned int mmSCL2_SCL_AUTOMATIC_MODE_CONTROL__VI = 0x1F47; +constexpr unsigned int mmSCL2_SCL_BYPASS_CONTROL__VI = 0x1F45; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_CONFLICT_STATUS__VI = 0x1F55; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_SELECT__VI = 0x1F40; +constexpr unsigned int mmSCL2_SCL_COEF_RAM_TAP_DATA__VI = 0x1F41; +constexpr unsigned int mmSCL2_SCL_CONTROL__VI = 0x1F44; +constexpr unsigned int mmSCL2_SCL_DEBUG__VI = 0x1F6A; +constexpr unsigned int mmSCL2_SCL_DEBUG2__VI = 0x1F69; +constexpr unsigned int mmSCL2_SCL_F_SHARP_CONTROL__VI = 0x1F53; +constexpr unsigned int mmSCL2_SCL_HORZ_FILTER_CONTROL__VI = 0x1F48; +constexpr unsigned int mmSCL2_SCL_HORZ_FILTER_INIT__VI = 0x1F4A; +constexpr unsigned int mmSCL2_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x1F49; +constexpr unsigned int mmSCL2_SCL_MANUAL_REPLICATE_CONTROL__VI = 0x1F46; +constexpr unsigned int mmSCL2_SCL_MODE__VI = 0x1F42; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET1__VI = 0x1F60; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET2__VI = 0x1F61; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_DET3__VI = 0x1F62; +constexpr unsigned int mmSCL2_SCL_MODE_CHANGE_MASK__VI = 0x1F63; +constexpr unsigned int mmSCL2_SCL_ROUND_OFFSET__VI = 0x1F4F; +constexpr unsigned int mmSCL2_SCL_TAP_CONTROL__VI = 0x1F43; +constexpr unsigned int mmSCL2_SCL_TEST_DEBUG_DATA__VI = 0x1F6C; +constexpr unsigned int mmSCL2_SCL_TEST_DEBUG_INDEX__VI = 0x1F6B; +constexpr unsigned int mmSCL2_SCL_UPDATE__VI = 0x1F51; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_CONTROL__VI = 0x1F4B; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_INIT__VI = 0x1F4D; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_INIT_BOT__VI = 0x1F4E; +constexpr unsigned int mmSCL2_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x1F4C; +constexpr unsigned int mmSCL2_VIEWPORT_SIZE__VI = 0x1F5D; +constexpr unsigned int mmSCL2_VIEWPORT_START__VI = 0x1F5C; +constexpr unsigned int mmSCL2_VIEWPORT_START_SECONDARY__VI = 0x1F5B; +constexpr unsigned int mmSCL3_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x415E; +constexpr unsigned int mmSCL3_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x415F; +constexpr unsigned int mmSCL3_SCL_ALU_CONTROL__VI = 0x4154; +constexpr unsigned int mmSCL3_SCL_AUTOMATIC_MODE_CONTROL__VI = 0x4147; +constexpr unsigned int mmSCL3_SCL_BYPASS_CONTROL__VI = 0x4145; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_CONFLICT_STATUS__VI = 0x4155; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_SELECT__VI = 0x4140; +constexpr unsigned int mmSCL3_SCL_COEF_RAM_TAP_DATA__VI = 0x4141; +constexpr unsigned int mmSCL3_SCL_CONTROL__VI = 0x4144; +constexpr unsigned int mmSCL3_SCL_DEBUG__VI = 0x416A; +constexpr unsigned int mmSCL3_SCL_DEBUG2__VI = 0x4169; +constexpr unsigned int mmSCL3_SCL_F_SHARP_CONTROL__VI = 0x4153; +constexpr unsigned int mmSCL3_SCL_HORZ_FILTER_CONTROL__VI = 0x4148; +constexpr unsigned int mmSCL3_SCL_HORZ_FILTER_INIT__VI = 0x414A; +constexpr unsigned int mmSCL3_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x4149; +constexpr unsigned int mmSCL3_SCL_MANUAL_REPLICATE_CONTROL__VI = 0x4146; +constexpr unsigned int mmSCL3_SCL_MODE__VI = 0x4142; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET1__VI = 0x4160; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET2__VI = 0x4161; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_DET3__VI = 0x4162; +constexpr unsigned int mmSCL3_SCL_MODE_CHANGE_MASK__VI = 0x4163; +constexpr unsigned int mmSCL3_SCL_ROUND_OFFSET__VI = 0x414F; +constexpr unsigned int mmSCL3_SCL_TAP_CONTROL__VI = 0x4143; +constexpr unsigned int mmSCL3_SCL_TEST_DEBUG_DATA__VI = 0x416C; +constexpr unsigned int mmSCL3_SCL_TEST_DEBUG_INDEX__VI = 0x416B; +constexpr unsigned int mmSCL3_SCL_UPDATE__VI = 0x4151; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_CONTROL__VI = 0x414B; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_INIT__VI = 0x414D; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_INIT_BOT__VI = 0x414E; +constexpr unsigned int mmSCL3_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x414C; +constexpr unsigned int mmSCL3_VIEWPORT_SIZE__VI = 0x415D; +constexpr unsigned int mmSCL3_VIEWPORT_START__VI = 0x415C; +constexpr unsigned int mmSCL3_VIEWPORT_START_SECONDARY__VI = 0x415B; +constexpr unsigned int mmSCL4_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x435E; +constexpr unsigned int mmSCL4_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x435F; +constexpr unsigned int mmSCL4_SCL_ALU_CONTROL__VI = 0x4354; +constexpr unsigned int mmSCL4_SCL_AUTOMATIC_MODE_CONTROL__VI = 0x4347; +constexpr unsigned int mmSCL4_SCL_BYPASS_CONTROL__VI = 0x4345; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_CONFLICT_STATUS__VI = 0x4355; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_SELECT__VI = 0x4340; +constexpr unsigned int mmSCL4_SCL_COEF_RAM_TAP_DATA__VI = 0x4341; +constexpr unsigned int mmSCL4_SCL_CONTROL__VI = 0x4344; +constexpr unsigned int mmSCL4_SCL_DEBUG__VI = 0x436A; +constexpr unsigned int mmSCL4_SCL_DEBUG2__VI = 0x4369; +constexpr unsigned int mmSCL4_SCL_F_SHARP_CONTROL__VI = 0x4353; +constexpr unsigned int mmSCL4_SCL_HORZ_FILTER_CONTROL__VI = 0x4348; +constexpr unsigned int mmSCL4_SCL_HORZ_FILTER_INIT__VI = 0x434A; +constexpr unsigned int mmSCL4_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x4349; +constexpr unsigned int mmSCL4_SCL_MANUAL_REPLICATE_CONTROL__VI = 0x4346; +constexpr unsigned int mmSCL4_SCL_MODE__VI = 0x4342; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET1__VI = 0x4360; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET2__VI = 0x4361; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_DET3__VI = 0x4362; +constexpr unsigned int mmSCL4_SCL_MODE_CHANGE_MASK__VI = 0x4363; +constexpr unsigned int mmSCL4_SCL_ROUND_OFFSET__VI = 0x434F; +constexpr unsigned int mmSCL4_SCL_TAP_CONTROL__VI = 0x4343; +constexpr unsigned int mmSCL4_SCL_TEST_DEBUG_DATA__VI = 0x436C; +constexpr unsigned int mmSCL4_SCL_TEST_DEBUG_INDEX__VI = 0x436B; +constexpr unsigned int mmSCL4_SCL_UPDATE__VI = 0x4351; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_CONTROL__VI = 0x434B; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_INIT__VI = 0x434D; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_INIT_BOT__VI = 0x434E; +constexpr unsigned int mmSCL4_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x434C; +constexpr unsigned int mmSCL4_VIEWPORT_SIZE__VI = 0x435D; +constexpr unsigned int mmSCL4_VIEWPORT_START__VI = 0x435C; +constexpr unsigned int mmSCL4_VIEWPORT_START_SECONDARY__VI = 0x435B; +constexpr unsigned int mmSCL5_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x455E; +constexpr unsigned int mmSCL5_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x455F; +constexpr unsigned int mmSCL5_SCL_ALU_CONTROL__VI = 0x4554; +constexpr unsigned int mmSCL5_SCL_AUTOMATIC_MODE_CONTROL__VI = 0x4547; +constexpr unsigned int mmSCL5_SCL_BYPASS_CONTROL__VI = 0x4545; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_CONFLICT_STATUS__VI = 0x4555; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_SELECT__VI = 0x4540; +constexpr unsigned int mmSCL5_SCL_COEF_RAM_TAP_DATA__VI = 0x4541; +constexpr unsigned int mmSCL5_SCL_CONTROL__VI = 0x4544; +constexpr unsigned int mmSCL5_SCL_DEBUG__VI = 0x456A; +constexpr unsigned int mmSCL5_SCL_DEBUG2__VI = 0x4569; +constexpr unsigned int mmSCL5_SCL_F_SHARP_CONTROL__VI = 0x4553; +constexpr unsigned int mmSCL5_SCL_HORZ_FILTER_CONTROL__VI = 0x4548; +constexpr unsigned int mmSCL5_SCL_HORZ_FILTER_INIT__VI = 0x454A; +constexpr unsigned int mmSCL5_SCL_HORZ_FILTER_SCALE_RATIO__VI = 0x4549; +constexpr unsigned int mmSCL5_SCL_MANUAL_REPLICATE_CONTROL__VI = 0x4546; +constexpr unsigned int mmSCL5_SCL_MODE__VI = 0x4542; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET1__VI = 0x4560; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET2__VI = 0x4561; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_DET3__VI = 0x4562; +constexpr unsigned int mmSCL5_SCL_MODE_CHANGE_MASK__VI = 0x4563; +constexpr unsigned int mmSCL5_SCL_ROUND_OFFSET__VI = 0x454F; +constexpr unsigned int mmSCL5_SCL_TAP_CONTROL__VI = 0x4543; +constexpr unsigned int mmSCL5_SCL_TEST_DEBUG_DATA__VI = 0x456C; +constexpr unsigned int mmSCL5_SCL_TEST_DEBUG_INDEX__VI = 0x456B; +constexpr unsigned int mmSCL5_SCL_UPDATE__VI = 0x4551; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_CONTROL__VI = 0x454B; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_INIT__VI = 0x454D; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_INIT_BOT__VI = 0x454E; +constexpr unsigned int mmSCL5_SCL_VERT_FILTER_SCALE_RATIO__VI = 0x454C; +constexpr unsigned int mmSCL5_VIEWPORT_SIZE__VI = 0x455D; +constexpr unsigned int mmSCL5_VIEWPORT_START__VI = 0x455C; +constexpr unsigned int mmSCL5_VIEWPORT_START_SECONDARY__VI = 0x455B; +constexpr unsigned int mmSCLK_CGTT_BLK_CTRL_REG__VI = 0x0136; +constexpr unsigned int mmSCLV_ALU_CONTROL__VI = 0x4685; +constexpr unsigned int mmSCLV_AUTOMATIC_MODE_CONTROL__VI = 0x4676; +constexpr unsigned int mmSCLV_COEF_RAM_SELECT__VI = 0x4670; +constexpr unsigned int mmSCLV_COEF_RAM_TAP_DATA__VI = 0x4671; +constexpr unsigned int mmSCLV_CONTROL__VI = 0x4674; +constexpr unsigned int mmSCLV_DEBUG__VI = 0x4693; +constexpr unsigned int mmSCLV_DEBUG2__VI = 0x4692; +constexpr unsigned int mmSCLV_EXT_OVERSCAN_LEFT_RIGHT__VI = 0x468C; +constexpr unsigned int mmSCLV_EXT_OVERSCAN_TOP_BOTTOM__VI = 0x468D; +constexpr unsigned int mmSCLV_HORZ_FILTER_CONTROL__VI = 0x4677; +constexpr unsigned int mmSCLV_HORZ_FILTER_INIT__VI = 0x4679; +constexpr unsigned int mmSCLV_HORZ_FILTER_INIT_C__VI = 0x467B; +constexpr unsigned int mmSCLV_HORZ_FILTER_SCALE_RATIO__VI = 0x4678; +constexpr unsigned int mmSCLV_HORZ_FILTER_SCALE_RATIO_C__VI = 0x467A; +constexpr unsigned int mmSCLV_MANUAL_REPLICATE_CONTROL__VI = 0x4675; +constexpr unsigned int mmSCLV_MODE__VI = 0x4672; +constexpr unsigned int mmSCLV_MODE_CHANGE_DET1__VI = 0x468E; +constexpr unsigned int mmSCLV_MODE_CHANGE_DET2__VI = 0x468F; +constexpr unsigned int mmSCLV_MODE_CHANGE_DET3__VI = 0x4690; +constexpr unsigned int mmSCLV_MODE_CHANGE_MASK__VI = 0x4691; +constexpr unsigned int mmSCLV_ROUND_OFFSET__VI = 0x4683; +constexpr unsigned int mmSCLV_TAP_CONTROL__VI = 0x4673; +constexpr unsigned int mmSCLV_TEST_DEBUG_DATA__VI = 0x4695; +constexpr unsigned int mmSCLV_TEST_DEBUG_INDEX__VI = 0x4694; +constexpr unsigned int mmSCLV_UPDATE__VI = 0x4684; +constexpr unsigned int mmSCLV_VERT_FILTER_CONTROL__VI = 0x467C; +constexpr unsigned int mmSCLV_VERT_FILTER_INIT__VI = 0x467E; +constexpr unsigned int mmSCLV_VERT_FILTER_INIT_BOT__VI = 0x467F; +constexpr unsigned int mmSCLV_VERT_FILTER_INIT_BOT_C__VI = 0x4682; +constexpr unsigned int mmSCLV_VERT_FILTER_INIT_C__VI = 0x4681; +constexpr unsigned int mmSCLV_VERT_FILTER_SCALE_RATIO__VI = 0x467D; +constexpr unsigned int mmSCLV_VERT_FILTER_SCALE_RATIO_C__VI = 0x4680; +constexpr unsigned int mmSCLV_VIEWPORT_SIZE__VI = 0x4688; +constexpr unsigned int mmSCLV_VIEWPORT_SIZE_C__VI = 0x468B; +constexpr unsigned int mmSCLV_VIEWPORT_START__VI = 0x4686; +constexpr unsigned int mmSCLV_VIEWPORT_START_C__VI = 0x4689; +constexpr unsigned int mmSCLV_VIEWPORT_START_SECONDARY__VI = 0x4687; +constexpr unsigned int mmSCLV_VIEWPORT_START_SECONDARY_C__VI = 0x468A; +constexpr unsigned int mmSCL_DEBUG2__VI = 0x1B69; +constexpr unsigned int mmSCL_HORZ_FILTER_CONTROL__VI = 0x1B48; +constexpr unsigned int mmSCL_HORZ_FILTER_INIT__VI = 0x1B4A; +constexpr unsigned int mmSCL_HORZ_FILTER_SCALE_RATIO__VI = 0x1B49; +constexpr unsigned int mmSCL_MODE__VI = 0x1B42; +constexpr unsigned int mmSCL_ROUND_OFFSET__VI = 0x1B4F; +constexpr unsigned int mmSCL_VERT_FILTER_CONTROL__VI = 0x1B4B; +constexpr unsigned int mmSCL_VERT_FILTER_INIT__VI = 0x1B4D; +constexpr unsigned int mmSCL_VERT_FILTER_INIT_BOT__VI = 0x1B4E; +constexpr unsigned int mmSCL_VERT_FILTER_SCALE_RATIO__VI = 0x1B4C; +constexpr unsigned int mmSDMA0_ACTIVE_FCN_ID__VI = 0x341F; +constexpr unsigned int mmSDMA0_ATOMIC_CNTL__VI = 0x342E; +constexpr unsigned int mmSDMA0_ATOMIC_PREOP_HI__VI = 0x3430; +constexpr unsigned int mmSDMA0_ATOMIC_PREOP_LO__VI = 0x342F; +constexpr unsigned int mmSDMA0_BA_THRESHOLD__VI = 0x342B; +constexpr unsigned int mmSDMA0_CONTEXT_REG_TYPE0__VI = 0x3478; +constexpr unsigned int mmSDMA0_CONTEXT_REG_TYPE1__VI = 0x3479; +constexpr unsigned int mmSDMA0_CONTEXT_REG_TYPE2__VI = 0x347A; +constexpr unsigned int mmSDMA0_EDC_CONFIG__VI = 0x341A; +constexpr unsigned int mmSDMA0_GFX_CSA_ADDR_HI__VI = 0x34AD; +constexpr unsigned int mmSDMA0_GFX_CSA_ADDR_LO__VI = 0x34AC; +constexpr unsigned int mmSDMA0_GFX_DOORBELL__VI = 0x3492; +constexpr unsigned int mmSDMA0_GFX_DOORBELL_LOG__VI = 0x34A9; +constexpr unsigned int mmSDMA0_GFX_DUMMY_REG__VI = 0x34B1; +constexpr unsigned int mmSDMA0_GFX_IB_SUB_REMAIN__VI = 0x34AF; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_CNTL__VI = 0x34C7; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA0__VI = 0x34C1; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA1__VI = 0x34C2; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA2__VI = 0x34C3; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA3__VI = 0x34C4; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA4__VI = 0x34C5; +constexpr unsigned int mmSDMA0_GFX_MIDCMD_DATA5__VI = 0x34C6; +constexpr unsigned int mmSDMA0_GFX_PREEMPT__VI = 0x34B0; +constexpr unsigned int mmSDMA0_GFX_WATERMARK__VI = 0x34AA; +constexpr unsigned int mmSDMA0_ID__VI = 0x342C; +constexpr unsigned int mmSDMA0_PERFCOUNTER0_RESULT__VI = 0x9001; +constexpr unsigned int mmSDMA0_PERFCOUNTER1_RESULT__VI = 0x9002; +constexpr unsigned int mmSDMA0_PERFMON_CNTL__VI = 0x9000; +constexpr unsigned int mmSDMA0_PERF_REG_TYPE0__VI = 0x3477; +constexpr unsigned int mmSDMA0_POWER_CNTL_IDLE__VI = 0x342C; +constexpr unsigned int mmSDMA0_PUB_REG_TYPE0__VI = 0x347C; +constexpr unsigned int mmSDMA0_PUB_REG_TYPE1__VI = 0x347D; +constexpr unsigned int mmSDMA0_RD_BURST_CNTL__VI = 0x340F; +constexpr unsigned int mmSDMA0_RLC0_CSA_ADDR_HI__VI = 0x352D; +constexpr unsigned int mmSDMA0_RLC0_CSA_ADDR_LO__VI = 0x352C; +constexpr unsigned int mmSDMA0_RLC0_DUMMY_REG__VI = 0x3531; +constexpr unsigned int mmSDMA0_RLC0_IB_SUB_REMAIN__VI = 0x352F; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_CNTL__VI = 0x3547; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA0__VI = 0x3541; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA1__VI = 0x3542; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA2__VI = 0x3543; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA3__VI = 0x3544; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA4__VI = 0x3545; +constexpr unsigned int mmSDMA0_RLC0_MIDCMD_DATA5__VI = 0x3546; +constexpr unsigned int mmSDMA0_RLC0_PREEMPT__VI = 0x3530; +constexpr unsigned int mmSDMA0_RLC0_WATERMARK__VI = 0x352A; +constexpr unsigned int mmSDMA0_RLC1_CSA_ADDR_HI__VI = 0x35AD; +constexpr unsigned int mmSDMA0_RLC1_CSA_ADDR_LO__VI = 0x35AC; +constexpr unsigned int mmSDMA0_RLC1_DUMMY_REG__VI = 0x35B1; +constexpr unsigned int mmSDMA0_RLC1_IB_SUB_REMAIN__VI = 0x35AF; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_CNTL__VI = 0x35C7; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA0__VI = 0x35C1; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA1__VI = 0x35C2; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA2__VI = 0x35C3; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA3__VI = 0x35C4; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA4__VI = 0x35C5; +constexpr unsigned int mmSDMA0_RLC1_MIDCMD_DATA5__VI = 0x35C6; +constexpr unsigned int mmSDMA0_RLC1_PREEMPT__VI = 0x35B0; +constexpr unsigned int mmSDMA0_RLC1_WATERMARK__VI = 0x35AA; +constexpr unsigned int mmSDMA0_STATUS2_REG__VI = 0x341E; +constexpr unsigned int mmSDMA0_VERSION__VI = 0x342D; +constexpr unsigned int mmSDMA0_VF_ENABLE__VI = 0x342A; +constexpr unsigned int mmSDMA0_VIRT_RESET_REQ__VI = 0x3421; +constexpr unsigned int mmSDMA0_VM_CNTL__VI = 0x341B; +constexpr unsigned int mmSDMA0_VM_CTX_CNTL__VI = 0x3420; +constexpr unsigned int mmSDMA0_VM_CTX_HI__VI = 0x341D; +constexpr unsigned int mmSDMA0_VM_CTX_LO__VI = 0x341C; +constexpr unsigned int mmSDMA1_ACTIVE_FCN_ID__VI = 0x361F; +constexpr unsigned int mmSDMA1_ATOMIC_CNTL__VI = 0x362E; +constexpr unsigned int mmSDMA1_ATOMIC_PREOP_HI__VI = 0x3630; +constexpr unsigned int mmSDMA1_ATOMIC_PREOP_LO__VI = 0x362F; +constexpr unsigned int mmSDMA1_BA_THRESHOLD__VI = 0x362B; +constexpr unsigned int mmSDMA1_CONTEXT_REG_TYPE0__VI = 0x3678; +constexpr unsigned int mmSDMA1_CONTEXT_REG_TYPE1__VI = 0x3679; +constexpr unsigned int mmSDMA1_CONTEXT_REG_TYPE2__VI = 0x367A; +constexpr unsigned int mmSDMA1_EDC_CONFIG__VI = 0x361A; +constexpr unsigned int mmSDMA1_GFX_CSA_ADDR_HI__VI = 0x36AD; +constexpr unsigned int mmSDMA1_GFX_CSA_ADDR_LO__VI = 0x36AC; +constexpr unsigned int mmSDMA1_GFX_DOORBELL__VI = 0x3692; +constexpr unsigned int mmSDMA1_GFX_DOORBELL_LOG__VI = 0x36A9; +constexpr unsigned int mmSDMA1_GFX_DUMMY_REG__VI = 0x36B1; +constexpr unsigned int mmSDMA1_GFX_IB_SUB_REMAIN__VI = 0x36AF; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_CNTL__VI = 0x36C7; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA0__VI = 0x36C1; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA1__VI = 0x36C2; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA2__VI = 0x36C3; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA3__VI = 0x36C4; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA4__VI = 0x36C5; +constexpr unsigned int mmSDMA1_GFX_MIDCMD_DATA5__VI = 0x36C6; +constexpr unsigned int mmSDMA1_GFX_PREEMPT__VI = 0x36B0; +constexpr unsigned int mmSDMA1_GFX_WATERMARK__VI = 0x36AA; +constexpr unsigned int mmSDMA1_ID__VI = 0x362C; +constexpr unsigned int mmSDMA1_PERFCOUNTER0_RESULT__VI = 0x9011; +constexpr unsigned int mmSDMA1_PERFCOUNTER1_RESULT__VI = 0x9012; +constexpr unsigned int mmSDMA1_PERFMON_CNTL__VI = 0x9010; +constexpr unsigned int mmSDMA1_PERF_REG_TYPE0__VI = 0x3677; +constexpr unsigned int mmSDMA1_POWER_CNTL_IDLE__VI = 0x362C; +constexpr unsigned int mmSDMA1_PUB_REG_TYPE0__VI = 0x367C; +constexpr unsigned int mmSDMA1_PUB_REG_TYPE1__VI = 0x367D; +constexpr unsigned int mmSDMA1_RD_BURST_CNTL__VI = 0x360F; +constexpr unsigned int mmSDMA1_RLC0_CSA_ADDR_HI__VI = 0x372D; +constexpr unsigned int mmSDMA1_RLC0_CSA_ADDR_LO__VI = 0x372C; +constexpr unsigned int mmSDMA1_RLC0_DUMMY_REG__VI = 0x3731; +constexpr unsigned int mmSDMA1_RLC0_IB_SUB_REMAIN__VI = 0x372F; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_CNTL__VI = 0x3747; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA0__VI = 0x3741; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA1__VI = 0x3742; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA2__VI = 0x3743; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA3__VI = 0x3744; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA4__VI = 0x3745; +constexpr unsigned int mmSDMA1_RLC0_MIDCMD_DATA5__VI = 0x3746; +constexpr unsigned int mmSDMA1_RLC0_PREEMPT__VI = 0x3730; +constexpr unsigned int mmSDMA1_RLC0_WATERMARK__VI = 0x372A; +constexpr unsigned int mmSDMA1_RLC1_CSA_ADDR_HI__VI = 0x37AD; +constexpr unsigned int mmSDMA1_RLC1_CSA_ADDR_LO__VI = 0x37AC; +constexpr unsigned int mmSDMA1_RLC1_DUMMY_REG__VI = 0x37B1; +constexpr unsigned int mmSDMA1_RLC1_IB_SUB_REMAIN__VI = 0x37AF; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_CNTL__VI = 0x37C7; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA0__VI = 0x37C1; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA1__VI = 0x37C2; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA2__VI = 0x37C3; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA3__VI = 0x37C4; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA4__VI = 0x37C5; +constexpr unsigned int mmSDMA1_RLC1_MIDCMD_DATA5__VI = 0x37C6; +constexpr unsigned int mmSDMA1_RLC1_PREEMPT__VI = 0x37B0; +constexpr unsigned int mmSDMA1_RLC1_WATERMARK__VI = 0x37AA; +constexpr unsigned int mmSDMA1_STATUS2_REG__VI = 0x361E; +constexpr unsigned int mmSDMA1_VERSION__VI = 0x362D; +constexpr unsigned int mmSDMA1_VF_ENABLE__VI = 0x362A; +constexpr unsigned int mmSDMA1_VIRT_RESET_REQ__VI = 0x3621; +constexpr unsigned int mmSDMA1_VM_CNTL__VI = 0x361B; +constexpr unsigned int mmSDMA1_VM_CTX_CNTL__VI = 0x3620; +constexpr unsigned int mmSDMA1_VM_CTX_HI__VI = 0x361D; +constexpr unsigned int mmSDMA1_VM_CTX_LO__VI = 0x361C; +constexpr unsigned int mmSEM_ACTIVE_FCN_ID__VI = 0x0F97; +constexpr unsigned int mmSEM_MAILBOX_CLIENTCONFIG_EXTRA__VI = 0x0F9F; +constexpr unsigned int mmSEM_PERFCOUNTER0_RESULT__VI = 0x0F92; +constexpr unsigned int mmSEM_PERFCOUNTER1_RESULT__VI = 0x0F93; +constexpr unsigned int mmSEM_PERFMON_CNTL__VI = 0x0F91; +constexpr unsigned int mmSEM_VF_ENABLE__VI = 0x0F95; +constexpr unsigned int mmSEM_VIRT_RESET_REQ__VI = 0x0F98; +constexpr unsigned int mmSE_CAC_CGTT_CLK_CTRL__VI = 0x3293; +constexpr unsigned int mmSMBCLK_PAD_CNTL__VI = 0x15ED; +constexpr unsigned int mmSMBDAT_PAD_CNTL__VI = 0x15EC; +constexpr unsigned int mmSMBUS_BACO_DUMMY__VI = 0x15EB; +constexpr unsigned int mmSMC_MSG_ARG_11__VI = 0x0093; +constexpr unsigned int mmSMU_BIF_VDDGFX_PWR_STATUS__VI = 0x14F8; +constexpr unsigned int mmSMU_CONTROL__VI = 0x012D; +constexpr unsigned int mmSMU_IND_DATA_0__VI = 0x01A7; +constexpr unsigned int mmSMU_IND_DATA_1__VI = 0x01A9; +constexpr unsigned int mmSMU_IND_DATA_2__VI = 0x01AB; +constexpr unsigned int mmSMU_IND_DATA_3__VI = 0x01AD; +constexpr unsigned int mmSMU_IND_DATA_4__VI = 0x01AF; +constexpr unsigned int mmSMU_IND_DATA_5__VI = 0x01B1; +constexpr unsigned int mmSMU_IND_DATA_6__VI = 0x01B3; +constexpr unsigned int mmSMU_IND_DATA_7__VI = 0x01B5; +constexpr unsigned int mmSMU_IND_INDEX_0__VI = 0x01A6; +constexpr unsigned int mmSMU_IND_INDEX_1__VI = 0x01A8; +constexpr unsigned int mmSMU_IND_INDEX_2__VI = 0x01AA; +constexpr unsigned int mmSMU_IND_INDEX_3__VI = 0x01AC; +constexpr unsigned int mmSMU_IND_INDEX_4__VI = 0x01AE; +constexpr unsigned int mmSMU_IND_INDEX_5__VI = 0x01B0; +constexpr unsigned int mmSMU_IND_INDEX_6__VI = 0x01B2; +constexpr unsigned int mmSMU_IND_INDEX_7__VI = 0x01B4; +constexpr unsigned int mmSMU_INTERRUPT_CONTROL__VI = 0x012E; +constexpr unsigned int mmSMU_MP1_RLC2MP_RESP__VI = 0x01F4; +constexpr unsigned int mmSMU_MP1_SRBM2P_MSG_5__VI = 0x01C5; +constexpr unsigned int mmSMU_RLC_RESPONSE__VI = 0xEC07; +constexpr unsigned int mmSM_CONTROL2__VI = 0x1B6E; +constexpr unsigned int mmSPI_COMPUTE_WF_CTX_SAVE__VI = 0x31FC; +constexpr unsigned int mmSPI_CONFIG_CNTL_2__VI = 0x2451; +constexpr unsigned int mmSPI_DSM_CNTL__VI = 0x2443; +constexpr unsigned int mmSPI_EDC_CNT__VI = 0x2444; +constexpr unsigned int mmSPI_GFX_CNTL__VI = 0x243C; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_12__VI = 0x31F4; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_13__VI = 0x31F5; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_14__VI = 0x31F6; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_CU_15__VI = 0x31F7; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_12__VI = 0x31F8; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_13__VI = 0x31F9; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_14__VI = 0x31FA; +constexpr unsigned int mmSPI_RESOURCE_RESERVE_EN_CU_15__VI = 0x31FB; +constexpr unsigned int mmSPI_START_PHASE__VI = 0x243B; +constexpr unsigned int mmSQC_ATC_EDC_GATCL1_CNT__VI = 0x23B3; +constexpr unsigned int mmSQC_DSM_CNTL__VI = 0x230F; +constexpr unsigned int mmSQC_EDC_CNT__VI = 0x23A0; +constexpr unsigned int mmSQC_GATCL1_CNTL__VI = 0x23B2; +constexpr unsigned int mmSQC_WRITEBACK__VI = 0xC349; +constexpr unsigned int mmSQ_DSM_CNTL__VI = 0x2306; +constexpr unsigned int mmSQ_EDC_DED_CNT__VI = 0x23A2; +constexpr unsigned int mmSQ_EDC_INFO__VI = 0x23A3; +constexpr unsigned int mmSQ_EDC_SEC_CNT__VI = 0x23A1; +constexpr unsigned int mmSQ_M0_GPR_IDX_WORD__VI = 0x23D2; +constexpr unsigned int mmSQ_SMEM_0__VI = 0x237F; +constexpr unsigned int mmSQ_SMEM_1__VI = 0x237F; +constexpr unsigned int mmSQ_THREAD_TRACE_BASE__SI__CI = 0x2380; +constexpr unsigned int mmSQ_THREAD_TRACE_BASE__VI = 0xC330; +constexpr unsigned int mmSQ_THREAD_TRACE_BASE2__VI = 0xC337; +constexpr unsigned int mmSQ_THREAD_TRACE_CTRL__SI__CI = 0x238F; +constexpr unsigned int mmSQ_THREAD_TRACE_CTRL__VI = 0xC335; +constexpr unsigned int mmSQ_THREAD_TRACE_HIWATER__SI__CI = 0x2392; +constexpr unsigned int mmSQ_THREAD_TRACE_HIWATER__VI = 0xC33B; +constexpr unsigned int mmSQ_THREAD_TRACE_MASK__SI__CI = 0x2382; +constexpr unsigned int mmSQ_THREAD_TRACE_MASK__VI = 0xC332; +constexpr unsigned int mmSQ_THREAD_TRACE_MODE__SI__CI = 0x238E; +constexpr unsigned int mmSQ_THREAD_TRACE_MODE__VI = 0xC336; +constexpr unsigned int mmSQ_THREAD_TRACE_PERF_MASK__SI__CI = 0x2384; +constexpr unsigned int mmSQ_THREAD_TRACE_PERF_MASK__VI = 0xC334; +constexpr unsigned int mmSQ_THREAD_TRACE_SIZE__SI__CI = 0x2381; +constexpr unsigned int mmSQ_THREAD_TRACE_SIZE__VI = 0xC331; +constexpr unsigned int mmSQ_THREAD_TRACE_STATUS__SI__CI = 0x238D; +constexpr unsigned int mmSQ_THREAD_TRACE_STATUS__VI = 0xC33A; +constexpr unsigned int mmSQ_THREAD_TRACE_TOKEN_MASK__SI__CI = 0x2383; +constexpr unsigned int mmSQ_THREAD_TRACE_TOKEN_MASK__VI = 0xC333; +constexpr unsigned int mmSQ_THREAD_TRACE_TOKEN_MASK2__VI = 0xC338; +constexpr unsigned int mmSQ_THREAD_TRACE_WPTR__SI__CI = 0x238C; +constexpr unsigned int mmSQ_THREAD_TRACE_WPTR__VI = 0xC339; +constexpr unsigned int mmSQ_VOP_DPP__VI = 0x237F; +constexpr unsigned int mmSQ_VOP_SDWA__VI = 0x237F; +constexpr unsigned int mmSQ_WREXEC_EXEC_HI__VI = 0x23B1; +constexpr unsigned int mmSQ_WREXEC_EXEC_LO__VI = 0x23B1; +constexpr unsigned int mmSRBM_CAM_DATA__SI__CI = 0x0397; +constexpr unsigned int mmSRBM_CAM_DATA__VI = 0xFE35; +constexpr unsigned int mmSRBM_CAM_INDEX__SI__CI = 0x0396; +constexpr unsigned int mmSRBM_CAM_INDEX__VI = 0xFE34; +constexpr unsigned int mmSRBM_CREDIT_RECOVER__VI = 0x039D; +constexpr unsigned int mmSRBM_CREDIT_RECOVER_CNTL__VI = 0x039C; +constexpr unsigned int mmSRBM_CREDIT_RESET__VI = 0x039E; +constexpr unsigned int mmSRBM_DEBUG_SNAPSHOT2__VI = 0x03AD; +constexpr unsigned int mmSRBM_DSM_TRIG_CNTL0__VI = 0x03AF; +constexpr unsigned int mmSRBM_DSM_TRIG_CNTL1__VI = 0x03B0; +constexpr unsigned int mmSRBM_DSM_TRIG_MASK0__VI = 0x03B1; +constexpr unsigned int mmSRBM_DSM_TRIG_MASK1__VI = 0x03B2; +constexpr unsigned int mmSRBM_FIREWALL_ERROR_ADDR__VI = 0x03AC; +constexpr unsigned int mmSRBM_FIREWALL_ERROR_SRC__VI = 0x03AB; +constexpr unsigned int mmSRBM_GFX_CNTL_DATA__VI = 0xFA2F; +constexpr unsigned int mmSRBM_GFX_CNTL_SELECT__VI = 0xFA2E; +constexpr unsigned int mmSRBM_ISP_CLKEN_CNTL__VI = 0x03B9; +constexpr unsigned int mmSRBM_ISP_DOMAIN_ADDR0__VI = 0xFA20; +constexpr unsigned int mmSRBM_ISP_DOMAIN_ADDR1__VI = 0xFA21; +constexpr unsigned int mmSRBM_ISP_DOMAIN_ADDR2__VI = 0xFA22; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR0__VI = 0xFA00; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR1__VI = 0xFA01; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR2__VI = 0xFA02; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR3__VI = 0xFA03; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR4__VI = 0xFA04; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR5__VI = 0xFA05; +constexpr unsigned int mmSRBM_MC_DOMAIN_ADDR6__VI = 0xFA06; +constexpr unsigned int mmSRBM_PERFCOUNTER0_HI__SI__CI = 0x0704; +constexpr unsigned int mmSRBM_PERFCOUNTER0_HI__VI = 0x7C04; +constexpr unsigned int mmSRBM_PERFCOUNTER0_LO__SI__CI = 0x0703; +constexpr unsigned int mmSRBM_PERFCOUNTER0_LO__VI = 0x7C03; +constexpr unsigned int mmSRBM_PERFCOUNTER0_SELECT__SI__CI = 0x0701; +constexpr unsigned int mmSRBM_PERFCOUNTER0_SELECT__VI = 0x7C01; +constexpr unsigned int mmSRBM_PERFCOUNTER1_HI__SI__CI = 0x0706; +constexpr unsigned int mmSRBM_PERFCOUNTER1_HI__VI = 0x7C06; +constexpr unsigned int mmSRBM_PERFCOUNTER1_LO__SI__CI = 0x0705; +constexpr unsigned int mmSRBM_PERFCOUNTER1_LO__VI = 0x7C05; +constexpr unsigned int mmSRBM_PERFCOUNTER1_SELECT__SI__CI = 0x0702; +constexpr unsigned int mmSRBM_PERFCOUNTER1_SELECT__VI = 0x7C02; +constexpr unsigned int mmSRBM_PERFMON_CNTL__SI__CI = 0x0700; +constexpr unsigned int mmSRBM_PERFMON_CNTL__VI = 0x7C00; +constexpr unsigned int mmSRBM_READ_CNTL__VI = 0x0392; +constexpr unsigned int mmSRBM_READ_ERROR2__VI = 0x03AE; +constexpr unsigned int mmSRBM_SAM_DOMAIN_ADDR0__VI = 0xFA1C; +constexpr unsigned int mmSRBM_SAM_DOMAIN_ADDR1__VI = 0xFA1D; +constexpr unsigned int mmSRBM_SAM_DOMAIN_ADDR2__VI = 0xFA1E; +constexpr unsigned int mmSRBM_SDMA_DOMAIN_ADDR0__VI = 0xFA10; +constexpr unsigned int mmSRBM_SDMA_DOMAIN_ADDR1__VI = 0xFA11; +constexpr unsigned int mmSRBM_SDMA_DOMAIN_ADDR2__VI = 0xFA12; +constexpr unsigned int mmSRBM_SDMA_DOMAIN_ADDR3__VI = 0xFA13; +constexpr unsigned int mmSRBM_STATUS3__VI = 0x0395; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR0__VI = 0xFA08; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR1__VI = 0xFA09; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR2__VI = 0xFA0A; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR3__VI = 0xFA0B; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR4__VI = 0xFA0C; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR5__VI = 0xFA0D; +constexpr unsigned int mmSRBM_SYS_DOMAIN_ADDR6__VI = 0xFA0E; +constexpr unsigned int mmSRBM_UVD_DOMAIN_ADDR0__VI = 0xFA14; +constexpr unsigned int mmSRBM_UVD_DOMAIN_ADDR1__VI = 0xFA15; +constexpr unsigned int mmSRBM_UVD_DOMAIN_ADDR2__VI = 0xFA16; +constexpr unsigned int mmSRBM_VCE_DOMAIN_ADDR0__VI = 0xFA18; +constexpr unsigned int mmSRBM_VCE_DOMAIN_ADDR1__VI = 0xFA19; +constexpr unsigned int mmSRBM_VCE_DOMAIN_ADDR2__VI = 0xFA1A; +constexpr unsigned int mmSRBM_VF_ENABLE__VI = 0xFA30; +constexpr unsigned int mmSRBM_VIRT_CNTL__VI = 0xFA31; +constexpr unsigned int mmSRBM_VIRT_RESET_REQ__VI = 0xFA32; +constexpr unsigned int mmSRBM_VP8_CLKEN_CNTL__VI = 0x03BA; +constexpr unsigned int mmSRBM_VP8_DOMAIN_ADDR0__VI = 0xFA24; +constexpr unsigned int mmSWRST_COMMAND_0__VI = 0x14A2; +constexpr unsigned int mmSWRST_COMMAND_1__VI = 0x14A3; +constexpr unsigned int mmSWRST_COMMAND_STATUS__VI = 0x14A0; +constexpr unsigned int mmSWRST_CONTROL_0__VI = 0x14A4; +constexpr unsigned int mmSWRST_CONTROL_1__VI = 0x14A5; +constexpr unsigned int mmSWRST_CONTROL_2__VI = 0x14A6; +constexpr unsigned int mmSWRST_CONTROL_3__VI = 0x14A7; +constexpr unsigned int mmSWRST_CONTROL_4__VI = 0x14A8; +constexpr unsigned int mmSWRST_CONTROL_5__VI = 0x14A9; +constexpr unsigned int mmSWRST_CONTROL_6__VI = 0x14AA; +constexpr unsigned int mmSWRST_EP_COMMAND_0__VI = 0x14AB; +constexpr unsigned int mmSWRST_EP_CONTROL_0__VI = 0x14AC; +constexpr unsigned int mmSWRST_GENERAL_CONTROL__VI = 0x14A1; +constexpr unsigned int mmSX_BLEND_OPT_CONTROL__VI = 0xA1D7; +constexpr unsigned int mmSX_BLEND_OPT_EPSILON__VI = 0xA1D6; +constexpr unsigned int mmSX_MRT0_BLEND_OPT__VI = 0xA1D8; +constexpr unsigned int mmSX_MRT1_BLEND_OPT__VI = 0xA1D9; +constexpr unsigned int mmSX_MRT2_BLEND_OPT__VI = 0xA1DA; +constexpr unsigned int mmSX_MRT3_BLEND_OPT__VI = 0xA1DB; +constexpr unsigned int mmSX_MRT4_BLEND_OPT__VI = 0xA1DC; +constexpr unsigned int mmSX_MRT5_BLEND_OPT__VI = 0xA1DD; +constexpr unsigned int mmSX_MRT6_BLEND_OPT__VI = 0xA1DE; +constexpr unsigned int mmSX_MRT7_BLEND_OPT__VI = 0xA1DF; +constexpr unsigned int mmSX_PS_DOWNCONVERT__VI = 0xA1D5; +constexpr unsigned int mmSYMCLKA_CLOCK_ENABLE__VI = 0x0160; +constexpr unsigned int mmSYMCLKB_CLOCK_ENABLE__VI = 0x0161; +constexpr unsigned int mmSYMCLKC_CLOCK_ENABLE__VI = 0x0162; +constexpr unsigned int mmSYMCLKD_CLOCK_ENABLE__VI = 0x0163; +constexpr unsigned int mmSYMCLKE_CLOCK_ENABLE__VI = 0x0164; +constexpr unsigned int mmSYMCLKF_CLOCK_ENABLE__VI = 0x0165; +constexpr unsigned int mmSYMCLKG_CLOCK_ENABLE__VI = 0x0117; +constexpr unsigned int mmSYS_GRBM_GFX_INDEX_DATA__VI = 0xFA2D; +constexpr unsigned int mmSYS_GRBM_GFX_INDEX_SELECT__VI = 0xFA2C; +constexpr unsigned int mmTCC_DSM_CNTL__VI = 0x2B85; +constexpr unsigned int mmTCC_EDC_CNT__VI = 0x2B82; +constexpr unsigned int mmTCC_EXE_DISABLE__VI = 0x2B84; +constexpr unsigned int mmTCP_ATC_EDC_GATCL1_CNT__VI = 0x32B1; +constexpr unsigned int mmTCP_CNTL2__VI = 0x32B4; +constexpr unsigned int mmTCP_DSM_CNTL__VI = 0x32B3; +constexpr unsigned int mmTCP_EDC_CNT__VI = 0x2B17; +constexpr unsigned int mmTCP_GATCL1_CNTL__VI = 0x32B0; +constexpr unsigned int mmTCP_GATCL1_DSM_CNTL__VI = 0x32B2; +constexpr unsigned int mmTD_DSM_CNTL__VI = 0x252F; +constexpr unsigned int mmTMDS_CNTL__VI = 0x4A6B; +constexpr unsigned int mmTMDS_CONTROL0_FEEDBACK__VI = 0x4A6D; +constexpr unsigned int mmTMDS_CONTROL_CHAR__VI = 0x4A6C; +constexpr unsigned int mmTMDS_CTL0_1_GEN_CNTL__VI = 0x4A75; +constexpr unsigned int mmTMDS_CTL2_3_GEN_CNTL__VI = 0x4A76; +constexpr unsigned int mmTMDS_CTL_BITS__VI = 0x4A72; +constexpr unsigned int mmTMDS_DCBALANCER_CONTROL__VI = 0x4A73; +constexpr unsigned int mmTMDS_DEBUG__VI = 0x4A71; +constexpr unsigned int mmTMDS_STEREOSYNC_CTL_SEL__VI = 0x4A6E; +constexpr unsigned int mmTMDS_SYNC_CHAR_PATTERN_0_1__VI = 0x4A6F; +constexpr unsigned int mmTMDS_SYNC_CHAR_PATTERN_2_3__VI = 0x4A70; +constexpr unsigned int mmUNIPHYA_CHANNEL_XBAR_CNTL__VI = 0x4806; +constexpr unsigned int mmUNIPHYA_LINK_CNTL__VI = 0x4805; +constexpr unsigned int mmUNIPHYB_CHANNEL_XBAR_CNTL__VI = 0x4808; +constexpr unsigned int mmUNIPHYB_LINK_CNTL__VI = 0x4807; +constexpr unsigned int mmUNIPHYC_CHANNEL_XBAR_CNTL__VI = 0x480A; +constexpr unsigned int mmUNIPHYC_LINK_CNTL__VI = 0x4809; +constexpr unsigned int mmUNIPHYD_CHANNEL_XBAR_CNTL__VI = 0x480C; +constexpr unsigned int mmUNIPHYD_LINK_CNTL__VI = 0x480B; +constexpr unsigned int mmUNIPHYE_CHANNEL_XBAR_CNTL__VI = 0x480E; +constexpr unsigned int mmUNIPHYE_LINK_CNTL__VI = 0x480D; +constexpr unsigned int mmUNIPHYF_CHANNEL_XBAR_CNTL__VI = 0x4810; +constexpr unsigned int mmUNIPHYF_LINK_CNTL__VI = 0x480F; +constexpr unsigned int mmUNIPHYG_CHANNEL_XBAR_CNTL__VI = 0x4812; +constexpr unsigned int mmUNIPHYG_LINK_CNTL__VI = 0x4811; +constexpr unsigned int mmUNIPHY_ANG_BIST_CNTL__VI = 0x48CC; +constexpr unsigned int mmUNIPHY_DATA_SYNCHRONIZATION__VI = 0x48CA; +constexpr unsigned int mmUNIPHY_DEBUG__VI = 0x48D6; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKA__VI = 0x4838; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKB__VI = 0x4839; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKC__VI = 0x483F; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKD__VI = 0x4840; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKE__VI = 0x4843; +constexpr unsigned int mmUNIPHY_IMPCAL_LINKF__VI = 0x4844; +constexpr unsigned int mmUNIPHY_IMPCAL_PERIOD__VI = 0x483A; +constexpr unsigned int mmUNIPHY_IMPCAL_PSW_AB__VI = 0x483E; +constexpr unsigned int mmUNIPHY_IMPCAL_PSW_CD__VI = 0x4842; +constexpr unsigned int mmUNIPHY_IMPCAL_PSW_EF__VI = 0x4846; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED0__VI = 0x48C0; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED1__VI = 0x48C1; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED10__VI = 0x48CA; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED11__VI = 0x48CB; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED12__VI = 0x48CC; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED13__VI = 0x48CD; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED14__VI = 0x48CE; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED15__VI = 0x48CF; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED16__VI = 0x48D0; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED17__VI = 0x48D1; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED18__VI = 0x48D2; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED19__VI = 0x48D3; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED2__VI = 0x48C2; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED20__VI = 0x48D4; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED21__VI = 0x48D5; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED22__VI = 0x48D6; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED23__VI = 0x48D7; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED24__VI = 0x48D8; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED25__VI = 0x48D9; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED26__VI = 0x48DA; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED27__VI = 0x48DB; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED28__VI = 0x48DC; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED29__VI = 0x48DD; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED3__VI = 0x48C3; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED30__VI = 0x48DE; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED31__VI = 0x48DF; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED4__VI = 0x48C4; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED5__VI = 0x48C5; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED6__VI = 0x48C6; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED7__VI = 0x48C7; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED8__VI = 0x48C8; +constexpr unsigned int mmUNIPHY_MACRO_CNTL_RESERVED9__VI = 0x48C9; +constexpr unsigned int mmUNIPHY_PLL_CONTROL1__VI = 0x48C6; +constexpr unsigned int mmUNIPHY_PLL_CONTROL2__VI = 0x48C7; +constexpr unsigned int mmUNIPHY_PLL_FBDIV__VI = 0x48C5; +constexpr unsigned int mmUNIPHY_PLL_SS_CNTL__VI = 0x48C9; +constexpr unsigned int mmUNIPHY_PLL_SS_STEP_SIZE__VI = 0x48C8; +constexpr unsigned int mmUNIPHY_POWER_CONTROL__VI = 0x48C4; +constexpr unsigned int mmUNIPHY_REG_TEST_OUTPUT__VI = 0x48CB; +constexpr unsigned int mmUNIPHY_REG_TEST_OUTPUT2__VI = 0x48CD; +constexpr unsigned int mmUNIPHY_TPG_CONTROL__VI = 0x48D4; +constexpr unsigned int mmUNIPHY_TPG_SEED__VI = 0x48D5; +constexpr unsigned int mmUNIPHY_TX_CONTROL1__VI = 0x48C0; +constexpr unsigned int mmUNIPHY_TX_CONTROL2__VI = 0x48C1; +constexpr unsigned int mmUNIPHY_TX_CONTROL3__VI = 0x48C2; +constexpr unsigned int mmUNIPHY_TX_CONTROL4__VI = 0x48C3; +constexpr unsigned int mmUNP_CRC_CONTROL__VI = 0x4630; +constexpr unsigned int mmUNP_CRC_CURRENT__VI = 0x4632; +constexpr unsigned int mmUNP_CRC_LAST__VI = 0x4633; +constexpr unsigned int mmUNP_CRC_MASK__VI = 0x4631; +constexpr unsigned int mmUNP_DEBUG__VI = 0x4636; +constexpr unsigned int mmUNP_DEBUG2__VI = 0x4637; +constexpr unsigned int mmUNP_GRPH_CONTROL__VI = 0x4601; +constexpr unsigned int mmUNP_GRPH_CONTROL_EXP__VI = 0x4603; +constexpr unsigned int mmUNP_GRPH_DFQ_CONTROL__VI = 0x4629; +constexpr unsigned int mmUNP_GRPH_DFQ_STATUS__VI = 0x462A; +constexpr unsigned int mmUNP_GRPH_ENABLE__VI = 0x4600; +constexpr unsigned int mmUNP_GRPH_FLIP_RATE_CNTL__VI = 0x462F; +constexpr unsigned int mmUNP_GRPH_INTERRUPT_CONTROL__VI = 0x462C; +constexpr unsigned int mmUNP_GRPH_INTERRUPT_STATUS__VI = 0x462B; +constexpr unsigned int mmUNP_GRPH_PITCH_C__VI = 0x4617; +constexpr unsigned int mmUNP_GRPH_PITCH_L__VI = 0x4616; +constexpr unsigned int mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_C__VI = 0x460B; +constexpr unsigned int mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_C__VI = 0x460D; +constexpr unsigned int mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_HIGH_L__VI = 0x460C; +constexpr unsigned int mmUNP_GRPH_PRIMARY_BOTTOM_SURFACE_ADDRESS_L__VI = 0x460A; +constexpr unsigned int mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_C__VI = 0x4607; +constexpr unsigned int mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C__VI = 0x4609; +constexpr unsigned int mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L__VI = 0x4608; +constexpr unsigned int mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_L__VI = 0x4606; +constexpr unsigned int mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_C__VI = 0x4613; +constexpr unsigned int mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_C__VI = 0x4615; +constexpr unsigned int mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_HIGH_L__VI = 0x4614; +constexpr unsigned int mmUNP_GRPH_SECONDARY_BOTTOM_SURFACE_ADDRESS_L__VI = 0x4612; +constexpr unsigned int mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_C__VI = 0x460F; +constexpr unsigned int mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_C__VI = 0x4611; +constexpr unsigned int mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH_L__VI = 0x4610; +constexpr unsigned int mmUNP_GRPH_SECONDARY_SURFACE_ADDRESS_L__VI = 0x460E; +constexpr unsigned int mmUNP_GRPH_STEREOSYNC_FLIP__VI = 0x462E; +constexpr unsigned int mmUNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_C__VI = 0x4628; +constexpr unsigned int mmUNP_GRPH_SURFACE_ADDRESS_HIGH_INUSE_L__VI = 0x4627; +constexpr unsigned int mmUNP_GRPH_SURFACE_ADDRESS_INUSE_C__VI = 0x4626; +constexpr unsigned int mmUNP_GRPH_SURFACE_ADDRESS_INUSE_L__VI = 0x4625; +constexpr unsigned int mmUNP_GRPH_SURFACE_OFFSET_X_C__VI = 0x4619; +constexpr unsigned int mmUNP_GRPH_SURFACE_OFFSET_X_L__VI = 0x4618; +constexpr unsigned int mmUNP_GRPH_SURFACE_OFFSET_Y_C__VI = 0x461B; +constexpr unsigned int mmUNP_GRPH_SURFACE_OFFSET_Y_L__VI = 0x461A; +constexpr unsigned int mmUNP_GRPH_SWAP_CNTL__VI = 0x4605; +constexpr unsigned int mmUNP_GRPH_UPDATE__VI = 0x4624; +constexpr unsigned int mmUNP_GRPH_X_END_C__VI = 0x4621; +constexpr unsigned int mmUNP_GRPH_X_END_L__VI = 0x4620; +constexpr unsigned int mmUNP_GRPH_X_START_C__VI = 0x461D; +constexpr unsigned int mmUNP_GRPH_X_START_L__VI = 0x461C; +constexpr unsigned int mmUNP_GRPH_Y_END_C__VI = 0x4623; +constexpr unsigned int mmUNP_GRPH_Y_END_L__VI = 0x4622; +constexpr unsigned int mmUNP_GRPH_Y_START_C__VI = 0x461F; +constexpr unsigned int mmUNP_GRPH_Y_START_L__VI = 0x461E; +constexpr unsigned int mmUNP_HW_ROTATION__VI = 0x4635; +constexpr unsigned int mmUNP_LB_DATA_GAP_BETWEEN_CHUNK__VI = 0x4634; +constexpr unsigned int mmUNP_TEST_DEBUG_DATA__VI = 0x4639; +constexpr unsigned int mmUNP_TEST_DEBUG_INDEX__VI = 0x4638; +constexpr unsigned int mmUVD_CGC_UDEC_STATUS__VI = 0x3D2D; +constexpr unsigned int mmUVD_JPEG_ADDR_CONFIG__VI = 0x3A1F; +constexpr unsigned int mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH__VI = 0x3C66; +constexpr unsigned int mmUVD_LMI_RBC_IB_64BIT_BAR_LOW__VI = 0x3C67; +constexpr unsigned int mmUVD_LMI_RBC_IB_VMID__VI = 0x3DA1; +constexpr unsigned int mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH__VI = 0x3C68; +constexpr unsigned int mmUVD_LMI_RBC_RB_64BIT_BAR_LOW__VI = 0x3C69; +constexpr unsigned int mmUVD_LMI_RBC_RB_VMID__VI = 0x3DA3; +constexpr unsigned int mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH__VI = 0x3C5E; +constexpr unsigned int mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW__VI = 0x3C5F; +constexpr unsigned int mmUVD_MIF_CURR_ADDR_CONFIG__VI = 0x3992; +constexpr unsigned int mmUVD_MIF_RECON1_ADDR_CONFIG__VI = 0x39C5; +constexpr unsigned int mmUVD_MIF_REF_ADDR_CONFIG__VI = 0x3993; +constexpr unsigned int mmUVD_PGFSM_CONFIG__VI = 0x38C0; +constexpr unsigned int mmUVD_PGFSM_READ_TILE1__VI = 0x38C2; +constexpr unsigned int mmUVD_PGFSM_READ_TILE2__VI = 0x38C3; +constexpr unsigned int mmUVD_PGFSM_READ_TILE3__VI = 0x38C5; +constexpr unsigned int mmUVD_PGFSM_READ_TILE4__VI = 0x38C6; +constexpr unsigned int mmUVD_PGFSM_READ_TILE5__VI = 0x38C8; +constexpr unsigned int mmUVD_PGFSM_READ_TILE6__VI = 0x38EE; +constexpr unsigned int mmUVD_PGFSM_READ_TILE7__VI = 0x38EF; +constexpr unsigned int mmUVD_POWER_STATUS__VI = 0x38C4; +constexpr unsigned int mmUVD_SUVD_CGC_CTRL__VI = 0x3BE6; +constexpr unsigned int mmUVD_SUVD_CGC_GATE__VI = 0x3BE4; +constexpr unsigned int mmUVD_SUVD_CGC_STATUS__VI = 0x3BE5; +constexpr unsigned int mmUVD_UDEC_ADDR_CONFIG__VI = 0x3BD3; +constexpr unsigned int mmUVD_UDEC_DBW_ADDR_CONFIG__VI = 0x3BD5; +constexpr unsigned int mmUVD_UDEC_DB_ADDR_CONFIG__VI = 0x3BD4; +constexpr unsigned int mmVCE_LMI_CACHE_CTRL__VI = 0x85BD; +constexpr unsigned int mmVCE_LMI_CTRL__VI = 0x85A6; +constexpr unsigned int mmVCE_LMI_CTRL2__VI = 0x859D; +constexpr unsigned int mmVCE_LMI_SWAP_CNTL__VI = 0x85AD; +constexpr unsigned int mmVCE_LMI_SWAP_CNTL1__VI = 0x85AE; +constexpr unsigned int mmVCE_LMI_SWAP_CNTL2__VI = 0x85B3; +constexpr unsigned int mmVCE_LMI_SWAP_CNTL3__VI = 0x859E; +constexpr unsigned int mmVCE_LMI_VCPU_CACHE_40BIT_BAR__VI = 0x8597; +constexpr unsigned int mmVCE_RB_ARB_CTRL__VI = 0x809F; +constexpr unsigned int mmVCE_RB_BASE_HI__VI = 0x8061; +constexpr unsigned int mmVCE_RB_BASE_HI2__VI = 0x805C; +constexpr unsigned int mmVCE_RB_BASE_HI3__VI = 0x80D5; +constexpr unsigned int mmVCE_RB_BASE_LO__VI = 0x8060; +constexpr unsigned int mmVCE_RB_BASE_LO2__VI = 0x805B; +constexpr unsigned int mmVCE_RB_BASE_LO3__VI = 0x80D4; +constexpr unsigned int mmVCE_RB_RPTR__VI = 0x8063; +constexpr unsigned int mmVCE_RB_RPTR2__VI = 0x805E; +constexpr unsigned int mmVCE_RB_RPTR3__VI = 0x80D7; +constexpr unsigned int mmVCE_RB_SIZE__VI = 0x8062; +constexpr unsigned int mmVCE_RB_SIZE2__VI = 0x805D; +constexpr unsigned int mmVCE_RB_SIZE3__VI = 0x80D6; +constexpr unsigned int mmVCE_RB_WPTR__VI = 0x8064; +constexpr unsigned int mmVCE_RB_WPTR2__VI = 0x805F; +constexpr unsigned int mmVCE_RB_WPTR3__VI = 0x80D8; +constexpr unsigned int mmVCE_SOFT_RESET__VI = 0x8048; +constexpr unsigned int mmVCE_STATUS__VI = 0x8001; +constexpr unsigned int mmVCE_SYS_INT_ACK__VI = 0x8541; +constexpr unsigned int mmVCE_SYS_INT_EN__VI = 0x8540; +constexpr unsigned int mmVCE_SYS_INT_STATUS__VI = 0x8541; +constexpr unsigned int mmVCE_UENC_DMA_DCLK_CTRL__VI = 0x8390; +constexpr unsigned int mmVCE_VCPU_CACHE_OFFSET0__VI = 0x8009; +constexpr unsigned int mmVCE_VCPU_CACHE_OFFSET1__VI = 0x800B; +constexpr unsigned int mmVCE_VCPU_CACHE_OFFSET2__VI = 0x800D; +constexpr unsigned int mmVCE_VCPU_CACHE_SIZE0__VI = 0x800A; +constexpr unsigned int mmVCE_VCPU_CACHE_SIZE1__VI = 0x800C; +constexpr unsigned int mmVCE_VCPU_CACHE_SIZE2__VI = 0x800E; +constexpr unsigned int mmVCE_VCPU_CNTL__VI = 0x8005; +constexpr unsigned int mmVGA25_PPLL_ANALOG__VI = 0x171B; +constexpr unsigned int mmVGA25_PPLL_FB_DIV__VI = 0x1715; +constexpr unsigned int mmVGA25_PPLL_POST_DIV__VI = 0x1718; +constexpr unsigned int mmVGA25_PPLL_REF_DIV__VI = 0x1712; +constexpr unsigned int mmVGA28_PPLL_ANALOG__VI = 0x171C; +constexpr unsigned int mmVGA28_PPLL_FB_DIV__VI = 0x1716; +constexpr unsigned int mmVGA28_PPLL_POST_DIV__VI = 0x1719; +constexpr unsigned int mmVGA28_PPLL_REF_DIV__VI = 0x1713; +constexpr unsigned int mmVGA41_PPLL_ANALOG__VI = 0x171D; +constexpr unsigned int mmVGA41_PPLL_FB_DIV__VI = 0x1717; +constexpr unsigned int mmVGA41_PPLL_POST_DIV__VI = 0x171A; +constexpr unsigned int mmVGA41_PPLL_REF_DIV__VI = 0x1714; +constexpr unsigned int mmVGT_DISPATCH_DRAW_INDEX__VI = 0xA2DD; +constexpr unsigned int mmVGT_TESS_DISTRIBUTION__VI = 0xA2D4; +constexpr unsigned int mmVIEWPORT_START_SECONDARY__VI = 0x1B5B; +constexpr unsigned int mmVM_INIT_STATUS__VI = 0x14D3; +constexpr unsigned int mmVM_L2_BANK_SELECT_RESERVED_CID__VI = 0x0579; +constexpr unsigned int mmVM_L2_BANK_SELECT_RESERVED_CID2__VI = 0x057A; +constexpr unsigned int mmVM_L2_CNTL4__VI = 0x0578; +constexpr unsigned int mmWB_DBG_MODE__VI = 0x5E31; +constexpr unsigned int mmWB_DEBUG_CTRL__VI = 0x5E30; +constexpr unsigned int mmWB_EC_CONFIG__VI = 0x5E19; +constexpr unsigned int mmWB_ENABLE__VI = 0x5E18; +constexpr unsigned int mmWB_HW_DEBUG__VI = 0x5E32; +constexpr unsigned int mmWB_SOFT_RESET__VI = 0x5E36; +constexpr unsigned int mmWD_QOS__VI = 0x2242; +constexpr unsigned int mmXDMA_AON_TEST_DEBUG_DATA__VI = 0x03FD; +constexpr unsigned int mmXDMA_AON_TEST_DEBUG_INDEX__VI = 0x03FC; +constexpr unsigned int mmXDMA_CLOCK_GATING_CNTL__VI = 0x03E4; +constexpr unsigned int mmXDMA_IF_BIF_STATUS__VI = 0x03E7; +constexpr unsigned int mmXDMA_IF_STATUS__VI = 0x03E9; +constexpr unsigned int mmXDMA_INTERRUPT__VI = 0x03E3; +constexpr unsigned int mmXDMA_LOCAL_SURFACE_TILING1__VI = 0x03E1; +constexpr unsigned int mmXDMA_LOCAL_SURFACE_TILING2__VI = 0x03E2; +constexpr unsigned int mmXDMA_MC_PCIE_CLIENT_CONFIG__VI = 0x03E0; +constexpr unsigned int mmXDMA_MEM_POWER_CNTL__VI = 0x03E6; +constexpr unsigned int mmXDMA_MSTR_CACHE__VI = 0x040A; +constexpr unsigned int mmXDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0408; +constexpr unsigned int mmXDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0409; +constexpr unsigned int mmXDMA_MSTR_CHANNEL_DIM__VI = 0x0402; +constexpr unsigned int mmXDMA_MSTR_CHANNEL_START__VI = 0x040B; +constexpr unsigned int mmXDMA_MSTR_CMD_URGENT_CNTL__VI = 0x03F2; +constexpr unsigned int mmXDMA_MSTR_CNTL__VI = 0x03EC; +constexpr unsigned int mmXDMA_MSTR_HEIGHT__VI = 0x0403; +constexpr unsigned int mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR__VI = 0x03EF; +constexpr unsigned int mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH__VI = 0x03F0; +constexpr unsigned int mmXDMA_MSTR_LOCAL_SURFACE_PITCH__VI = 0x03F1; +constexpr unsigned int mmXDMA_MSTR_MEM_CLIENT_CONFIG__VI = 0x03EE; +constexpr unsigned int mmXDMA_MSTR_MEM_NACK_STATUS__VI = 0x03F6; +constexpr unsigned int mmXDMA_MSTR_MEM_URGENT_CNTL__VI = 0x03F3; +constexpr unsigned int mmXDMA_MSTR_PCIE_NACK_STATUS__VI = 0x03F5; +constexpr unsigned int mmXDMA_MSTR_PERFMEAS_CNTL__VI = 0x040F; +constexpr unsigned int mmXDMA_MSTR_PERFMEAS_STATUS__VI = 0x040E; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE__VI = 0x040A; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0408; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0409; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_CHANNEL_DIM__VI = 0x0402; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_CHANNEL_START__VI = 0x040B; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_HEIGHT__VI = 0x0403; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x040F; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x040E; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_PIPE_CNTL__VI = 0x0400; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_READ_COMMAND__VI = 0x0401; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0406; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0407; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0404; +constexpr unsigned int mmXDMA_MSTR_PIPE0_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0405; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE__VI = 0x041A; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0418; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0419; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_CHANNEL_DIM__VI = 0x0412; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_CHANNEL_START__VI = 0x041B; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_HEIGHT__VI = 0x0413; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x041F; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x041E; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_PIPE_CNTL__VI = 0x0410; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_READ_COMMAND__VI = 0x0411; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0416; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0417; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0414; +constexpr unsigned int mmXDMA_MSTR_PIPE1_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0415; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE__VI = 0x042A; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0428; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0429; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_CHANNEL_DIM__VI = 0x0422; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_CHANNEL_START__VI = 0x042B; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_HEIGHT__VI = 0x0423; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x042F; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x042E; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_PIPE_CNTL__VI = 0x0420; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_READ_COMMAND__VI = 0x0421; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0426; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0427; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0424; +constexpr unsigned int mmXDMA_MSTR_PIPE2_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0425; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE__VI = 0x043A; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0438; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0439; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_CHANNEL_DIM__VI = 0x0432; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_CHANNEL_START__VI = 0x043B; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_HEIGHT__VI = 0x0433; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x043F; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x043E; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_PIPE_CNTL__VI = 0x0430; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_READ_COMMAND__VI = 0x0431; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0436; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0437; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0434; +constexpr unsigned int mmXDMA_MSTR_PIPE3_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0435; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE__VI = 0x044A; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0448; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0449; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_CHANNEL_DIM__VI = 0x0442; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_CHANNEL_START__VI = 0x044B; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_HEIGHT__VI = 0x0443; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x044F; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x044E; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_PIPE_CNTL__VI = 0x0440; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_READ_COMMAND__VI = 0x0441; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0446; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0447; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0444; +constexpr unsigned int mmXDMA_MSTR_PIPE4_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0445; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE__VI = 0x045A; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR__VI = 0x0458; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR_HIGH__VI = 0x0459; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_CHANNEL_DIM__VI = 0x0452; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_CHANNEL_START__VI = 0x045B; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_HEIGHT__VI = 0x0453; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_PERFMEAS_CNTL__VI = 0x045F; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_PERFMEAS_STATUS__VI = 0x045E; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_PIPE_CNTL__VI = 0x0450; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_READ_COMMAND__VI = 0x0451; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0456; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0457; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0454; +constexpr unsigned int mmXDMA_MSTR_PIPE5_XDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0455; +constexpr unsigned int mmXDMA_MSTR_PIPE_CNTL__VI = 0x0400; +constexpr unsigned int mmXDMA_MSTR_READ_COMMAND__VI = 0x0401; +constexpr unsigned int mmXDMA_MSTR_REMOTE_GPU_ADDRESS__VI = 0x0406; +constexpr unsigned int mmXDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0407; +constexpr unsigned int mmXDMA_MSTR_REMOTE_SURFACE_BASE__VI = 0x0404; +constexpr unsigned int mmXDMA_MSTR_REMOTE_SURFACE_BASE_HIGH__VI = 0x0405; +constexpr unsigned int mmXDMA_MSTR_STATUS__VI = 0x03ED; +constexpr unsigned int mmXDMA_MSTR_VSYNC_GSL_CHECK__VI = 0x03F7; +constexpr unsigned int mmXDMA_PERF_MEAS_STATUS__VI = 0x03E8; +constexpr unsigned int mmXDMA_PG_CONTROL__VI = 0x03F9; +constexpr unsigned int mmXDMA_PG_STATUS__VI = 0x03FB; +constexpr unsigned int mmXDMA_PG_WDATA__VI = 0x03FA; +constexpr unsigned int mmXDMA_RBBMIF_RDWR_CNTL__VI = 0x03F8; +constexpr unsigned int mmXDMA_SLV_CHANNEL0_XDMA_SLV_CHANNEL_CNTL__VI = 0x0470; +constexpr unsigned int mmXDMA_SLV_CHANNEL0_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0471; +constexpr unsigned int mmXDMA_SLV_CHANNEL0_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0472; +constexpr unsigned int mmXDMA_SLV_CHANNEL1_XDMA_SLV_CHANNEL_CNTL__VI = 0x0478; +constexpr unsigned int mmXDMA_SLV_CHANNEL1_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0479; +constexpr unsigned int mmXDMA_SLV_CHANNEL1_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x047A; +constexpr unsigned int mmXDMA_SLV_CHANNEL2_XDMA_SLV_CHANNEL_CNTL__VI = 0x0480; +constexpr unsigned int mmXDMA_SLV_CHANNEL2_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0481; +constexpr unsigned int mmXDMA_SLV_CHANNEL2_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0482; +constexpr unsigned int mmXDMA_SLV_CHANNEL3_XDMA_SLV_CHANNEL_CNTL__VI = 0x0488; +constexpr unsigned int mmXDMA_SLV_CHANNEL3_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0489; +constexpr unsigned int mmXDMA_SLV_CHANNEL3_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x048A; +constexpr unsigned int mmXDMA_SLV_CHANNEL4_XDMA_SLV_CHANNEL_CNTL__VI = 0x0490; +constexpr unsigned int mmXDMA_SLV_CHANNEL4_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0491; +constexpr unsigned int mmXDMA_SLV_CHANNEL4_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0492; +constexpr unsigned int mmXDMA_SLV_CHANNEL5_XDMA_SLV_CHANNEL_CNTL__VI = 0x0498; +constexpr unsigned int mmXDMA_SLV_CHANNEL5_XDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0499; +constexpr unsigned int mmXDMA_SLV_CHANNEL5_XDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x049A; +constexpr unsigned int mmXDMA_SLV_CHANNEL_CNTL__VI = 0x0470; +constexpr unsigned int mmXDMA_SLV_CNTL__VI = 0x0460; +constexpr unsigned int mmXDMA_SLV_MEM_CLIENT_CONFIG__VI = 0x0461; +constexpr unsigned int mmXDMA_SLV_MEM_NACK_STATUS__VI = 0x0469; +constexpr unsigned int mmXDMA_SLV_PCIE_NACK_STATUS__VI = 0x0468; +constexpr unsigned int mmXDMA_SLV_RDRET_BUF_STATUS__VI = 0x046A; +constexpr unsigned int mmXDMA_SLV_READ_LATENCY_AVE__VI = 0x0467; +constexpr unsigned int mmXDMA_SLV_READ_LATENCY_MINMAX__VI = 0x0466; +constexpr unsigned int mmXDMA_SLV_READ_LATENCY_TIMER__VI = 0x046B; +constexpr unsigned int mmXDMA_SLV_READ_URGENT_CNTL__VI = 0x0463; +constexpr unsigned int mmXDMA_SLV_REMOTE_GPU_ADDRESS__VI = 0x0471; +constexpr unsigned int mmXDMA_SLV_REMOTE_GPU_ADDRESS_HIGH__VI = 0x0472; +constexpr unsigned int mmXDMA_SLV_SLS_PITCH__VI = 0x0462; +constexpr unsigned int mmXDMA_SLV_WB_RATE_CNTL__VI = 0x0465; +constexpr unsigned int mmXDMA_SLV_WRITE_URGENT_CNTL__VI = 0x0464; +constexpr unsigned int mmXDMA_TEST_DEBUG_DATA__VI = 0x03EB; +constexpr unsigned int mmXDMA_TEST_DEBUG_INDEX__VI = 0x03EA; +#define offset_HEADER__VI +constexpr unsigned int pciMSI_MASK__VI = 0x002B; +constexpr unsigned int pciMSI_MASK_64__VI = 0x002C; +constexpr unsigned int pciMSI_PENDING__VI = 0x002C; +constexpr unsigned int pciMSI_PENDING_64__VI = 0x002D; +constexpr unsigned int pciPCIE_ARI_CAP__VI = 0x00CB; +constexpr unsigned int pciPCIE_ARI_CNTL__VI = 0x00CB; +constexpr unsigned int pciPCIE_ARI_ENH_CAP_LIST__VI = 0x00CA; +constexpr unsigned int pciPCIE_LTR_CAP__VI = 0x00C9; +constexpr unsigned int pciPCIE_LTR_ENH_CAP_LIST__VI = 0x00C8; +constexpr unsigned int pciPCIE_MC_ADDR0__VI = 0x00BE; +constexpr unsigned int pciPCIE_MC_ADDR1__VI = 0x00BF; +constexpr unsigned int pciPCIE_MC_BLOCK_ALL0__VI = 0x00C2; +constexpr unsigned int pciPCIE_MC_BLOCK_ALL1__VI = 0x00C3; +constexpr unsigned int pciPCIE_MC_BLOCK_UNTRANSLATED_0__VI = 0x00C4; +constexpr unsigned int pciPCIE_MC_BLOCK_UNTRANSLATED_1__VI = 0x00C5; +constexpr unsigned int pciPCIE_MC_CAP__VI = 0x00BD; +constexpr unsigned int pciPCIE_MC_CNTL__VI = 0x00BD; +constexpr unsigned int pciPCIE_MC_ENH_CAP_LIST__VI = 0x00BC; +constexpr unsigned int pciPCIE_MC_RCV0__VI = 0x00C0; +constexpr unsigned int pciPCIE_MC_RCV1__VI = 0x00C1; +constexpr unsigned int pciPCIE_SRIOV_CAP__VI = 0x00CD; +constexpr unsigned int pciPCIE_SRIOV_CONTROL__VI = 0x00CE; +constexpr unsigned int pciPCIE_SRIOV_ENH_CAP_LIST__VI = 0x00CC; +constexpr unsigned int pciPCIE_SRIOV_FIRST_VF_OFFSET__VI = 0x00D1; +constexpr unsigned int pciPCIE_SRIOV_FUNC_DEP_LINK__VI = 0x00D0; +constexpr unsigned int pciPCIE_SRIOV_INITIAL_VFS__VI = 0x00CF; +constexpr unsigned int pciPCIE_SRIOV_NUM_VFS__VI = 0x00D0; +constexpr unsigned int pciPCIE_SRIOV_STATUS__VI = 0x00CE; +constexpr unsigned int pciPCIE_SRIOV_SUPPORTED_PAGE_SIZE__VI = 0x00D3; +constexpr unsigned int pciPCIE_SRIOV_SYSTEM_PAGE_SIZE__VI = 0x00D4; +constexpr unsigned int pciPCIE_SRIOV_TOTAL_VFS__VI = 0x00CF; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_0__VI = 0x00D5; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_1__VI = 0x00D6; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_2__VI = 0x00D7; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_3__VI = 0x00D8; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_4__VI = 0x00D9; +constexpr unsigned int pciPCIE_SRIOV_VF_BASE_ADDR_5__VI = 0x00DA; +constexpr unsigned int pciPCIE_SRIOV_VF_DEVICE_ID__VI = 0x00D2; +constexpr unsigned int pciPCIE_SRIOV_VF_MIGRATION_STATE_ARRAY_OFFSET__VI = 0x00DB; +constexpr unsigned int pciPCIE_SRIOV_VF_STRIDE__VI = 0x00D1; +constexpr unsigned int pciPCIE_TPH_REQR_CAP__VI = 0x00B9; +constexpr unsigned int pciPCIE_TPH_REQR_CNTL__VI = 0x00BA; +constexpr unsigned int pciPCIE_TPH_REQR_ENH_CAP_LIST__VI = 0x00B8; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV__VI = 0x0100; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC_HDR_GPUIOV__VI = 0x0101; +constexpr unsigned int pciPCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL__VI = 0x0105; +} // inline namespace Chip +} // namespace Gfx6 +} // namespace Pal + +#endif diff --git a/externals/gcn/include/gcn/si_ci_vi_merged_pm4_it_opcodes.h b/externals/gcn/include/gcn/si_ci_vi_merged_pm4_it_opcodes.h new file mode 100644 index 000000000..0c2ac3abc --- /dev/null +++ b/externals/gcn/include/gcn/si_ci_vi_merged_pm4_it_opcodes.h @@ -0,0 +1,117 @@ +/* + *********************************************************************************************************************** + * + * Copyright (c) 2015-2021 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************************************************************************/ + +#ifndef PM4_IT_OPCODES_H +#define PM4_IT_OPCODES_H + +enum IT_OpCodeType { + IT_NOP = 0x10, + IT_SET_BASE = 0x11, + IT_CLEAR_STATE = 0x12, + IT_INDEX_BUFFER_SIZE = 0x13, + IT_DISPATCH_DIRECT = 0x15, + IT_DISPATCH_INDIRECT = 0x16, + IT_ATOMIC_GDS = 0x1D, + IT_ATOMIC = 0x1E, + IT_OCCLUSION_QUERY = 0x1F, + IT_SET_PREDICATION = 0x20, + IT_REG_RMW = 0x21, + IT_COND_EXEC = 0x22, + IT_PRED_EXEC = 0x23, + IT_DRAW_INDIRECT = 0x24, + IT_DRAW_INDEX_INDIRECT = 0x25, + IT_INDEX_BASE = 0x26, + IT_DRAW_INDEX_2 = 0x27, + IT_CONTEXT_CONTROL = 0x28, + IT_INDEX_TYPE = 0x2A, + IT_DRAW_INDIRECT_MULTI = 0x2C, + IT_DRAW_INDEX_AUTO = 0x2D, + IT_NUM_INSTANCES = 0x2F, + IT_DRAW_INDEX_MULTI_AUTO = 0x30, + IT_INDIRECT_BUFFER_CNST = 0x33, + IT_STRMOUT_BUFFER_UPDATE = 0x34, + IT_DRAW_INDEX_OFFSET_2 = 0x35, + IT_WRITE_DATA = 0x37, + IT_DRAW_INDEX_INDIRECT_MULTI = 0x38, + IT_MEM_SEMAPHORE = 0x39, + IT_COPY_DW__SI__CI = 0x3B, + IT_WAIT_REG_MEM = 0x3C, + IT_INDIRECT_BUFFER = 0x3F, + IT_COND_INDIRECT_BUFFER = 0x3F, + IT_COPY_DATA = 0x40, + IT_CP_DMA = 0x41, + IT_PFP_SYNC_ME = 0x42, + IT_SURFACE_SYNC = 0x43, + IT_COND_WRITE = 0x45, + IT_EVENT_WRITE = 0x46, + IT_EVENT_WRITE_EOP = 0x47, + IT_EVENT_WRITE_EOS = 0x48, + IT_PREAMBLE_CNTL = 0x4A, + IT_CONTEXT_REG_RMW = 0x51, + IT_LOAD_SH_REG = 0x5F, + IT_LOAD_CONFIG_REG = 0x60, + IT_LOAD_CONTEXT_REG = 0x61, + IT_SET_CONFIG_REG = 0x68, + IT_SET_CONTEXT_REG = 0x69, + IT_SET_CONTEXT_REG_INDIRECT = 0x73, + IT_SET_SH_REG = 0x76, + IT_SET_SH_REG_OFFSET = 0x77, + IT_SCRATCH_RAM_WRITE = 0x7D, + IT_SCRATCH_RAM_READ = 0x7E, + IT_LOAD_CONST_RAM = 0x80, + IT_WRITE_CONST_RAM = 0x81, + IT_DUMP_CONST_RAM = 0x83, + IT_INCREMENT_CE_COUNTER = 0x84, + IT_INCREMENT_DE_COUNTER = 0x85, + IT_WAIT_ON_CE_COUNTER = 0x86, + IT_WAIT_ON_DE_COUNTER__SI = 0x87, + IT_WAIT_ON_DE_COUNTER_DIFF = 0x88, + IT_SWITCH_BUFFER = 0x8B, + IT_DRAW_PREAMBLE__CI__VI = 0x36, + IT_RELEASE_MEM__CI__VI = 0x49, + IT_DMA_DATA__CI__VI = 0x50, + IT_ACQUIRE_MEM__CI__VI = 0x58, + IT_REWIND__CI__VI = 0x59, + IT_LOAD_UCONFIG_REG__CI__VI = 0x5E, + IT_SET_QUEUE_REG__CI__VI = 0x78, + IT_SET_UCONFIG_REG__CI__VI = 0x79, + IT_INDEX_ATTRIBUTES_INDIRECT__CI__VI = 0x91, + IT_SET_SH_REG_INDEX__CI__VI = 0x9B, + IT_SET_RESOURCES__CI__VI = 0xA0, + IT_MAP_PROCESS__CI__VI = 0xA1, + IT_MAP_QUEUES__CI__VI = 0xA2, + IT_UNMAP_QUEUES__CI__VI = 0xA3, + IT_QUERY_STATUS__CI__VI = 0xA4, + IT_RUN_LIST__CI__VI = 0xA5, + IT_LOAD_SH_REG_INDEX__VI = 0x63, + IT_LOAD_CONTEXT_REG_INDEX__VI = 0x9F, + IT_DUMP_CONST_RAM_OFFSET__VI = 0x9E, +}; + +#define PM4_TYPE_0 0 +#define PM4_TYPE_2 2 +#define PM4_TYPE_3 3 + +#endif diff --git a/src/audio_core/sdl_audio.cpp b/src/audio_core/sdl_audio.cpp index f544c52f9..894f5da55 100644 --- a/src/audio_core/sdl_audio.cpp +++ b/src/audio_core/sdl_audio.cpp @@ -14,7 +14,9 @@ namespace Audio { -int SDLAudio::AudioOutOpen(int type, u32 samples_num, u32 freq, +constexpr int AUDIO_STREAM_BUFFER_THRESHOLD = 65536; // Define constant for buffer threshold + +s32 SDLAudio::AudioOutOpen(int type, u32 samples_num, u32 freq, Libraries::AudioOut::OrbisAudioOutParamFormat format) { using Libraries::AudioOut::OrbisAudioOutParamFormat; std::unique_lock lock{m_mutex}; @@ -80,7 +82,7 @@ int SDLAudio::AudioOutOpen(int type, u32 samples_num, u32 freq, SDL_zero(fmt); fmt.format = sampleFormat; fmt.channels = port.channels_num; - fmt.freq = 48000; + fmt.freq = freq; // Set frequency from the argument port.stream = SDL_OpenAudioDeviceStream(SDL_AUDIO_DEVICE_DEFAULT_PLAYBACK, &fmt, NULL, NULL); SDL_ResumeAudioDevice(SDL_GetAudioStreamDevice(port.stream)); @@ -88,7 +90,8 @@ int SDLAudio::AudioOutOpen(int type, u32 samples_num, u32 freq, } } - return -1; // all ports are used + LOG_ERROR(Lib_AudioOut, "Audio ports are full"); + return ORBIS_AUDIO_OUT_ERROR_PORT_FULL; // all ports are used } s32 SDLAudio::AudioOutOutput(s32 handle, const void* ptr) { @@ -97,27 +100,28 @@ s32 SDLAudio::AudioOutOutput(s32 handle, const void* ptr) { if (!port.isOpen) { return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; } - if (ptr == nullptr) { - return 0; - } - // TODO mixing channels - int result = SDL_PutAudioStreamData(port.stream, ptr, - port.samples_num * port.sample_size * port.channels_num); - // TODO find a correct value 8192 is estimated - while (SDL_GetAudioStreamAvailable(port.stream) > 65536) { + + const size_t data_size = port.samples_num * port.sample_size * port.channels_num; + + SDL_bool result = SDL_PutAudioStreamData(port.stream, ptr, data_size); + + lock.unlock(); // Unlock only after necessary operations + + while (SDL_GetAudioStreamAvailable(port.stream) > AUDIO_STREAM_BUFFER_THRESHOLD) { SDL_Delay(0); } - return result; + return result ? ORBIS_OK : -1; } -bool SDLAudio::AudioOutSetVolume(s32 handle, s32 bitflag, s32* volume) { +s32 SDLAudio::AudioOutSetVolume(s32 handle, s32 bitflag, s32* volume) { using Libraries::AudioOut::OrbisAudioOutParamFormat; std::shared_lock lock{m_mutex}; auto& port = portsOut[handle - 1]; if (!port.isOpen) { return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; } + for (int i = 0; i < port.channels_num; i++, bitflag >>= 1u) { auto bit = bitflag & 0x1u; @@ -147,16 +151,16 @@ bool SDLAudio::AudioOutSetVolume(s32 handle, s32 bitflag, s32* volume) { } } - return true; + return ORBIS_OK; } -bool SDLAudio::AudioOutGetStatus(s32 handle, int* type, int* channels_num) { +s32 SDLAudio::AudioOutGetStatus(s32 handle, int* type, int* channels_num) { std::shared_lock lock{m_mutex}; auto& port = portsOut[handle - 1]; *type = port.type; *channels_num = port.channels_num; - return true; + return ORBIS_OK; } } // namespace Audio diff --git a/src/audio_core/sdl_audio.h b/src/audio_core/sdl_audio.h index 07e82145e..0d4783f19 100644 --- a/src/audio_core/sdl_audio.h +++ b/src/audio_core/sdl_audio.h @@ -14,11 +14,11 @@ public: SDLAudio() = default; virtual ~SDLAudio() = default; - int AudioOutOpen(int type, u32 samples_num, u32 freq, + s32 AudioOutOpen(int type, u32 samples_num, u32 freq, Libraries::AudioOut::OrbisAudioOutParamFormat format); s32 AudioOutOutput(s32 handle, const void* ptr); - bool AudioOutSetVolume(s32 handle, s32 bitflag, s32* volume); - bool AudioOutGetStatus(s32 handle, int* type, int* channels_num); + s32 AudioOutSetVolume(s32 handle, s32 bitflag, s32* volume); + s32 AudioOutGetStatus(s32 handle, int* type, int* channels_num); private: struct PortOut { @@ -33,8 +33,7 @@ private: bool isOpen = false; }; std::shared_mutex m_mutex; - std::array portsOut; // main up to 8 ports , BGM 1 port , voice up to 4 ports , - // personal up to 4 ports , padspk up to 5 ports , aux 1 port + std::array portsOut; }; } // namespace Audio diff --git a/src/common/alignment.h b/src/common/alignment.h index 367efb6bb..8480fae26 100644 --- a/src/common/alignment.h +++ b/src/common/alignment.h @@ -28,4 +28,16 @@ template return (value & 0x3FFF) == 0; } +template + requires std::is_integral_v +[[nodiscard]] constexpr bool Is64KBAligned(T value) { + return (value & 0xFFFF) == 0; +} + +template + requires std::is_integral_v +[[nodiscard]] constexpr bool Is2MBAligned(T value) { + return (value & 0x1FFFFF) == 0; +} + } // namespace Common diff --git a/src/common/config.cpp b/src/common/config.cpp index 4a8effbdf..8ac3c694b 100644 --- a/src/common/config.cpp +++ b/src/common/config.cpp @@ -8,6 +8,7 @@ #include // for wstring support #include #include "common/logging/formatter.h" +#include "common/path_util.h" #include "config.h" namespace toml { @@ -32,6 +33,7 @@ namespace Config { static bool isNeo = false; static bool isFullscreen = false; static bool playBGM = false; +static int BGMvolume = 50; static u32 screenWidth = 1280; static u32 screenHeight = 720; static s32 gpuId = -1; // Vulkan physical device index. Set to negative for auto select @@ -47,7 +49,6 @@ static bool isAutoUpdate = false; static bool isNullGpu = false; static bool shouldCopyGPUBuffers = false; static bool shouldDumpShaders = false; -static bool shouldDumpPM4 = false; static u32 vblankDivider = 1; static bool vkValidation = false; static bool vkValidationSync = false; @@ -58,6 +59,7 @@ static bool vkCrashDiagnostic = false; // Gui std::filesystem::path settings_install_dir = {}; +std::filesystem::path settings_addon_install_dir = {}; u32 main_window_geometry_x = 400; u32 main_window_geometry_y = 400; u32 main_window_geometry_w = 1280; @@ -89,6 +91,10 @@ bool getPlayBGM() { return playBGM; } +int getBGMvolume() { + return BGMvolume; +} + u32 getScreenWidth() { return screenWidth; } @@ -149,10 +155,6 @@ bool dumpShaders() { return shouldDumpShaders; } -bool dumpPM4() { - return shouldDumpPM4; -} - bool isRdocEnabled() { return rdocEnable; } @@ -221,10 +223,6 @@ void setDumpShaders(bool enable) { shouldDumpShaders = enable; } -void setDumpPM4(bool enable) { - shouldDumpPM4 = enable; -} - void setVkValidation(bool enable) { vkValidation = enable; } @@ -249,6 +247,10 @@ void setPlayBGM(bool enable) { playBGM = enable; } +void setBGMvolume(int volume) { + BGMvolume = volume; +} + void setLanguage(u32 language) { m_language = language; } @@ -290,6 +292,9 @@ void setMainWindowGeometry(u32 x, u32 y, u32 w, u32 h) { void setGameInstallDir(const std::filesystem::path& dir) { settings_install_dir = dir; } +void setAddonInstallDir(const std::filesystem::path& dir) { + settings_addon_install_dir = dir; +} void setMainWindowTheme(u32 theme) { mw_themes = theme; } @@ -346,6 +351,13 @@ u32 getMainWindowGeometryH() { std::filesystem::path getGameInstallDir() { return settings_install_dir; } +std::filesystem::path getAddonInstallDir() { + if (settings_addon_install_dir.empty()) { + // Default for users without a config file or a config file from before this option existed + return Common::FS::GetUserPath(Common::FS::PathType::UserDir) / "addcont"; + } + return settings_addon_install_dir; +} u32 getMainWindowTheme() { return mw_themes; } @@ -412,6 +424,7 @@ void load(const std::filesystem::path& path) { isNeo = toml::find_or(general, "isPS4Pro", false); isFullscreen = toml::find_or(general, "Fullscreen", false); playBGM = toml::find_or(general, "playBGM", false); + BGMvolume = toml::find_or(general, "BGMvolume", 50); logFilter = toml::find_or(general, "logFilter", ""); logType = toml::find_or(general, "logType", "sync"); userName = toml::find_or(general, "userName", "shadPS4"); @@ -439,7 +452,6 @@ void load(const std::filesystem::path& path) { isNullGpu = toml::find_or(gpu, "nullGpu", false); shouldCopyGPUBuffers = toml::find_or(gpu, "copyGPUBuffers", false); shouldDumpShaders = toml::find_or(gpu, "dumpShaders", false); - shouldDumpPM4 = toml::find_or(gpu, "dumpPM4", false); vblankDivider = toml::find_or(gpu, "vblankDivider", 1); } @@ -472,6 +484,7 @@ void load(const std::filesystem::path& path) { m_window_size_W = toml::find_or(gui, "mw_width", 0); m_window_size_H = toml::find_or(gui, "mw_height", 0); settings_install_dir = toml::find_fs_path_or(gui, "installDir", {}); + settings_addon_install_dir = toml::find_fs_path_or(gui, "addonInstallDir", {}); main_window_geometry_x = toml::find_or(gui, "geometry_x", 0); main_window_geometry_y = toml::find_or(gui, "geometry_y", 0); main_window_geometry_w = toml::find_or(gui, "geometry_w", 0); @@ -513,6 +526,7 @@ void save(const std::filesystem::path& path) { data["General"]["isPS4Pro"] = isNeo; data["General"]["Fullscreen"] = isFullscreen; data["General"]["playBGM"] = playBGM; + data["General"]["BGMvolume"] = BGMvolume; data["General"]["logFilter"] = logFilter; data["General"]["logType"] = logType; data["General"]["userName"] = userName; @@ -526,7 +540,6 @@ void save(const std::filesystem::path& path) { data["GPU"]["nullGpu"] = isNullGpu; data["GPU"]["copyGPUBuffers"] = shouldCopyGPUBuffers; data["GPU"]["dumpShaders"] = shouldDumpShaders; - data["GPU"]["dumpPM4"] = shouldDumpPM4; data["GPU"]["vblankDivider"] = vblankDivider; data["Vulkan"]["gpuId"] = gpuId; data["Vulkan"]["validation"] = vkValidation; @@ -545,6 +558,8 @@ void save(const std::filesystem::path& path) { data["GUI"]["mw_width"] = m_window_size_W; data["GUI"]["mw_height"] = m_window_size_H; data["GUI"]["installDir"] = std::string{fmt::UTF(settings_install_dir.u8string()).data}; + data["GUI"]["addonInstallDir"] = + std::string{fmt::UTF(settings_addon_install_dir.u8string()).data}; data["GUI"]["geometry_x"] = main_window_geometry_x; data["GUI"]["geometry_y"] = main_window_geometry_y; data["GUI"]["geometry_w"] = main_window_geometry_w; @@ -565,6 +580,7 @@ void setDefaultValues() { isNeo = false; isFullscreen = false; playBGM = false; + BGMvolume = 50; screenWidth = 1280; screenHeight = 720; logFilter = ""; @@ -582,7 +598,6 @@ void setDefaultValues() { isAutoUpdate = false; isNullGpu = false; shouldDumpShaders = false; - shouldDumpPM4 = false; vblankDivider = 1; vkValidation = false; vkValidationSync = false; diff --git a/src/common/config.h b/src/common/config.h index f2b5187f8..daee9e078 100644 --- a/src/common/config.h +++ b/src/common/config.h @@ -14,6 +14,8 @@ void save(const std::filesystem::path& path); bool isNeoMode(); bool isFullscreenMode(); bool getPlayBGM(); +int getBGMvolume(); + std::string getLogFilter(); std::string getLogType(); std::string getUserName(); @@ -32,7 +34,6 @@ bool autoUpdate(); bool nullGpu(); bool copyGPUCmdBuffers(); bool dumpShaders(); -bool dumpPM4(); bool isRdocEnabled(); u32 vblankDiv(); @@ -42,13 +43,13 @@ void setAutoUpdate(bool enable); void setNullGpu(bool enable); void setCopyGPUCmdBuffers(bool enable); void setDumpShaders(bool enable); -void setDumpPM4(bool enable); void setVblankDiv(u32 value); void setGpuId(s32 selectedGpuId); void setScreenWidth(u32 width); void setScreenHeight(u32 height); void setFullscreenMode(bool enable); void setPlayBGM(bool enable); +void setBGMvolume(int volume); void setLanguage(u32 language); void setNeoMode(bool enable); void setUserName(const std::string& type); @@ -73,6 +74,7 @@ bool vkCrashDiagnosticEnabled(); // Gui void setMainWindowGeometry(u32 x, u32 y, u32 w, u32 h); void setGameInstallDir(const std::filesystem::path& dir); +void setAddonInstallDir(const std::filesystem::path& dir); void setMainWindowTheme(u32 theme); void setIconSize(u32 size); void setIconSizeGrid(u32 size); @@ -91,6 +93,7 @@ u32 getMainWindowGeometryY(); u32 getMainWindowGeometryW(); u32 getMainWindowGeometryH(); std::filesystem::path getGameInstallDir(); +std::filesystem::path getAddonInstallDir(); u32 getMainWindowTheme(); u32 getIconSize(); u32 getIconSizeGrid(); diff --git a/src/common/io_file.cpp b/src/common/io_file.cpp index c1d9cc592..1b28d2bba 100644 --- a/src/common/io_file.cpp +++ b/src/common/io_file.cpp @@ -192,8 +192,9 @@ int IOFile::Open(const fs::path& path, FileAccessMode mode, FileType type, FileS #endif if (!IsOpen()) { - LOG_ERROR(Common_Filesystem, "Failed to open the file at path={}", - PathToUTF8String(file_path)); + const auto ec = std::error_code{result, std::generic_category()}; + LOG_ERROR(Common_Filesystem, "Failed to open the file at path={}, error_message={}", + PathToUTF8String(file_path), ec.message()); } return result; @@ -372,6 +373,18 @@ bool IOFile::Seek(s64 offset, SeekOrigin origin) const { return false; } + u64 size = GetSize(); + if (origin == SeekOrigin::CurrentPosition && Tell() + offset > size) { + LOG_ERROR(Common_Filesystem, "Seeking past the end of the file"); + return false; + } else if (origin == SeekOrigin::SetOrigin && (u64)offset > size) { + LOG_ERROR(Common_Filesystem, "Seeking past the end of the file"); + return false; + } else if (origin == SeekOrigin::End && offset > 0) { + LOG_ERROR(Common_Filesystem, "Seeking past the end of the file"); + return false; + } + errno = 0; const auto seek_result = fseeko(file, offset, ToSeekOrigin(origin)) == 0; diff --git a/src/common/io_file.h b/src/common/io_file.h index 177bddbad..8fed4981f 100644 --- a/src/common/io_file.h +++ b/src/common/io_file.h @@ -205,9 +205,9 @@ public: return WriteSpan(string); } - static void WriteBytes(const std::filesystem::path path, std::span data) { + static size_t WriteBytes(const std::filesystem::path path, std::span data) { IOFile out(path, FileAccessMode::Write); - out.Write(data); + return out.Write(data); } private: diff --git a/src/common/path_util.cpp b/src/common/path_util.cpp index d7274fc74..27098e2d1 100644 --- a/src/common/path_util.cpp +++ b/src/common/path_util.cpp @@ -110,7 +110,6 @@ static auto UserPaths = [] { create_path(PathType::LogDir, user_dir / LOG_DIR); create_path(PathType::ScreenshotsDir, user_dir / SCREENSHOTS_DIR); create_path(PathType::ShaderDir, user_dir / SHADER_DIR); - create_path(PathType::PM4Dir, user_dir / PM4_DIR); create_path(PathType::SaveDataDir, user_dir / SAVEDATA_DIR); create_path(PathType::GameDataDir, user_dir / GAMEDATA_DIR); create_path(PathType::TempDataDir, user_dir / TEMPDATA_DIR); @@ -119,7 +118,6 @@ static auto UserPaths = [] { create_path(PathType::CapturesDir, user_dir / CAPTURES_DIR); create_path(PathType::CheatsDir, user_dir / CHEATS_DIR); create_path(PathType::PatchesDir, user_dir / PATCHES_DIR); - create_path(PathType::AddonsDir, user_dir / ADDONS_DIR); create_path(PathType::MetaDataDir, user_dir / METADATA_DIR); return paths; diff --git a/src/common/path_util.h b/src/common/path_util.h index d40f4aab4..09b7a3337 100644 --- a/src/common/path_util.h +++ b/src/common/path_util.h @@ -17,7 +17,6 @@ enum class PathType { LogDir, // Where log files are stored. ScreenshotsDir, // Where screenshots are stored. ShaderDir, // Where shaders are stored. - PM4Dir, // Where command lists are stored. SaveDataDir, // Where guest save data is stored. TempDataDir, // Where game temp data is stored. GameDataDir, // Where game data is stored. @@ -26,7 +25,6 @@ enum class PathType { CapturesDir, // Where rdoc captures are stored. CheatsDir, // Where cheats are stored. PatchesDir, // Where patches are stored. - AddonsDir, // Where additional content is stored. MetaDataDir, // Where game metadata (e.g. trophies and menu backgrounds) is stored. }; @@ -36,7 +34,6 @@ constexpr auto PORTABLE_DIR = "user"; constexpr auto LOG_DIR = "log"; constexpr auto SCREENSHOTS_DIR = "screenshots"; constexpr auto SHADER_DIR = "shader"; -constexpr auto PM4_DIR = "pm4"; constexpr auto SAVEDATA_DIR = "savedata"; constexpr auto GAMEDATA_DIR = "data"; constexpr auto TEMPDATA_DIR = "temp"; @@ -45,7 +42,6 @@ constexpr auto DOWNLOAD_DIR = "download"; constexpr auto CAPTURES_DIR = "captures"; constexpr auto CHEATS_DIR = "cheats"; constexpr auto PATCHES_DIR = "patches"; -constexpr auto ADDONS_DIR = "addcont"; constexpr auto METADATA_DIR = "game_data"; // Filenames diff --git a/src/core/cpu_patches.cpp b/src/core/cpu_patches.cpp index 3404496ce..b812e5444 100644 --- a/src/core/cpu_patches.cpp +++ b/src/core/cpu_patches.cpp @@ -1057,7 +1057,7 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) { // Undefined behavior if length + index is bigger than 64 according to the spec, // we'll warn and continue execution. LOG_WARNING(Core, - "extrq at {:x} with length {} and index {} is bigger than 64, " + "extrq at {} with length {} and index {} is bigger than 64, " "undefined behavior", fmt::ptr(code_address), length, index); } @@ -1117,7 +1117,7 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) { // Undefined behavior if length + index is bigger than 64 according to the spec, // we'll warn and continue execution. LOG_WARNING(Core, - "insertq at {:x} with length {} and index {} is bigger than 64, " + "insertq at {} with length {} and index {} is bigger than 64, " "undefined behavior", fmt::ptr(code_address), length, index); } diff --git a/src/core/debug_state.cpp b/src/core/debug_state.cpp new file mode 100644 index 000000000..050143e6e --- /dev/null +++ b/src/core/debug_state.cpp @@ -0,0 +1,102 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "common/assert.h" +#include "common/native_clock.h" +#include "common/singleton.h" +#include "debug_state.h" +#include "libraries/kernel/event_queues.h" +#include "libraries/kernel/time_management.h" +#include "libraries/system/msgdialog.h" + +using namespace DebugStateType; + +DebugStateImpl& DebugState = *Common::Singleton::Instance(); + +static ThreadID ThisThreadID() { +#ifdef _WIN32 + return GetCurrentThreadId(); +#else + return pthread_self(); +#endif +} + +static void PauseThread(ThreadID id) { +#ifdef _WIN32 + auto handle = OpenThread(THREAD_SUSPEND_RESUME, FALSE, id); + SuspendThread(handle); + CloseHandle(handle); +#else + pthread_kill(id, SIGUSR1); +#endif +} + +static void ResumeThread(ThreadID id) { +#ifdef _WIN32 + auto handle = OpenThread(THREAD_SUSPEND_RESUME, FALSE, id); + ResumeThread(handle); + CloseHandle(handle); +#else + pthread_kill(id, SIGUSR1); +#endif +} + +void DebugStateImpl::AddCurrentThreadToGuestList() { + std::lock_guard lock{guest_threads_mutex}; + const ThreadID id = ThisThreadID(); + guest_threads.push_back(id); +} + +void DebugStateImpl::RemoveCurrentThreadFromGuestList() { + std::lock_guard lock{guest_threads_mutex}; + const ThreadID id = ThisThreadID(); + std::erase_if(guest_threads, [&](const ThreadID& v) { return v == id; }); +} + +void DebugStateImpl::PauseGuestThreads() { + using namespace Libraries::MsgDialog; + std::unique_lock lock{guest_threads_mutex}; + if (is_guest_threads_paused) { + return; + } + if (ShouldPauseInSubmit()) { + waiting_submit_pause = false; + should_show_frame_dump = true; + } + bool self_guest = false; + ThreadID self_id = ThisThreadID(); + for (const auto& id : guest_threads) { + if (id == self_id) { + self_guest = true; + } else { + PauseThread(id); + } + } + pause_time = Libraries::Kernel::Dev::GetClock()->GetUptime(); + is_guest_threads_paused = true; + lock.unlock(); + if (self_guest) { + PauseThread(self_id); + } +} + +void DebugStateImpl::ResumeGuestThreads() { + std::lock_guard lock{guest_threads_mutex}; + if (!is_guest_threads_paused) { + return; + } + + u64 delta_time = Libraries::Kernel::Dev::GetClock()->GetUptime() - pause_time; + Libraries::Kernel::Dev::GetInitialPtc() += delta_time; + for (const auto& id : guest_threads) { + ResumeThread(id); + } + is_guest_threads_paused = false; +} + +void DebugStateImpl::RequestFrameDump(s32 count) { + gnm_frame_dump_request_count = count; + frame_dump_list.clear(); + frame_dump_list.resize(count); + waiting_submit_pause = true; +} diff --git a/src/core/debug_state.h b/src/core/debug_state.h new file mode 100644 index 000000000..00c687fa5 --- /dev/null +++ b/src/core/debug_state.h @@ -0,0 +1,126 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include +#include +#include +#include + +#include "common/types.h" + +#ifdef _WIN32 +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN 1 +#endif +#include +using ThreadID = DWORD; +#else +#include +#include +using ThreadID = pthread_t; +#endif + +namespace Core::Devtools { +class Layer; +namespace Widget { +class FrameGraph; +} +} // namespace Core::Devtools + +namespace DebugStateType { + +enum class QueueType { + acb, + dcb, + ccb, +}; + +struct QueueDump { + QueueType type; + u32 submit_num; + u32 num2; // acb: queue_num; else: buffer_in_submit + std::vector data; +}; + +struct FrameDump { + std::vector queues; +}; + +class DebugStateImpl { + friend class Core::Devtools::Layer; + friend class Core::Devtools::Widget::FrameGraph; + + std::mutex guest_threads_mutex{}; + std::vector guest_threads{}; + std::atomic_bool is_guest_threads_paused = false; + u64 pause_time{}; + + std::atomic_int32_t flip_frame_count = 0; + std::atomic_int32_t gnm_frame_count = 0; + + s32 gnm_frame_dump_request_count = -1; + bool waiting_submit_pause = false; + bool should_show_frame_dump = false; + + std::mutex frame_dump_list_mutex; + std::vector frame_dump_list{}; + + std::queue debug_message_popup; + +public: + void AddCurrentThreadToGuestList(); + + void RemoveCurrentThreadFromGuestList(); + + void PauseGuestThreads(); + + void ResumeGuestThreads(); + + bool IsGuestThreadsPaused() const { + return is_guest_threads_paused; + } + + void IncFlipFrameNum() { + ++flip_frame_count; + } + + void IncGnmFrameNum() { + ++gnm_frame_count; + --gnm_frame_dump_request_count; + } + + u32 GetFrameNum() const { + return flip_frame_count; + } + + bool DumpingCurrentFrame() const { + return gnm_frame_dump_request_count > 0; + } + + bool ShouldPauseInSubmit() const { + return waiting_submit_pause && gnm_frame_dump_request_count == 0; + } + + void RequestFrameDump(s32 count = 1); + + FrameDump& GetFrameDump() { + return frame_dump_list[frame_dump_list.size() - gnm_frame_dump_request_count]; + } + + void PushQueueDump(QueueDump dump) { + std::unique_lock lock{frame_dump_list_mutex}; + GetFrameDump().queues.push_back(std::move(dump)); + } + + void ShowDebugMessage(std::string message) { + if (message.empty()) { + return; + } + debug_message_popup.push(std::move(message)); + } +}; +} // namespace DebugStateType + +extern DebugStateType::DebugStateImpl& DebugState; diff --git a/src/core/devtools/gcn/gcn_context_regs.cpp b/src/core/devtools/gcn/gcn_context_regs.cpp new file mode 100644 index 000000000..843ba9e65 --- /dev/null +++ b/src/core/devtools/gcn/gcn_context_regs.cpp @@ -0,0 +1,297 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +// Credits to https://github.com/psucien/tlg-emu-tools/ + +#include "common/types.h" +#include "gcn/si_ci_vi_merged_offset.h" + +using namespace Pal::Gfx6; + +namespace Core::Devtools::Gcn { +const char* GetContextRegName(u32 reg_offset) { + switch (reg_offset) { + case mmDB_SHADER_CONTROL: + return "mmDB_SHADER_CONTROL"; + case mmCB_SHADER_MASK: + return "mmCB_SHADER_MASK"; + case mmPA_CL_CLIP_CNTL: + return "mmPA_CL_CLIP_CNTL"; + case mmVGT_INSTANCE_STEP_RATE_0: + return "mmVGT_INSTANCE_STEP_RATE_0"; + case mmVGT_INSTANCE_STEP_RATE_1: + return "mmVGT_INSTANCE_STEP_RATE_1"; + case mmVGT_INDX_OFFSET: + return "mmVGT_INDX_OFFSET"; + case mmVGT_SHADER_STAGES_EN: + return "mmVGT_SHADER_STAGES_EN"; + case mmVGT_GS_MODE: + return "mmVGT_GS_MODE"; + case mmVGT_STRMOUT_CONFIG: + return "mmVGT_STRMOUT_CONFIG"; + case mmVGT_OUT_DEALLOC_CNTL: + return "mmVGT_OUT_DEALLOC_CNTL"; + case mmVGT_VTX_CNT_EN: + return "mmVGT_VTX_CNT_EN"; + case mmVGT_MAX_VTX_INDX: + return "mmVGT_MAX_VTX_INDX"; + case mmVGT_MULTI_PRIM_IB_RESET_INDX: + return "mmVGT_MULTI_PRIM_IB_RESET_INDX"; + case mmVGT_OUTPUT_PATH_CNTL: + return "mmVGT_OUTPUT_PATH_CNTL"; + case mmVGT_GS_PER_ES: + return "mmVGT_GS_PER_ES"; + case mmVGT_ES_PER_GS: + return "mmVGT_ES_PER_GS"; + case mmVGT_GS_PER_VS: + return "mmVGT_GS_PER_VS"; + case mmCB_COLOR0_BASE: + return "mmCB_COLOR0_BASE"; + case mmCB_COLOR0_INFO: + return "mmCB_COLOR0_INFO"; + case mmCB_COLOR0_CMASK_SLICE: + return "mmCB_COLOR0_CMASK_SLICE"; + case mmCB_COLOR0_CLEAR_WORD0: + return "mmCB_COLOR0_CLEAR_WORD0"; + case mmCB_COLOR0_CLEAR_WORD1: + return "mmCB_COLOR0_CLEAR_WORD1"; + case mmCB_COLOR0_PITCH: + return "mmCB_COLOR0_PITCH"; + case mmCB_COLOR0_SLICE: + return "mmCB_COLOR0_SLICE"; + case mmCB_COLOR0_VIEW: + return "mmCB_COLOR0_VIEW"; + case mmCB_COLOR0_DCC_CONTROL__VI: + return "mmCB_COLOR0_DCC_CONTROL"; + case mmCB_COLOR0_CMASK: + return "mmCB_COLOR0_CMASK"; + case mmCB_COLOR0_FMASK_SLICE: + return "mmCB_COLOR0_FMASK_SLICE"; + case mmCB_COLOR0_FMASK: + return "mmCB_COLOR0_FMASK"; + case mmCB_COLOR0_DCC_BASE__VI: + return "mmCB_COLOR0_DCC_BASE"; + case mmCB_COLOR0_ATTRIB: + return "mmCB_COLOR0_ATTRIB"; + case mmCB_COLOR1_BASE: + return "mmCB_COLOR1_BASE"; + case mmCB_COLOR1_INFO: + return "mmCB_COLOR1_INFO"; + case mmCB_COLOR1_ATTRIB: + return "mmCB_COLOR1_ATTRIB"; + case mmCB_COLOR1_CMASK_SLICE: + return "mmCB_COLOR1_CMASK_SLICE"; + case mmCB_COLOR1_CLEAR_WORD0: + return "mmCB_COLOR1_CLEAR_WORD0"; + case mmCB_COLOR1_CLEAR_WORD1: + return "mmCB_COLOR1_CLEAR_WORD1"; + case mmCB_COLOR1_PITCH: + return "mmCB_COLOR1_PITCH"; + case mmCB_COLOR1_VIEW: + return "mmCB_COLOR1_VIEW"; + case mmCB_COLOR2_INFO: + return "mmCB_COLOR2_INFO"; + case mmCB_COLOR2_ATTRIB: + return "mmCB_COLOR2_ATTRIB"; + case mmCB_COLOR2_CMASK_SLICE: + return "mmCB_COLOR2_CMASK_SLICE"; + case mmCB_COLOR2_CLEAR_WORD0: + return "mmCB_COLOR2_CLEAR_WORD0"; + case mmCB_COLOR2_CLEAR_WORD1: + return "mmCB_COLOR2_CLEAR_WORD1"; + case mmCB_COLOR2_PITCH: + return "mmCB_COLOR2_PITCH"; + case mmCB_COLOR2_VIEW: + return "mmCB_COLOR2_VIEW"; + case mmCB_COLOR3_INFO: + return "mmCB_COLOR3_INFO"; + case mmCB_COLOR3_CMASK_SLICE: + return "mmCB_COLOR3_CMASK_SLICE"; + case mmCB_COLOR4_INFO: + return "mmCB_COLOR4_INFO"; + case mmCB_COLOR5_INFO: + return "mmCB_COLOR5_INFO"; + case mmCB_COLOR6_INFO: + return "mmCB_COLOR6_INFO"; + case mmCB_COLOR7_INFO: + return "mmCB_COLOR7_INFO"; + case mmDB_SRESULTS_COMPARE_STATE0: + return "mmDB_SRESULTS_COMPARE_STATE0"; + case mmDB_SRESULTS_COMPARE_STATE1: + return "mmDB_SRESULTS_COMPARE_STATE1"; + case mmDB_DEPTH_CONTROL: + return "mmDB_DEPTH_CONTROL"; + case mmDB_EQAA: + return "mmDB_EQAA"; + case mmPA_SU_POINT_SIZE: + return "mmPA_SU_POINT_SIZE"; + case mmPA_SU_POINT_MINMAX: + return "mmPA_SU_POINT_MINMAX"; + case mmPA_SU_SC_MODE_CNTL: + return "mmPA_SU_SC_MODE_CNTL"; + case mmPA_SU_POLY_OFFSET_DB_FMT_CNTL: + return "mmPA_SU_POLY_OFFSET_DB_FMT_CNTL"; + case mmPA_SC_CLIPRECT_RULE: + return "mmPA_SC_CLIPRECT_RULE"; + case mmPA_SC_MODE_CNTL_0: + return "mmPA_SC_MODE_CNTL_0"; + case mmPA_SC_MODE_CNTL_1: + return "mmPA_SC_MODE_CNTL_1"; + case mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0: + return "mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"; + case mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0: + return "mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0"; + case mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0: + return "mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0"; + case mmPA_SC_AA_MASK_X0Y0_X1Y0: + return "mmPA_SC_AA_MASK_X0Y0_X1Y0"; + case mmPA_SC_AA_MASK_X0Y1_X1Y1: + return "mmPA_SC_AA_MASK_X0Y1_X1Y1"; + case mmPA_SC_CENTROID_PRIORITY_0: + return "mmPA_SC_CENTROID_PRIORITY_0"; + case mmPA_SC_CENTROID_PRIORITY_1: + return "mmPA_SC_CENTROID_PRIORITY_1"; + case mmPA_SC_AA_CONFIG: + return "mmPA_SC_AA_CONFIG"; + case mmDB_RENDER_CONTROL: + return "mmDB_RENDER_CONTROL"; + case mmDB_STENCIL_CONTROL: + return "mmDB_STENCIL_CONTROL"; + case mmDB_STENCILREFMASK: + return "mmDB_STENCILREFMASK"; + case mmDB_STENCILREFMASK_BF: + return "mmDB_STENCILREFMASK_BF"; + case mmDB_STENCIL_CLEAR: + return "mmDB_STENCIL_CLEAR"; + case mmDB_DEPTH_CLEAR: + return "mmDB_DEPTH_CLEAR"; + case mmCB_TARGET_MASK: + return "mmCB_TARGET_MASK"; + case mmDB_Z_INFO: + return "mmDB_Z_INFO"; + case mmDB_STENCIL_INFO: + return "mmDB_STENCIL_INFO"; + case mmDB_Z_READ_BASE: + return "mmDB_Z_READ_BASE"; + case mmDB_STENCIL_READ_BASE: + return "mmDB_STENCIL_READ_BASE"; + case mmDB_Z_WRITE_BASE: + return "mmDB_Z_WRITE_BASE"; + case mmDB_STENCIL_WRITE_BASE: + return "mmDB_STENCIL_WRITE_BASE"; + case mmDB_DEPTH_INFO: + return "mmDB_DEPTH_INFO"; + case mmDB_DEPTH_VIEW: + return "mmDB_DEPTH_VIEW"; + case mmDB_DEPTH_SLICE: + return "mmDB_DEPTH_SLICE"; + case mmDB_DEPTH_SIZE: + return "mmDB_DEPTH_SIZE"; + case mmTA_BC_BASE_ADDR: + return "mmTA_BC_BASE_ADDR"; + case mmCB_BLEND_RED: + return "mmCB_BLEND_RED"; + case mmCB_BLEND_GREEN: + return "mmCB_BLEND_GREEN"; + case mmCB_BLEND_BLUE: + return "mmCB_BLEND_BLUE"; + case mmDB_ALPHA_TO_MASK: + return "mmDB_ALPHA_TO_MASK"; + case mmCB_BLEND0_CONTROL: + return "mmCB_BLEND0_CONTROL"; + case mmCB_BLEND1_CONTROL: + return "mmCB_BLEND1_CONTROL"; + case mmCB_BLEND2_CONTROL: + return "mmCB_BLEND2_CONTROL"; + case mmCB_BLEND3_CONTROL: + return "mmCB_BLEND3_CONTROL"; + case mmCB_BLEND4_CONTROL: + return "mmCB_BLEND4_CONTROL"; + case mmCB_BLEND5_CONTROL: + return "mmCB_BLEND5_CONTROL"; + case mmCB_BLEND6_CONTROL: + return "mmCB_BLEND6_CONTROL"; + case mmCB_BLEND7_CONTROL: + return "mmCB_BLEND7_CONTROL"; + case mmDB_HTILE_DATA_BASE: + return "mmDB_HTILE_DATA_BASE"; + case mmDB_HTILE_SURFACE: + return "mmDB_HTILE_SURFACE"; + case mmPA_SU_LINE_CNTL: + return "mmPA_SU_LINE_CNTL"; + case mmPA_SC_VPORT_ZMIN_0: + return "mmPA_SC_VPORT_ZMIN_0"; + case mmPA_SC_VPORT_ZMAX_0: + return "mmPA_SC_VPORT_ZMAX_0"; + case mmPA_SC_VPORT_SCISSOR_0_TL: + return "mmPA_SC_VPORT_SCISSOR_0_TL"; + case mmPA_SC_VPORT_SCISSOR_0_BR: + return "mmPA_SC_VPORT_SCISSOR_0_BR"; + case mmPA_SC_GENERIC_SCISSOR_TL: + return "mmPA_SC_GENERIC_SCISSOR_TL"; + case mmPA_SC_GENERIC_SCISSOR_BR: + return "mmPA_SC_GENERIC_SCISSOR_BR"; + case mmPA_CL_VPORT_XSCALE: + return "mmPA_CL_VPORT_XSCALE"; + case mmPA_CL_VPORT_YSCALE: + return "mmPA_CL_VPORT_YSCALE"; + case mmPA_CL_VPORT_ZSCALE: + return "mmPA_CL_VPORT_ZSCALE"; + case mmPA_CL_VPORT_XOFFSET: + return "mmPA_CL_VPORT_XOFFSET"; + case mmPA_CL_VPORT_YOFFSET: + return "mmPA_CL_VPORT_YOFFSET"; + case mmPA_CL_VPORT_ZOFFSET: + return "mmPA_CL_VPORT_ZOFFSET"; + case mmPA_CL_VTE_CNTL: + return "mmPA_CL_VTE_CNTL"; + case mmPA_SC_SCREEN_SCISSOR_TL: + return "mmPA_SC_SCREEN_SCISSOR_TL"; + case mmPA_SC_SCREEN_SCISSOR_BR: + return "mmPA_SC_SCREEN_SCISSOR_BR"; + case mmPA_SU_HARDWARE_SCREEN_OFFSET: + return "mmPA_SU_HARDWARE_SCREEN_OFFSET"; + case mmPA_SU_VTX_CNTL: + return "mmPA_SU_VTX_CNTL"; + case mmPA_CL_GB_VERT_CLIP_ADJ: + return "mmPA_CL_GB_VERT_CLIP_ADJ"; + case mmPA_CL_GB_HORZ_CLIP_ADJ: + return "mmPA_CL_GB_HORZ_CLIP_ADJ"; + case mmPA_CL_GB_VERT_DISC_ADJ: + return "mmPA_CL_GB_VERT_DISC_ADJ"; + case mmPA_CL_GB_HORZ_DISC_ADJ: + return "mmPA_CL_GB_HORZ_DISC_ADJ"; + case mmCB_COLOR_CONTROL: + return "mmCB_COLOR_CONTROL"; + case mmSPI_SHADER_Z_FORMAT: + return "mmSPI_SHADER_Z_FORMAT"; + case mmSPI_SHADER_COL_FORMAT: + return "mmSPI_SHADER_COL_FORMAT"; + case mmPA_CL_VS_OUT_CNTL: + return "mmPA_CL_VS_OUT_CNTL"; + case mmSPI_VS_OUT_CONFIG: + return "mmSPI_VS_OUT_CONFIG"; + case mmSPI_SHADER_POS_FORMAT: + return "mmSPI_SHADER_POS_FORMAT"; + case mmSPI_PS_INPUT_ENA: + return "mmSPI_PS_INPUT_ENA"; + case mmSPI_PS_INPUT_ADDR: + return "mmSPI_PS_INPUT_ADDR"; + case mmSPI_PS_IN_CONTROL: + return "mmSPI_PS_IN_CONTROL"; + case mmSPI_BARYC_CNTL: + return "mmSPI_BARYC_CNTL"; + case mmSPI_PS_INPUT_CNTL_0: + return "mmSPI_PS_INPUT_CNTL_0"; + case mmSPI_PS_INPUT_CNTL_1: + return "mmSPI_PS_INPUT_CNTL_1"; + case mmSPI_PS_INPUT_CNTL_2: + return "mmSPI_PS_INPUT_CNTL_2"; + case mmSPI_PS_INPUT_CNTL_3: + return "mmSPI_PS_INPUT_CNTL_3"; + default: + break; + } + return ""; +} +} // namespace Core::Devtools::Gcn \ No newline at end of file diff --git a/src/core/devtools/gcn/gcn_op_names.cpp b/src/core/devtools/gcn/gcn_op_names.cpp new file mode 100644 index 000000000..6684b660e --- /dev/null +++ b/src/core/devtools/gcn/gcn_op_names.cpp @@ -0,0 +1,118 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +// Credits to https://github.com/psucien/tlg-emu-tools/ + +#include "common/types.h" +#include "gcn/si_ci_vi_merged_pm4_it_opcodes.h" + +namespace Core::Devtools::Gcn { +const char* GetOpCodeName(u32 op) { + switch (op) { + case IT_NOP: + return "IT_NOP"; + case IT_SET_BASE: + return "IT_SET_BASE"; + case IT_INDEX_BUFFER_SIZE: + return "IT_INDEX_BUFFER_SIZE"; + case IT_SET_PREDICATION: + return "IT_SET_PREDICATION"; + case IT_COND_EXEC: + return "IT_COND_EXEC"; + case IT_INDEX_BASE: + return "IT_INDEX_BASE"; + case IT_INDEX_TYPE: + return "IT_INDEX_TYPE"; + case IT_NUM_INSTANCES: + return "IT_NUM_INSTANCES"; + case IT_STRMOUT_BUFFER_UPDATE: + return "IT_STRMOUT_BUFFER_UPDATE"; + case IT_WRITE_DATA: + return "IT_WRITE_DATA"; + case IT_MEM_SEMAPHORE: + return "IT_MEM_SEMAPHORE"; + case IT_WAIT_REG_MEM: + return "IT_WAIT_REG_MEM"; + case IT_INDIRECT_BUFFER: + return "IT_INDIRECT_BUFFER"; + case IT_PFP_SYNC_ME: + return "IT_PFP_SYNC_ME"; + case IT_EVENT_WRITE: + return "IT_EVENT_WRITE"; + case IT_EVENT_WRITE_EOP: + return "IT_EVENT_WRITE_EOP"; + case IT_EVENT_WRITE_EOS: + return "IT_EVENT_WRITE_EOS"; + case IT_DMA_DATA__CI__VI: + return "IT_DMA_DATA"; + case IT_ACQUIRE_MEM__CI__VI: + return "IT_ACQUIRE_MEM"; + case IT_REWIND__CI__VI: + return "IT_REWIND"; + case IT_SET_CONFIG_REG: + return "IT_SET_CONFIG_REG"; + case IT_SET_CONTEXT_REG: + return "IT_SET_CONTEXT_REG"; + case IT_SET_SH_REG: + return "IT_SET_SH_REG"; + case IT_SET_UCONFIG_REG__CI__VI: + return "IT_SET_UCONFIG_REG"; + case IT_INCREMENT_DE_COUNTER: + return "IT_INCREMENT_DE_COUNTER"; + case IT_WAIT_ON_CE_COUNTER: + return "IT_WAIT_ON_CE_COUNTER"; + case IT_DISPATCH_DIRECT: + return "IT_DISPATCH_DIRECT"; + case IT_DISPATCH_INDIRECT: + return "IT_DISPATCH_INDIRECT"; + case IT_OCCLUSION_QUERY: + return "IT_OCCLUSION_QUERY"; + case IT_REG_RMW: + return "IT_REG_RMW"; + case IT_PRED_EXEC: + return "IT_PRED_EXEC"; + case IT_DRAW_INDIRECT: + return "IT_DRAW_INDIRECT"; + case IT_DRAW_INDEX_INDIRECT: + return "IT_DRAW_INDEX_INDIRECT"; + case IT_DRAW_INDEX_2: + return "IT_DRAW_INDEX_2"; + case IT_DRAW_INDEX_OFFSET_2: + return "IT_DRAW_INDEX_OFFSET_2"; + case IT_CONTEXT_CONTROL: + return "IT_CONTEXT_CONTROL"; + case IT_DRAW_INDIRECT_MULTI: + return "IT_DRAW_INDIRECT_MULTI"; + case IT_DRAW_INDEX_AUTO: + return "IT_DRAW_INDEX_AUTO"; + case IT_DRAW_INDEX_MULTI_AUTO: + return "IT_DRAW_INDEX_MULTI_AUTO"; + case IT_COPY_DATA: + return "IT_COPY_DATA"; + case IT_CP_DMA: + return "IT_CP_DMA"; + case IT_SURFACE_SYNC: + return "IT_SURFACE_SYNC"; + case IT_COND_WRITE: + return "IT_COND_WRITE"; + case IT_RELEASE_MEM__CI__VI: + return "IT_RELEASE_MEM"; + case IT_WRITE_CONST_RAM: + return "IT_WRITE_CONST_RAM"; // used in CCB + case IT_WAIT_ON_DE_COUNTER_DIFF: + return "IT_WAIT_ON_DE_COUNTER_DIFF"; // used in CCB + case IT_DUMP_CONST_RAM: + return "IT_DUMP_CONST_RAM"; // used in CCB + case IT_INCREMENT_CE_COUNTER: + return "IT_INCREMENT_CE_COUNTER"; // used in CCB + case IT_CLEAR_STATE: + return "IT_CLEAR_STATE"; + case 0xFF: + return ""; + default: + break; + } + + return ""; +} +} // namespace Core::Devtools::Gcn \ No newline at end of file diff --git a/src/core/devtools/gcn/gcn_shader_regs.cpp b/src/core/devtools/gcn/gcn_shader_regs.cpp new file mode 100644 index 000000000..16778dd07 --- /dev/null +++ b/src/core/devtools/gcn/gcn_shader_regs.cpp @@ -0,0 +1,171 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +// Credits to https://github.com/psucien/tlg-emu-tools/ + +#include "common/types.h" +#include "gcn/si_ci_vi_merged_offset.h" + +using namespace Pal::Gfx6; + +namespace Core::Devtools::Gcn { +const char* GetShaderRegName(u32 reg_offset) { + switch (reg_offset) { + case mmSPI_SHADER_PGM_LO_VS: + return "mmSPI_SHADER_PGM_LO_VS"; + case mmSPI_SHADER_PGM_HI_VS: + return "mmSPI_SHADER_PGM_HI_VS"; + case mmSPI_SHADER_PGM_LO_PS: + return "mmSPI_SHADER_PGM_LO_PS"; + case mmSPI_SHADER_PGM_HI_PS: + return "mmSPI_SHADER_PGM_HI_PS"; + case mmSPI_SHADER_PGM_RSRC1_VS: + return "mmSPI_SHADER_PGM_RSRC1_VS"; + case mmSPI_SHADER_PGM_RSRC2_VS: + return "mmSPI_SHADER_PGM_RSRC2_VS"; + case mmSPI_SHADER_PGM_RSRC3_VS__CI__VI: + return "mmSPI_SHADER_PGM_RSRC3_VS__CI__VI"; + case mmSPI_SHADER_PGM_RSRC1_PS: + return "mmSPI_SHADER_PGM_RSRC1_PS"; + case mmSPI_SHADER_PGM_RSRC2_PS: + return "mmSPI_SHADER_PGM_RSRC2_PS"; + case mmSPI_SHADER_PGM_RSRC3_PS__CI__VI: + return "mmSPI_SHADER_PGM_RSRC3_PS__CI__VI"; + case mmSPI_SHADER_USER_DATA_PS_0: + return "mmSPI_SHADER_USER_DATA_PS_0"; + case mmSPI_SHADER_USER_DATA_PS_1: + return "mmSPI_SHADER_USER_DATA_PS_1"; + case mmSPI_SHADER_USER_DATA_PS_2: + return "mmSPI_SHADER_USER_DATA_PS_2"; + case mmSPI_SHADER_USER_DATA_PS_3: + return "mmSPI_SHADER_USER_DATA_PS_3"; + case mmSPI_SHADER_USER_DATA_PS_4: + return "mmSPI_SHADER_USER_DATA_PS_4"; + case mmSPI_SHADER_USER_DATA_PS_5: + return "mmSPI_SHADER_USER_DATA_PS_5"; + case mmSPI_SHADER_USER_DATA_PS_6: + return "mmSPI_SHADER_USER_DATA_PS_6"; + case mmSPI_SHADER_USER_DATA_PS_7: + return "mmSPI_SHADER_USER_DATA_PS_7"; + case mmSPI_SHADER_USER_DATA_PS_8: + return "mmSPI_SHADER_USER_DATA_PS_8"; + case mmSPI_SHADER_USER_DATA_PS_9: + return "mmSPI_SHADER_USER_DATA_PS_9"; + case mmSPI_SHADER_USER_DATA_PS_10: + return "mmSPI_SHADER_USER_DATA_PS_10"; + case mmSPI_SHADER_USER_DATA_PS_11: + return "mmSPI_SHADER_USER_DATA_PS_11"; + case mmSPI_SHADER_USER_DATA_PS_12: + return "mmSPI_SHADER_USER_DATA_PS_12"; + case mmSPI_SHADER_USER_DATA_PS_13: + return "mmSPI_SHADER_USER_DATA_PS_13"; + case mmSPI_SHADER_USER_DATA_PS_14: + return "mmSPI_SHADER_USER_DATA_PS_14"; + case mmSPI_SHADER_USER_DATA_PS_15: + return "mmSPI_SHADER_USER_DATA_PS_15"; + case mmCOMPUTE_TMPRING_SIZE: + return "mmCOMPUTE_TMPRING_SIZE"; + case mmCOMPUTE_PGM_LO: + return "mmCOMPUTE_PGM_LO"; + case mmCOMPUTE_PGM_HI: + return "mmCOMPUTE_PGM_HI"; + case mmCOMPUTE_PGM_RSRC1: + return "mmCOMPUTE_PGM_RSRC1"; + case mmCOMPUTE_PGM_RSRC2: + return "mmCOMPUTE_PGM_RSRC2"; + case mmCOMPUTE_USER_DATA_0: + return "mmCOMPUTE_USER_DATA_0"; + case mmCOMPUTE_USER_DATA_1: + return "mmCOMPUTE_USER_DATA_1"; + case mmCOMPUTE_USER_DATA_2: + return "mmCOMPUTE_USER_DATA_2"; + case mmCOMPUTE_USER_DATA_3: + return "mmCOMPUTE_USER_DATA_3"; + case mmCOMPUTE_USER_DATA_4: + return "mmCOMPUTE_USER_DATA_4"; + case mmCOMPUTE_USER_DATA_5: + return "mmCOMPUTE_USER_DATA_5"; + case mmCOMPUTE_USER_DATA_6: + return "mmCOMPUTE_USER_DATA_6"; + case mmCOMPUTE_USER_DATA_7: + return "mmCOMPUTE_USER_DATA_7"; + case mmCOMPUTE_USER_DATA_8: + return "mmCOMPUTE_USER_DATA_8"; + case mmCOMPUTE_USER_DATA_9: + return "mmCOMPUTE_USER_DATA_9"; + case mmCOMPUTE_USER_DATA_10: + return "mmCOMPUTE_USER_DATA_10"; + case mmCOMPUTE_USER_DATA_11: + return "mmCOMPUTE_USER_DATA_11"; + case mmCOMPUTE_USER_DATA_12: + return "mmCOMPUTE_USER_DATA_12"; + case mmCOMPUTE_USER_DATA_13: + return "mmCOMPUTE_USER_DATA_13"; + case mmCOMPUTE_USER_DATA_14: + return "mmCOMPUTE_USER_DATA_14"; + case mmCOMPUTE_USER_DATA_15: + return "mmCOMPUTE_USER_DATA_15"; + case mmCOMPUTE_NUM_THREAD_X: + return "mmCOMPUTE_NUM_THREAD_X"; + case mmCOMPUTE_NUM_THREAD_Y: + return "mmCOMPUTE_NUM_THREAD_Y"; + case mmCOMPUTE_NUM_THREAD_Z: + return "mmCOMPUTE_NUM_THREAD_Z"; + case mmCOMPUTE_STATIC_THREAD_MGMT_SE0: + return "mmCOMPUTE_STATIC_THREAD_MGMT_SE0"; + case mmCOMPUTE_STATIC_THREAD_MGMT_SE1: + return "mmCOMPUTE_STATIC_THREAD_MGMT_SE1"; + case mmCOMPUTE_RESOURCE_LIMITS: + return "mmCOMPUTE_RESOURCE_LIMITS"; + case mmSPI_SHADER_USER_DATA_VS_0: + return "mmSPI_SHADER_USER_DATA_VS_0"; + case mmSPI_SHADER_USER_DATA_VS_1: + return "mmSPI_SHADER_USER_DATA_VS_1"; + case mmSPI_SHADER_USER_DATA_VS_2: + return "mmSPI_SHADER_USER_DATA_VS_2"; + case mmSPI_SHADER_USER_DATA_VS_3: + return "mmSPI_SHADER_USER_DATA_VS_3"; + case mmSPI_SHADER_USER_DATA_VS_4: + return "mmSPI_SHADER_USER_DATA_VS_4"; + case mmSPI_SHADER_USER_DATA_VS_5: + return "mmSPI_SHADER_USER_DATA_VS_5"; + case mmSPI_SHADER_USER_DATA_VS_6: + return "mmSPI_SHADER_USER_DATA_VS_6"; + case mmSPI_SHADER_USER_DATA_VS_7: + return "mmSPI_SHADER_USER_DATA_VS_7"; + case mmSPI_SHADER_USER_DATA_VS_8: + return "mmSPI_SHADER_USER_DATA_VS_8"; + case mmSPI_SHADER_USER_DATA_VS_9: + return "mmSPI_SHADER_USER_DATA_VS_9"; + case mmSPI_SHADER_USER_DATA_VS_10: + return "mmSPI_SHADER_USER_DATA_VS_10"; + case mmSPI_SHADER_USER_DATA_VS_11: + return "mmSPI_SHADER_USER_DATA_VS_11"; + case mmSPI_SHADER_USER_DATA_VS_12: + return "mmSPI_SHADER_USER_DATA_VS_12"; + case mmSPI_SHADER_USER_DATA_VS_13: + return "mmSPI_SHADER_USER_DATA_VS_13"; + case mmSPI_SHADER_USER_DATA_VS_14: + return "mmSPI_SHADER_USER_DATA_VS_14"; + case mmSPI_SHADER_USER_DATA_VS_15: + return "mmSPI_SHADER_USER_DATA_VS_15"; + case mmSPI_SHADER_USER_DATA_HS_0: + return "mmSPI_SHADER_USER_DATA_HS_0"; + case mmSPI_SHADER_USER_DATA_HS_1: + return "mmSPI_SHADER_USER_DATA_HS_1"; + case mmSPI_SHADER_USER_DATA_HS_9: + return "mmSPI_SHADER_USER_DATA_HS_9"; + case mmSPI_SHADER_PGM_RSRC3_GS__CI__VI: + return "mmSPI_SHADER_PGM_RSRC3_GS__CI__VI"; + case mmSPI_SHADER_PGM_RSRC3_ES__CI__VI: + return "mmSPI_SHADER_PGM_RSRC3_ES__CI__VI"; + case mmSPI_SHADER_PGM_RSRC3_LS__CI__VI: + return "mmSPI_SHADER_PGM_RSRC3_LS__CI__VI"; + case mmSPI_SHADER_LATE_ALLOC_VS__CI__VI: + return "mmSPI_SHADER_LATE_ALLOC_VS__CI__VI"; + default: + break; + } + return ""; +} +} // namespace Core::Devtools::Gcn \ No newline at end of file diff --git a/src/core/devtools/layer.cpp b/src/core/devtools/layer.cpp new file mode 100644 index 000000000..0c7e85e4c --- /dev/null +++ b/src/core/devtools/layer.cpp @@ -0,0 +1,231 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include + +#include "common/config.h" +#include "common/singleton.h" +#include "common/types.h" +#include "core/debug_state.h" +#include "imgui/imgui_std.h" +#include "imgui_internal.h" +#include "layer.h" +#include "widget/frame_dump.h" +#include "widget/frame_graph.h" + +using namespace ImGui; +using namespace Core::Devtools; +using L = Core::Devtools::Layer; + +static bool show_simple_fps = false; +static float fps_scale = 1.0f; + +static bool show_advanced_debug = false; + +static int dump_frame_count = 1; + +static Widget::FrameGraph frame_graph; +static std::vector frame_viewers; + +static float debug_popup_timing = 3.0f; + +void L::DrawMenuBar() { + const auto& ctx = *GImGui; + const auto& io = ctx.IO; + + auto isSystemPaused = DebugState.IsGuestThreadsPaused(); + + if (BeginMainMenuBar()) { + if (BeginMenu("Options")) { + if (MenuItemEx("Emulator Paused", nullptr, nullptr, isSystemPaused)) { + if (isSystemPaused) { + DebugState.ResumeGuestThreads(); + } else { + DebugState.PauseGuestThreads(); + } + } + ImGui::EndMenu(); + } + if (BeginMenu("GPU Tools")) { + MenuItem("Show frame info", nullptr, &frame_graph.is_open); + if (BeginMenu("Dump frames")) { + SliderInt("Count", &dump_frame_count, 1, 5); + if (MenuItem("Dump", "Ctrl+Alt+F9", nullptr, !DebugState.DumpingCurrentFrame())) { + DebugState.RequestFrameDump(dump_frame_count); + } + ImGui::EndMenu(); + } + ImGui::EndMenu(); + } + EndMainMenuBar(); + } + + if (IsKeyPressed(ImGuiKey_F9, false)) { + if (io.KeyCtrl && io.KeyAlt) { + if (!DebugState.ShouldPauseInSubmit()) { + DebugState.RequestFrameDump(dump_frame_count); + } + } + if (!io.KeyCtrl && !io.KeyAlt) { + if (isSystemPaused) { + DebugState.ResumeGuestThreads(); + } else { + DebugState.PauseGuestThreads(); + } + } + } +} + +void L::DrawAdvanced() { + DrawMenuBar(); + + const auto& ctx = *GImGui; + const auto& io = ctx.IO; + + auto isSystemPaused = DebugState.IsGuestThreadsPaused(); + + frame_graph.Draw(); + + if (isSystemPaused) { + GetForegroundDrawList(GetMainViewport()) + ->AddText({10.0f, io.DisplaySize.y - 40.0f}, IM_COL32_WHITE, "Emulator paused"); + } + + if (DebugState.should_show_frame_dump) { + DebugState.should_show_frame_dump = false; + std::unique_lock lock{DebugState.frame_dump_list_mutex}; + while (!DebugState.frame_dump_list.empty()) { + auto frame_dump = std::move(DebugState.frame_dump_list.back()); + DebugState.frame_dump_list.pop_back(); + frame_viewers.emplace_back(frame_dump); + } + } + + for (auto it = frame_viewers.begin(); it != frame_viewers.end();) { + if (it->is_open) { + it->Draw(); + ++it; + } else { + it = frame_viewers.erase(it); + } + } + + if (!DebugState.debug_message_popup.empty()) { + if (debug_popup_timing > 0.0f) { + debug_popup_timing -= io.DeltaTime; + if (Begin("##devtools_msg", nullptr, + ImGuiWindowFlags_NoDecoration | ImGuiWindowFlags_NoSavedSettings | + ImGuiWindowFlags_NoInputs | ImGuiWindowFlags_NoMove)) { + BringWindowToDisplayFront(GetCurrentWindow()); + const auto display_size = io.DisplaySize; + const auto& msg = DebugState.debug_message_popup.front(); + const auto padding = GetStyle().WindowPadding; + const auto txt_size = CalcTextSize(&msg.front(), &msg.back() + 1, false, 250.0f); + SetWindowPos({display_size.x - padding.x * 2.0f - txt_size.x, 50.0f}); + SetWindowSize({txt_size.x + padding.x * 2.0f, txt_size.y + padding.y * 2.0f}); + PushTextWrapPos(250.0f); + TextEx(&msg.front(), &msg.back() + 1); + PopTextWrapPos(); + } + End(); + } else { + DebugState.debug_message_popup.pop(); + debug_popup_timing = 3.0f; + } + } +} + +void L::DrawSimple() { + const auto io = GetIO(); + Text("Frame time: %.3f ms (%.1f FPS)", 1000.0f / io.Framerate, io.Framerate); +} + +void L::SetupSettings() { + frame_graph.is_open = true; + + ImGuiSettingsHandler handler{}; + handler.TypeName = "DevtoolsLayer"; + handler.TypeHash = ImHashStr(handler.TypeName); + handler.ReadOpenFn = [](ImGuiContext*, ImGuiSettingsHandler*, const char* name) { + return std::string_view("Data") == name ? (void*)1 : nullptr; + }; + handler.ReadLineFn = [](ImGuiContext*, ImGuiSettingsHandler*, void*, const char* line) { + int v; + float f; + if (sscanf(line, "fps_scale=%f", &f) == 1) { + fps_scale = f; + } else if (sscanf(line, "show_advanced_debug=%d", &v) == 1) { + show_advanced_debug = v != 0; + } else if (sscanf(line, "show_frame_graph=%d", &v) == 1) { + frame_graph.is_open = v != 0; + } else if (sscanf(line, "dump_frame_count=%d", &v) == 1) { + dump_frame_count = v; + } + }; + handler.WriteAllFn = [](ImGuiContext*, ImGuiSettingsHandler* handler, ImGuiTextBuffer* buf) { + buf->appendf("[%s][Data]\n", handler->TypeName); + buf->appendf("fps_scale=%f\n", fps_scale); + buf->appendf("show_advanced_debug=%d\n", show_advanced_debug); + buf->appendf("show_frame_graph=%d\n", frame_graph.is_open); + buf->appendf("dump_frame_count=%d\n", dump_frame_count); + buf->append("\n"); + }; + AddSettingsHandler(&handler); + + const ImGuiID dock_id = ImHashStr("FrameDumpDock"); + DockBuilderAddNode(dock_id, 0); + DockBuilderSetNodePos(dock_id, ImVec2{50.0, 50.0}); + DockBuilderFinish(dock_id); +} + +void L::Draw() { + const auto io = GetIO(); + PushID("DevtoolsLayer"); + + if (!DebugState.IsGuestThreadsPaused()) { + const auto fn = DebugState.flip_frame_count.load(); + frame_graph.AddFrame(fn, io.DeltaTime); + } + + if (IsKeyPressed(ImGuiKey_F10, false)) { + if (io.KeyCtrl) { + show_advanced_debug = !show_advanced_debug; + } else { + show_simple_fps = !show_simple_fps; + } + } + + if (show_simple_fps) { + if (Begin("Video Info", nullptr, + ImGuiWindowFlags_NoNav | ImGuiWindowFlags_NoDecoration | + ImGuiWindowFlags_AlwaysAutoResize | ImGuiWindowFlags_NoDocking)) { + SetWindowPos("Video Info", {999999.0f, 0.0f}, ImGuiCond_FirstUseEver); + if (BeginPopupContextWindow()) { +#define M(label, value) \ + if (MenuItem(label, nullptr, fps_scale == value)) \ + fps_scale = value + M("0.5x", 0.5f); + M("1.0x", 1.0f); + M("1.5x", 1.5f); + M("2.0x", 2.0f); + M("2.5x", 2.5f); + EndPopup(); +#undef M + } + KeepWindowInside(); + SetWindowFontScale(fps_scale); + DrawSimple(); + } + End(); + } + + if (show_advanced_debug) { + PushFont(io.Fonts->Fonts[IMGUI_FONT_MONO]); + PushID("DevtoolsLayer"); + DrawAdvanced(); + PopID(); + PopFont(); + } + + PopID(); +} diff --git a/src/core/devtools/layer.h b/src/core/devtools/layer.h new file mode 100644 index 000000000..5bb53fbdb --- /dev/null +++ b/src/core/devtools/layer.h @@ -0,0 +1,24 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "imgui/imgui_layer.h" + +namespace Core::Devtools { + +class Layer final : public ImGui::Layer { + + static void DrawMenuBar(); + + static void DrawAdvanced(); + + static void DrawSimple(); + +public: + static void SetupSettings(); + + void Draw() override; +}; + +} // namespace Core::Devtools diff --git a/src/core/devtools/widget/cmd_list.cpp b/src/core/devtools/widget/cmd_list.cpp new file mode 100644 index 000000000..012891c37 --- /dev/null +++ b/src/core/devtools/widget/cmd_list.cpp @@ -0,0 +1,1223 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +// Credits to https://github.com/psucien/tlg-emu-tools/ + +#include +#include +#include + +#include "cmd_list.h" +#include "frame_dump.h" +#include "imgui_internal.h" +#include "imgui_memory_editor.h" +#include "video_core/amdgpu/liverpool.h" +#include "video_core/amdgpu/pm4_cmds.h" + +#define CONTEXT_SPACE_START 0x0000a000 +#define PERSISTENT_SPACE_START 0x00002c00 + +using namespace ImGui; +using namespace Pal::Gfx6; +using Liverpool = AmdGpu::Liverpool; +using magic_enum::enum_name; + +namespace Core::Devtools::Gcn { + +const char* GetContextRegName(u32 reg_offset); +const char* GetShaderRegName(u32 reg_offset); +const char* GetOpCodeName(u32 op); + +} // namespace Core::Devtools::Gcn + +namespace Core::Devtools::Widget { + +template +static HdrType GetNext(HdrType this_pm4, uint32_t n) { + HdrType curr_pm4 = this_pm4; + while (n) { + curr_pm4 = reinterpret_cast(reinterpret_cast(curr_pm4) + + curr_pm4->count + 2); + --n; + } + return curr_pm4; +} + +static void ParsePolygonControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("PA_SU_SC_MODE_CNTL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("CULL_FRONT"); + TableSetColumnIndex(1); + Text("%X", reg.cull_front.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("CULL_BACK"); + TableSetColumnIndex(1); + Text("%X", reg.cull_back.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FACE"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.front_face.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLY_MODE"); + TableSetColumnIndex(1); + Text("%X", reg.enable_polygon_mode.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLYMODE_FRONT_PTYPE"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.polygon_mode_front.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLYMODE_BACK_PTYPE"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.polygon_mode_back.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLY_OFFSET_FRONT_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.enable_polygon_offset_front.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLY_OFFSET_BACK_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.enable_polygon_offset_back.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("POLY_OFFSET_PARA_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.enable_polygon_offset_para.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VTX_WINDOW_OFFSET_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.enable_window_offset.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("PROVOKING_VTX_LAST"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.provoking_vtx_last.Value(), + enum_name(reg.provoking_vtx_last.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("PERSP_CORR_DIS"); + TableSetColumnIndex(1); + Text("%X", reg.persp_corr_dis.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("MULTI_PRIM_IB_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.multi_prim_ib_ena.Value()); + + EndTable(); + } +} + +static void ParseAaConfig(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("PA_SC_AA_CONFIG", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("MSAA_NUM_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.msaa_num_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("AA_MASK_CENTROID_DTMN"); + TableSetColumnIndex(1); + Text("%X", reg.aa_mask_centroid_dtmn.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("MAX_SAMPLE_DIST"); + TableSetColumnIndex(1); + Text("%X", reg.max_sample_dst.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("MSAA_EXPOSED_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.msaa_exposed_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DETAIL_TO_EXPOSED_MODE"); + TableSetColumnIndex(1); + Text("%X", reg.detail_to_exposed_mode.Value()); + + EndTable(); + } +} + +static void ParseViewportControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("PA_CL_VTE_CNTL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_X_SCALE_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.xscale_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_X_OFFSET_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.yoffset_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_Y_SCALE_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.yscale_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_Y_OFFSET_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.yoffset_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_Z_SCALE_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.zscale_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VPORT_Z_OFFSET_ENA"); + TableSetColumnIndex(1); + Text("%X", reg.zoffset_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VTX_XY_FMT"); + TableSetColumnIndex(1); + Text("%X", reg.xy_transformed.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VTX_Z_FMT"); + TableSetColumnIndex(1); + Text("%X", reg.z_transformed.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("VTX_W0_FMT"); + TableSetColumnIndex(1); + Text("%X", reg.w_transformed.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("PERFCOUNTER_REF"); + TableSetColumnIndex(1); + Text("%X", reg.perfcounter_ref.Value()); + + EndTable(); + } +} + +static void ParseColorControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("CB_COLOR_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("DISABLE_DUAL_QUAD__VI"); + TableSetColumnIndex(1); + Text("%X", reg.disable_dual_quad.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DEGAMMA_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.degamma_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("MODE"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.mode.Value(), enum_name(reg.mode.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ROP3"); + TableSetColumnIndex(1); + Text("%X", reg.rop3.Value()); + + EndTable(); + } +} + +static void ParseColor0Info(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("CB_COLOR_INFO", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("ENDIAN"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.endian.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FORMAT"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.format.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("LINEAR_GENERAL"); + TableSetColumnIndex(1); + Text("%X", reg.linear_general.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("NUMBER_TYPE"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.number_type.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COMP_SWAP"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.comp_swap.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FAST_CLEAR"); + TableSetColumnIndex(1); + Text("%X", reg.fast_clear.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COMPRESSION"); + TableSetColumnIndex(1); + Text("%X", reg.compression.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("BLEND_CLAMP"); + TableSetColumnIndex(1); + Text("%X", reg.blend_clamp.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("BLEND_BYPASS"); + TableSetColumnIndex(1); + Text("%X", reg.blend_bypass.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("SIMPLE_FLOAT"); + TableSetColumnIndex(1); + Text("%X", reg.simple_float.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ROUND_MODE"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.round_mode.Value(), enum_name(reg.round_mode.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("CMASK_IS_LINEAR"); + TableSetColumnIndex(1); + Text("%X", reg.cmask_is_linear.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("BLEND_OPT_DONT_RD_DST"); + TableSetColumnIndex(1); + Text("%X", reg.blend_opt_dont_rd_dst.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("BLEND_OPT_DISCARD_PIXEL"); + TableSetColumnIndex(1); + Text("%X", reg.blend_opt_discard_pixel.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FMASK_COMPRESSION_DISABLE__CI__VI"); + TableSetColumnIndex(1); + Text("%X", reg.fmask_compression_disable_ci.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FMASK_COMPRESS_1FRAG_ONLY__VI"); + TableSetColumnIndex(1); + Text("%X", reg.fmask_compress_1frag_only.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DCC_ENABLE__VI"); + TableSetColumnIndex(1); + Text("%X", reg.dcc_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("CMASK_ADDR_TYPE__VI"); + TableSetColumnIndex(1); + Text("%X", reg.cmask_addr_type.Value()); + + EndTable(); + } +} + +static void ParseColor0Attrib(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("CB_COLOR_ATTRIB", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("TILE_MODE_INDEX"); + TableSetColumnIndex(1); + Text("%s", enum_name(reg.tile_mode_index.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FMASK_TILE_MODE_INDEX"); + TableSetColumnIndex(1); + Text("%X", reg.fmask_tile_mode_index.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FMASK_BANK_HEIGHT"); + TableSetColumnIndex(1); + Text("%X", reg.fmask_bank_height.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("NUM_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.num_samples_log2.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("NUM_FRAGMENTS"); + TableSetColumnIndex(1); + Text("%X", reg.num_fragments_log2.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("FORCE_DST_ALPHA_1"); + TableSetColumnIndex(1); + Text("%X", reg.force_dst_alpha_1.Value()); + + EndTable(); + } +} + +static void ParseBlendControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("CB_BLEND_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("COLOR_SRCBLEND"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.color_src_factor.Value(), + enum_name(reg.color_src_factor.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COLOR_COMB_FCN"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.color_func.Value(), enum_name(reg.color_func.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COLOR_DESTBLEND"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.color_dst_factor.Value(), + enum_name(reg.color_dst_factor.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALPHA_SRCBLEND"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.alpha_src_factor.Value(), + enum_name(reg.alpha_src_factor.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALPHA_COMB_FCN"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.alpha_func.Value(), enum_name(reg.alpha_func.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALPHA_DESTBLEND"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.alpha_dst_factor.Value(), + enum_name(reg.alpha_dst_factor.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("SEPARATE_ALPHA_BLEND"); + TableSetColumnIndex(1); + Text("%X", reg.separate_alpha_blend.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DISABLE_ROP3"); + TableSetColumnIndex(1); + Text("%X", reg.disable_rop3.Value()); + + EndTable(); + } +} + +static void ParseDepthRenderControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("DB_RENDER_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("DEPTH_CLEAR_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.depth_clear_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCIL_CLEAR_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.stencil_clear_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DEPTH_COPY"); + TableSetColumnIndex(1); + Text("%X", reg.depth_clear_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCIL_COPY"); + TableSetColumnIndex(1); + Text("%X", reg.stencil_copy.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("RESUMMARIZE_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.resummarize_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCIL_COMPRESS_DISABLE"); + TableSetColumnIndex(1); + Text("%X", reg.stencil_compress_disable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DEPTH_COMPRESS_DISABLE"); + TableSetColumnIndex(1); + Text("%X", reg.depth_compress_disable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COPY_CENTROID"); + TableSetColumnIndex(1); + Text("%X", reg.copy_centroid.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("COPY_SAMPLE"); + TableSetColumnIndex(1); + Text("%X", reg.copy_sample.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DECOMPRESS_ENABLE__VI"); + TableSetColumnIndex(1); + Text("%X", reg.decompress_enable.Value()); + + EndTable(); + } +} + +static void ParseDepthControl(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("DB_DEPTH_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCIL_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.stencil_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("Z_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.depth_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("Z_WRITE_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.depth_write_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DEPTH_BOUNDS_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.depth_bounds_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ZFUNC"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.depth_func.Value(), enum_name(reg.depth_func.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("BACKFACE_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.backface_enable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCILFUNC"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.stencil_ref_func.Value(), + enum_name(reg.stencil_ref_func.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STENCILFUNC_BF"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.stencil_bf_func.Value(), + enum_name(reg.stencil_bf_func.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"); + TableSetColumnIndex(1); + Text("%X", reg.enable_color_writes_on_depth_fail.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DISABLE_COLOR_WRITES_ON_DEPTH_PASS"); + TableSetColumnIndex(1); + Text("%X", reg.disable_color_writes_on_depth_pass.Value()); + + EndTable(); + } +} + +static void ParseEqaa(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("DB_DEPTH_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("MAX_ANCHOR_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.max_anchor_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("PS_ITER_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.ps_iter_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("MASK_EXPORT_NUM_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.mask_export_num_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALPHA_TO_MASK_NUM_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.alpha_to_mask_num_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("HIGH_QUALITY_INTERSECTIONS"); + TableSetColumnIndex(1); + Text("%X", reg.high_quality_intersections.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("INCOHERENT_EQAA_READS"); + TableSetColumnIndex(1); + Text("%X", reg.incoherent_eqaa_reads.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("INTERPOLATE_COMP_Z"); + TableSetColumnIndex(1); + Text("%X", reg.interpolate_comp_z.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("INTERPOLATE_SRC_Z"); + TableSetColumnIndex(1); + Text("%X", reg.interpolate_src_z.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("STATIC_ANCHOR_ASSOCIATIONS"); + TableSetColumnIndex(1); + Text("%X", reg.static_anchor_associations.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALPHA_TO_MASK_EQAA_DISABLE"); + TableSetColumnIndex(1); + Text("%X", reg.alpha_to_mask_eqaa_disable.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("OVERRASTERIZATION_AMOUNT"); + TableSetColumnIndex(1); + Text("%X", reg.overrasterization_amount.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ENABLE_POSTZ_OVERRASTERIZATION"); + TableSetColumnIndex(1); + Text("%X", reg.enable_postz_overrasterization.Value()); + + EndTable(); + } +} + +static void ParseZInfo(u32 value) { + auto const reg = reinterpret_cast(value); + + if (BeginTable("DB_DEPTH_CONTROL", 2, ImGuiTableFlags_Borders | ImGuiTableFlags_RowBg)) { + TableNextRow(); + TableSetColumnIndex(0); + Text("FORMAT"); + TableSetColumnIndex(1); + Text("%X (%s)", (u32)reg.format.Value(), enum_name(reg.format.Value()).data()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("NUM_SAMPLES"); + TableSetColumnIndex(1); + Text("%X", reg.num_samples.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("TILE_SPLIT__CI__VI"); + TableSetColumnIndex(1); + Text("%X", reg.tile_split.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("TILE_MODE_INDEX"); + TableSetColumnIndex(1); + Text("%X", reg.tile_mode_index.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("DECOMPRESS_ON_N_ZPLANES__VI"); + TableSetColumnIndex(1); + Text("%X", reg.decompress_on_n_zplanes.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ALLOW_EXPCLEAR"); + TableSetColumnIndex(1); + Text("%X", reg.allow_expclear.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("READ_SIZE"); + TableSetColumnIndex(1); + Text("%X", reg.read_size.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("TILE_SURFACE_ENABLE"); + TableSetColumnIndex(1); + Text("%X", reg.tile_surface_en.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("CLEAR_DISALLOWED__VI"); + TableSetColumnIndex(1); + Text("%X", reg.clear_disallowed.Value()); + + TableNextRow(); + TableSetColumnIndex(0); + Text("ZRANGE_PRECISION"); + TableSetColumnIndex(1); + Text("%X", reg.zrange_precision.Value()); + + EndTable(); + } +} + +void CmdListViewer::OnNop(AmdGpu::PM4Type3Header const* header, u32 const* body) { + using namespace std::string_view_literals; + + enum class NOP_PAYLOAD : u32 { + ACB_SUBMIT_MRK = 0x68750013, + ALLOC_ALIGN8 = 0x68753000, + PUSH_MARKER = 0x68750001, + SET_VSHARP = 0x68750004, + SET_TSHARP = 0x68750005, + SET_SSHARP = 0x68750006, + SET_USER_DATA = 0x6875000d, + }; + auto get_noppayload_text = [](NOP_PAYLOAD const nop_payload) { + switch (nop_payload) { + case NOP_PAYLOAD::ACB_SUBMIT_MRK: + return "ACB_SUBMIT_MRK"sv; + case NOP_PAYLOAD::ALLOC_ALIGN8: + return "ALLOC_ALIGN8"sv; + case NOP_PAYLOAD::PUSH_MARKER: + return "PUSH_MARKER"sv; + case NOP_PAYLOAD::SET_VSHARP: + return "SET_VSHARP"sv; + case NOP_PAYLOAD::SET_TSHARP: + return "SET_TSHARP"sv; + case NOP_PAYLOAD::SET_SSHARP: + return "SET_SSHARP"sv; + case NOP_PAYLOAD::SET_USER_DATA: + return "SET_USER_DATA"sv; + } + return ""sv; + }; + + Separator(); + BeginGroup(); + + auto const* pkt = reinterpret_cast(header); + auto const* payload = &body[0]; + + // Dump payload + for (unsigned i = 0; i < pkt->header.count + 1; ++i) { + Text("%02X: %08X", i, payload[i]); + if ((payload[i] & 0xffff0000) == 0x68750000) { + const auto& e = get_noppayload_text((NOP_PAYLOAD)payload[i]); + if (!e.empty()) { + SameLine(); + Text("(%s)", e.data()); + } + } + } + + EndGroup(); +} +void CmdListViewer::OnSetBase(AmdGpu::PM4Type3Header const* header, u32 const* body) { + Separator(); + BeginGroup(); + + auto const* pkt = reinterpret_cast(header); + Text("BASE_INDEX: %08X", body[0]); + Text("ADDRESS0 : %08X", body[1]); + Text("ADDRESS1 : %08X", body[2]); + + EndGroup(); +} + +void CmdListViewer::OnSetContextReg(AmdGpu::PM4Type3Header const* header, u32 const* body) { + Separator(); + BeginGroup(); + + auto const* pkt = reinterpret_cast(header); + + for (auto i = 0u; i < header->count; ++i) { + auto const absOffset = CONTEXT_SPACE_START + pkt->reg_offset + i; + Text("reg: %4X (%s)", pkt->reg_offset + i, Gcn::GetContextRegName(absOffset)); + Text("[%08X]", body[i + 1]); + + switch (absOffset) { + case mmPA_SU_SC_MODE_CNTL: { + if (IsItemHovered() && BeginTooltip()) { + ParsePolygonControl(body[1]); + EndTooltip(); + } + break; + } + case mmPA_SC_AA_CONFIG: { + if (IsItemHovered() && BeginTooltip()) { + ParseAaConfig(body[1]); + EndTooltip(); + } + break; + } + case mmPA_CL_VTE_CNTL: { + if (IsItemHovered() && BeginTooltip()) { + ParseViewportControl(body[1]); + EndTooltip(); + } + break; + } + case mmCB_COLOR_CONTROL: + if (IsItemHovered() && BeginTooltip()) { + ParseColorControl(body[1]); + EndTooltip(); + } + break; + case mmCB_COLOR0_INFO: + [[fallthrough]]; + case mmCB_COLOR1_INFO: + [[fallthrough]]; + case mmCB_COLOR2_INFO: + [[fallthrough]]; + case mmCB_COLOR3_INFO: + [[fallthrough]]; + case mmCB_COLOR4_INFO: + [[fallthrough]]; + case mmCB_COLOR5_INFO: + [[fallthrough]]; + case mmCB_COLOR6_INFO: + [[fallthrough]]; + case mmCB_COLOR7_INFO: { + if (IsItemHovered() && BeginTooltip()) { + ParseColor0Info(body[i + 1]); + EndTooltip(); + } + break; + } + case mmCB_COLOR0_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR1_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR2_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR3_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR4_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR5_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR6_ATTRIB: + [[fallthrough]]; + case mmCB_COLOR7_ATTRIB: { + if (IsItemHovered() && BeginTooltip()) { + ParseColor0Attrib(body[i + 1]); + EndTooltip(); + } + break; + } + case mmCB_BLEND0_CONTROL: + [[fallthrough]]; + case mmCB_BLEND1_CONTROL: + [[fallthrough]]; + case mmCB_BLEND2_CONTROL: + [[fallthrough]]; + case mmCB_BLEND3_CONTROL: + [[fallthrough]]; + case mmCB_BLEND4_CONTROL: + [[fallthrough]]; + case mmCB_BLEND5_CONTROL: + [[fallthrough]]; + case mmCB_BLEND6_CONTROL: + [[fallthrough]]; + case mmCB_BLEND7_CONTROL: { + if (IsItemHovered() && BeginTooltip()) { + ParseBlendControl(body[i + 1]); + EndTooltip(); + } + break; + } + case mmDB_RENDER_CONTROL: { + if (IsItemHovered() && BeginTooltip()) { + ParseDepthRenderControl(body[1]); + EndTooltip(); + } + break; + } + case mmDB_DEPTH_CONTROL: { + if (IsItemHovered() && BeginTooltip()) { + ParseDepthControl(body[1]); + EndTooltip(); + } + break; + } + case mmDB_EQAA: { + if (IsItemHovered() && BeginTooltip()) { + ParseEqaa(body[1]); + EndTooltip(); + } + break; + } + case mmDB_Z_INFO: { + if (IsItemHovered() && BeginTooltip()) { + ParseZInfo(body[1]); + EndTooltip(); + } + break; + } + case mmDB_HTILE_DATA_BASE: { + auto const& reg = reinterpret_cast(body[1]); + Text("addr: %08x", reg * 256u); + break; + } + default: + break; + } + + //... + } + + EndGroup(); +} + +void CmdListViewer::OnSetShReg(AmdGpu::PM4Type3Header const* header, u32 const* body) { + Separator(); + BeginGroup(); + + auto const* pkt = reinterpret_cast(header); + + for (auto i = 0u; i < header->count; ++i) { + auto const absOffset = PERSISTENT_SPACE_START + pkt->reg_offset + i; + Text("reg: %4X (%s)", pkt->reg_offset + i, Gcn::GetShaderRegName(absOffset)); + + Text("%08X", *((uint32_t*)header + 2 + i)); + + //... + } + + EndGroup(); +} + +void CmdListViewer::OnDispatch(AmdGpu::PM4Type3Header const* header, u32 const* body) { + Separator(); + BeginGroup(); + + auto const* pkt = reinterpret_cast(header); + + Text("DIM_X : %d", pkt->dim_x); + Text("DIM_Y : %d", pkt->dim_y); + Text("DIM_Z : %d", pkt->dim_z); + Text("INITIATOR: %X", pkt->dispatch_initiator); + if (IsItemHovered() && BeginTooltip()) { + // TODO: dump_reg + EndTooltip(); + } + + EndGroup(); +} + +CmdListViewer::CmdListViewer(FrameDumpViewer* parent, const std::vector& cmd_list) + : parent(parent) { + using namespace AmdGpu; + + cmdb_addr = (uintptr_t)cmd_list.data(); + cmdb_size = cmd_list.size() * sizeof(u32); + + auto const* pm4_hdr = reinterpret_cast(cmdb_addr); + + size_t processed_size = 0; + size_t prev_offset = 0; + + std::string marker{}; + + while (processed_size < cmdb_size) { + auto* next_pm4_hdr = GetNext(pm4_hdr, 1); + auto processed_len = + reinterpret_cast(next_pm4_hdr) - reinterpret_cast(pm4_hdr); + processed_size += processed_len; + + if (pm4_hdr->type == PM4Type3Header::TYPE) { + + auto const* pm4_t3 = reinterpret_cast(pm4_hdr); + + if (pm4_t3->opcode == PM4ItOpcode::Nop) { + auto const* it_body = reinterpret_cast(pm4_hdr + 1); + if (it_body[0] == 0x68750001) { + marker = std::string{(char*)&it_body[1]}; + } + } + + if (pm4_t3->opcode == PM4ItOpcode::DispatchDirect || + pm4_t3->opcode == PM4ItOpcode::DispatchIndirect || + pm4_t3->opcode == PM4ItOpcode::DrawIndex2 || + pm4_t3->opcode == PM4ItOpcode::DrawIndexAuto || + pm4_t3->opcode == PM4ItOpcode::DrawIndexOffset2 || + pm4_t3->opcode == PM4ItOpcode::DrawIndexIndirect + // ... + ) { + // All these commands are terminated by NOP at the end, so + // it is safe to skip it to be even with CP + // next_pm4_hdr = get_next(next_pm4_hdr, 1); + // auto constexpr nop_len = 0x10; + // processed_len += nop_len; + // processed_size += nop_len; + + batches.emplace_back(BatchInfo{ + marker, + prev_offset, + processed_size, + processed_size - processed_len, + pm4_t3->opcode, + }); + prev_offset = processed_size; + marker.clear(); + } + } + + pm4_hdr = next_pm4_hdr; + } + + // state batch (last) + if (processed_size - prev_offset > 0) { + batches.emplace_back(BatchInfo{ + marker, + prev_offset, + processed_size, + 0, + static_cast(0xFF), + }); + } +} + +void CmdListViewer::Draw() { + if (BeginChild("cmd_queue", {})) { + char queue_name[32]{}; + if (vqid < 254) { + std::snprintf(queue_name, sizeof(queue_name), "%s %d", vqid > 254 ? "GFX" : "ASC", + vqid); + } else { + std::snprintf(queue_name, sizeof(queue_name), "%s", vqid > 254 ? "GFX" : "ASC"); + } + + Text("queue : %s", queue_name); + Text("base addr: %08llX", cmdb_addr); + SameLine(); + if (SmallButton(">")) { + parent->cmdb_view.Open ^= true; + } + Text("size : %04llX", cmdb_size); + Separator(); + + char batch_hdr[128]; + for (int batch_id = 0; batch_id < batches.size(); ++batch_id) { + auto processed_size = 0ull; + auto const* pm4_hdr = + reinterpret_cast(cmdb_addr + batches[batch_id].start_addr); + + sprintf(batch_hdr, "%08llX: batch-%03d | %s", cmdb_addr + batches[batch_id].start_addr, + batch_id, batches[batch_id].marker.c_str()); + + if (batch_id == batch_bp) { // highlight batch at breakpoint + PushStyleColor(ImGuiCol_Header, ImVec4{1.0f, 0.5f, 0.5f, 0.5f}); + } + + if (batches[batch_id].type == static_cast(0xFF) || + CollapsingHeader(batch_hdr)) { + auto const batch_sz = batches[batch_id].end_addr - batches[batch_id].start_addr; + while (processed_size < batch_sz) { + AmdGpu::PM4ItOpcode op{0xFFu}; + + if (pm4_hdr->type == AmdGpu::PM4Type3Header::TYPE) { + auto const* pm4_t3 = + reinterpret_cast(pm4_hdr); + op = pm4_t3->opcode; + + static char header_name[128]; + sprintf(header_name, "%08llX: %s", + cmdb_addr + batches[batch_id].start_addr + processed_size, + Gcn::GetOpCodeName((u32)op)); + + if (TreeNode(header_name)) { + bool just_opened = IsItemToggledOpen(); + if (BeginTable("split", 1)) { + TableNextColumn(); + Text("size: %d", pm4_hdr->count + 1); + + if (just_opened) { + // Editor + parent->cmdb_view.GotoAddrAndHighlight( + reinterpret_cast(pm4_hdr) - cmdb_addr, + reinterpret_cast(pm4_hdr) - cmdb_addr + + (pm4_hdr->count + 2) * 4); + } + + auto const* it_body = + reinterpret_cast(pm4_hdr + 1); + + switch (op) { + case AmdGpu::PM4ItOpcode::Nop: { + OnNop(pm4_t3, it_body); + break; + } + case AmdGpu::PM4ItOpcode::SetBase: { + OnSetBase(pm4_t3, it_body); + break; + } + case AmdGpu::PM4ItOpcode::SetContextReg: { + OnSetContextReg(pm4_t3, it_body); + break; + } + case AmdGpu::PM4ItOpcode::SetShReg: { + OnSetShReg(pm4_t3, it_body); + break; + } + case AmdGpu::PM4ItOpcode::DispatchDirect: { + OnDispatch(pm4_t3, it_body); + break; + } + default: { + auto const* payload = &it_body[0]; + for (unsigned i = 0; i < pm4_hdr->count + 1; ++i) { + Text("%02X: %08X", i, payload[i]); + } + } + } + + EndTable(); + } + TreePop(); + } + } else { + Text(""); + } + + auto const* next_pm4_hdr = GetNext(pm4_hdr, 1); + auto const processed_len = reinterpret_cast(next_pm4_hdr) - + reinterpret_cast(pm4_hdr); + pm4_hdr = next_pm4_hdr; + processed_size += processed_len; + } + } + + if (batch_id == batch_bp) { + PopStyleColor(); + } + + if (batch_id == batches.size() - 2) { + Separator(); + } + } + } + EndChild(); +} + +} // namespace Core::Devtools::Widget \ No newline at end of file diff --git a/src/core/devtools/widget/cmd_list.h b/src/core/devtools/widget/cmd_list.h new file mode 100644 index 000000000..a6ecd9323 --- /dev/null +++ b/src/core/devtools/widget/cmd_list.h @@ -0,0 +1,63 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +// Credits to https://github.com/psucien/tlg-emu-tools/ + +#pragma once + +#include + +#include "common/types.h" +#include "video_core/buffer_cache/buffer_cache.h" + +namespace AmdGpu { +union PM4Type3Header; +enum class PM4ItOpcode : u32; +} // namespace AmdGpu + +namespace Core::Devtools::Widget { + +class FrameDumpViewer; + +class CmdListViewer { + /* + * Generic PM4 header + */ + union PM4Header { + struct { + u32 reserved : 16; + u32 count : 14; + u32 type : 2; // PM4_TYPE + }; + u32 u32All; + }; + struct BatchInfo { + std::string marker{}; + size_t start_addr; + size_t end_addr; + size_t command_addr; + AmdGpu::PM4ItOpcode type; + bool bypass{false}; + }; + + FrameDumpViewer* parent; + std::vector batches{}; + uintptr_t cmdb_addr; + size_t cmdb_size; + + int batch_bp{-1}; + int vqid{255}; + + void OnNop(AmdGpu::PM4Type3Header const* header, u32 const* body); + void OnSetBase(AmdGpu::PM4Type3Header const* header, u32 const* body); + void OnSetContextReg(AmdGpu::PM4Type3Header const* header, u32 const* body); + void OnSetShReg(AmdGpu::PM4Type3Header const* header, u32 const* body); + void OnDispatch(AmdGpu::PM4Type3Header const* header, u32 const* body); + +public: + explicit CmdListViewer(FrameDumpViewer* parent, const std::vector& cmd_list); + + void Draw(); +}; + +} // namespace Core::Devtools::Widget diff --git a/src/core/devtools/widget/frame_dump.cpp b/src/core/devtools/widget/frame_dump.cpp new file mode 100644 index 000000000..d27bab90a --- /dev/null +++ b/src/core/devtools/widget/frame_dump.cpp @@ -0,0 +1,191 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include +#include +#include +#include + +#include "common/io_file.h" +#include "frame_dump.h" +#include "imgui_internal.h" +#include "imgui_memory_editor.h" + +using namespace ImGui; +using namespace DebugStateType; + +#define C_V(label, value, var, out) \ + if (Selectable(label, var == value)) { \ + var = value; \ + selected_cmd = -1; \ + out = true; \ + } + +// 00 to 99 +static std::array small_int_to_str(const s32 i) { + std::array label{}; + if (i == -1) { + label[0] = 'N'; + label[1] = 'A'; + } else { + label[0] = i / 10 + '0'; + label[1] = i % 10 + '0'; + } + return label; +} + +namespace Core::Devtools::Widget { + +FrameDumpViewer::FrameDumpViewer(FrameDump _frame_dump) : frame_dump(std::move(_frame_dump)) { + static int unique_id = 0; + id = unique_id++; + + selected_queue_type = QueueType::dcb; + selected_submit_num = 0; + selected_queue_num2 = 0; + + cmd_list_viewer.reserve(frame_dump.queues.size()); + for (const auto& cmd : frame_dump.queues) { + cmd_list_viewer.emplace_back(this, cmd.data); + if (cmd.type == QueueType::dcb && cmd.submit_num == selected_submit_num && + cmd.num2 == selected_queue_num2) { + selected_cmd = cmd_list_viewer.size() - 1; + } + } + + cmdb_view.Open = false; + cmdb_view.ReadOnly = true; +} + +FrameDumpViewer::~FrameDumpViewer() {} + +void FrameDumpViewer::Draw() { + if (!is_open) { + return; + } + + char name[32]; + snprintf(name, sizeof(name), "Frame #%d dump", id); + static ImGuiID dock_id = ImHashStr("FrameDumpDock"); + SetNextWindowDockID(dock_id, ImGuiCond_Appearing); + if (Begin(name, &is_open, ImGuiWindowFlags_NoSavedSettings)) { + if (IsWindowAppearing()) { + auto window = GetCurrentWindow(); + SetWindowSize(window, ImVec2{470.0f, 600.0f}); + } + BeginGroup(); + TextEx("Queue type"); + SameLine(); + if (BeginCombo("##select_queue_type", magic_enum::enum_name(selected_queue_type).data(), + ImGuiComboFlags_WidthFitPreview)) { + bool selected = false; +#define COMBO(x) C_V(magic_enum::enum_name(x).data(), x, selected_queue_type, selected) + COMBO(QueueType::acb) + COMBO(QueueType::dcb); + COMBO(QueueType::ccb); + if (selected) { + selected_submit_num = selected_queue_num2 = -1; + } + EndCombo(); + } + SameLine(); + TextEx("Submit num"); + SameLine(); + if (BeginCombo("##select_submit_num", small_int_to_str(selected_submit_num).data(), + ImGuiComboFlags_WidthFitPreview)) { + std::array available_submits{}; + for (const auto& cmd : frame_dump.queues) { + if (cmd.type == selected_queue_type) { + available_submits[cmd.submit_num] = true; + } + } + bool selected = false; + for (int i = 0; i < available_submits.size(); ++i) { + if (available_submits[i]) { + char label[3]{}; + label[0] = i / 10 + '0'; + label[1] = i % 10 + '0'; + C_V(label, i, selected_submit_num, selected); + } + } + if (selected) { + selected_queue_num2 = -1; + } + EndCombo(); + } + SameLine(); + TextEx(selected_queue_type == QueueType::acb ? "Queue num" : "Buffer num"); + SameLine(); + if (BeginCombo("##select_queue_num2", small_int_to_str(selected_queue_num2).data(), + ImGuiComboFlags_WidthFitPreview)) { + std::array available_queues{}; + for (const auto& cmd : frame_dump.queues) { + if (cmd.type == selected_queue_type && cmd.submit_num == selected_submit_num) { + available_queues[cmd.num2] = true; + } + } + bool selected = false; + for (int i = 0; i < available_queues.size(); ++i) { + if (available_queues[i]) { + char label[3]{}; + label[0] = i / 10 + '0'; + label[1] = i % 10 + '0'; + C_V(label, i, selected_queue_num2, selected); + } + } + if (selected) { + const auto it = std::ranges::find_if(frame_dump.queues, [&](const auto& cmd) { + return cmd.type == selected_queue_type && + cmd.submit_num == selected_submit_num && cmd.num2 == selected_queue_num2; + }); + if (it != frame_dump.queues.end()) { + selected_cmd = std::distance(frame_dump.queues.begin(), it); + } + } + EndCombo(); + } + SameLine(); + BeginDisabled(selected_cmd == -1); + if (SmallButton("Dump cmd")) { + auto now_time = fmt::localtime(std::time(nullptr)); + const auto fname = fmt::format("{:%F %H-%M-%S} {}_{}_{}.bin", now_time, + magic_enum::enum_name(selected_queue_type), + selected_submit_num, selected_queue_num2); + Common::FS::IOFile file(fname, Common::FS::FileAccessMode::Write); + auto& data = frame_dump.queues[selected_cmd].data; + if (file.IsOpen()) { + DebugState.ShowDebugMessage(fmt::format("Dumping cmd as {}", fname)); + file.Write(data); + } else { + DebugState.ShowDebugMessage(fmt::format("Failed to save {}", fname)); + LOG_ERROR(Core, "Failed to open file {}", fname); + } + } + EndDisabled(); + EndGroup(); + + if (selected_cmd != -1) { + cmd_list_viewer[selected_cmd].Draw(); + } + } + End(); + + if (cmdb_view.Open && selected_cmd != -1) { + auto& cmd = frame_dump.queues[selected_cmd].data; + auto cmd_size = cmd.size() * sizeof(u32); + MemoryEditor::Sizes s; + cmdb_view.CalcSizes(s, cmd_size, (size_t)cmd.data()); + SetNextWindowSizeConstraints(ImVec2(0.0f, 0.0f), ImVec2(s.WindowWidth, FLT_MAX)); + + char name[64]; + snprintf(name, sizeof(name), "[GFX] Command buffer %d###cmdbuf_hex_%d", id, id); + if (Begin(name, &cmdb_view.Open, ImGuiWindowFlags_NoScrollbar)) { + cmdb_view.DrawContents(cmd.data(), cmd_size, (size_t)cmd.data()); + } + End(); + } +} + +} // namespace Core::Devtools::Widget + +#undef C_V \ No newline at end of file diff --git a/src/core/devtools/widget/frame_dump.h b/src/core/devtools/widget/frame_dump.h new file mode 100644 index 000000000..d9d11f825 --- /dev/null +++ b/src/core/devtools/widget/frame_dump.h @@ -0,0 +1,41 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include +#include + +#include "cmd_list.h" +#include "core/debug_state.h" +#include "imgui_memory_editor.h" + +namespace Core::Devtools::Widget { + +class CmdListViewer; + +class FrameDumpViewer { + friend class CmdListViewer; + + DebugStateType::FrameDump frame_dump; + int id; + + std::vector cmd_list_viewer; + MemoryEditor cmdb_view; + + DebugStateType::QueueType selected_queue_type; + s32 selected_submit_num; + s32 selected_queue_num2; + s32 selected_cmd = -1; + +public: + bool is_open = true; + + explicit FrameDumpViewer(DebugStateType::FrameDump frame_dump); + + ~FrameDumpViewer(); + + void Draw(); +}; + +} // namespace Core::Devtools::Widget \ No newline at end of file diff --git a/src/core/devtools/widget/frame_graph.cpp b/src/core/devtools/widget/frame_graph.cpp new file mode 100644 index 000000000..952f50c34 --- /dev/null +++ b/src/core/devtools/widget/frame_graph.cpp @@ -0,0 +1,99 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "frame_graph.h" + +#include "common/config.h" +#include "common/singleton.h" +#include "core/debug_state.h" +#include "imgui.h" +#include "imgui_internal.h" + +using namespace ImGui; + +namespace Core::Devtools::Widget { + +constexpr float TARGET_FPS = 60.0f; +constexpr float BAR_WIDTH_MULT = 1.4f; +constexpr float BAR_HEIGHT_MULT = 1.25f; +constexpr float FRAME_GRAPH_PADDING_Y = 3.0f; +constexpr static float FRAME_GRAPH_HEIGHT = 50.0f; + +void FrameGraph::Draw() { + if (!is_open) { + return; + } + SetNextWindowSize({340.0, 185.0f}, ImGuiCond_FirstUseEver); + if (Begin("Video debug info", &is_open)) { + const auto& ctx = *GImGui; + const auto& io = ctx.IO; + const auto& window = *ctx.CurrentWindow; + auto& draw_list = *window.DrawList; + + auto isSystemPaused = DebugState.IsGuestThreadsPaused(); + + static float deltaTime; + static float frameRate; + + if (!isSystemPaused) { + deltaTime = io.DeltaTime * 1000.0f; + frameRate = 1000.0f / deltaTime; + } + + Text("Frame time: %.3f ms (%.1f FPS)", deltaTime, frameRate); + Text("Flip frame: %d Gnm submit frame: %d", DebugState.flip_frame_count.load(), + DebugState.gnm_frame_count.load()); + SeparatorText("Frame graph"); + + const float full_width = GetContentRegionAvail().x; + // Frame graph - inspired by + // https://asawicki.info/news_1758_an_idea_for_visualization_of_frame_times + auto pos = GetCursorScreenPos(); + const ImVec2 size{full_width, FRAME_GRAPH_HEIGHT + FRAME_GRAPH_PADDING_Y * 2.0f}; + ItemSize(size); + if (!ItemAdd({pos, pos + size}, GetID("FrameGraph"))) { + return; + } + + float target_dt = 1.0f / (TARGET_FPS * (float)Config::vblankDiv()); + float cur_pos_x = pos.x + full_width; + pos.y += FRAME_GRAPH_PADDING_Y; + const float final_pos_y = pos.y + FRAME_GRAPH_HEIGHT; + + draw_list.AddRectFilled({pos.x, pos.y - FRAME_GRAPH_PADDING_Y}, + {pos.x + full_width, final_pos_y + FRAME_GRAPH_PADDING_Y}, + IM_COL32(0x33, 0x33, 0x33, 0xFF)); + draw_list.PushClipRect({pos.x, pos.y}, {pos.x + full_width, final_pos_y}, true); + for (u32 i = 0; i < FRAME_BUFFER_SIZE; ++i) { + const auto& frame_info = frame_list[(DebugState.GetFrameNum() - i) % FRAME_BUFFER_SIZE]; + const float dt_factor = target_dt / frame_info.delta; + + const float width = std::ceil(BAR_WIDTH_MULT / dt_factor); + const float height = + std::min(std::log2(BAR_HEIGHT_MULT / dt_factor) / 3.0f, 1.0f) * FRAME_GRAPH_HEIGHT; + + ImU32 color; + if (dt_factor >= 0.95f) { // BLUE + color = IM_COL32(0x33, 0x33, 0xFF, 0xFF); + } else if (dt_factor >= 0.5f) { // GREEN <> YELLOW + float t = 1.0f - (dt_factor - 0.5f) * 2.0f; + int r = (int)(0xFF * t); + color = IM_COL32(r, 0xFF, 0, 0xFF); + } else { // YELLOW <> RED + float t = dt_factor * 2.0f; + int g = (int)(0xFF * t); + color = IM_COL32(0xFF, g, 0, 0xFF); + } + draw_list.AddRectFilled({cur_pos_x - width, final_pos_y - height}, + {cur_pos_x, final_pos_y}, color); + cur_pos_x -= width; + if (cur_pos_x < width) { + break; + } + } + draw_list.PopClipRect(); + } + End(); +} + +} // namespace Core::Devtools::Widget diff --git a/src/core/devtools/widget/frame_graph.h b/src/core/devtools/widget/frame_graph.h new file mode 100644 index 000000000..700b6b2a2 --- /dev/null +++ b/src/core/devtools/widget/frame_graph.h @@ -0,0 +1,29 @@ +// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "common/types.h" + +namespace Core::Devtools::Widget { + +class FrameGraph { + static constexpr u32 FRAME_BUFFER_SIZE = 1024; + struct FrameInfo { + u32 num; + float delta; + }; + + std::array frame_list{}; + +public: + bool is_open = true; + + void Draw(); + + void AddFrame(u32 num, float delta) { + frame_list[num % FRAME_BUFFER_SIZE] = FrameInfo{num, delta}; + } +}; + +} // namespace Core::Devtools::Widget \ No newline at end of file diff --git a/src/core/devtools/widget/imgui_memory_editor.h b/src/core/devtools/widget/imgui_memory_editor.h new file mode 100644 index 000000000..fb1f46767 --- /dev/null +++ b/src/core/devtools/widget/imgui_memory_editor.h @@ -0,0 +1,942 @@ +// SPDX-FileCopyrightText: 2024 Dear ImGui Club Contributors +// SPDX-License-Identifier: MIT + +// Mini memory editor for Dear ImGui (to embed in your game/tools) +// Get latest version at http://www.github.com/ocornut/imgui_club +// Licensed under The MIT License (MIT) + +// Right-click anywhere to access the Options menu! +// You can adjust the keyboard repeat delay/rate in ImGuiIO. +// The code assume a mono-space font for simplicity! +// If you don't use the default font, use ImGui::PushFont()/PopFont() to switch to a mono-space font +// before calling this. +// +// Usage: +// // Create a window and draw memory editor inside it: +// static MemoryEditor mem_edit_1; +// static char data[0x10000]; +// size_t data_size = 0x10000; +// mem_edit_1.DrawWindow("Memory Editor", data, data_size); +// +// Usage: +// // If you already have a window, use DrawContents() instead: +// static MemoryEditor mem_edit_2; +// ImGui::Begin("MyWindow") +// mem_edit_2.DrawContents(this, sizeof(*this), (size_t)this); +// ImGui::End(); +// +// Changelog: +// - v0.10: initial version +// - v0.23 (2017/08/17): added to github. fixed right-arrow triggering a byte write. +// - v0.24 (2018/06/02): changed DragInt("Rows" to use a %d data format (which is desirable since +// imgui 1.61). +// - v0.25 (2018/07/11): fixed wording: all occurrences of "Rows" renamed to "Columns". +// - v0.26 (2018/08/02): fixed clicking on hex region +// - v0.30 (2018/08/02): added data preview for common data types +// - v0.31 (2018/10/10): added OptUpperCaseHex option to select lower/upper casing display +// [@samhocevar] +// - v0.32 (2018/10/10): changed signatures to use void* instead of unsigned char* +// - v0.33 (2018/10/10): added OptShowOptions option to hide all the interactive option setting. +// - v0.34 (2019/05/07): binary preview now applies endianness setting [@nicolasnoble] +// - v0.35 (2020/01/29): using ImGuiDataType available since Dear ImGui 1.69. +// - v0.36 (2020/05/05): minor tweaks, minor refactor. +// - v0.40 (2020/10/04): fix misuse of ImGuiListClipper API, broke with Dear ImGui 1.79. made cursor +// position appears on left-side of edit box. option popup appears on mouse release. fix MSVC +// warnings where _CRT_SECURE_NO_WARNINGS wasn't working in recent versions. +// - v0.41 (2020/10/05): fix when using with keyboard/gamepad navigation enabled. +// - v0.42 (2020/10/14): fix for . character in ASCII view always being greyed out. +// - v0.43 (2021/03/12): added OptFooterExtraHeight to allow for custom drawing at the bottom of the +// editor [@leiradel] +// - v0.44 (2021/03/12): use ImGuiInputTextFlags_AlwaysOverwrite in 1.82 + fix hardcoded width. +// - v0.50 (2021/11/12): various fixes for recent dear imgui versions (fixed misuse of clipper, +// relying on SetKeyboardFocusHere() handling scrolling from 1.85). added default size. +// - v0.51 (2024/02/22): fix for layout change in 1.89 when using IMGUI_DISABLE_OBSOLETE_FUNCTIONS. +// (#34) +// - v0.52 (2024/03/08): removed unnecessary GetKeyIndex() calls, they are a no-op since 1.87. +// - v0.53 (2024/05/27): fixed right-click popup from not appearing when using DrawContents(). +// warning fixes. (#35) +// - v0.54 (2024/07/29): allow ReadOnly mode to still select and preview data. (#46) [@DeltaGW2]) +// - v0.55 (2024/08/19): added BgColorFn to allow setting background colors independently from +// highlighted selection. (#27) [@StrikerX3] +// added MouseHoveredAddr public readable field. (#47, #27) [@StrikerX3] +// fixed a data preview crash with 1.91.0 WIP. fixed contiguous highlight +// color when using data preview. *BREAKING* added UserData field passed to +// all optional function handlers: ReadFn, WriteFn, HighlightFn, BgColorFn. +// (#50) [@silverweed] +// +// TODO: +// - This is generally old/crappy code, it should work but isn't very good.. to be rewritten some +// day. +// - PageUp/PageDown are not supported because we use _NoNav. This is a good test scenario for +// working out idioms of how to mix natural nav and our own... +// - Arrows are being sent to the InputText() about to disappear which for LeftArrow makes the text +// cursor appear at position 1 for one frame. +// - Using InputText() is awkward and maybe overkill here, consider implementing something custom. + +#pragma once + +#include // uint8_t, etc. +#include // sprintf, scanf + +#if defined(_MSC_VER) || defined(_UCRT) +#define _PRISizeT "I" +#define ImSnprintf _snprintf +#else +#define _PRISizeT "z" +#define ImSnprintf snprintf +#endif + +#if defined(_MSC_VER) || defined(_UCRT) +#pragma warning(push) +#pragma warning( \ + disable : 4996) // warning C4996: 'sprintf': This function or variable may be unsafe. +#endif + +struct MemoryEditor { + enum DataFormat { + DataFormat_Bin = 0, + DataFormat_Dec = 1, + DataFormat_Hex = 2, + DataFormat_COUNT + }; + + // Settings + bool Open; // = true // set to false when DrawWindow() was closed. ignore if not using + // DrawWindow(). + bool ReadOnly; // = false // disable any editing. + int Cols; // = 16 // number of columns to display. + bool OptShowOptions; // = true // display options button/context menu. when disabled, options + // will be locked unless you provide your own UI for them. + bool OptShowDataPreview; // = false // display a footer previewing the decimal/binary/hex/float + // representation of the currently selected bytes. + bool OptShowHexII; // = false // display values in HexII representation instead of regular + // hexadecimal: hide null/zero bytes, ascii values as ".X". + bool OptShowAscii; // = true // display ASCII representation on the right side. + bool OptGreyOutZeroes; // = true // display null/zero bytes using the TextDisabled color. + bool OptUpperCaseHex; // = true // display hexadecimal values as "FF" instead of "ff". + int OptMidColsCount; // = 8 // set to 0 to disable extra spacing between every mid-cols. + int OptAddrDigitsCount; // = 0 // number of addr digits to display (default calculated + // based on maximum displayed addr). + float OptFooterExtraHeight; // = 0 // space to reserve at the bottom of the widget to add + // custom widgets + ImU32 HighlightColor; // // background color of highlighted bytes. + + // Function handlers + ImU8 (*ReadFn)(const ImU8* mem, size_t off, + void* user_data); // = 0 // optional handler to read bytes. + void (*WriteFn)(ImU8* mem, size_t off, ImU8 d, + void* user_data); // = 0 // optional handler to write bytes. + bool (*HighlightFn)(const ImU8* mem, size_t off, + void* user_data); // = 0 // optional handler to return Highlight + // property (to support non-contiguous highlighting). + ImU32 (*BgColorFn)(const ImU8* mem, size_t off, + void* user_data); // = 0 // optional handler to return custom background + // color of individual bytes. + void* UserData; // = NULL // user data forwarded to the function handlers + + // Public read-only data + bool MouseHovered; // set when mouse is hovering a value. + size_t MouseHoveredAddr; // the address currently being hovered if MouseHovered is set. + + // [Internal State] + bool ContentsWidthChanged; + size_t DataPreviewAddr; + size_t DataEditingAddr; + bool DataEditingTakeFocus; + char DataInputBuf[32]; + char AddrInputBuf[32]; + size_t GotoAddr; + size_t HighlightMin, HighlightMax; + int PreviewEndianness; + ImGuiDataType PreviewDataType; + + MemoryEditor() { + // Settings + Open = true; + ReadOnly = false; + Cols = 16; + OptShowOptions = true; + OptShowDataPreview = false; + OptShowHexII = false; + OptShowAscii = true; + OptGreyOutZeroes = true; + OptUpperCaseHex = true; + OptMidColsCount = 8; + OptAddrDigitsCount = 0; + OptFooterExtraHeight = 0.0f; + HighlightColor = IM_COL32(255, 255, 255, 50); + ReadFn = nullptr; + WriteFn = nullptr; + HighlightFn = nullptr; + BgColorFn = nullptr; + UserData = nullptr; + + // State/Internals + ContentsWidthChanged = false; + DataPreviewAddr = DataEditingAddr = (size_t)-1; + DataEditingTakeFocus = false; + memset(DataInputBuf, 0, sizeof(DataInputBuf)); + memset(AddrInputBuf, 0, sizeof(AddrInputBuf)); + GotoAddr = (size_t)-1; + MouseHovered = false; + MouseHoveredAddr = 0; + HighlightMin = HighlightMax = (size_t)-1; + PreviewEndianness = 0; + PreviewDataType = ImGuiDataType_S32; + } + + void GotoAddrAndHighlight(size_t addr_min, size_t addr_max) { + GotoAddr = addr_min; + HighlightMin = addr_min; + HighlightMax = addr_max; + } + + struct Sizes { + int AddrDigitsCount; + float LineHeight; + float GlyphWidth; + float HexCellWidth; + float SpacingBetweenMidCols; + float PosHexStart; + float PosHexEnd; + float PosAsciiStart; + float PosAsciiEnd; + float WindowWidth; + + Sizes() { + memset(this, 0, sizeof(*this)); + } + }; + + void CalcSizes(Sizes& s, size_t mem_size, size_t base_display_addr) { + ImGuiStyle& style = ImGui::GetStyle(); + s.AddrDigitsCount = OptAddrDigitsCount; + if (s.AddrDigitsCount == 0) + for (size_t n = base_display_addr + mem_size - 1; n > 0; n >>= 4) + s.AddrDigitsCount++; + s.LineHeight = ImGui::GetTextLineHeight(); + s.GlyphWidth = ImGui::CalcTextSize("F").x + 1; // We assume the font is mono-space + s.HexCellWidth = + (float)(int)(s.GlyphWidth * 2.5f); // "FF " we include trailing space in the width to + // easily catch clicks everywhere + s.SpacingBetweenMidCols = + (float)(int)(s.HexCellWidth * + 0.25f); // Every OptMidColsCount columns we add a bit of extra spacing + s.PosHexStart = (s.AddrDigitsCount + 2) * s.GlyphWidth; + s.PosHexEnd = s.PosHexStart + (s.HexCellWidth * Cols); + s.PosAsciiStart = s.PosAsciiEnd = s.PosHexEnd; + if (OptShowAscii) { + s.PosAsciiStart = s.PosHexEnd + s.GlyphWidth * 1; + if (OptMidColsCount > 0) + s.PosAsciiStart += (float)((Cols + OptMidColsCount - 1) / OptMidColsCount) * + s.SpacingBetweenMidCols; + s.PosAsciiEnd = s.PosAsciiStart + Cols * s.GlyphWidth; + } + s.WindowWidth = + s.PosAsciiEnd + style.ScrollbarSize + style.WindowPadding.x * 2 + s.GlyphWidth; + } + + // Standalone Memory Editor window + void DrawWindow(const char* title, void* mem_data, size_t mem_size, + size_t base_display_addr = 0x0000) { + Sizes s; + CalcSizes(s, mem_size, base_display_addr); + ImGui::SetNextWindowSize(ImVec2(s.WindowWidth, s.WindowWidth * 0.60f), + ImGuiCond_FirstUseEver); + ImGui::SetNextWindowSizeConstraints(ImVec2(0.0f, 0.0f), ImVec2(s.WindowWidth, FLT_MAX)); + + Open = true; + if (ImGui::Begin(title, &Open, ImGuiWindowFlags_NoScrollbar)) { + DrawContents(mem_data, mem_size, base_display_addr); + if (ContentsWidthChanged) { + CalcSizes(s, mem_size, base_display_addr); + ImGui::SetWindowSize(ImVec2(s.WindowWidth, ImGui::GetWindowSize().y)); + } + } + ImGui::End(); + } + + // Memory Editor contents only + void DrawContents(void* mem_data_void, size_t mem_size, size_t base_display_addr = 0x0000) { + if (Cols < 1) + Cols = 1; + + ImU8* mem_data = (ImU8*)mem_data_void; + Sizes s; + CalcSizes(s, mem_size, base_display_addr); + ImGuiStyle& style = ImGui::GetStyle(); + + const ImVec2 contents_pos_start = ImGui::GetCursorScreenPos(); + + // We begin into our scrolling region with the 'ImGuiWindowFlags_NoMove' in order to prevent + // click from moving the window. This is used as a facility since our main click detection + // code doesn't assign an ActiveId so the click would normally be caught as a window-move. + const float height_separator = style.ItemSpacing.y; + float footer_height = OptFooterExtraHeight; + if (OptShowOptions) + footer_height += height_separator + ImGui::GetFrameHeightWithSpacing() * 1; + if (OptShowDataPreview) + footer_height += height_separator + ImGui::GetFrameHeightWithSpacing() * 1 + + ImGui::GetTextLineHeightWithSpacing() * 3; + ImGui::BeginChild("##scrolling", ImVec2(-FLT_MIN, -footer_height), ImGuiChildFlags_None, + ImGuiWindowFlags_NoMove | ImGuiWindowFlags_NoNav); + ImDrawList* draw_list = ImGui::GetWindowDrawList(); + + ImGui::PushStyleVar(ImGuiStyleVar_FramePadding, ImVec2(0, 0)); + ImGui::PushStyleVar(ImGuiStyleVar_ItemSpacing, ImVec2(0, 0)); + + // We are not really using the clipper API correctly here, because we rely on + // visible_start_addr/visible_end_addr for our scrolling function. + const int line_total_count = (int)((mem_size + Cols - 1) / Cols); + ImGuiListClipper clipper; + clipper.Begin(line_total_count, s.LineHeight); + + bool data_next = false; + + if (DataEditingAddr >= mem_size) + DataEditingAddr = (size_t)-1; + if (DataPreviewAddr >= mem_size) + DataPreviewAddr = (size_t)-1; + + size_t preview_data_type_size = OptShowDataPreview ? DataTypeGetSize(PreviewDataType) : 0; + + size_t data_editing_addr_next = (size_t)-1; + if (DataEditingAddr != (size_t)-1) { + // Move cursor but only apply on next frame so scrolling with be synchronized (because + // currently we can't change the scrolling while the window is being rendered) + if (ImGui::IsKeyPressed(ImGuiKey_UpArrow) && + (ptrdiff_t)DataEditingAddr >= (ptrdiff_t)Cols) { + data_editing_addr_next = DataEditingAddr - Cols; + } else if (ImGui::IsKeyPressed(ImGuiKey_DownArrow) && + (ptrdiff_t)DataEditingAddr < (ptrdiff_t)mem_size - Cols) { + data_editing_addr_next = DataEditingAddr + Cols; + } else if (ImGui::IsKeyPressed(ImGuiKey_LeftArrow) && + (ptrdiff_t)DataEditingAddr > (ptrdiff_t)0) { + data_editing_addr_next = DataEditingAddr - 1; + } else if (ImGui::IsKeyPressed(ImGuiKey_RightArrow) && + (ptrdiff_t)DataEditingAddr < (ptrdiff_t)mem_size - 1) { + data_editing_addr_next = DataEditingAddr + 1; + } + } + + // Draw vertical separator + ImVec2 window_pos = ImGui::GetWindowPos(); + if (OptShowAscii) + draw_list->AddLine( + ImVec2(window_pos.x + s.PosAsciiStart - s.GlyphWidth, window_pos.y), + ImVec2(window_pos.x + s.PosAsciiStart - s.GlyphWidth, window_pos.y + 9999), + ImGui::GetColorU32(ImGuiCol_Border)); + + const ImU32 color_text = ImGui::GetColorU32(ImGuiCol_Text); + const ImU32 color_disabled = + OptGreyOutZeroes ? ImGui::GetColorU32(ImGuiCol_TextDisabled) : color_text; + + const char* format_address = + OptUpperCaseHex ? "%0*" _PRISizeT "X: " : "%0*" _PRISizeT "x: "; + const char* format_data = OptUpperCaseHex ? "%0*" _PRISizeT "X" : "%0*" _PRISizeT "x"; + const char* format_byte = OptUpperCaseHex ? "%02X" : "%02x"; + const char* format_byte_space = OptUpperCaseHex ? "%02X " : "%02x "; + + MouseHovered = false; + MouseHoveredAddr = 0; + + while (clipper.Step()) + for (int line_i = clipper.DisplayStart; line_i < clipper.DisplayEnd; + line_i++) // display only visible lines + { + size_t addr = (size_t)line_i * Cols; + ImGui::Text(format_address, s.AddrDigitsCount, base_display_addr + addr); + + // Draw Hexadecimal + for (int n = 0; n < Cols && addr < mem_size; n++, addr++) { + float byte_pos_x = s.PosHexStart + s.HexCellWidth * n; + if (OptMidColsCount > 0) + byte_pos_x += (float)(n / OptMidColsCount) * s.SpacingBetweenMidCols; + ImGui::SameLine(byte_pos_x); + + // Draw highlight or custom background color + const bool is_highlight_from_user_range = + (addr >= HighlightMin && addr < HighlightMax); + const bool is_highlight_from_user_func = + (HighlightFn && HighlightFn(mem_data, addr, UserData)); + const bool is_highlight_from_preview = + (addr >= DataPreviewAddr && + addr < DataPreviewAddr + preview_data_type_size); + + ImU32 bg_color = 0; + bool is_next_byte_highlighted = false; + if (is_highlight_from_user_range || is_highlight_from_user_func || + is_highlight_from_preview) { + is_next_byte_highlighted = + (addr + 1 < mem_size) && + ((HighlightMax != (size_t)-1 && addr + 1 < HighlightMax) || + (HighlightFn && HighlightFn(mem_data, addr + 1, UserData)) || + (addr + 1 < DataPreviewAddr + preview_data_type_size)); + bg_color = HighlightColor; + } else if (BgColorFn != nullptr) { + is_next_byte_highlighted = + (addr + 1 < mem_size) && + ((BgColorFn(mem_data, addr + 1, UserData) & IM_COL32_A_MASK) != 0); + bg_color = BgColorFn(mem_data, addr, UserData); + } + if (bg_color != 0) { + float bg_width = s.GlyphWidth * 2; + if (is_next_byte_highlighted || (n + 1 == Cols)) { + bg_width = s.HexCellWidth; + if (OptMidColsCount > 0 && n > 0 && (n + 1) < Cols && + ((n + 1) % OptMidColsCount) == 0) + bg_width += s.SpacingBetweenMidCols; + } + ImVec2 pos = ImGui::GetCursorScreenPos(); + draw_list->AddRectFilled( + pos, ImVec2(pos.x + bg_width, pos.y + s.LineHeight), bg_color); + } + + if (DataEditingAddr == addr) { + // Display text input on current byte + bool data_write = false; + ImGui::PushID((void*)addr); + if (DataEditingTakeFocus) { + ImGui::SetKeyboardFocusHere(0); + ImSnprintf(AddrInputBuf, 32, format_data, s.AddrDigitsCount, + base_display_addr + addr); + ImSnprintf(DataInputBuf, 32, format_byte, + ReadFn ? ReadFn(mem_data, addr, UserData) : mem_data[addr]); + } + struct InputTextUserData { + // FIXME: We should have a way to retrieve the text edit cursor position + // more easily in the API, this is rather tedious. This is such a ugly + // mess we may be better off not using InputText() at all here. + static int Callback(ImGuiInputTextCallbackData* data) { + InputTextUserData* user_data = (InputTextUserData*)data->UserData; + if (!data->HasSelection()) + user_data->CursorPos = data->CursorPos; +#if IMGUI_VERSION_NUM < 19102 + if (data->Flags & ImGuiInputTextFlags_ReadOnly) + return 0; +#endif + if (data->SelectionStart == 0 && + data->SelectionEnd == data->BufTextLen) { + // When not editing a byte, always refresh its InputText content + // pulled from underlying memory data (this is a bit tricky, + // since InputText technically "owns" the master copy of the + // buffer we edit it in there) + data->DeleteChars(0, data->BufTextLen); + data->InsertChars(0, user_data->CurrentBufOverwrite); + data->SelectionStart = 0; + data->SelectionEnd = 2; + data->CursorPos = 0; + } + return 0; + } + char CurrentBufOverwrite[3]; // Input + int CursorPos; // Output + }; + InputTextUserData input_text_user_data; + input_text_user_data.CursorPos = -1; + ImSnprintf(input_text_user_data.CurrentBufOverwrite, 3, format_byte, + ReadFn ? ReadFn(mem_data, addr, UserData) : mem_data[addr]); + ImGuiInputTextFlags flags = ImGuiInputTextFlags_CharsHexadecimal | + ImGuiInputTextFlags_EnterReturnsTrue | + ImGuiInputTextFlags_AutoSelectAll | + ImGuiInputTextFlags_NoHorizontalScroll | + ImGuiInputTextFlags_CallbackAlways; + if (ReadOnly) + flags |= ImGuiInputTextFlags_ReadOnly; + flags |= + ImGuiInputTextFlags_AlwaysOverwrite; // was + // ImGuiInputTextFlags_AlwaysInsertMode + ImGui::SetNextItemWidth(s.GlyphWidth * 2); + if (ImGui::InputText("##data", DataInputBuf, IM_ARRAYSIZE(DataInputBuf), + flags, InputTextUserData::Callback, + &input_text_user_data)) + data_write = data_next = true; + else if (!DataEditingTakeFocus && !ImGui::IsItemActive()) + DataEditingAddr = data_editing_addr_next = (size_t)-1; + DataEditingTakeFocus = false; + if (input_text_user_data.CursorPos >= 2) + data_write = data_next = true; + if (data_editing_addr_next != (size_t)-1) + data_write = data_next = false; + unsigned int data_input_value = 0; + if (!ReadOnly && data_write && + sscanf(DataInputBuf, "%X", &data_input_value) == 1) { + if (WriteFn) + WriteFn(mem_data, addr, (ImU8)data_input_value, UserData); + else + mem_data[addr] = (ImU8)data_input_value; + } + ImGui::PopID(); + } else { + // NB: The trailing space is not visible but ensure there's no gap that the + // mouse cannot click on. + ImU8 b = ReadFn ? ReadFn(mem_data, addr, UserData) : mem_data[addr]; + + if (OptShowHexII) { + if ((b >= 32 && b < 128)) + ImGui::Text(".%c ", b); + else if (b == 0xFF && OptGreyOutZeroes) + ImGui::TextDisabled("## "); + else if (b == 0x00) + ImGui::Text(" "); + else + ImGui::Text(format_byte_space, b); + } else { + if (b == 0 && OptGreyOutZeroes) + ImGui::TextDisabled("00 "); + else + ImGui::Text(format_byte_space, b); + } + if (ImGui::IsItemHovered()) { + MouseHovered = true; + MouseHoveredAddr = addr; + if (ImGui::IsMouseClicked(0)) { + DataEditingTakeFocus = true; + data_editing_addr_next = addr; + } + } + } + } + + if (OptShowAscii) { + // Draw ASCII values + ImGui::SameLine(s.PosAsciiStart); + ImVec2 pos = ImGui::GetCursorScreenPos(); + addr = (size_t)line_i * Cols; + + const float mouse_off_x = ImGui::GetIO().MousePos.x - pos.x; + const size_t mouse_addr = + (mouse_off_x >= 0.0f && mouse_off_x < s.PosAsciiEnd - s.PosAsciiStart) + ? addr + (size_t)(mouse_off_x / s.GlyphWidth) + : (size_t)-1; + + ImGui::PushID(line_i); + if (ImGui::InvisibleButton( + "ascii", ImVec2(s.PosAsciiEnd - s.PosAsciiStart, s.LineHeight))) { + DataEditingAddr = DataPreviewAddr = mouse_addr; + DataEditingTakeFocus = true; + } + if (ImGui::IsItemHovered()) { + MouseHovered = true; + MouseHoveredAddr = mouse_addr; + } + ImGui::PopID(); + for (int n = 0; n < Cols && addr < mem_size; n++, addr++) { + if (addr == DataEditingAddr) { + draw_list->AddRectFilled( + pos, ImVec2(pos.x + s.GlyphWidth, pos.y + s.LineHeight), + ImGui::GetColorU32(ImGuiCol_FrameBg)); + draw_list->AddRectFilled( + pos, ImVec2(pos.x + s.GlyphWidth, pos.y + s.LineHeight), + ImGui::GetColorU32(ImGuiCol_TextSelectedBg)); + } else if (BgColorFn) { + draw_list->AddRectFilled( + pos, ImVec2(pos.x + s.GlyphWidth, pos.y + s.LineHeight), + BgColorFn(mem_data, addr, UserData)); + } + unsigned char c = + ReadFn ? ReadFn(mem_data, addr, UserData) : mem_data[addr]; + char display_c = (c < 32 || c >= 128) ? '.' : c; + draw_list->AddText(pos, (display_c == c) ? color_text : color_disabled, + &display_c, &display_c + 1); + pos.x += s.GlyphWidth; + } + } + } + ImGui::PopStyleVar(2); + const float child_width = ImGui::GetWindowSize().x; + ImGui::EndChild(); + + // Notify the main window of our ideal child content size (FIXME: we are missing an API to + // get the contents size from the child) + ImGui::SetCursorPosX(s.WindowWidth); + ImGui::Dummy(ImVec2(0.0f, 0.0f)); + + if (data_next && DataEditingAddr + 1 < mem_size) { + DataEditingAddr = DataPreviewAddr = DataEditingAddr + 1; + DataEditingTakeFocus = true; + } else if (data_editing_addr_next != (size_t)-1) { + DataEditingAddr = DataPreviewAddr = data_editing_addr_next; + DataEditingTakeFocus = true; + } + + const bool lock_show_data_preview = OptShowDataPreview; + if (OptShowOptions) { + ImGui::Separator(); + DrawOptionsLine(s, mem_data, mem_size, base_display_addr); + } + + if (lock_show_data_preview) { + ImGui::Separator(); + DrawPreviewLine(s, mem_data, mem_size, base_display_addr); + } + + const ImVec2 contents_pos_end(contents_pos_start.x + child_width, + ImGui::GetCursorScreenPos().y); + // ImGui::GetForegroundDrawList()->AddRect(contents_pos_start, contents_pos_end, + // IM_COL32(255, 0, 0, 255)); + if (OptShowOptions) + if (ImGui::IsMouseHoveringRect(contents_pos_start, contents_pos_end)) + if (ImGui::IsWindowHovered(ImGuiHoveredFlags_ChildWindows) && + ImGui::IsMouseReleased(ImGuiMouseButton_Right)) + ImGui::OpenPopup("OptionsPopup"); + + if (ImGui::BeginPopup("OptionsPopup")) { + ImGui::SetNextItemWidth(s.GlyphWidth * 7 + style.FramePadding.x * 2.0f); + if (ImGui::DragInt("##cols", &Cols, 0.2f, 4, 32, "%d cols")) { + ContentsWidthChanged = true; + if (Cols < 1) + Cols = 1; + } + ImGui::Checkbox("Show Data Preview", &OptShowDataPreview); + ImGui::Checkbox("Show HexII", &OptShowHexII); + if (ImGui::Checkbox("Show Ascii", &OptShowAscii)) { + ContentsWidthChanged = true; + } + ImGui::Checkbox("Grey out zeroes", &OptGreyOutZeroes); + ImGui::Checkbox("Uppercase Hex", &OptUpperCaseHex); + + ImGui::EndPopup(); + } + } + + void DrawOptionsLine(const Sizes& s, void* mem_data, size_t mem_size, + size_t base_display_addr) { + IM_UNUSED(mem_data); + ImGuiStyle& style = ImGui::GetStyle(); + const char* format_range = OptUpperCaseHex ? "Range %0*" _PRISizeT "X..%0*" _PRISizeT "X" + : "Range %0*" _PRISizeT "x..%0*" _PRISizeT "x"; + + // Options menu + if (ImGui::Button("Options")) + ImGui::OpenPopup("OptionsPopup"); + + ImGui::SameLine(); + ImGui::Text(format_range, s.AddrDigitsCount, base_display_addr, s.AddrDigitsCount, + base_display_addr + mem_size - 1); + ImGui::SameLine(); + ImGui::SetNextItemWidth((s.AddrDigitsCount + 1) * s.GlyphWidth + + style.FramePadding.x * 2.0f); + if (ImGui::InputText("##addr", AddrInputBuf, IM_ARRAYSIZE(AddrInputBuf), + ImGuiInputTextFlags_CharsHexadecimal | + ImGuiInputTextFlags_EnterReturnsTrue)) { + size_t goto_addr; + if (sscanf(AddrInputBuf, "%" _PRISizeT "X", &goto_addr) == 1) { + GotoAddr = goto_addr - base_display_addr; + HighlightMin = HighlightMax = (size_t)-1; + } + } + + if (GotoAddr != (size_t)-1) { + if (GotoAddr < mem_size) { + ImGui::BeginChild("##scrolling"); + ImGui::SetScrollFromPosY(ImGui::GetCursorStartPos().y + + (GotoAddr / Cols) * ImGui::GetTextLineHeight()); + ImGui::EndChild(); + DataEditingAddr = DataPreviewAddr = GotoAddr; + DataEditingTakeFocus = true; + } + GotoAddr = (size_t)-1; + } + + // if (MouseHovered) + //{ + // ImGui::SameLine(); + // ImGui::Text("Hovered: %p", MouseHoveredAddr); + // } + } + + void DrawPreviewLine(const Sizes& s, void* mem_data_void, size_t mem_size, + size_t base_display_addr) { + IM_UNUSED(base_display_addr); + ImU8* mem_data = (ImU8*)mem_data_void; + ImGuiStyle& style = ImGui::GetStyle(); + ImGui::AlignTextToFramePadding(); + ImGui::Text("Preview as:"); + ImGui::SameLine(); + ImGui::SetNextItemWidth((s.GlyphWidth * 10.0f) + style.FramePadding.x * 2.0f + + style.ItemInnerSpacing.x); + + static const ImGuiDataType supported_data_types[] = { + ImGuiDataType_S8, ImGuiDataType_U8, ImGuiDataType_S16, ImGuiDataType_U16, + ImGuiDataType_S32, ImGuiDataType_U32, ImGuiDataType_S64, ImGuiDataType_U64, + ImGuiDataType_Float, ImGuiDataType_Double}; + if (ImGui::BeginCombo("##combo_type", DataTypeGetDesc(PreviewDataType), + ImGuiComboFlags_HeightLargest)) { + for (int n = 0; n < IM_ARRAYSIZE(supported_data_types); n++) { + ImGuiDataType data_type = supported_data_types[n]; + if (ImGui::Selectable(DataTypeGetDesc(data_type), PreviewDataType == data_type)) + PreviewDataType = data_type; + } + ImGui::EndCombo(); + } + ImGui::SameLine(); + ImGui::SetNextItemWidth((s.GlyphWidth * 6.0f) + style.FramePadding.x * 2.0f + + style.ItemInnerSpacing.x); + ImGui::Combo("##combo_endianness", &PreviewEndianness, "LE\0BE\0\0"); + + char buf[128] = ""; + float x = s.GlyphWidth * 6.0f; + bool has_value = DataPreviewAddr != (size_t)-1; + if (has_value) + DrawPreviewData(DataPreviewAddr, mem_data, mem_size, PreviewDataType, DataFormat_Dec, + buf, (size_t)IM_ARRAYSIZE(buf)); + ImGui::Text("Dec"); + ImGui::SameLine(x); + ImGui::TextUnformatted(has_value ? buf : "N/A"); + if (has_value) + DrawPreviewData(DataPreviewAddr, mem_data, mem_size, PreviewDataType, DataFormat_Hex, + buf, (size_t)IM_ARRAYSIZE(buf)); + ImGui::Text("Hex"); + ImGui::SameLine(x); + ImGui::TextUnformatted(has_value ? buf : "N/A"); + if (has_value) + DrawPreviewData(DataPreviewAddr, mem_data, mem_size, PreviewDataType, DataFormat_Bin, + buf, (size_t)IM_ARRAYSIZE(buf)); + buf[IM_ARRAYSIZE(buf) - 1] = 0; + ImGui::Text("Bin"); + ImGui::SameLine(x); + ImGui::TextUnformatted(has_value ? buf : "N/A"); + } + + // Utilities for Data Preview (since we don't access imgui_internal.h) + // FIXME: This technically depends on ImGuiDataType order. + const char* DataTypeGetDesc(ImGuiDataType data_type) const { + const char* descs[] = {"Int8", "Uint8", "Int16", "Uint16", "Int32", + "Uint32", "Int64", "Uint64", "Float", "Double"}; + IM_ASSERT(data_type >= 0 && data_type < IM_ARRAYSIZE(descs)); + return descs[data_type]; + } + + size_t DataTypeGetSize(ImGuiDataType data_type) const { + const size_t sizes[] = {1, 1, 2, 2, 4, 4, 8, 8, sizeof(float), sizeof(double)}; + IM_ASSERT(data_type >= 0 && data_type < IM_ARRAYSIZE(sizes)); + return sizes[data_type]; + } + + const char* DataFormatGetDesc(DataFormat data_format) const { + const char* descs[] = {"Bin", "Dec", "Hex"}; + IM_ASSERT(data_format >= 0 && data_format < DataFormat_COUNT); + return descs[data_format]; + } + + bool IsBigEndian() const { + uint16_t x = 1; + char c[2]; + memcpy(c, &x, 2); + return c[0] != 0; + } + + static void* EndiannessCopyBigEndian(void* _dst, void* _src, size_t s, int is_little_endian) { + if (is_little_endian) { + uint8_t* dst = (uint8_t*)_dst; + uint8_t* src = (uint8_t*)_src + s - 1; + for (int i = 0, n = (int)s; i < n; ++i) + memcpy(dst++, src--, 1); + return _dst; + } else { + return memcpy(_dst, _src, s); + } + } + + static void* EndiannessCopyLittleEndian(void* _dst, void* _src, size_t s, + int is_little_endian) { + if (is_little_endian) { + return memcpy(_dst, _src, s); + } else { + uint8_t* dst = (uint8_t*)_dst; + uint8_t* src = (uint8_t*)_src + s - 1; + for (int i = 0, n = (int)s; i < n; ++i) + memcpy(dst++, src--, 1); + return _dst; + } + } + + void* EndiannessCopy(void* dst, void* src, size_t size) const { + static void* (*fp)(void*, void*, size_t, int) = nullptr; + if (fp == nullptr) + fp = IsBigEndian() ? EndiannessCopyBigEndian : EndiannessCopyLittleEndian; + return fp(dst, src, size, PreviewEndianness); + } + + const char* FormatBinary(const uint8_t* buf, int width) const { + IM_ASSERT(width <= 64); + size_t out_n = 0; + static char out_buf[64 + 8 + 1]; + int n = width / 8; + for (int j = n - 1; j >= 0; --j) { + for (int i = 0; i < 8; ++i) + out_buf[out_n++] = (buf[j] & (1 << (7 - i))) ? '1' : '0'; + out_buf[out_n++] = ' '; + } + IM_ASSERT(out_n < IM_ARRAYSIZE(out_buf)); + out_buf[out_n] = 0; + return out_buf; + } + + // [Internal] + void DrawPreviewData(size_t addr, const ImU8* mem_data, size_t mem_size, + ImGuiDataType data_type, DataFormat data_format, char* out_buf, + size_t out_buf_size) const { + uint8_t buf[8]; + size_t elem_size = DataTypeGetSize(data_type); + size_t size = addr + elem_size > mem_size ? mem_size - addr : elem_size; + if (ReadFn) + for (int i = 0, n = (int)size; i < n; ++i) + buf[i] = ReadFn(mem_data, addr + i, UserData); + else + memcpy(buf, mem_data + addr, size); + + if (data_format == DataFormat_Bin) { + uint8_t binbuf[8]; + EndiannessCopy(binbuf, buf, size); + ImSnprintf(out_buf, out_buf_size, "%s", FormatBinary(binbuf, (int)size * 8)); + return; + } + + out_buf[0] = 0; + switch (data_type) { + case ImGuiDataType_S8: { + int8_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%hhd", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%02x", data & 0xFF); + return; + } + break; + } + case ImGuiDataType_U8: { + uint8_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%hhu", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%02x", data & 0XFF); + return; + } + break; + } + case ImGuiDataType_S16: { + int16_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%hd", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%04x", data & 0xFFFF); + return; + } + break; + } + case ImGuiDataType_U16: { + uint16_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%hu", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%04x", data & 0xFFFF); + return; + } + break; + } + case ImGuiDataType_S32: { + int32_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%d", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%08x", data); + return; + } + break; + } + case ImGuiDataType_U32: { + uint32_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%u", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%08x", data); + return; + } + break; + } + case ImGuiDataType_S64: { + int64_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%lld", (long long)data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%016llx", (long long)data); + return; + } + break; + } + case ImGuiDataType_U64: { + uint64_t data = 0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%llu", (long long)data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "0x%016llx", (long long)data); + return; + } + break; + } + case ImGuiDataType_Float: { + float data = 0.0f; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%f", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "%a", data); + return; + } + break; + } + case ImGuiDataType_Double: { + double data = 0.0; + EndiannessCopy(&data, buf, size); + if (data_format == DataFormat_Dec) { + ImSnprintf(out_buf, out_buf_size, "%f", data); + return; + } + if (data_format == DataFormat_Hex) { + ImSnprintf(out_buf, out_buf_size, "%a", data); + return; + } + break; + } + default: + case ImGuiDataType_COUNT: + break; + } // Switch + IM_ASSERT(0); // Shouldn't reach + } +}; + +#undef _PRISizeT +#undef ImSnprintf + +#ifdef _MSC_VER +#pragma warning(pop) +#endif \ No newline at end of file diff --git a/src/core/file_format/pkg.cpp b/src/core/file_format/pkg.cpp index f329e81a6..7d36b019a 100644 --- a/src/core/file_format/pkg.cpp +++ b/src/core/file_format/pkg.cpp @@ -44,7 +44,7 @@ PKG::PKG() = default; PKG::~PKG() = default; -bool PKG::Open(const std::filesystem::path& filepath) { +bool PKG::Open(const std::filesystem::path& filepath, std::string& failreason) { Common::FS::IOFile file(filepath, Common::FS::FileAccessMode::Read); if (!file.IsOpen()) { return false; @@ -70,7 +70,11 @@ bool PKG::Open(const std::filesystem::path& filepath) { u32 offset = pkgheader.pkg_table_entry_offset; u32 n_files = pkgheader.pkg_table_entry_count; - file.Seek(offset); + if (!file.Seek(offset)) { + failreason = "Failed to seek to PKG table entry offset"; + return false; + } + for (int i = 0; i < n_files; i++) { PKGEntry entry{}; file.Read(entry.id); @@ -85,7 +89,10 @@ bool PKG::Open(const std::filesystem::path& filepath) { const auto name = GetEntryNameByType(entry.id); if (name == "param.sfo") { sfo.clear(); - file.Seek(entry.offset); + if (!file.Seek(entry.offset)) { + failreason = "Failed to seek to param.sfo offset"; + return false; + } sfo.resize(entry.size); file.ReadRaw(sfo.data(), entry.size); } @@ -127,7 +134,11 @@ bool PKG::Extract(const std::filesystem::path& filepath, const std::filesystem:: std::array, 7> key1; std::array imgkeydata; - file.Seek(offset); + if (!file.Seek(offset)) { + failreason = "Failed to seek to PKG table entry offset"; + return false; + } + for (int i = 0; i < n_files; i++) { PKGEntry entry{}; file.Read(entry.id); @@ -149,7 +160,10 @@ bool PKG::Extract(const std::filesystem::path& filepath, const std::filesystem:: // Just print with id Common::FS::IOFile out(extract_path / "sce_sys" / std::to_string(entry.id), Common::FS::FileAccessMode::Write); - file.Seek(entry.offset); + if (!file.Seek(entry.offset)) { + failreason = "Failed to seek to PKG entry offset"; + return false; + } std::vector data; data.resize(entry.size); @@ -195,7 +209,10 @@ bool PKG::Extract(const std::filesystem::path& filepath, const std::filesystem:: } Common::FS::IOFile out(extract_path / "sce_sys" / name, Common::FS::FileAccessMode::Write); - file.Seek(entry.offset); + if (!file.Seek(entry.offset)) { + failreason = "Failed to seek to PKG entry offset"; + return false; + } std::vector data; data.resize(entry.size); @@ -207,7 +224,10 @@ bool PKG::Extract(const std::filesystem::path& filepath, const std::filesystem:: if (entry.id == 0x400 || entry.id == 0x401 || entry.id == 0x402 || entry.id == 0x403) { // somehow 0x401 is not decrypting decNp.resize(entry.size); - file.Seek(entry.offset); + if (!file.Seek(entry.offset)) { + failreason = "Failed to seek to PKG entry offset"; + return false; + } std::vector data; data.resize(entry.size); @@ -229,15 +249,12 @@ bool PKG::Extract(const std::filesystem::path& filepath, const std::filesystem:: file.Seek(currentPos); } - // Extract trophy files - if (!trp.Extract(extract_path)) { - // Do nothing some pkg come with no trp file. - // return false; - } - // Read the seed std::array seed; - file.Seek(pkgheader.pfs_image_offset + 0x370); + if (!file.Seek(pkgheader.pfs_image_offset + 0x370)) { + failreason = "Failed to seek to PFS image offset"; + return false; + } file.Read(seed); // Get data and tweak keys. diff --git a/src/core/file_format/pkg.h b/src/core/file_format/pkg.h index d30d50b44..a488a2df8 100644 --- a/src/core/file_format/pkg.h +++ b/src/core/file_format/pkg.h @@ -103,7 +103,7 @@ public: PKG(); ~PKG(); - bool Open(const std::filesystem::path& filepath); + bool Open(const std::filesystem::path& filepath, std::string& failreason); void ExtractFiles(const int index); bool Extract(const std::filesystem::path& filepath, const std::filesystem::path& extract, std::string& failreason); diff --git a/src/core/file_format/trp.cpp b/src/core/file_format/trp.cpp index 724f90782..2ca88c778 100644 --- a/src/core/file_format/trp.cpp +++ b/src/core/file_format/trp.cpp @@ -1,6 +1,7 @@ // SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later +#include "common/logging/log.h" #include "common/path_util.h" #include "trp.h" @@ -11,9 +12,13 @@ void TRP::GetNPcommID(const std::filesystem::path& trophyPath, int index) { std::filesystem::path trpPath = trophyPath / "sce_sys/npbind.dat"; Common::FS::IOFile npbindFile(trpPath, Common::FS::FileAccessMode::Read); if (!npbindFile.IsOpen()) { + LOG_CRITICAL(Common_Filesystem, "Failed to open npbind.dat file"); + return; + } + if (!npbindFile.Seek(0x84 + (index * 0x180))) { + LOG_CRITICAL(Common_Filesystem, "Failed to seek to NPbind offset"); return; } - npbindFile.Seek(0x84 + (index * 0x180)); npbindFile.ReadRaw(np_comm_id.data(), 12); std::fill(np_comm_id.begin() + 12, np_comm_id.end(), 0); // fill with 0, we need 16 bytes. } @@ -28,10 +33,10 @@ static void removePadding(std::vector& vec) { } } -bool TRP::Extract(const std::filesystem::path& trophyPath) { - std::filesystem::path title = trophyPath.filename(); +bool TRP::Extract(const std::filesystem::path& trophyPath, const std::string titleId) { std::filesystem::path gameSysDir = trophyPath / "sce_sys/trophy/"; if (!std::filesystem::exists(gameSysDir)) { + LOG_CRITICAL(Common_Filesystem, "Game sce_sys directory doesn't exist"); return false; } for (int index = 0; const auto& it : std::filesystem::directory_iterator(gameSysDir)) { @@ -40,42 +45,57 @@ bool TRP::Extract(const std::filesystem::path& trophyPath) { Common::FS::IOFile file(it.path(), Common::FS::FileAccessMode::Read); if (!file.IsOpen()) { + LOG_CRITICAL(Common_Filesystem, "Unable to open trophy file for read"); return false; } TrpHeader header; file.Read(header); - if (header.magic != 0xDCA24D00) + if (header.magic != 0xDCA24D00) { + LOG_CRITICAL(Common_Filesystem, "Wrong trophy magic number"); return false; + } s64 seekPos = sizeof(TrpHeader); std::filesystem::path trpFilesPath( - Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / title / "TrophyFiles" / - it.path().stem()); + Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / titleId / + "TrophyFiles" / it.path().stem()); std::filesystem::create_directories(trpFilesPath / "Icons"); std::filesystem::create_directory(trpFilesPath / "Xml"); for (int i = 0; i < header.entry_num; i++) { - file.Seek(seekPos); + if (!file.Seek(seekPos)) { + LOG_CRITICAL(Common_Filesystem, "Failed to seek to TRP entry offset"); + return false; + } seekPos += (s64)header.entry_size; TrpEntry entry; file.Read(entry); std::string_view name(entry.entry_name); if (entry.flag == 0 && name.find("TROP") != std::string::npos) { // PNG - file.Seek(entry.entry_pos); + if (!file.Seek(entry.entry_pos)) { + LOG_CRITICAL(Common_Filesystem, "Failed to seek to TRP entry offset"); + return false; + } std::vector icon(entry.entry_len); file.Read(icon); Common::FS::IOFile::WriteBytes(trpFilesPath / "Icons" / name, icon); } if (entry.flag == 3 && np_comm_id[0] == 'N' && np_comm_id[1] == 'P') { // ESFM, encrypted. - file.Seek(entry.entry_pos); + if (!file.Seek(entry.entry_pos)) { + LOG_CRITICAL(Common_Filesystem, "Failed to seek to TRP entry offset"); + return false; + } file.Read(esfmIv); // get iv key. // Skip the first 16 bytes which are the iv key on every entry as we want a // clean xml file. std::vector ESFM(entry.entry_len - iv_len); std::vector XML(entry.entry_len - iv_len); - file.Seek(entry.entry_pos + iv_len); + if (!file.Seek(entry.entry_pos + iv_len)) { + LOG_CRITICAL(Common_Filesystem, "Failed to seek to TRP entry + iv offset"); + return false; + } file.Read(ESFM); crypto.decryptEFSM(np_comm_id, esfmIv, ESFM, XML); // decrypt removePadding(XML); @@ -83,7 +103,14 @@ bool TRP::Extract(const std::filesystem::path& trophyPath) { size_t pos = xml_name.find("ESFM"); if (pos != std::string::npos) xml_name.replace(pos, xml_name.length(), "XML"); - Common::FS::IOFile::WriteBytes(trpFilesPath / "Xml" / xml_name, XML); + std::filesystem::path path = trpFilesPath / "Xml" / xml_name; + size_t written = Common::FS::IOFile::WriteBytes(path, XML); + if (written != XML.size()) { + LOG_CRITICAL( + Common_Filesystem, + "Trophy XML {} write failed, wanted to write {} bytes, wrote {}", + fmt::UTF(path.u8string()), XML.size(), written); + } } } } diff --git a/src/core/file_format/trp.h b/src/core/file_format/trp.h index 56f490026..aec129f0e 100644 --- a/src/core/file_format/trp.h +++ b/src/core/file_format/trp.h @@ -33,7 +33,7 @@ class TRP { public: TRP(); ~TRP(); - bool Extract(const std::filesystem::path& trophyPath); + bool Extract(const std::filesystem::path& trophyPath, const std::string titleId); void GetNPcommID(const std::filesystem::path& trophyPath, int index); private: diff --git a/src/core/libraries/app_content/app_content.cpp b/src/core/libraries/app_content/app_content.cpp index 754343eef..f912639eb 100644 --- a/src/core/libraries/app_content/app_content.cpp +++ b/src/core/libraries/app_content/app_content.cpp @@ -5,6 +5,7 @@ #include "app_content.h" #include "common/assert.h" +#include "common/config.h" #include "common/io_file.h" #include "common/logging/log.h" #include "common/path_util.h" @@ -59,8 +60,7 @@ int PS4_SYSV_ABI sceAppContentAddcontMount(u32 service_label, OrbisAppContentMountPoint* mount_point) { LOG_INFO(Lib_AppContent, "called"); - const auto& mount_dir = Common::FS::GetUserPath(Common::FS::PathType::AddonsDir) / title_id / - entitlement_label->data; + const auto& mount_dir = Config::getAddonInstallDir() / title_id / entitlement_label->data; auto* mnt = Common::Singleton::Instance(); for (int i = 0; i < addcont_count; i++) { @@ -246,7 +246,7 @@ int PS4_SYSV_ABI sceAppContentInitialize(const OrbisAppContentInitParam* initPar LOG_ERROR(Lib_AppContent, "(DUMMY) called"); auto* param_sfo = Common::Singleton::Instance(); - const auto addons_dir = Common::FS::GetUserPath(Common::FS::PathType::AddonsDir); + const auto addons_dir = Config::getAddonInstallDir(); if (const auto value = param_sfo->GetString("TITLE_ID"); value.has_value()) { title_id = *value; } else { diff --git a/src/core/libraries/audio/audioout.cpp b/src/core/libraries/audio/audioout.cpp index 54db4c673..778d777c2 100644 --- a/src/core/libraries/audio/audioout.cpp +++ b/src/core/libraries/audio/audioout.cpp @@ -176,11 +176,15 @@ int PS4_SYSV_ABI sceAudioOutGetLastOutputTime() { } int PS4_SYSV_ABI sceAudioOutGetPortState(s32 handle, OrbisAudioOutPortState* state) { + if (handle < 1 || handle > SCE_AUDIO_OUT_NUM_PORTS) { + return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; + } + int type = 0; int channels_num = 0; - if (!audio->AudioOutGetStatus(handle, &type, &channels_num)) { - return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; + if (const auto err = audio->AudioOutGetStatus(handle, &type, &channels_num); err != ORBIS_OK) { + return err; } state->rerouteCounter = 0; @@ -310,12 +314,7 @@ s32 PS4_SYSV_ABI sceAudioOutOpen(UserService::OrbisUserServiceUserId user_id, LOG_ERROR(Lib_AudioOut, "Invalid format attribute"); return ORBIS_AUDIO_OUT_ERROR_INVALID_FORMAT; } - int result = audio->AudioOutOpen(port_type, length, sample_rate, format); - if (result == -1) { - LOG_ERROR(Lib_AudioOut, "Audio ports are full"); - return ORBIS_AUDIO_OUT_ERROR_PORT_FULL; - } - return result; + return audio->AudioOutOpen(port_type, length, sample_rate, format); } int PS4_SYSV_ABI sceAudioOutOpenEx() { @@ -324,12 +323,19 @@ int PS4_SYSV_ABI sceAudioOutOpenEx() { } s32 PS4_SYSV_ABI sceAudioOutOutput(s32 handle, const void* ptr) { + if (handle < 1 || handle > SCE_AUDIO_OUT_NUM_PORTS) { + return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; + } + if (ptr == nullptr) { + // Nothing to output + return ORBIS_OK; + } return audio->AudioOutOutput(handle, ptr); } int PS4_SYSV_ABI sceAudioOutOutputs(OrbisAudioOutOutputParam* param, u32 num) { for (u32 i = 0; i < num; i++) { - if (auto err = audio->AudioOutOutput(param[i].handle, param[i].ptr); err != 0) + if (const auto err = sceAudioOutOutput(param[i].handle, param[i].ptr); err != 0) return err; } return ORBIS_OK; @@ -426,10 +432,10 @@ int PS4_SYSV_ABI sceAudioOutSetUsbVolume() { } s32 PS4_SYSV_ABI sceAudioOutSetVolume(s32 handle, s32 flag, s32* vol) { - if (!audio->AudioOutSetVolume(handle, flag, vol)) { + if (handle < 1 || handle > SCE_AUDIO_OUT_NUM_PORTS) { return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT; } - return ORBIS_OK; + return audio->AudioOutSetVolume(handle, flag, vol); } int PS4_SYSV_ABI sceAudioOutSetVolumeDown() { diff --git a/src/core/libraries/audio/audioout.h b/src/core/libraries/audio/audioout.h index d29eea7c3..95cfc1707 100644 --- a/src/core/libraries/audio/audioout.h +++ b/src/core/libraries/audio/audioout.h @@ -11,6 +11,10 @@ namespace Libraries::AudioOut { constexpr int SCE_AUDIO_OUT_VOLUME_0DB = 32768; // max volume value +// main up to 8 ports, BGM 1 port, voice up to 4 ports, +// personal up to 4 ports, padspk up to 5 ports, aux 1 port +constexpr int SCE_AUDIO_OUT_NUM_PORTS = 22; + enum OrbisAudioOutPort { ORBIS_AUDIO_OUT_PORT_TYPE_MAIN = 0, ORBIS_AUDIO_OUT_PORT_TYPE_BGM = 1, diff --git a/src/core/libraries/avplayer/avplayer_state.cpp b/src/core/libraries/avplayer/avplayer_state.cpp index c4d666fce..b0e498479 100644 --- a/src/core/libraries/avplayer/avplayer_state.cpp +++ b/src/core/libraries/avplayer/avplayer_state.cpp @@ -91,7 +91,7 @@ void PS4_SYSV_ABI AvPlayerState::AutoPlayEventCallback(void* opaque, SceAvPlayer const auto callback = self->m_event_replacement.event_callback; const auto ptr = self->m_event_replacement.object_ptr; if (callback != nullptr) { - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); linker->ExecuteGuest(callback, ptr, event_id, 0, event_data); } } @@ -367,7 +367,7 @@ void AvPlayerState::EmitEvent(SceAvPlayerEvents event_id, void* event_data) { const auto callback = m_init_data.event_replacement.event_callback; if (callback) { const auto ptr = m_init_data.event_replacement.object_ptr; - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); linker->ExecuteGuest(callback, ptr, event_id, 0, event_data); } } diff --git a/src/core/libraries/gnmdriver/gnmdriver.cpp b/src/core/libraries/gnmdriver/gnmdriver.cpp index fd4c261e9..7e2153efa 100644 --- a/src/core/libraries/gnmdriver/gnmdriver.cpp +++ b/src/core/libraries/gnmdriver/gnmdriver.cpp @@ -11,6 +11,7 @@ #include "common/path_util.h" #include "common/slot_vector.h" #include "core/address_space.h" +#include "core/debug_state.h" #include "core/libraries/error_codes.h" #include "core/libraries/kernel/libkernel.h" #include "core/libraries/libs.h" @@ -320,20 +321,6 @@ static void WaitGpuIdle() { cv_lock.wait(lock, [] { return submission_lock == 0; }); } -static void DumpCommandList(std::span cmd_list, const std::string& postfix) { - using namespace Common::FS; - const auto dump_dir = GetUserPath(PathType::PM4Dir); - if (!std::filesystem::exists(dump_dir)) { - std::filesystem::create_directories(dump_dir); - } - if (cmd_list.empty()) { - return; - } - const auto filename = fmt::format("{:08}_{}", frames_submitted, postfix); - const auto file = IOFile{dump_dir / filename, FileAccessMode::Write}; - file.WriteSpan(cmd_list); -} - // Write a special ending NOP packet with N DWs data block template static inline u32* WriteTrailingNop(u32* cmdbuf) { @@ -507,16 +494,18 @@ void PS4_SYSV_ABI sceGnmDingDong(u32 gnm_vqid, u32 next_offs_dw) { WaitGpuIdle(); - /* Suspend logic goes here */ + if (DebugState.ShouldPauseInSubmit()) { + DebugState.PauseGuestThreads(); + } auto vqid = gnm_vqid - 1; auto& asc_queue = asc_queues[{vqid}]; const auto* acb_ptr = reinterpret_cast(asc_queue.map_addr + *asc_queue.read_addr); const auto acb_size = next_offs_dw ? (next_offs_dw << 2u) - *asc_queue.read_addr : (asc_queue.ring_size_dw << 2u) - *asc_queue.read_addr; - const std::span acb_span{acb_ptr, acb_size >> 2u}; + const std::span acb_span{acb_ptr, acb_size >> 2u}; - if (Config::dumpPM4()) { + if (DebugState.DumpingCurrentFrame()) { static auto last_frame_num = -1LL; static u32 seq_num{}; if (last_frame_num == frames_submitted) { @@ -536,8 +525,14 @@ void PS4_SYSV_ABI sceGnmDingDong(u32 gnm_vqid, u32 next_offs_dw) { acb = {indirect_buffer->Address(), indirect_buffer->ib_size}; } - // File name format is: __ - DumpCommandList(acb, fmt::format("acb_{}_{}", gnm_vqid, seq_num)); + using namespace DebugStateType; + + DebugState.PushQueueDump({ + .type = QueueType::acb, + .submit_num = seq_num, + .num2 = gnm_vqid, + .data = {acb.begin(), acb.end()}, + }); } liverpool->SubmitAsc(vqid, acb_span); @@ -2108,7 +2103,9 @@ s32 PS4_SYSV_ABI sceGnmSubmitCommandBuffers(u32 count, const u32* dcb_gpu_addrs[ WaitGpuIdle(); - /* Suspend logic goes here */ + if (DebugState.ShouldPauseInSubmit()) { + DebugState.PauseGuestThreads(); + } if (send_init_packet) { if (sdk_version <= 0x1ffffffu) { @@ -2128,10 +2125,10 @@ s32 PS4_SYSV_ABI sceGnmSubmitCommandBuffers(u32 count, const u32* dcb_gpu_addrs[ const auto dcb_size_dw = dcb_sizes_in_bytes[cbpair] >> 2; const auto ccb_size_dw = ccb_size_in_bytes >> 2; - const auto& dcb_span = std::span{dcb_gpu_addrs[cbpair], dcb_size_dw}; - const auto& ccb_span = std::span{ccb, ccb_size_dw}; + const auto& dcb_span = std::span{dcb_gpu_addrs[cbpair], dcb_size_dw}; + const auto& ccb_span = std::span{ccb, ccb_size_dw}; - if (Config::dumpPM4()) { + if (DebugState.DumpingCurrentFrame()) { static auto last_frame_num = -1LL; static u32 seq_num{}; if (last_frame_num == frames_submitted && cbpair == 0) { @@ -2141,9 +2138,20 @@ s32 PS4_SYSV_ABI sceGnmSubmitCommandBuffers(u32 count, const u32* dcb_gpu_addrs[ seq_num = 0u; } - // File name format is: __ - DumpCommandList(dcb_span, fmt::format("dcb_{}_{}", seq_num, cbpair)); - DumpCommandList(ccb_span, fmt::format("ccb_{}_{}", seq_num, cbpair)); + using DebugStateType::QueueType; + + DebugState.PushQueueDump({ + .type = QueueType::dcb, + .submit_num = seq_num, + .num2 = cbpair, + .data = {dcb_span.begin(), dcb_span.end()}, + }); + DebugState.PushQueueDump({ + .type = QueueType::ccb, + .submit_num = seq_num, + .num2 = cbpair, + .data = {ccb_span.begin(), ccb_span.end()}, + }); } liverpool->SubmitGfx(dcb_span, ccb_span); @@ -2166,6 +2174,7 @@ int PS4_SYSV_ABI sceGnmSubmitDone() { liverpool->SubmitDone(); send_init_packet = true; ++frames_submitted; + DebugState.IncGnmFrameNum(); return ORBIS_OK; } diff --git a/src/core/libraries/kernel/file_system.cpp b/src/core/libraries/kernel/file_system.cpp index 45ebb4be8..e2093ce21 100644 --- a/src/core/libraries/kernel/file_system.cpp +++ b/src/core/libraries/kernel/file_system.cpp @@ -229,7 +229,10 @@ s64 PS4_SYSV_ABI sceKernelLseek(int d, s64 offset, int whence) { } std::scoped_lock lk{file->m_mutex}; - file->f.Seek(offset, origin); + if (!file->f.Seek(offset, origin)) { + LOG_CRITICAL(Kernel_Fs, "sceKernelLseek: failed to seek"); + return SCE_KERNEL_ERROR_EINVAL; + } return file->f.Tell(); } @@ -290,7 +293,8 @@ int PS4_SYSV_ABI sceKernelMkdir(const char* path, u16 mode) { } // CUSA02456: path = /aotl after sceSaveDataMount(mode = 1) - if (dir_name.empty() || !std::filesystem::create_directory(dir_name)) { + std::error_code ec; + if (dir_name.empty() || !std::filesystem::create_directory(dir_name, ec)) { return SCE_KERNEL_ERROR_EIO; } @@ -310,6 +314,58 @@ int PS4_SYSV_ABI posix_mkdir(const char* path, u16 mode) { return result; } +int PS4_SYSV_ABI sceKernelRmdir(const char* path) { + auto* mnt = Common::Singleton::Instance(); + bool ro = false; + + const std::filesystem::path dir_name = mnt->GetHostPath(path, &ro); + + if (dir_name.empty()) { + LOG_INFO(Kernel_Fs, "Failed to remove directory: {}, permission denied", + fmt::UTF(dir_name.u8string())); + return SCE_KERNEL_ERROR_EACCES; + } + + if (ro) { + LOG_INFO(Kernel_Fs, "Failed to remove directory: {}, directory is read only", + fmt::UTF(dir_name.u8string())); + return SCE_KERNEL_ERROR_EROFS; + } + + if (!std::filesystem::is_directory(dir_name)) { + LOG_INFO(Kernel_Fs, "Failed to remove directory: {}, path is not a directory", + fmt::UTF(dir_name.u8string())); + return ORBIS_KERNEL_ERROR_ENOTDIR; + } + + if (!std::filesystem::exists(dir_name)) { + LOG_INFO(Kernel_Fs, "Failed to remove directory: {}, no such file or directory", + fmt::UTF(dir_name.u8string())); + return ORBIS_KERNEL_ERROR_ENOENT; + } + + std::error_code ec; + int result = std::filesystem::remove_all(dir_name, ec); + + if (!ec) { + LOG_DEBUG(Kernel_Fs, "Removed directory: {}", fmt::UTF(dir_name.u8string())); + return ORBIS_OK; + } + LOG_ERROR(Kernel_Fs, "Failed to remove directory: {}, error_code={}", + fmt::UTF(dir_name.u8string()), ec.message()); + return ErrnoToSceKernelError(ec.value()); +} + +int PS4_SYSV_ABI posix_rmdir(const char* path) { + int result = sceKernelRmdir(path); + if (result < 0) { + LOG_ERROR(Kernel_Pthread, "posix_rmdir: error = {}", result); + ErrSceToPosix(result); + return -1; + } + return result; +} + int PS4_SYSV_ABI sceKernelStat(const char* path, OrbisKernelStat* sb) { LOG_INFO(Kernel_Fs, "(PARTIAL) path = {}", path); auto* mnt = Common::Singleton::Instance(); @@ -379,7 +435,10 @@ s64 PS4_SYSV_ABI sceKernelPread(int d, void* buf, size_t nbytes, s64 offset) { SCOPE_EXIT { file->f.Seek(pos); }; - file->f.Seek(offset); + if (!file->f.Seek(offset)) { + LOG_CRITICAL(Kernel_Fs, "sceKernelPread: failed to seek"); + return ORBIS_KERNEL_ERROR_EINVAL; + } return file->f.ReadRaw(buf, nbytes); } @@ -513,7 +572,10 @@ s64 PS4_SYSV_ABI sceKernelPwrite(int d, void* buf, size_t nbytes, s64 offset) { SCOPE_EXIT { file->f.Seek(pos); }; - file->f.Seek(offset); + if (!file->f.Seek(offset)) { + LOG_CRITICAL(Kernel_Fs, "sceKernelPwrite: failed to seek"); + return ORBIS_KERNEL_ERROR_EINVAL; + } return file->f.WriteRaw(buf, nbytes); } @@ -564,13 +626,19 @@ void fileSystemSymbolsRegister(Core::Loader::SymbolsResolver* sym) { LIB_FUNCTION("AqBioC2vF3I", "libScePosix", 1, "libkernel", 1, 1, posix_read); LIB_FUNCTION("1-LFLmRFxxM", "libkernel", 1, "libkernel", 1, 1, sceKernelMkdir); LIB_FUNCTION("JGMio+21L4c", "libScePosix", 1, "libkernel", 1, 1, posix_mkdir); + LIB_FUNCTION("JGMio+21L4c", "libkernel", 1, "libkernel", 1, 1, posix_mkdir); + LIB_FUNCTION("naInUjYt3so", "libkernel", 1, "libkernel", 1, 1, sceKernelRmdir); + LIB_FUNCTION("c7ZnT7V1B98", "libScePosix", 1, "libkernel", 1, 1, posix_rmdir); + LIB_FUNCTION("c7ZnT7V1B98", "libkernel", 1, "libkernel", 1, 1, posix_rmdir); LIB_FUNCTION("eV9wAD2riIA", "libkernel", 1, "libkernel", 1, 1, sceKernelStat); LIB_FUNCTION("kBwCPsYX-m4", "libkernel", 1, "libkernel", 1, 1, sceKernelFStat); LIB_FUNCTION("mqQMh1zPPT8", "libScePosix", 1, "libkernel", 1, 1, posix_fstat); + LIB_FUNCTION("mqQMh1zPPT8", "libkernel", 1, "libkernel", 1, 1, posix_fstat); LIB_FUNCTION("VW3TVZiM4-E", "libkernel", 1, "libkernel", 1, 1, sceKernelFtruncate); LIB_FUNCTION("52NcYU9+lEo", "libkernel", 1, "libkernel", 1, 1, sceKernelRename); LIB_FUNCTION("E6ao34wPw+U", "libScePosix", 1, "libkernel", 1, 1, posix_stat); + LIB_FUNCTION("E6ao34wPw+U", "libkernel", 1, "libkernel", 1, 1, posix_stat); LIB_FUNCTION("+r3rMFwItV4", "libkernel", 1, "libkernel", 1, 1, sceKernelPread); LIB_FUNCTION("uWyW3v98sU4", "libkernel", 1, "libkernel", 1, 1, sceKernelCheckReachability); LIB_FUNCTION("fTx66l5iWIA", "libkernel", 1, "libkernel", 1, 1, sceKernelFsync); diff --git a/src/core/libraries/kernel/libkernel.cpp b/src/core/libraries/kernel/libkernel.cpp index 65d3dde14..72f8f1d1d 100644 --- a/src/core/libraries/kernel/libkernel.cpp +++ b/src/core/libraries/kernel/libkernel.cpp @@ -56,7 +56,7 @@ void KernelSignalRequest() { } static void KernelServiceThread(std::stop_token stoken) { - Common::SetCurrentThreadName("Kernel_ServiceThread"); + Common::SetCurrentThreadName("shadPS4:Kernel_ServiceThread"); while (!stoken.stop_requested()) { HLE_TRACE; @@ -186,6 +186,16 @@ void* PS4_SYSV_ABI posix_mmap(void* addr, u64 len, int prot, int flags, int fd, return ptr; } +s32 PS4_SYSV_ABI sceKernelConfiguredFlexibleMemorySize(u64* sizeOut) { + if (sizeOut == nullptr) { + return ORBIS_KERNEL_ERROR_EINVAL; + } + + auto* memory = Core::Memory::Instance(); + *sizeOut = memory->GetTotalFlexibleSize(); + return ORBIS_OK; +} + static uint64_t g_mspace_atomic_id_mask = 0; static uint64_t g_mstate_table[64] = {0}; @@ -403,10 +413,12 @@ void LibKernel_Register(Core::Loader::SymbolsResolver* sym) { // obj LIB_OBJ("f7uOxY9mM1U", "libkernel", 1, "libkernel", 1, 1, &g_stack_chk_guard); + // misc LIB_FUNCTION("JGfTMBOdUJo", "libkernel", 1, "libkernel", 1, 1, sceKernelGetFsSandboxRandomWord); LIB_FUNCTION("XVL8So3QJUk", "libkernel", 1, "libkernel", 1, 1, posix_connect); LIB_FUNCTION("6xVpy0Fdq+I", "libkernel", 1, "libkernel", 1, 1, _sigprocmask); + // memory LIB_FUNCTION("OMDRKKAZ8I4", "libkernel", 1, "libkernel", 1, 1, sceKernelDebugRaiseException); LIB_FUNCTION("rTXw65xmLIA", "libkernel", 1, "libkernel", 1, 1, sceKernelAllocateDirectMemory); @@ -443,6 +455,14 @@ void LibKernel_Register(Core::Loader::SymbolsResolver* sym) { LIB_FUNCTION("2SKEx6bSq-4", "libkernel", 1, "libkernel", 1, 1, sceKernelBatchMap); LIB_FUNCTION("kBJzF8x4SyE", "libkernel", 1, "libkernel", 1, 1, sceKernelBatchMap2); LIB_FUNCTION("DGMG3JshrZU", "libkernel", 1, "libkernel", 1, 1, sceKernelSetVirtualRangeName); + LIB_FUNCTION("n1-v6FgU7MQ", "libkernel", 1, "libkernel", 1, 1, + sceKernelConfiguredFlexibleMemorySize); + + // Memory pool + LIB_FUNCTION("qCSfqDILlns", "libkernel", 1, "libkernel", 1, 1, sceKernelMemoryPoolExpand); + LIB_FUNCTION("pU-QydtGcGY", "libkernel", 1, "libkernel", 1, 1, sceKernelMemoryPoolReserve); + LIB_FUNCTION("Vzl66WmfLvk", "libkernel", 1, "libkernel", 1, 1, sceKernelMemoryPoolCommit); + LIB_FUNCTION("LXo1tpFqJGs", "libkernel", 1, "libkernel", 1, 1, sceKernelMemoryPoolDecommit); // equeue LIB_FUNCTION("D0OdFMjp46I", "libkernel", 1, "libkernel", 1, 1, sceKernelCreateEqueue); diff --git a/src/core/libraries/kernel/memory_management.cpp b/src/core/libraries/kernel/memory_management.cpp index 7853a77a4..5331f47f2 100644 --- a/src/core/libraries/kernel/memory_management.cpp +++ b/src/core/libraries/kernel/memory_management.cpp @@ -347,4 +347,102 @@ s32 PS4_SYSV_ABI sceKernelSetVirtualRangeName(const void* addr, size_t len, cons memory->NameVirtualRange(std::bit_cast(addr), len, name); return ORBIS_OK; } + +s32 PS4_SYSV_ABI sceKernelMemoryPoolExpand(u64 searchStart, u64 searchEnd, size_t len, + size_t alignment, u64* physAddrOut) { + if (searchStart < 0 || searchEnd <= searchStart) { + LOG_ERROR(Kernel_Vmm, "Provided address range is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + const bool is_in_range = searchEnd - searchStart >= len; + if (len <= 0 || !Common::Is64KBAligned(len) || !is_in_range) { + LOG_ERROR(Kernel_Vmm, "Provided address range is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (alignment != 0 && !Common::Is64KBAligned(alignment)) { + LOG_ERROR(Kernel_Vmm, "Alignment value is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (physAddrOut == nullptr) { + LOG_ERROR(Kernel_Vmm, "Result physical address pointer is null!"); + return SCE_KERNEL_ERROR_EINVAL; + } + + auto* memory = Core::Memory::Instance(); + PAddr phys_addr = memory->PoolExpand(searchStart, searchEnd, len, alignment); + *physAddrOut = static_cast(phys_addr); + + LOG_INFO(Kernel_Vmm, + "searchStart = {:#x}, searchEnd = {:#x}, len = {:#x}, alignment = {:#x}, physAddrOut " + "= {:#x}", + searchStart, searchEnd, len, alignment, phys_addr); + return ORBIS_OK; +} + +s32 PS4_SYSV_ABI sceKernelMemoryPoolReserve(void* addrIn, size_t len, size_t alignment, int flags, + void** addrOut) { + LOG_INFO(Kernel_Vmm, "addrIn = {}, len = {:#x}, alignment = {:#x}, flags = {:#x}", + fmt::ptr(addrIn), len, alignment, flags); + + if (addrIn == nullptr) { + LOG_ERROR(Kernel_Vmm, "Address is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (len == 0 || !Common::Is2MBAligned(len)) { + LOG_ERROR(Kernel_Vmm, "Map size is either zero or not 2MB aligned!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (alignment != 0) { + if ((!std::has_single_bit(alignment) && !Common::Is2MBAligned(alignment))) { + LOG_ERROR(Kernel_Vmm, "Alignment value is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + } + + auto* memory = Core::Memory::Instance(); + const VAddr in_addr = reinterpret_cast(addrIn); + const auto map_flags = static_cast(flags); + memory->PoolReserve(addrOut, in_addr, len, map_flags, alignment); + + return ORBIS_OK; +} + +s32 PS4_SYSV_ABI sceKernelMemoryPoolCommit(void* addr, size_t len, int type, int prot, int flags) { + if (addr == nullptr) { + LOG_ERROR(Kernel_Vmm, "Address is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (len == 0 || !Common::Is64KBAligned(len)) { + LOG_ERROR(Kernel_Vmm, "Map size is either zero or not 64KB aligned!"); + return SCE_KERNEL_ERROR_EINVAL; + } + + LOG_INFO(Kernel_Vmm, "addr = {}, len = {:#x}, type = {:#x}, prot = {:#x}, flags = {:#x}", + fmt::ptr(addr), len, type, prot, flags); + + const VAddr in_addr = reinterpret_cast(addr); + const auto mem_prot = static_cast(prot); + auto* memory = Core::Memory::Instance(); + return memory->PoolCommit(in_addr, len, mem_prot); +} + +s32 PS4_SYSV_ABI sceKernelMemoryPoolDecommit(void* addr, size_t len, int flags) { + if (addr == nullptr) { + LOG_ERROR(Kernel_Vmm, "Address is invalid!"); + return SCE_KERNEL_ERROR_EINVAL; + } + if (len == 0 || !Common::Is64KBAligned(len)) { + LOG_ERROR(Kernel_Vmm, "Map size is either zero or not 64KB aligned!"); + return SCE_KERNEL_ERROR_EINVAL; + } + + LOG_INFO(Kernel_Vmm, "addr = {}, len = {:#x}, flags = {:#x}", fmt::ptr(addr), len, flags); + + const VAddr pool_addr = reinterpret_cast(addr); + auto* memory = Core::Memory::Instance(); + memory->PoolDecommit(pool_addr, len); + + return ORBIS_OK; +} + } // namespace Libraries::Kernel diff --git a/src/core/libraries/kernel/memory_management.h b/src/core/libraries/kernel/memory_management.h index 205b2274f..38898aa57 100644 --- a/src/core/libraries/kernel/memory_management.h +++ b/src/core/libraries/kernel/memory_management.h @@ -114,4 +114,11 @@ s32 PS4_SYSV_ABI sceKernelBatchMap2(OrbisKernelBatchMapEntry* entries, int numEn s32 PS4_SYSV_ABI sceKernelSetVirtualRangeName(const void* addr, size_t len, const char* name); +s32 PS4_SYSV_ABI sceKernelMemoryPoolExpand(u64 searchStart, u64 searchEnd, size_t len, + size_t alignment, u64* physAddrOut); +s32 PS4_SYSV_ABI sceKernelMemoryPoolReserve(void* addrIn, size_t len, size_t alignment, int flags, + void** addrOut); +s32 PS4_SYSV_ABI sceKernelMemoryPoolCommit(void* addr, size_t len, int type, int prot, int flags); +s32 PS4_SYSV_ABI sceKernelMemoryPoolDecommit(void* addr, size_t len, int flags); + } // namespace Libraries::Kernel diff --git a/src/core/libraries/kernel/thread_management.cpp b/src/core/libraries/kernel/thread_management.cpp index 455ac24b1..aa53d7570 100644 --- a/src/core/libraries/kernel/thread_management.cpp +++ b/src/core/libraries/kernel/thread_management.cpp @@ -11,6 +11,7 @@ #include "common/logging/log.h" #include "common/singleton.h" #include "common/thread.h" +#include "core/debug_state.h" #include "core/libraries/error_codes.h" #include "core/libraries/kernel/libkernel.h" #include "core/libraries/kernel/thread_management.h" @@ -414,6 +415,7 @@ ScePthreadMutex* createMutex(ScePthreadMutex* addr) { if (addr == nullptr || *addr != nullptr) { return addr; } + const VAddr vaddr = reinterpret_cast(addr); std::string name = fmt::format("mutex{:#x}", vaddr); scePthreadMutexInit(addr, nullptr, name.c_str()); @@ -515,9 +517,12 @@ int PS4_SYSV_ABI scePthreadMutexattrSettype(ScePthreadMutexattr* attr, int type) ptype = PTHREAD_MUTEX_RECURSIVE; break; case ORBIS_PTHREAD_MUTEX_NORMAL: - case ORBIS_PTHREAD_MUTEX_ADAPTIVE: ptype = PTHREAD_MUTEX_NORMAL; break; + case ORBIS_PTHREAD_MUTEX_ADAPTIVE: + LOG_ERROR(Kernel_Pthread, "Unimplemented adaptive mutex"); + ptype = PTHREAD_MUTEX_ERRORCHECK; + break; default: return SCE_KERNEL_ERROR_EINVAL; } @@ -984,16 +989,18 @@ static void cleanup_thread(void* arg) { } Core::SetTcbBase(nullptr); thread->is_almost_done = true; + DebugState.RemoveCurrentThreadFromGuestList(); } static void* run_thread(void* arg) { auto* thread = static_cast(arg); Common::SetCurrentThreadName(thread->name.c_str()); - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); void* ret = nullptr; g_pthread_self = thread; pthread_cleanup_push(cleanup_thread, thread); thread->is_started = true; + DebugState.AddCurrentThreadToGuestList(); ret = linker->ExecuteGuest(thread->entry, thread->arg); pthread_cleanup_pop(1); return ret; @@ -1620,6 +1627,10 @@ void pthreadSymbolsRegister(Core::Loader::SymbolsResolver* sym) { LIB_FUNCTION("upoVrzMHFeE", "libkernel", 1, "libkernel", 1, 1, scePthreadMutexTrylock); LIB_FUNCTION("IafI2PxcPnQ", "libkernel", 1, "libkernel", 1, 1, scePthreadMutexTimedlock); + // scePthreadMutexInitForInternalLibc, scePthreadMutexattrInitForInternalLibc + LIB_FUNCTION("qH1gXoq71RY", "libkernel", 1, "libkernel", 1, 1, scePthreadMutexInit); + LIB_FUNCTION("n2MMpvU8igI", "libkernel", 1, "libkernel", 1, 1, scePthreadMutexattrInit); + // cond calls LIB_FUNCTION("2Tb92quprl0", "libkernel", 1, "libkernel", 1, 1, scePthreadCondInit); LIB_FUNCTION("m5-2bsNfv7s", "libkernel", 1, "libkernel", 1, 1, scePthreadCondattrInit); diff --git a/src/core/libraries/kernel/time_management.cpp b/src/core/libraries/kernel/time_management.cpp index 5e5e0ef27..5fa26b789 100644 --- a/src/core/libraries/kernel/time_management.cpp +++ b/src/core/libraries/kernel/time_management.cpp @@ -247,6 +247,17 @@ int PS4_SYSV_ABI sceKernelConvertLocaltimeToUtc(time_t param_1, int64_t param_2, return SCE_OK; } +namespace Dev { +u64& GetInitialPtc() { + return initial_ptc; +} + +Common::NativeClock* GetClock() { + return clock.get(); +} + +} // namespace Dev + void timeSymbolsRegister(Core::Loader::SymbolsResolver* sym) { clock = std::make_unique(); initial_ptc = clock->GetUptime(); diff --git a/src/core/libraries/kernel/time_management.h b/src/core/libraries/kernel/time_management.h index a28e6e558..f2216f3d3 100644 --- a/src/core/libraries/kernel/time_management.h +++ b/src/core/libraries/kernel/time_management.h @@ -7,6 +7,10 @@ #include "common/types.h" +namespace Common { +class NativeClock; +} + namespace Core::Loader { class SymbolsResolver; } @@ -47,6 +51,12 @@ constexpr int ORBIS_CLOCK_EXT_DEBUG_NETWORK = 17; constexpr int ORBIS_CLOCK_EXT_AD_NETWORK = 18; constexpr int ORBIS_CLOCK_EXT_RAW_NETWORK = 19; +namespace Dev { +u64& GetInitialPtc(); + +Common::NativeClock* GetClock(); +} // namespace Dev + u64 PS4_SYSV_ABI sceKernelGetTscFrequency(); u64 PS4_SYSV_ABI sceKernelGetProcessTime(); u64 PS4_SYSV_ABI sceKernelGetProcessTimeCounter(); diff --git a/src/core/libraries/network/net_ctl_obj.cpp b/src/core/libraries/network/net_ctl_obj.cpp index 8193c684e..07381d676 100644 --- a/src/core/libraries/network/net_ctl_obj.cpp +++ b/src/core/libraries/network/net_ctl_obj.cpp @@ -59,7 +59,7 @@ s32 Libraries::NetCtl::NetCtlInternal::registerNpToolkitCallback( void Libraries::NetCtl::NetCtlInternal::checkCallback() { std::unique_lock lock{m_mutex}; - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); for (auto& callback : callbacks) { if (callback.func != nullptr) { linker->ExecuteGuest(callback.func, ORBIS_NET_CTL_EVENT_TYPE_DISCONNECTED, @@ -70,7 +70,7 @@ void Libraries::NetCtl::NetCtlInternal::checkCallback() { void Libraries::NetCtl::NetCtlInternal::checkNpToolkitCallback() { std::unique_lock lock{m_mutex}; - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); for (auto& callback : nptoolCallbacks) { if (callback.func != nullptr) { linker->ExecuteGuest(callback.func, ORBIS_NET_CTL_EVENT_TYPE_DISCONNECTED, diff --git a/src/core/libraries/np_manager/np_manager.cpp b/src/core/libraries/np_manager/np_manager.cpp index e4c24cad3..28d28cc93 100644 --- a/src/core/libraries/np_manager/np_manager.cpp +++ b/src/core/libraries/np_manager/np_manager.cpp @@ -1,6 +1,8 @@ // SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later +#include +#include #include "common/config.h" #include "common/logging/log.h" #include "core/libraries/error_codes.h" @@ -874,19 +876,6 @@ int PS4_SYSV_ABI sceNpCheckCallback() { return ORBIS_OK; } -struct NpStateCallbackForNpToolkit { - OrbisNpStateCallbackForNpToolkit func; - void* userdata; -}; - -NpStateCallbackForNpToolkit NpStateCbForNp; - -int PS4_SYSV_ABI sceNpCheckCallbackForLib() { - // LOG_ERROR(Lib_NpManager, "(STUBBED) called"); - NpStateCbForNp.func(0, ORBIS_NP_STATE_SIGNED_OUT, NpStateCbForNp.userdata); - return ORBIS_OK; -} - int PS4_SYSV_ABI sceNpCheckNpAvailability() { LOG_ERROR(Lib_NpManager, "(STUBBED) called"); return ORBIS_OK; @@ -983,9 +972,10 @@ int PS4_SYSV_ABI sceNpGetGamePresenceStatusA() { } int PS4_SYSV_ABI sceNpGetNpId(OrbisUserServiceUserId userId, OrbisNpId* npId) { - LOG_ERROR(Lib_NpManager, "(DUMMY) called"); - + LOG_INFO(Lib_NpManager, "userId {}", userId); std::string name = Config::getUserName(); + // Fill the unused stuffs to 0 + memset(npId, 0, sizeof(*npId)); strcpy(npId->handle.data, name.c_str()); return ORBIS_OK; } @@ -1010,8 +1000,9 @@ int PS4_SYSV_ABI sceNpGetParentalControlInfoA() { return ORBIS_OK; } -int PS4_SYSV_ABI sceNpGetState() { - LOG_ERROR(Lib_NpManager, "(STUBBED) called"); +int PS4_SYSV_ABI sceNpGetState(s32 userId, OrbisNpState* state) { + *state = ORBIS_NP_STATE_SIGNED_OUT; + LOG_DEBUG(Lib_NpManager, "Signed out"); return ORBIS_OK; } @@ -2515,12 +2506,28 @@ int PS4_SYSV_ABI Func_FF966E4351E564D6() { return ORBIS_OK; } +struct NpStateCallbackForNpToolkit { + OrbisNpStateCallbackForNpToolkit func; + void* userdata; +}; + +NpStateCallbackForNpToolkit NpStateCbForNp; + +int PS4_SYSV_ABI sceNpCheckCallbackForLib() { + // LOG_ERROR(Lib_NpManager, "(STUBBED) called"); + const auto* linker = Common::Singleton::Instance(); + linker->ExecuteGuest(NpStateCbForNp.func, 1, ORBIS_NP_STATE_SIGNED_OUT, + NpStateCbForNp.userdata); + return ORBIS_OK; +} + int PS4_SYSV_ABI sceNpRegisterStateCallbackForToolkit(OrbisNpStateCallbackForNpToolkit callback, void* userdata) { + static int id = 0; LOG_ERROR(Lib_NpManager, "(STUBBED) called"); NpStateCbForNp.func = callback; NpStateCbForNp.userdata = userdata; - return 1; + return id; } int PS4_SYSV_ABI sceNpUnregisterStateCallbackForToolkit() { diff --git a/src/core/libraries/np_manager/np_manager.h b/src/core/libraries/np_manager/np_manager.h index fa0ac82f3..43ea49ce4 100644 --- a/src/core/libraries/np_manager/np_manager.h +++ b/src/core/libraries/np_manager/np_manager.h @@ -11,6 +11,8 @@ class SymbolsResolver; namespace Libraries::NpManager { +constexpr int ORBIS_NP_ERROR_SIGNED_OUT = 0x80550006; + enum OrbisNpState { ORBIS_NP_STATE_UNKNOWN = 0, ORBIS_NP_STATE_SIGNED_OUT, @@ -234,7 +236,7 @@ int PS4_SYSV_ABI sceNpGetNpReachabilityState(); int PS4_SYSV_ABI sceNpGetOnlineId(); int PS4_SYSV_ABI sceNpGetParentalControlInfo(); int PS4_SYSV_ABI sceNpGetParentalControlInfoA(); -int PS4_SYSV_ABI sceNpGetState(); +int PS4_SYSV_ABI sceNpGetState(s32 userId, OrbisNpState* state); int PS4_SYSV_ABI sceNpGetUserIdByAccountId(); int PS4_SYSV_ABI sceNpGetUserIdByOnlineId(); int PS4_SYSV_ABI sceNpHasSignedUp(); diff --git a/src/core/libraries/np_trophy/np_trophy.cpp b/src/core/libraries/np_trophy/np_trophy.cpp index 91fdeb991..548d1af69 100644 --- a/src/core/libraries/np_trophy/np_trophy.cpp +++ b/src/core/libraries/np_trophy/np_trophy.cpp @@ -14,8 +14,6 @@ namespace Libraries::NpTrophy { -static TrophyUI g_trophy_ui; - std::string game_serial; static constexpr auto MaxTrophyHandles = 4u; @@ -223,6 +221,14 @@ int PS4_SYSV_ABI sceNpTrophyGetGameIcon(OrbisNpTrophyContext context, OrbisNpTro return ORBIS_OK; } +struct GameTrophyInfo { + uint32_t num_groups; + uint32_t num_trophies; + uint32_t num_trophies_by_rarity[5]; + uint32_t unlocked_trophies; + uint32_t unlocked_trophies_by_rarity[5]; +}; + int PS4_SYSV_ABI sceNpTrophyGetGameInfo(OrbisNpTrophyContext context, OrbisNpTrophyHandle handle, OrbisNpTrophyGameDetails* details, OrbisNpTrophyGameData* data) { @@ -240,79 +246,69 @@ int PS4_SYSV_ABI sceNpTrophyGetGameInfo(OrbisNpTrophyContext context, OrbisNpTro if (details->size != 0x4A0 || data->size != 0x20) return ORBIS_NP_TROPHY_ERROR_INVALID_ARGUMENT; - const auto trophyDir = + const auto trophy_dir = Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / game_serial / "TrophyFiles"; + auto trophy_file = trophy_dir / "trophy00" / "Xml" / "TROP.XML"; pugi::xml_document doc; - pugi::xml_parse_result result = - doc.load_file((trophyDir.string() + "/trophy00/Xml/TROP.XML").c_str()); + pugi::xml_parse_result result = doc.load_file(trophy_file.native().c_str()); - if (result) { + if (!result) { + LOG_ERROR(Lib_NpTrophy, "Failed to parse trophy xml : {}", result.description()); + return ORBIS_OK; + } - uint32_t numGroups = 0; - uint32_t numTrophies = 0; - uint32_t numTrophiesByRarity[5]; - numTrophiesByRarity[1] = 0; - numTrophiesByRarity[2] = 0; - numTrophiesByRarity[3] = 0; - numTrophiesByRarity[4] = 0; - uint32_t unlockedTrophies = 0; - uint32_t unlockedTrophiesByRarity[5]; - unlockedTrophiesByRarity[1] = 0; - unlockedTrophiesByRarity[2] = 0; - unlockedTrophiesByRarity[3] = 0; - unlockedTrophiesByRarity[4] = 0; + GameTrophyInfo game_info{}; - auto trophyconf = doc.child("trophyconf"); - for (pugi::xml_node_iterator it = trophyconf.children().begin(); - it != trophyconf.children().end(); ++it) { + auto trophyconf = doc.child("trophyconf"); + for (const pugi::xml_node& node : trophyconf.children()) { + std::string_view node_name = node.name(); - if (std::string(it->name()) == "title-name") { - strncpy(details->title, it->text().as_string(), - ORBIS_NP_TROPHY_GAME_TITLE_MAX_SIZE); - } - - if (std::string(it->name()) == "title-detail") { - strncpy(details->description, it->text().as_string(), - ORBIS_NP_TROPHY_GAME_DESCR_MAX_SIZE); - } - - if (std::string(it->name()) == "group") - numGroups++; - - if (std::string(it->name()) == "trophy") { - std::string currentTrophyUnlockState = it->attribute("unlockstate").value(); - std::string currentTrophyGrade = it->attribute("ttype").value(); - - numTrophies++; - if (!currentTrophyGrade.empty()) { - int trophyGrade = GetTrophyGradeFromChar(currentTrophyGrade.at(0)); - numTrophiesByRarity[trophyGrade]++; - if (currentTrophyUnlockState == "unlocked") { - unlockedTrophies++; - unlockedTrophiesByRarity[trophyGrade]++; - } - } - } + if (node_name == "title-name") { + strncpy(details->title, node.text().as_string(), ORBIS_NP_TROPHY_GAME_TITLE_MAX_SIZE); } - details->numGroups = numGroups; - details->numTrophies = numTrophies; - details->numPlatinum = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; - details->numGold = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_GOLD]; - details->numSilver = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_SILVER]; - details->numBronze = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; - data->unlockedTrophies = unlockedTrophies; - data->unlockedPlatinum = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; - data->unlockedGold = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_GOLD]; - data->unlockedSilver = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_SILVER]; - data->unlockedBronze = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + if (node_name == "title-detail") { + strncpy(details->description, node.text().as_string(), + ORBIS_NP_TROPHY_GAME_DESCR_MAX_SIZE); + } - // maybe this should be 1 instead of 100? - data->progressPercentage = 100; + if (node_name == "group") + game_info.num_groups++; - } else - LOG_INFO(Lib_NpTrophy, "couldnt parse xml : {}", result.description()); + if (node_name == "trophy") { + bool current_trophy_unlockstate = node.attribute("unlockstate").as_bool(); + std::string_view current_trophy_grade = node.attribute("ttype").value(); + + if (current_trophy_grade.empty()) { + continue; + } + + game_info.num_trophies++; + int trophy_grade = GetTrophyGradeFromChar(current_trophy_grade.at(0)); + game_info.num_trophies_by_rarity[trophy_grade]++; + + if (current_trophy_unlockstate) { + game_info.unlocked_trophies++; + game_info.unlocked_trophies_by_rarity[trophy_grade]++; + } + } + } + + details->num_groups = game_info.num_groups; + details->num_trophies = game_info.num_trophies; + details->num_platinum = game_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; + details->num_gold = game_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_GOLD]; + details->num_silver = game_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_SILVER]; + details->num_bronze = game_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + data->unlocked_trophies = game_info.unlocked_trophies; + data->unlocked_platinum = game_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; + data->unlocked_gold = game_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_GOLD]; + data->unlocked_silver = game_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_SILVER]; + data->unlocked_bronze = game_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + + // maybe this should be 1 instead of 100? + data->progress_percentage = 100; return ORBIS_OK; } @@ -323,6 +319,13 @@ int PS4_SYSV_ABI sceNpTrophyGetGroupIcon(OrbisNpTrophyContext context, OrbisNpTr return ORBIS_OK; } +struct GroupTrophyInfo { + uint32_t num_trophies; + uint32_t num_trophies_by_rarity[5]; + uint32_t unlocked_trophies; + uint32_t unlocked_trophies_by_rarity[5]; +}; + int PS4_SYSV_ABI sceNpTrophyGetGroupInfo(OrbisNpTrophyContext context, OrbisNpTrophyHandle handle, OrbisNpTrophyGroupId groupId, OrbisNpTrophyGroupDetails* details, @@ -341,89 +344,78 @@ int PS4_SYSV_ABI sceNpTrophyGetGroupInfo(OrbisNpTrophyContext context, OrbisNpTr if (details->size != 0x4A0 || data->size != 0x28) return ORBIS_NP_TROPHY_ERROR_INVALID_ARGUMENT; - const auto trophyDir = + const auto trophy_dir = Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / game_serial / "TrophyFiles"; + auto trophy_file = trophy_dir / "trophy00" / "Xml" / "TROP.XML"; pugi::xml_document doc; - pugi::xml_parse_result result = - doc.load_file((trophyDir.string() + "/trophy00/Xml/TROP.XML").c_str()); + pugi::xml_parse_result result = doc.load_file(trophy_file.native().c_str()); - if (result) { + if (!result) { + LOG_ERROR(Lib_NpTrophy, "Failed to open trophy xml : {}", result.description()); + return ORBIS_OK; + } - uint32_t numGroups = 0; - uint32_t numTrophies = 0; - uint32_t numTrophiesByRarity[5]; - numTrophiesByRarity[1] = 0; - numTrophiesByRarity[2] = 0; - numTrophiesByRarity[3] = 0; - numTrophiesByRarity[4] = 0; - uint32_t unlockedTrophies = 0; - uint32_t unlockedTrophiesByRarity[5]; - unlockedTrophiesByRarity[1] = 0; - unlockedTrophiesByRarity[2] = 0; - unlockedTrophiesByRarity[3] = 0; - unlockedTrophiesByRarity[4] = 0; + GroupTrophyInfo group_info{}; - auto trophyconf = doc.child("trophyconf"); - for (pugi::xml_node_iterator it = trophyconf.children().begin(); - it != trophyconf.children().end(); ++it) { + auto trophyconf = doc.child("trophyconf"); + for (const pugi::xml_node& node : trophyconf.children()) { + std::string_view node_name = node.name(); - if (std::string(it->name()) == "group") { - numGroups++; - std::string currentGroupId = it->attribute("id").value(); - if (!currentGroupId.empty()) { - if (std::stoi(currentGroupId) == groupId) { - std::string currentGroupName = it->child("name").text().as_string(); - std::string currentGroupDescription = - it->child("detail").text().as_string(); + if (node_name == "group") { + int current_group_id = node.attribute("id").as_int(ORBIS_NP_TROPHY_INVALID_GROUP_ID); + if (current_group_id != ORBIS_NP_TROPHY_INVALID_GROUP_ID) { + if (current_group_id == groupId) { + std::string_view current_group_name = node.child("name").text().as_string(); + std::string_view current_group_description = + node.child("detail").text().as_string(); - strncpy(details->title, currentGroupName.c_str(), - ORBIS_NP_TROPHY_GROUP_TITLE_MAX_SIZE); - strncpy(details->description, currentGroupDescription.c_str(), - ORBIS_NP_TROPHY_GAME_DESCR_MAX_SIZE); - } - } - } - - data->groupId = groupId; - - if (std::string(it->name()) == "trophy") { - std::string currentTrophyUnlockState = it->attribute("unlockstate").value(); - std::string currentTrophyGrade = it->attribute("ttype").value(); - std::string currentTrophyGroupID = it->attribute("gid").value(); - - if (!currentTrophyGroupID.empty()) { - if (std::stoi(currentTrophyGroupID) == groupId) { - numTrophies++; - if (!currentTrophyGrade.empty()) { - int trophyGrade = GetTrophyGradeFromChar(currentTrophyGrade.at(0)); - numTrophiesByRarity[trophyGrade]++; - if (currentTrophyUnlockState == "unlocked") { - unlockedTrophies++; - unlockedTrophiesByRarity[trophyGrade]++; - } - } - } + strncpy(details->title, current_group_name.data(), + ORBIS_NP_TROPHY_GROUP_TITLE_MAX_SIZE); + strncpy(details->description, current_group_description.data(), + ORBIS_NP_TROPHY_GAME_DESCR_MAX_SIZE); } } } - details->numTrophies = numTrophies; - details->numPlatinum = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; - details->numGold = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_GOLD]; - details->numSilver = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_SILVER]; - details->numBronze = numTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; - data->unlockedTrophies = unlockedTrophies; - data->unlockedPlatinum = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; - data->unlockedGold = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_GOLD]; - data->unlockedSilver = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_SILVER]; - data->unlockedBronze = unlockedTrophiesByRarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + details->group_id = groupId; + data->group_id = groupId; - // maybe this should be 1 instead of 100? - data->progressPercentage = 100; + if (node_name == "trophy") { + bool current_trophy_unlockstate = node.attribute("unlockstate").as_bool(); + std::string_view current_trophy_grade = node.attribute("ttype").value(); + int current_trophy_group_id = node.attribute("gid").as_int(-1); - } else - LOG_INFO(Lib_NpTrophy, "couldnt parse xml : {}", result.description()); + if (current_trophy_grade.empty()) { + continue; + } + + if (current_trophy_group_id == groupId) { + group_info.num_trophies++; + int trophyGrade = GetTrophyGradeFromChar(current_trophy_grade.at(0)); + group_info.num_trophies_by_rarity[trophyGrade]++; + if (current_trophy_unlockstate) { + group_info.unlocked_trophies++; + group_info.unlocked_trophies_by_rarity[trophyGrade]++; + } + } + } + } + + details->num_trophies = group_info.num_trophies; + details->num_platinum = group_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; + details->num_gold = group_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_GOLD]; + details->num_silver = group_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_SILVER]; + details->num_bronze = group_info.num_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + data->unlocked_trophies = group_info.unlocked_trophies; + data->unlocked_platinum = + group_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_PLATINUM]; + data->unlocked_gold = group_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_GOLD]; + data->unlocked_silver = group_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_SILVER]; + data->unlocked_bronze = group_info.unlocked_trophies_by_rarity[ORBIS_NP_TROPHY_GRADE_BRONZE]; + + // maybe this should be 1 instead of 100? + data->progress_percentage = 100; return ORBIS_OK; } @@ -454,87 +446,51 @@ int PS4_SYSV_ABI sceNpTrophyGetTrophyInfo(OrbisNpTrophyContext context, OrbisNpT if (details->size != 0x498 || data->size != 0x18) return ORBIS_NP_TROPHY_ERROR_INVALID_ARGUMENT; - const auto trophyDir = + const auto trophy_dir = Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / game_serial / "TrophyFiles"; + auto trophy_file = trophy_dir / "trophy00" / "Xml" / "TROP.XML"; pugi::xml_document doc; - pugi::xml_parse_result result = - doc.load_file((trophyDir.string() + "/trophy00/Xml/TROP.XML").c_str()); + pugi::xml_parse_result result = doc.load_file(trophy_file.native().c_str()); - if (result) { - auto trophyconf = doc.child("trophyconf"); - for (pugi::xml_node_iterator it = trophyconf.children().begin(); - it != trophyconf.children().end(); ++it) { + if (!result) { + LOG_ERROR(Lib_NpTrophy, "Failed to open trophy xml : {}", result.description()); + return ORBIS_OK; + } - if (std::string(it->name()) == "trophy") { - std::string currentTrophyId = it->attribute("id").value(); - if (std::stoi(currentTrophyId) == trophyId) { - std::string currentTrophyUnlockState = it->attribute("unlockstate").value(); - std::string currentTrophyTimestamp = it->attribute("timestamp").value(); - std::string currentTrophyGrade = it->attribute("ttype").value(); - std::string currentTrophyGroupID = it->attribute("gid").value(); - std::string currentTrophyHidden = it->attribute("hidden").value(); - std::string currentTrophyName = it->child("name").text().as_string(); - std::string currentTrophyDescription = it->child("detail").text().as_string(); + auto trophyconf = doc.child("trophyconf"); - if (currentTrophyUnlockState == "unlocked") { - details->trophyId = trophyId; - if (currentTrophyGrade.empty()) { - details->trophyGrade = ORBIS_NP_TROPHY_GRADE_UNKNOWN; - } else { - details->trophyGrade = GetTrophyGradeFromChar(currentTrophyGrade.at(0)); - } - if (currentTrophyGroupID.empty()) { - details->groupId = ORBIS_NP_TROPHY_BASE_GAME_GROUP_ID; - } else { - details->groupId = std::stoi(currentTrophyGroupID); - } - if (currentTrophyHidden == "yes") { - details->hidden = true; - } else { - details->hidden = false; - } + for (const pugi::xml_node& node : trophyconf.children()) { + std::string_view node_name = node.name(); - strncpy(details->name, currentTrophyName.c_str(), - ORBIS_NP_TROPHY_NAME_MAX_SIZE); - strncpy(details->description, currentTrophyDescription.c_str(), - ORBIS_NP_TROPHY_DESCR_MAX_SIZE); + if (node_name == "trophy") { + int current_trophy_id = node.attribute("id").as_int(ORBIS_NP_TROPHY_INVALID_TROPHY_ID); + if (current_trophy_id == trophyId) { + bool current_trophy_unlockstate = node.attribute("unlockstate").as_bool(); + std::string_view current_trophy_grade = node.attribute("ttype").value(); + std::string_view current_trophy_name = node.child("name").text().as_string(); + std::string_view current_trophy_description = + node.child("detail").text().as_string(); - data->trophyId = trophyId; - data->unlocked = true; - data->timestamp.tick = std::stoull(currentTrophyTimestamp); - } else { - details->trophyId = trophyId; - if (currentTrophyGrade.empty()) { - details->trophyGrade = ORBIS_NP_TROPHY_GRADE_UNKNOWN; - } else { - details->trophyGrade = GetTrophyGradeFromChar(currentTrophyGrade.at(0)); - } - if (currentTrophyGroupID.empty()) { - details->groupId = ORBIS_NP_TROPHY_BASE_GAME_GROUP_ID; - } else { - details->groupId = std::stoi(currentTrophyGroupID); - } - if (currentTrophyHidden == "yes") { - details->hidden = true; - } else { - details->hidden = false; - } + uint64_t current_trophy_timestamp = node.attribute("timestamp").as_ullong(); + int current_trophy_groupid = node.attribute("gid").as_int(-1); + bool current_trophy_hidden = node.attribute("hidden").as_bool(); - strncpy(details->name, currentTrophyName.c_str(), - ORBIS_NP_TROPHY_NAME_MAX_SIZE); - strncpy(details->description, currentTrophyDescription.c_str(), - ORBIS_NP_TROPHY_DESCR_MAX_SIZE); + details->trophy_id = trophyId; + details->trophy_grade = GetTrophyGradeFromChar(current_trophy_grade.at(0)); + details->group_id = current_trophy_groupid; + details->hidden = current_trophy_hidden; - data->trophyId = trophyId; - data->unlocked = false; - data->timestamp.tick = 0; - } - } + strncpy(details->name, current_trophy_name.data(), ORBIS_NP_TROPHY_NAME_MAX_SIZE); + strncpy(details->description, current_trophy_description.data(), + ORBIS_NP_TROPHY_DESCR_MAX_SIZE); + + data->trophy_id = trophyId; + data->unlocked = current_trophy_unlockstate; + data->timestamp.tick = current_trophy_timestamp; } } - } else - LOG_INFO(Lib_NpTrophy, "couldnt parse xml : {}", result.description()); + } return ORBIS_OK; } @@ -555,35 +511,36 @@ s32 PS4_SYSV_ABI sceNpTrophyGetTrophyUnlockState(OrbisNpTrophyContext context, ORBIS_NP_TROPHY_FLAG_ZERO(flags); - const auto trophyDir = + const auto trophy_dir = Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / game_serial / "TrophyFiles"; - auto trophy_file = trophyDir / "trophy00" / "Xml" / "TROP.XML"; + auto trophy_file = trophy_dir / "trophy00" / "Xml" / "TROP.XML"; pugi::xml_document doc; pugi::xml_parse_result result = doc.load_file(trophy_file.native().c_str()); - int numTrophies = 0; + if (!result) { + LOG_ERROR(Lib_NpTrophy, "Failed to open trophy xml : {}", result.description()); + return ORBIS_OK; + } - if (result) { - auto trophyconf = doc.child("trophyconf"); - for (pugi::xml_node_iterator it = trophyconf.children().begin(); - it != trophyconf.children().end(); ++it) { + int num_trophies = 0; + auto trophyconf = doc.child("trophyconf"); - std::string currentTrophyId = it->attribute("id").value(); - std::string currentTrophyUnlockState = it->attribute("unlockstate").value(); + for (const pugi::xml_node& node : trophyconf.children()) { + std::string_view node_name = node.name(); + int current_trophy_id = node.attribute("id").as_int(ORBIS_NP_TROPHY_INVALID_TROPHY_ID); + bool current_trophy_unlockstate = node.attribute("unlockstate").as_bool(); - if (std::string(it->name()) == "trophy") { - numTrophies++; - } - - if (currentTrophyUnlockState == "unlocked") { - ORBIS_NP_TROPHY_FLAG_SET(std::stoi(currentTrophyId), flags); - } + if (node_name == "trophy") { + num_trophies++; } - } else - LOG_INFO(Lib_NpTrophy, "couldnt parse xml : {}", result.description()); - *count = numTrophies; + if (current_trophy_unlockstate) { + ORBIS_NP_TROPHY_FLAG_SET(current_trophy_id, flags); + } + } + + *count = num_trophies; return ORBIS_OK; } @@ -912,148 +869,119 @@ int PS4_SYSV_ABI sceNpTrophyUnlockTrophy(OrbisNpTrophyContext context, OrbisNpTr if (platinumId == nullptr) return ORBIS_NP_TROPHY_ERROR_INVALID_ARGUMENT; - const auto trophyDir = + const auto trophy_dir = Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / game_serial / "TrophyFiles"; + auto trophy_file = trophy_dir / "trophy00" / "Xml" / "TROP.XML"; pugi::xml_document doc; - pugi::xml_parse_result result = - doc.load_file((trophyDir.string() + "/trophy00/Xml/TROP.XML").c_str()); + pugi::xml_parse_result result = doc.load_file(trophy_file.native().c_str()); + + if (!result) { + LOG_ERROR(Lib_NpTrophy, "Failed to parse trophy xml : {}", result.description()); + return ORBIS_OK; + } *platinumId = ORBIS_NP_TROPHY_INVALID_TROPHY_ID; - int numTrophies = 0; - int numTrophiesUnlocked = 0; + int num_trophies = 0; + int num_trophies_unlocked = 0; + pugi::xml_node platinum_node; - pugi::xml_node_iterator platinumIt; - int platinumTrophyGroup = -1; + auto trophyconf = doc.child("trophyconf"); - if (result) { - auto trophyconf = doc.child("trophyconf"); - for (pugi::xml_node_iterator it = trophyconf.children().begin(); - it != trophyconf.children().end(); ++it) { + for (pugi::xml_node& node : trophyconf.children()) { + int current_trophy_id = node.attribute("id").as_int(ORBIS_NP_TROPHY_INVALID_TROPHY_ID); + bool current_trophy_unlockstate = node.attribute("unlockstate").as_bool(); + const char* current_trophy_name = node.child("name").text().as_string(); + std::string_view current_trophy_description = node.child("detail").text().as_string(); + std::string_view current_trophy_type = node.attribute("ttype").value(); - std::string currentTrophyId = it->attribute("id").value(); - std::string currentTrophyName = it->child("name").text().as_string(); - std::string currentTrophyDescription = it->child("detail").text().as_string(); - std::string currentTrophyType = it->attribute("ttype").value(); - std::string currentTrophyUnlockState = it->attribute("unlockstate").value(); + if (current_trophy_type == "P") { + platinum_node = node; + if (trophyId == current_trophy_id) { + return ORBIS_NP_TROPHY_ERROR_PLATINUM_CANNOT_UNLOCK; + } + } - if (currentTrophyType == "P") { - platinumIt = it; - - if (std::string(platinumIt->attribute("gid").value()).empty()) { - platinumTrophyGroup = -1; - } else { - platinumTrophyGroup = - std::stoi(std::string(platinumIt->attribute("gid").value())); - } - - if (trophyId == std::stoi(currentTrophyId)) { - return ORBIS_NP_TROPHY_ERROR_PLATINUM_CANNOT_UNLOCK; + if (std::string_view(node.name()) == "trophy") { + if (node.attribute("pid").as_int(-1) != ORBIS_NP_TROPHY_INVALID_TROPHY_ID) { + num_trophies++; + if (current_trophy_unlockstate) { + num_trophies_unlocked++; } } - if (std::string(it->name()) == "trophy") { - if (platinumTrophyGroup == -1) { - if (std::string(it->attribute("gid").value()).empty()) { - numTrophies++; - if (currentTrophyUnlockState == "unlocked") { - numTrophiesUnlocked++; - } - } + if (current_trophy_id == trophyId) { + if (current_trophy_unlockstate) { + LOG_INFO(Lib_NpTrophy, "Trophy already unlocked"); + return ORBIS_NP_TROPHY_ERROR_TROPHY_ALREADY_UNLOCKED; } else { - if (!std::string(it->attribute("gid").value()).empty()) { - if (std::stoi(std::string(it->attribute("gid").value())) == - platinumTrophyGroup) { - numTrophies++; - if (currentTrophyUnlockState == "unlocked") { - numTrophiesUnlocked++; - } - } - } - } - - if (std::stoi(currentTrophyId) == trophyId) { - LOG_INFO(Lib_NpTrophy, "Found trophy to unlock {} : {}", - it->child("name").text().as_string(), - it->child("detail").text().as_string()); - if (currentTrophyUnlockState == "unlocked") { - LOG_INFO(Lib_NpTrophy, "Trophy already unlocked"); - return ORBIS_NP_TROPHY_ERROR_TROPHY_ALREADY_UNLOCKED; + if (node.attribute("unlockstate").empty()) { + node.append_attribute("unlockstate") = "true"; } else { - if (std::string(it->attribute("unlockstate").value()).empty()) { - it->append_attribute("unlockstate") = "unlocked"; - } else { - it->attribute("unlockstate").set_value("unlocked"); - } - - Rtc::OrbisRtcTick trophyTimestamp; - Rtc::sceRtcGetCurrentTick(&trophyTimestamp); - - if (std::string(it->attribute("timestamp").value()).empty()) { - it->append_attribute("timestamp") = - std::to_string(trophyTimestamp.tick).c_str(); - } else { - it->attribute("timestamp") - .set_value(std::to_string(trophyTimestamp.tick).c_str()); - } - - g_trophy_ui.AddTrophyToQueue(trophyId, currentTrophyName); + node.attribute("unlockstate").set_value("true"); } + + Rtc::OrbisRtcTick trophyTimestamp; + Rtc::sceRtcGetCurrentTick(&trophyTimestamp); + + if (node.attribute("timestamp").empty()) { + node.append_attribute("timestamp") = + std::to_string(trophyTimestamp.tick).c_str(); + } else { + node.attribute("timestamp") + .set_value(std::to_string(trophyTimestamp.tick).c_str()); + } + + std::string trophy_icon_file = "TROP"; + trophy_icon_file.append(node.attribute("id").value()); + trophy_icon_file.append(".PNG"); + + std::filesystem::path current_icon_path = + trophy_dir / "trophy00" / "Icons" / trophy_icon_file; + + AddTrophyToQueue(current_icon_path, current_trophy_name); } } } + } - if (std::string(platinumIt->attribute("unlockstate").value()).empty()) { - if ((numTrophies - 2) == numTrophiesUnlocked) { - - platinumIt->append_attribute("unlockstate") = "unlocked"; - - Rtc::OrbisRtcTick trophyTimestamp; - Rtc::sceRtcGetCurrentTick(&trophyTimestamp); - - if (std::string(platinumIt->attribute("timestamp").value()).empty()) { - platinumIt->append_attribute("timestamp") = - std::to_string(trophyTimestamp.tick).c_str(); - } else { - platinumIt->attribute("timestamp") - .set_value(std::to_string(trophyTimestamp.tick).c_str()); - } - - std::string platinumTrophyId = platinumIt->attribute("id").value(); - std::string platinumTrophyName = platinumIt->child("name").text().as_string(); - - *platinumId = std::stoi(platinumTrophyId); - g_trophy_ui.AddTrophyToQueue(*platinumId, platinumTrophyName); + if (!platinum_node.attribute("unlockstate").as_bool()) { + if ((num_trophies - 1) == num_trophies_unlocked) { + if (platinum_node.attribute("unlockstate").empty()) { + platinum_node.append_attribute("unlockstate") = "true"; + } else { + platinum_node.attribute("unlockstate").set_value("true"); } - } else if (std::string(platinumIt->attribute("unlockstate").value()) == "locked") { - if ((numTrophies - 2) == numTrophiesUnlocked) { - platinumIt->attribute("unlockstate").set_value("unlocked"); + Rtc::OrbisRtcTick trophyTimestamp; + Rtc::sceRtcGetCurrentTick(&trophyTimestamp); - Rtc::OrbisRtcTick trophyTimestamp; - Rtc::sceRtcGetCurrentTick(&trophyTimestamp); - - if (std::string(platinumIt->attribute("timestamp").value()).empty()) { - platinumIt->append_attribute("timestamp") = - std::to_string(trophyTimestamp.tick).c_str(); - } else { - platinumIt->attribute("timestamp") - .set_value(std::to_string(trophyTimestamp.tick).c_str()); - } - - std::string platinumTrophyId = platinumIt->attribute("id").value(); - std::string platinumTrophyName = platinumIt->child("name").text().as_string(); - - *platinumId = std::stoi(platinumTrophyId); - g_trophy_ui.AddTrophyToQueue(*platinumId, platinumTrophyName); + if (platinum_node.attribute("timestamp").empty()) { + platinum_node.append_attribute("timestamp") = + std::to_string(trophyTimestamp.tick).c_str(); + } else { + platinum_node.attribute("timestamp") + .set_value(std::to_string(trophyTimestamp.tick).c_str()); } + + int platinum_trophy_id = + platinum_node.attribute("id").as_int(ORBIS_NP_TROPHY_INVALID_TROPHY_ID); + const char* platinum_trophy_name = platinum_node.child("name").text().as_string(); + + std::string platinum_icon_file = "TROP"; + platinum_icon_file.append(platinum_node.attribute("id").value()); + platinum_icon_file.append(".PNG"); + + std::filesystem::path platinum_icon_path = + trophy_dir / "trophy00" / "Icons" / platinum_icon_file; + + *platinumId = platinum_trophy_id; + AddTrophyToQueue(platinum_icon_path, platinum_trophy_name); } + } - doc.save_file((trophyDir.string() + "/trophy00/Xml/TROP.XML").c_str()); - - } else - LOG_INFO(Lib_NpTrophy, "couldnt parse xml : {}", result.description()); + doc.save_file((trophy_dir / "trophy00" / "Xml" / "TROP.XML").native().c_str()); return ORBIS_OK; } diff --git a/src/core/libraries/np_trophy/np_trophy.h b/src/core/libraries/np_trophy/np_trophy.h index ae08b2969..ac13a9ab7 100644 --- a/src/core/libraries/np_trophy/np_trophy.h +++ b/src/core/libraries/np_trophy/np_trophy.h @@ -47,7 +47,7 @@ bool ORBIS_NP_TROPHY_FLAG_ISSET(int32_t trophyId, OrbisNpTrophyFlagArray* p); struct OrbisNpTrophyData { size_t size; - OrbisNpTrophyId trophyId; + OrbisNpTrophyId trophy_id; bool unlocked; uint8_t reserved[3]; Rtc::OrbisRtcTick timestamp; @@ -66,9 +66,9 @@ constexpr int ORBIS_NP_TROPHY_INVALID_GROUP_ID = -2; struct OrbisNpTrophyDetails { size_t size; - OrbisNpTrophyId trophyId; - OrbisNpTrophyGrade trophyGrade; - OrbisNpTrophyGroupId groupId; + OrbisNpTrophyId trophy_id; + OrbisNpTrophyGrade trophy_grade; + OrbisNpTrophyGroupId group_id; bool hidden; uint8_t reserved[3]; char name[ORBIS_NP_TROPHY_NAME_MAX_SIZE]; @@ -77,46 +77,46 @@ struct OrbisNpTrophyDetails { struct OrbisNpTrophyGameData { size_t size; - uint32_t unlockedTrophies; - uint32_t unlockedPlatinum; - uint32_t unlockedGold; - uint32_t unlockedSilver; - uint32_t unlockedBronze; - uint32_t progressPercentage; + uint32_t unlocked_trophies; + uint32_t unlocked_platinum; + uint32_t unlocked_gold; + uint32_t unlocked_silver; + uint32_t unlocked_bronze; + uint32_t progress_percentage; }; struct OrbisNpTrophyGameDetails { size_t size; - uint32_t numGroups; - uint32_t numTrophies; - uint32_t numPlatinum; - uint32_t numGold; - uint32_t numSilver; - uint32_t numBronze; + uint32_t num_groups; + uint32_t num_trophies; + uint32_t num_platinum; + uint32_t num_gold; + uint32_t num_silver; + uint32_t num_bronze; char title[ORBIS_NP_TROPHY_GAME_TITLE_MAX_SIZE]; char description[ORBIS_NP_TROPHY_GAME_DESCR_MAX_SIZE]; }; struct OrbisNpTrophyGroupData { size_t size; - OrbisNpTrophyGroupId groupId; - uint32_t unlockedTrophies; - uint32_t unlockedPlatinum; - uint32_t unlockedGold; - uint32_t unlockedSilver; - uint32_t unlockedBronze; - uint32_t progressPercentage; + OrbisNpTrophyGroupId group_id; + uint32_t unlocked_trophies; + uint32_t unlocked_platinum; + uint32_t unlocked_gold; + uint32_t unlocked_silver; + uint32_t unlocked_bronze; + uint32_t progress_percentage; uint8_t reserved[4]; }; struct OrbisNpTrophyGroupDetails { size_t size; - OrbisNpTrophyGroupId groupId; - uint32_t numTrophies; - uint32_t numPlatinum; - uint32_t numGold; - uint32_t numSilver; - uint32_t numBronze; + OrbisNpTrophyGroupId group_id; + uint32_t num_trophies; + uint32_t num_platinum; + uint32_t num_gold; + uint32_t num_silver; + uint32_t num_bronze; char title[ORBIS_NP_TROPHY_GROUP_TITLE_MAX_SIZE]; char description[ORBIS_NP_TROPHY_GROUP_DESCR_MAX_SIZE]; }; diff --git a/src/core/libraries/np_trophy/trophy_ui.cpp b/src/core/libraries/np_trophy/trophy_ui.cpp index 8deaac25b..618f8db46 100644 --- a/src/core/libraries/np_trophy/trophy_ui.cpp +++ b/src/core/libraries/np_trophy/trophy_ui.cpp @@ -2,15 +2,28 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include +#include #include #include "common/assert.h" +#include "common/singleton.h" #include "imgui/imgui_std.h" #include "trophy_ui.h" using namespace ImGui; -using namespace Libraries::NpTrophy; +namespace Libraries::NpTrophy { -TrophyUI::TrophyUI() { +std::optional current_trophy_ui; +std::queue trophy_queue; +std::mutex queueMtx; + +TrophyUI::TrophyUI(const std::filesystem::path& trophyIconPath, const std::string& trophyName) + : trophy_name(trophyName) { + if (std::filesystem::exists(trophyIconPath)) { + trophy_icon = RefCountedTexture::DecodePngFile(trophyIconPath); + } else { + LOG_ERROR(Lib_NpTrophy, "Couldnt load trophy icon at {}", + fmt::UTF(trophyIconPath.u8string())); + } AddLayer(this); } @@ -18,57 +31,63 @@ TrophyUI::~TrophyUI() { Finish(); } -void Libraries::NpTrophy::TrophyUI::AddTrophyToQueue(int trophyId, std::string trophyName) { - TrophyInfo newInfo; - newInfo.trophyId = trophyId; - newInfo.trophyName = trophyName; - trophyQueue.push_back(newInfo); -} - void TrophyUI::Finish() { RemoveLayer(this); } -bool displayingTrophy; -std::chrono::steady_clock::time_point trophyStartedTime; - void TrophyUI::Draw() { const auto& io = GetIO(); const ImVec2 window_size{ - std::min(io.DisplaySize.x, 200.f), - std::min(io.DisplaySize.y, 75.f), + std::min(io.DisplaySize.x, 250.f), + std::min(io.DisplaySize.y, 70.f), }; - if (trophyQueue.size() != 0) { - if (!displayingTrophy) { - displayingTrophy = true; - trophyStartedTime = std::chrono::steady_clock::now(); + SetNextWindowSize(window_size); + SetNextWindowCollapsed(false); + SetNextWindowPos(ImVec2(io.DisplaySize.x - 250, 50)); + KeepNavHighlight(); + + if (Begin("Trophy Window", nullptr, + ImGuiWindowFlags_NoDecoration | ImGuiWindowFlags_NoSavedSettings | + ImGuiWindowFlags_NoInputs)) { + if (trophy_icon) { + Image(trophy_icon.GetTexture().im_id, ImVec2(50, 50)); + ImGui::SameLine(); + } else { + // placeholder + const auto pos = GetCursorScreenPos(); + ImGui::GetWindowDrawList()->AddRectFilled(pos, pos + ImVec2{50.0f}, + GetColorU32(ImVec4{0.7f})); + ImGui::Indent(60); } + TextWrapped("Trophy earned!\n%s", trophy_name.c_str()); + } + End(); - std::chrono::steady_clock::time_point timeNow = std::chrono::steady_clock::now(); - std::chrono::seconds duration = - std::chrono::duration_cast(timeNow - trophyStartedTime); - - if (duration.count() >= 5) { - trophyQueue.erase(trophyQueue.begin()); - displayingTrophy = false; - } - - if (trophyQueue.size() != 0) { - SetNextWindowSize(window_size); - SetNextWindowCollapsed(false); - SetNextWindowPos(ImVec2(io.DisplaySize.x - 200, 50)); - KeepNavHighlight(); - - TrophyInfo currentTrophyInfo = trophyQueue[0]; - if (Begin("Trophy Window", nullptr, - ImGuiWindowFlags_NoDecoration | ImGuiWindowFlags_NoSavedSettings | - ImGuiWindowFlags_NoInputs)) { - Text("Trophy earned!"); - TextWrapped("%s", currentTrophyInfo.trophyName.c_str()); - } - End(); + trophy_timer -= io.DeltaTime; + if (trophy_timer <= 0) { + std::lock_guard lock(queueMtx); + if (!trophy_queue.empty()) { + TrophyInfo next_trophy = trophy_queue.front(); + trophy_queue.pop(); + current_trophy_ui.emplace(next_trophy.trophy_icon_path, next_trophy.trophy_name); + } else { + current_trophy_ui.reset(); } } } + +void AddTrophyToQueue(const std::filesystem::path& trophyIconPath, const std::string& trophyName) { + std::lock_guard lock(queueMtx); + if (current_trophy_ui.has_value()) { + TrophyInfo new_trophy; + new_trophy.trophy_icon_path = trophyIconPath; + new_trophy.trophy_name = trophyName; + trophy_queue.push(new_trophy); + } else { + current_trophy_ui.emplace(trophyIconPath, trophyName); + } +} + +} // namespace Libraries::NpTrophy \ No newline at end of file diff --git a/src/core/libraries/np_trophy/trophy_ui.h b/src/core/libraries/np_trophy/trophy_ui.h index 060d80dec..ce7a1c63a 100644 --- a/src/core/libraries/np_trophy/trophy_ui.h +++ b/src/core/libraries/np_trophy/trophy_ui.h @@ -5,32 +5,36 @@ #include #include -#include +#include #include "common/fixed_value.h" #include "common/types.h" #include "core/libraries/np_trophy/np_trophy.h" #include "imgui/imgui_layer.h" +#include "imgui/imgui_texture.h" namespace Libraries::NpTrophy { -struct TrophyInfo { - int trophyId = -1; - std::string trophyName; -}; - class TrophyUI final : public ImGui::Layer { - std::vector trophyQueue; - public: - TrophyUI(); + TrophyUI(const std::filesystem::path& trophyIconPath, const std::string& trophyName); ~TrophyUI() override; - void AddTrophyToQueue(int trophyId, std::string trophyName); - void Finish(); void Draw() override; + +private: + std::string trophy_name; + float trophy_timer = 5.0f; + ImGui::RefCountedTexture trophy_icon; }; +struct TrophyInfo { + std::filesystem::path trophy_icon_path; + std::string trophy_name; +}; + +void AddTrophyToQueue(const std::filesystem::path& trophyIconPath, const std::string& trophyName); + }; // namespace Libraries::NpTrophy \ No newline at end of file diff --git a/src/core/libraries/save_data/save_backup.cpp b/src/core/libraries/save_data/save_backup.cpp index 1d935aee1..da5172b15 100644 --- a/src/core/libraries/save_data/save_backup.cpp +++ b/src/core/libraries/save_data/save_backup.cpp @@ -79,7 +79,7 @@ static void backup(const std::filesystem::path& dir_name) { } static void BackupThreadBody() { - Common::SetCurrentThreadName("SaveData_BackupThread"); + Common::SetCurrentThreadName("shadPS4:SaveData_BackupThread"); while (g_backup_status != WorkerStatus::Stopping) { g_backup_status = WorkerStatus::Waiting; diff --git a/src/core/libraries/save_data/save_instance.cpp b/src/core/libraries/save_data/save_instance.cpp index 2624ca363..1127a5452 100644 --- a/src/core/libraries/save_data/save_instance.cpp +++ b/src/core/libraries/save_data/save_instance.cpp @@ -157,7 +157,11 @@ void SaveInstance::SetupAndMount(bool read_only, bool copy_icon, bool ignore_cor if (copy_icon) { const auto& src_icon = g_mnt->GetHostPath("/app0/sce_sys/save_data.png"); if (fs::exists(src_icon)) { - fs::copy_file(src_icon, GetIconPath()); + auto output_icon = GetIconPath(); + if (fs::exists(output_icon)) { + fs::remove(output_icon); + } + fs::copy_file(src_icon, output_icon); } } exists = true; diff --git a/src/core/libraries/save_data/save_memory.cpp b/src/core/libraries/save_data/save_memory.cpp index 0a714a26f..e9ef53761 100644 --- a/src/core/libraries/save_data/save_memory.cpp +++ b/src/core/libraries/save_data/save_memory.cpp @@ -66,7 +66,7 @@ static void SaveFileSafe(void* buf, size_t count, const std::filesystem::path& p } [[noreturn]] void SaveThreadLoop() { - Common::SetCurrentThreadName("SaveData_SaveDataMemoryThread"); + Common::SetCurrentThreadName("shadPS4:SaveData_SaveDataMemoryThread"); std::mutex mtx; while (true) { { @@ -207,7 +207,7 @@ void SetIcon(void* buf, size_t buf_size) { } else { g_icon_memory.resize(buf_size); std::memcpy(g_icon_memory.data(), buf, buf_size); - IOFile file(g_icon_path, Common::FS::FileAccessMode::Append); + IOFile file(g_icon_path, Common::FS::FileAccessMode::Write); file.Seek(0); file.WriteRaw(g_icon_memory.data(), buf_size); file.Close(); diff --git a/src/core/libraries/save_data/savedata.cpp b/src/core/libraries/save_data/savedata.cpp index da885d977..a2af2f159 100644 --- a/src/core/libraries/save_data/savedata.cpp +++ b/src/core/libraries/save_data/savedata.cpp @@ -262,6 +262,14 @@ struct OrbisSaveDataRestoreBackupData { s32 : 32; }; +struct OrbisSaveDataTransferringMount { + OrbisUserServiceUserId userId; + const OrbisSaveDataTitleId* titleId; + const OrbisSaveDataDirName* dirName; + const OrbisSaveDataFingerprint* fingerprint; + std::array _reserved; +}; + struct OrbisSaveDataDirNameSearchCond { OrbisUserServiceUserId userId; int : 32; @@ -357,7 +365,8 @@ static Error setNotInitializedError() { } static Error saveDataMount(const OrbisSaveDataMount2* mount_info, - OrbisSaveDataMountResult* mount_result) { + OrbisSaveDataMountResult* mount_result, + std::string_view title_id = g_game_serial) { if (mount_info->userId < 0) { return Error::INVALID_LOGIN_USER; @@ -369,8 +378,8 @@ static Error saveDataMount(const OrbisSaveDataMount2* mount_info, // check backup status { - const auto save_path = SaveInstance::MakeDirSavePath(mount_info->userId, g_game_serial, - mount_info->dirName->data); + const auto save_path = + SaveInstance::MakeDirSavePath(mount_info->userId, title_id, mount_info->dirName->data); if (Backup::IsBackupExecutingFor(save_path) && g_fw_ver) { return Error::BACKUP_BUSY; } @@ -409,7 +418,7 @@ static Error saveDataMount(const OrbisSaveDataMount2* mount_info, return Error::MOUNT_FULL; } - SaveInstance save_instance{slot_num, mount_info->userId, g_game_serial, dir_name, + SaveInstance save_instance{slot_num, mount_info->userId, std::string{title_id}, dir_name, (int)mount_info->blocks}; if (save_instance.Mounted()) { @@ -1573,6 +1582,7 @@ Error PS4_SYSV_ABI sceSaveDataSetupSaveDataMemory2(const OrbisSaveDataMemorySetu SaveMemory::SetIcon(nullptr, 0); } } + SaveMemory::TriggerSaveWithoutEvent(); if (g_fw_ver >= ElfInfo::FW_45 && result != nullptr) { result->existedMemorySize = existed_size; } @@ -1646,9 +1656,24 @@ Error PS4_SYSV_ABI sceSaveDataTerminate() { return Error::OK; } -int PS4_SYSV_ABI sceSaveDataTransferringMount() { - LOG_ERROR(Lib_SaveData, "(STUBBED) called"); - return ORBIS_OK; +Error PS4_SYSV_ABI sceSaveDataTransferringMount(const OrbisSaveDataTransferringMount* mount, + OrbisSaveDataMountResult* mountResult) { + LOG_DEBUG(Lib_SaveData, "called"); + if (!g_initialized) { + LOG_INFO(Lib_SaveData, "called without initialize"); + return setNotInitializedError(); + } + if (mount == nullptr || mount->titleId == nullptr || mount->dirName == nullptr) { + LOG_INFO(Lib_SaveData, "called with invalid parameter"); + return Error::PARAMETER; + } + LOG_DEBUG(Lib_SaveData, "called titleId: {}, dirName: {}", mount->titleId->data.to_view(), + mount->dirName->data.to_view()); + OrbisSaveDataMount2 mount_info{}; + mount_info.userId = mount->userId; + mount_info.dirName = mount->dirName; + mount_info.mountMode = OrbisSaveDataMountMode::RDONLY; + return saveDataMount(&mount_info, mountResult, mount->titleId->data.to_string()); } Error PS4_SYSV_ABI sceSaveDataUmount(const OrbisSaveDataMountPoint* mountPoint) { diff --git a/src/core/libraries/save_data/savedata.h b/src/core/libraries/save_data/savedata.h index 13b3dd59e..5faf3f2d5 100644 --- a/src/core/libraries/save_data/savedata.h +++ b/src/core/libraries/save_data/savedata.h @@ -70,6 +70,7 @@ struct OrbisSaveDataMountInfo; struct OrbisSaveDataMountPoint; struct OrbisSaveDataMountResult; struct OrbisSaveDataRestoreBackupData; +struct OrbisSaveDataTransferringMount; int PS4_SYSV_ABI sceSaveDataAbort(); Error PS4_SYSV_ABI sceSaveDataBackup(const OrbisSaveDataBackup* backup); @@ -174,7 +175,8 @@ int PS4_SYSV_ABI sceSaveDataSupportedFakeBrokenStatus(); int PS4_SYSV_ABI sceSaveDataSyncCloudList(); Error PS4_SYSV_ABI sceSaveDataSyncSaveDataMemory(OrbisSaveDataMemorySync* syncParam); Error PS4_SYSV_ABI sceSaveDataTerminate(); -int PS4_SYSV_ABI sceSaveDataTransferringMount(); +Error PS4_SYSV_ABI sceSaveDataTransferringMount(const OrbisSaveDataTransferringMount* mount, + OrbisSaveDataMountResult* mountResult); Error PS4_SYSV_ABI sceSaveDataUmount(const OrbisSaveDataMountPoint* mountPoint); int PS4_SYSV_ABI sceSaveDataUmountSys(); Error PS4_SYSV_ABI sceSaveDataUmountWithBackup(const OrbisSaveDataMountPoint* mountPoint); diff --git a/src/core/libraries/system/msgdialog_ui.cpp b/src/core/libraries/system/msgdialog_ui.cpp index 15d6f4dbd..ae1dced12 100644 --- a/src/core/libraries/system/msgdialog_ui.cpp +++ b/src/core/libraries/system/msgdialog_ui.cpp @@ -2,6 +2,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include +#include #include #include "common/assert.h" @@ -281,10 +282,15 @@ void MsgDialogUi::Draw() { first_render = false; } -DialogResult Libraries::MsgDialog::ShowMsgDialog(MsgDialogState state, bool block) { - DialogResult result{}; - Status status = Status::RUNNING; - MsgDialogUi dialog(&state, &status, &result); +DialogResult Libraries::MsgDialog::ShowMsgDialog(MsgDialogState p_state, bool block) { + static DialogResult result{}; + static Status status; + static MsgDialogUi dialog; + static MsgDialogState state; + dialog = MsgDialogUi{}; + status = Status::RUNNING; + state = std::move(p_state); + dialog = MsgDialogUi(&state, &status, &result); if (block) { while (status == Status::RUNNING) { std::this_thread::sleep_for(std::chrono::milliseconds(100)); diff --git a/src/core/libraries/videoout/driver.cpp b/src/core/libraries/videoout/driver.cpp index fa7577907..e2fd00028 100644 --- a/src/core/libraries/videoout/driver.cpp +++ b/src/core/libraries/videoout/driver.cpp @@ -8,6 +8,7 @@ #include "common/config.h" #include "common/debug.h" #include "common/thread.h" +#include "core/debug_state.h" #include "core/libraries/error_codes.h" #include "core/libraries/kernel/time_management.h" #include "core/libraries/videoout/driver.h" @@ -260,7 +261,7 @@ void VideoOutDriver::PresentThread(std::stop_token token) { static constexpr std::chrono::nanoseconds VblankPeriod{16666667}; const auto vblank_period = VblankPeriod / Config::vblankDiv(); - Common::SetCurrentThreadName("PresentThread"); + Common::SetCurrentThreadName("shadPS4:PresentThread"); Common::SetCurrentThreadRealtime(vblank_period); Common::AccurateTimer timer{vblank_period}; @@ -284,7 +285,7 @@ void VideoOutDriver::PresentThread(std::stop_token token) { if (vblank_status.count % (main_port.flip_rate + 1) == 0) { const auto request = receive_request(); if (!request) { - if (!main_port.is_open) { + if (!main_port.is_open || DebugState.IsGuestThreadsPaused()) { DrawBlankFrame(); } } else { diff --git a/src/core/linker.cpp b/src/core/linker.cpp index 4e4fa28d2..2d7865c33 100644 --- a/src/core/linker.cpp +++ b/src/core/linker.cpp @@ -18,6 +18,7 @@ #include "core/memory.h" #include "core/tls.h" #include "core/virtual_memory.h" +#include "debug_state.h" namespace Core { @@ -27,8 +28,8 @@ static PS4_SYSV_ABI void ProgramExitFunc() { fmt::print("exit function called\n"); } -static void RunMainEntry(VAddr addr, EntryParams* params, ExitFunc exit_func) { #ifdef ARCH_X86_64 +static PS4_SYSV_ABI void RunMainEntry(VAddr addr, EntryParams* params, ExitFunc exit_func) { // reinterpret_cast(addr)(params, exit_func); // can't be used, stack has to have // a specific layout asm volatile("andq $-16, %%rsp\n" // Align to 16 bytes @@ -48,10 +49,8 @@ static void RunMainEntry(VAddr addr, EntryParams* params, ExitFunc exit_func) { : : "r"(addr), "r"(params), "r"(exit_func) : "rax", "rsi", "rdi"); -#else - UNIMPLEMENTED_MSG("Missing RunMainEntry() implementation for target CPU architecture."); -#endif } +#endif Linker::Linker() : memory{Memory::Instance()} {} @@ -90,6 +89,7 @@ void Linker::Execute() { // Init primary thread. Common::SetCurrentThreadName("GAME_MainThread"); + DebugState.AddCurrentThreadToGuestList(); Libraries::Kernel::pthreadInitSelfMainThread(); EnsureThreadInitialized(true); @@ -107,7 +107,12 @@ void Linker::Execute() { for (auto& m : m_modules) { if (!m->IsSharedLib()) { - RunMainEntry(m->GetEntryAddress(), &p, ProgramExitFunc); +#ifdef ARCH_X86_64 + ExecuteGuest(RunMainEntry, m->GetEntryAddress(), &p, ProgramExitFunc); +#else + UNIMPLEMENTED_MSG( + "Missing guest entrypoint implementation for target CPU architecture."); +#endif } } @@ -322,7 +327,8 @@ void* Linker::TlsGetAddr(u64 module_index, u64 offset) { Module* module = m_modules[module_index - 1].get(); const u32 init_image_size = module->tls.init_image_size; // TODO: Determine if Windows will crash from this - u8* dest = reinterpret_cast(heap_api->heap_malloc(module->tls.image_size)); + u8* dest = + reinterpret_cast(ExecuteGuest(heap_api->heap_malloc, module->tls.image_size)); const u8* src = reinterpret_cast(module->tls.image_virtual_addr); std::memcpy(dest, src, init_image_size); std::memset(dest + init_image_size, 0, module->tls.image_size - init_image_size); @@ -334,7 +340,7 @@ void* Linker::TlsGetAddr(u64 module_index, u64 offset) { thread_local std::once_flag init_tls_flag; -void Linker::EnsureThreadInitialized(bool is_primary) { +void Linker::EnsureThreadInitialized(bool is_primary) const { std::call_once(init_tls_flag, [this, is_primary] { #ifdef ARCH_X86_64 InitializeThreadPatchStack(); @@ -343,7 +349,7 @@ void Linker::EnsureThreadInitialized(bool is_primary) { }); } -void Linker::InitTlsForThread(bool is_primary) { +void Linker::InitTlsForThread(bool is_primary) const { static constexpr size_t TcbSize = 0x40; static constexpr size_t TlsAllocAlign = 0x20; const size_t total_tls_size = Common::AlignUp(static_tls_size, TlsAllocAlign) + TcbSize; @@ -365,7 +371,7 @@ void Linker::InitTlsForThread(bool is_primary) { } else { if (heap_api) { #ifndef WIN32 - addr_out = heap_api->heap_malloc(total_tls_size); + addr_out = ExecuteGuestWithoutTls(heap_api->heap_malloc, total_tls_size); } else { addr_out = std::malloc(total_tls_size); #else diff --git a/src/core/linker.h b/src/core/linker.h index 18454f602..fe1278d00 100644 --- a/src/core/linker.h +++ b/src/core/linker.h @@ -109,16 +109,23 @@ public: void DebugDump(); template - ReturnType ExecuteGuest(PS4_SYSV_ABI ReturnType (*func)(FuncArgs...), CallArgs&&... args) { + ReturnType ExecuteGuest(PS4_SYSV_ABI ReturnType (*func)(FuncArgs...), + CallArgs&&... args) const { // Make sure TLS is initialized for the thread before entering guest. EnsureThreadInitialized(); - return func(std::forward(args)...); + return ExecuteGuestWithoutTls(func, args...); } private: const Module* FindExportedModule(const ModuleInfo& m, const LibraryInfo& l); - void EnsureThreadInitialized(bool is_primary = false); - void InitTlsForThread(bool is_primary); + void EnsureThreadInitialized(bool is_primary = false) const; + void InitTlsForThread(bool is_primary) const; + + template + ReturnType ExecuteGuestWithoutTls(PS4_SYSV_ABI ReturnType (*func)(FuncArgs...), + CallArgs&&... args) const { + return func(std::forward(args)...); + } MemoryManager* memory; std::mutex mutex; diff --git a/src/core/loader/elf.cpp b/src/core/loader/elf.cpp index 6d7c8773a..4de20436f 100644 --- a/src/core/loader/elf.cpp +++ b/src/core/loader/elf.cpp @@ -204,7 +204,10 @@ void Elf::Open(const std::filesystem::path& file_name) { } out.resize(num); - m_f.Seek(offset, SeekOrigin::SetOrigin); + if (!m_f.Seek(offset, SeekOrigin::SetOrigin)) { + LOG_CRITICAL(Loader, "Failed to seek to header tables"); + return; + } m_f.Read(out); }; @@ -465,7 +468,10 @@ std::string Elf::ElfPHeaderStr(u16 no) { void Elf::LoadSegment(u64 virtual_addr, u64 file_offset, u64 size) { if (!is_self) { // It's elf file - m_f.Seek(file_offset, SeekOrigin::SetOrigin); + if (!m_f.Seek(file_offset, SeekOrigin::SetOrigin)) { + LOG_CRITICAL(Loader, "Failed to seek to ELF header"); + return; + } m_f.ReadRaw(reinterpret_cast(virtual_addr), size); return; } @@ -479,7 +485,10 @@ void Elf::LoadSegment(u64 virtual_addr, u64 file_offset, u64 size) { if (file_offset >= phdr.p_offset && file_offset < phdr.p_offset + phdr.p_filesz) { auto offset = file_offset - phdr.p_offset; - m_f.Seek(offset + seg.file_offset, SeekOrigin::SetOrigin); + if (!m_f.Seek(offset + seg.file_offset, SeekOrigin::SetOrigin)) { + LOG_CRITICAL(Loader, "Failed to seek to segment"); + return; + } m_f.ReadRaw(reinterpret_cast(virtual_addr), size); return; } diff --git a/src/core/memory.cpp b/src/core/memory.cpp index ebda00357..d21ebae83 100644 --- a/src/core/memory.cpp +++ b/src/core/memory.cpp @@ -51,6 +51,35 @@ void MemoryManager::SetupMemoryRegions(u64 flexible_size) { total_flexible_size, total_direct_size); } +PAddr MemoryManager::PoolExpand(PAddr search_start, PAddr search_end, size_t size, u64 alignment) { + std::scoped_lock lk{mutex}; + + auto dmem_area = FindDmemArea(search_start); + + const auto is_suitable = [&] { + const auto aligned_base = alignment > 0 ? Common::AlignUp(dmem_area->second.base, alignment) + : dmem_area->second.base; + const auto alignment_size = aligned_base - dmem_area->second.base; + const auto remaining_size = + dmem_area->second.size >= alignment_size ? dmem_area->second.size - alignment_size : 0; + return dmem_area->second.is_free && remaining_size >= size; + }; + while (!is_suitable() && dmem_area->second.GetEnd() <= search_end) { + dmem_area++; + } + ASSERT_MSG(is_suitable(), "Unable to find free direct memory area: size = {:#x}", size); + + // Align free position + PAddr free_addr = dmem_area->second.base; + free_addr = alignment > 0 ? Common::AlignUp(free_addr, alignment) : free_addr; + + // Add the allocated region to the list and commit its pages. + auto& area = CarveDmemArea(free_addr, size)->second; + area.is_free = false; + area.is_pooled = true; + return free_addr; +} + PAddr MemoryManager::Allocate(PAddr search_start, PAddr search_end, size_t size, u64 alignment, int memory_type) { std::scoped_lock lk{mutex}; @@ -112,6 +141,43 @@ void MemoryManager::Free(PAddr phys_addr, size_t size) { MergeAdjacent(dmem_map, dmem_area); } +int MemoryManager::PoolReserve(void** out_addr, VAddr virtual_addr, size_t size, + MemoryMapFlags flags, u64 alignment) { + std::scoped_lock lk{mutex}; + + virtual_addr = (virtual_addr == 0) ? impl.SystemManagedVirtualBase() : virtual_addr; + alignment = alignment > 0 ? alignment : 2_MB; + VAddr mapped_addr = alignment > 0 ? Common::AlignUp(virtual_addr, alignment) : virtual_addr; + + // Fixed mapping means the virtual address must exactly match the provided one. + if (True(flags & MemoryMapFlags::Fixed)) { + const auto& vma = FindVMA(mapped_addr)->second; + // If the VMA is mapped, unmap the region first. + if (vma.IsMapped()) { + UnmapMemoryImpl(mapped_addr, size); + } + const size_t remaining_size = vma.base + vma.size - mapped_addr; + ASSERT_MSG(vma.type == VMAType::Free && remaining_size >= size); + } + + // Find the first free area starting with provided virtual address. + if (False(flags & MemoryMapFlags::Fixed)) { + mapped_addr = SearchFree(mapped_addr, size, alignment); + } + + // Add virtual memory area + const auto new_vma_handle = CarveVMA(mapped_addr, size); + auto& new_vma = new_vma_handle->second; + new_vma.disallow_merge = True(flags & MemoryMapFlags::NoCoalesce); + new_vma.prot = MemoryProt::NoAccess; + new_vma.name = ""; + new_vma.type = VMAType::PoolReserved; + MergeAdjacent(vma_map, new_vma_handle); + + *out_addr = std::bit_cast(mapped_addr); + return ORBIS_OK; +} + int MemoryManager::Reserve(void** out_addr, VAddr virtual_addr, size_t size, MemoryMapFlags flags, u64 alignment) { std::scoped_lock lk{mutex}; @@ -149,6 +215,36 @@ int MemoryManager::Reserve(void** out_addr, VAddr virtual_addr, size_t size, Mem return ORBIS_OK; } +int MemoryManager::PoolCommit(VAddr virtual_addr, size_t size, MemoryProt prot) { + std::scoped_lock lk{mutex}; + + const u64 alignment = 64_KB; + + // When virtual addr is zero, force it to virtual_base. The guest cannot pass Fixed + // flag so we will take the branch that searches for free (or reserved) mappings. + virtual_addr = (virtual_addr == 0) ? impl.SystemManagedVirtualBase() : virtual_addr; + VAddr mapped_addr = Common::AlignUp(virtual_addr, alignment); + + // This should return SCE_KERNEL_ERROR_ENOMEM but shouldn't normally happen. + const auto& vma = FindVMA(mapped_addr)->second; + const size_t remaining_size = vma.base + vma.size - mapped_addr; + ASSERT_MSG(!vma.IsMapped() && remaining_size >= size); + + // Perform the mapping. + void* out_addr = impl.Map(mapped_addr, size, alignment, -1, false); + TRACK_ALLOC(out_addr, size, "VMEM"); + + auto& new_vma = CarveVMA(mapped_addr, size)->second; + new_vma.disallow_merge = false; + new_vma.prot = prot; + new_vma.name = ""; + new_vma.type = Core::VMAType::Pooled; + new_vma.is_exec = false; + new_vma.phys_base = 0; + + return ORBIS_OK; +} + int MemoryManager::MapMemory(void** out_addr, VAddr virtual_addr, size_t size, MemoryProt prot, MemoryMapFlags flags, VMAType type, std::string_view name, bool is_exec, PAddr phys_addr, u64 alignment) { @@ -232,6 +328,39 @@ int MemoryManager::MapFile(void** out_addr, VAddr virtual_addr, size_t size, Mem return ORBIS_OK; } +void MemoryManager::PoolDecommit(VAddr virtual_addr, size_t size) { + std::scoped_lock lk{mutex}; + + const auto it = FindVMA(virtual_addr); + const auto& vma_base = it->second; + ASSERT_MSG(vma_base.Contains(virtual_addr, size), + "Existing mapping does not contain requested unmap range"); + + const auto vma_base_addr = vma_base.base; + const auto vma_base_size = vma_base.size; + const auto phys_base = vma_base.phys_base; + const bool is_exec = vma_base.is_exec; + const auto start_in_vma = virtual_addr - vma_base_addr; + const auto type = vma_base.type; + + rasterizer->UnmapMemory(virtual_addr, size); + + // Mark region as free and attempt to coalesce it with neighbours. + const auto new_it = CarveVMA(virtual_addr, size); + auto& vma = new_it->second; + vma.type = VMAType::PoolReserved; + vma.prot = MemoryProt::NoAccess; + vma.phys_base = 0; + vma.disallow_merge = false; + vma.name = ""; + MergeAdjacent(vma_map, new_it); + + // Unmap the memory region. + impl.Unmap(vma_base_addr, vma_base_size, start_in_vma, start_in_vma + size, phys_base, is_exec, + false, false); + TRACK_FREE(virtual_addr, "VMEM"); +} + void MemoryManager::UnmapMemory(VAddr virtual_addr, size_t size) { std::scoped_lock lk{mutex}; UnmapMemoryImpl(virtual_addr, size); diff --git a/src/core/memory.h b/src/core/memory.h index 73ffab503..752209cfc 100644 --- a/src/core/memory.h +++ b/src/core/memory.h @@ -50,15 +50,17 @@ enum class VMAType : u32 { Direct = 2, Flexible = 3, Pooled = 4, - Stack = 5, - Code = 6, - File = 7, + PoolReserved = 5, + Stack = 6, + Code = 7, + File = 8, }; struct DirectMemoryArea { PAddr base = 0; size_t size = 0; int memory_type = 0; + bool is_pooled = false; bool is_free = true; PAddr GetEnd() const { @@ -96,7 +98,7 @@ struct VirtualMemoryArea { } bool IsMapped() const noexcept { - return type != VMAType::Free && type != VMAType::Reserved; + return type != VMAType::Free && type != VMAType::Reserved && type != VMAType::PoolReserved; } bool CanMergeWith(const VirtualMemoryArea& next) const { @@ -135,6 +137,10 @@ public: return total_direct_size; } + u64 GetTotalFlexibleSize() const { + return total_flexible_size; + } + u64 GetAvailableFlexibleSize() const { return total_flexible_size - flexible_usage; } @@ -145,14 +151,21 @@ public: void SetupMemoryRegions(u64 flexible_size); + PAddr PoolExpand(PAddr search_start, PAddr search_end, size_t size, u64 alignment); + PAddr Allocate(PAddr search_start, PAddr search_end, size_t size, u64 alignment, int memory_type); void Free(PAddr phys_addr, size_t size); + int PoolReserve(void** out_addr, VAddr virtual_addr, size_t size, MemoryMapFlags flags, + u64 alignment = 0); + int Reserve(void** out_addr, VAddr virtual_addr, size_t size, MemoryMapFlags flags, u64 alignment = 0); + int PoolCommit(VAddr virtual_addr, size_t size, MemoryProt prot); + int MapMemory(void** out_addr, VAddr virtual_addr, size_t size, MemoryProt prot, MemoryMapFlags flags, VMAType type, std::string_view name = "", bool is_exec = false, PAddr phys_addr = -1, u64 alignment = 0); @@ -160,6 +173,8 @@ public: int MapFile(void** out_addr, VAddr virtual_addr, size_t size, MemoryProt prot, MemoryMapFlags flags, uintptr_t fd, size_t offset); + void PoolDecommit(VAddr virtual_addr, size_t size); + void UnmapMemory(VAddr virtual_addr, size_t size); int QueryProtection(VAddr addr, void** start, void** end, u32* prot); diff --git a/src/core/module.cpp b/src/core/module.cpp index e62c57785..5d3b40577 100644 --- a/src/core/module.cpp +++ b/src/core/module.cpp @@ -70,7 +70,7 @@ Module::~Module() = default; s32 Module::Start(size_t args, const void* argp, void* param) { LOG_INFO(Core_Linker, "Module started : {}", name); - auto* linker = Common::Singleton::Instance(); + const auto* linker = Common::Singleton::Instance(); const VAddr addr = dynamic_info.init_virtual_addr + GetBaseAddress(); return linker->ExecuteGuest(reinterpret_cast(addr), args, argp, param); } diff --git a/src/core/signals.cpp b/src/core/signals.cpp index 87f56c85a..8faf794ed 100644 --- a/src/core/signals.cpp +++ b/src/core/signals.cpp @@ -83,6 +83,12 @@ static void SignalHandler(int sig, siginfo_t* info, void* raw_context) { fmt::ptr(code_address), DisassembleInstruction(code_address)); } break; + case SIGUSR1: { // Sleep thread until signal is received + sigset_t sigset; + sigemptyset(&sigset); + sigaddset(&sigset, SIGUSR1); + sigwait(&sigset, &sig); + } break; default: break; } @@ -105,6 +111,8 @@ SignalDispatch::SignalDispatch() { "Failed to register access violation signal handler."); ASSERT_MSG(sigaction(SIGILL, &action, nullptr) == 0, "Failed to register illegal instruction signal handler."); + ASSERT_MSG(sigaction(SIGUSR1, &action, nullptr) == 0, + "Failed to register sleep signal handler."); #endif } diff --git a/src/emulator.cpp b/src/emulator.cpp index b27c73867..721151ccc 100644 --- a/src/emulator.cpp +++ b/src/emulator.cpp @@ -61,7 +61,6 @@ Emulator::Emulator() { LOG_INFO(Config, "General isNeo: {}", Config::isNeoMode()); LOG_INFO(Config, "GPU isNullGpu: {}", Config::nullGpu()); LOG_INFO(Config, "GPU shouldDumpShaders: {}", Config::dumpShaders()); - LOG_INFO(Config, "GPU shouldDumpPM4: {}", Config::dumpPM4()); LOG_INFO(Config, "GPU vblankDivider: {}", Config::vblankDiv()); LOG_INFO(Config, "Vulkan gpuId: {}", Config::getGpuId()); LOG_INFO(Config, "Vulkan vkValidation: {}", Config::vkValidationEnabled()); @@ -115,7 +114,7 @@ void Emulator::Run(const std::filesystem::path& file) { Common::FS::GetUserPath(Common::FS::PathType::MetaDataDir) / id / "TrophyFiles"; if (!std::filesystem::exists(trophyDir)) { TRP trp; - if (!trp.Extract(file.parent_path())) { + if (!trp.Extract(file.parent_path(), id)) { LOG_ERROR(Loader, "Couldn't extract trophies"); } } diff --git a/src/images/flag_china.png b/src/images/flag_china.png index 13bf221e9..33fcdfd86 100644 Binary files a/src/images/flag_china.png and b/src/images/flag_china.png differ diff --git a/src/images/flag_eu.png b/src/images/flag_eu.png index 0922e11ec..461f814e1 100644 Binary files a/src/images/flag_eu.png and b/src/images/flag_eu.png differ diff --git a/src/images/flag_jp.png b/src/images/flag_jp.png index 6433eecfd..fd056962a 100644 Binary files a/src/images/flag_jp.png and b/src/images/flag_jp.png differ diff --git a/src/images/flag_us.png b/src/images/flag_us.png index f4bf3a300..7b0089af4 100644 Binary files a/src/images/flag_us.png and b/src/images/flag_us.png differ diff --git a/src/images/flag_world.png b/src/images/flag_world.png index 0dcccf800..7b96dff11 100644 Binary files a/src/images/flag_world.png and b/src/images/flag_world.png differ diff --git a/src/imgui/imgui_std.h b/src/imgui/imgui_std.h index ec1e2f79d..168204ea8 100644 --- a/src/imgui/imgui_std.h +++ b/src/imgui/imgui_std.h @@ -10,6 +10,9 @@ #define IM_COL32_GRAY(x) IM_COL32(x, x, x, 0xFF) +#define IMGUI_FONT_TEXT 0 +#define IMGUI_FONT_MONO 1 + namespace ImGui { namespace Easing { @@ -27,6 +30,20 @@ inline void CentralizeWindow() { SetNextWindowPos(display_size / 2.0f, ImGuiCond_Always, {0.5f}); } +inline void KeepWindowInside(ImVec2 display_size = GetIO().DisplaySize) { + const auto cur_pos = GetWindowPos(); + if (cur_pos.x < 0.0f || cur_pos.y < 0.0f) { + SetWindowPos(ImMax(cur_pos, ImVec2(0.0f, 0.0f))); + return; + } + const auto cur_size = GetWindowSize(); + const auto bottom_right = cur_pos + cur_size; + if (bottom_right.x > display_size.x || bottom_right.y > display_size.y) { + const auto max_pos = display_size - cur_size; + SetWindowPos(ImMin(cur_pos, max_pos)); + } +} + inline void KeepNavHighlight() { GetCurrentContext()->NavDisableHighlight = false; } diff --git a/src/imgui/layer/video_info.cpp b/src/imgui/layer/video_info.cpp deleted file mode 100644 index 55cfaf895..000000000 --- a/src/imgui/layer/video_info.cpp +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#include - -#include "common/config.h" -#include "common/types.h" -#include "imgui_internal.h" -#include "video_info.h" - -using namespace ImGui; - -struct FrameInfo { - u32 num; - float delta; -}; - -static bool show = false; -static bool show_advanced = false; - -static u32 current_frame = 0; -constexpr float TARGET_FPS = 60.0f; -constexpr u32 FRAME_BUFFER_SIZE = 1024; -constexpr float BAR_WIDTH_MULT = 1.4f; -constexpr float BAR_HEIGHT_MULT = 1.25f; -constexpr float FRAME_GRAPH_PADDING_Y = 3.0f; -static std::array frame_list; -static float frame_graph_height = 50.0f; - -static void DrawSimple() { - const auto io = GetIO(); - Text("Frame time: %.3f ms (%.1f FPS)", 1000.0f / io.Framerate, io.Framerate); -} - -static void DrawAdvanced() { - const auto& ctx = *GetCurrentContext(); - const auto& io = ctx.IO; - const auto& window = *ctx.CurrentWindow; - auto& draw_list = *window.DrawList; - - Text("Frame time: %.3f ms (%.1f FPS)", io.DeltaTime * 1000.0f, io.Framerate); - - SeparatorText("Frame graph"); - const float full_width = GetContentRegionAvail().x; - { // Frame graph - inspired by - // https://asawicki.info/news_1758_an_idea_for_visualization_of_frame_times - auto pos = GetCursorScreenPos(); - const ImVec2 size{full_width, frame_graph_height + FRAME_GRAPH_PADDING_Y * 2.0f}; - ItemSize(size); - if (!ItemAdd({pos, pos + size}, GetID("FrameGraph"))) { - return; - } - - float target_dt = 1.0f / (TARGET_FPS * (float)Config::vblankDiv()); - float cur_pos_x = pos.x + full_width; - pos.y += FRAME_GRAPH_PADDING_Y; - const float final_pos_y = pos.y + frame_graph_height; - - draw_list.AddRectFilled({pos.x, pos.y - FRAME_GRAPH_PADDING_Y}, - {pos.x + full_width, final_pos_y + FRAME_GRAPH_PADDING_Y}, - IM_COL32(0x33, 0x33, 0x33, 0xFF)); - draw_list.PushClipRect({pos.x, pos.y}, {pos.x + full_width, final_pos_y}, true); - for (u32 i = 0; i < FRAME_BUFFER_SIZE; ++i) { - const auto& frame_info = frame_list[(current_frame - i) % FRAME_BUFFER_SIZE]; - const float dt_factor = target_dt / frame_info.delta; - - const float width = std::ceil(BAR_WIDTH_MULT / dt_factor); - const float height = - std::min(std::log2(BAR_HEIGHT_MULT / dt_factor) / 3.0f, 1.0f) * frame_graph_height; - - ImU32 color; - if (dt_factor >= 0.95f) { // BLUE - color = IM_COL32(0x33, 0x33, 0xFF, 0xFF); - } else if (dt_factor >= 0.5f) { // GREEN <> YELLOW - float t = 1.0f - (dt_factor - 0.5f) * 2.0f; - int r = (int)(0xFF * t); - color = IM_COL32(r, 0xFF, 0, 0xFF); - } else { // YELLOW <> RED - float t = dt_factor * 2.0f; - int g = (int)(0xFF * t); - color = IM_COL32(0xFF, g, 0, 0xFF); - } - draw_list.AddRectFilled({cur_pos_x - width, final_pos_y - height}, - {cur_pos_x, final_pos_y}, color); - cur_pos_x -= width; - if (cur_pos_x < width) { - break; - } - } - draw_list.PopClipRect(); - } -} - -void Layers::VideoInfo::Draw() { - const auto io = GetIO(); - - const FrameInfo frame_info{ - .num = ++current_frame, - .delta = io.DeltaTime, - }; - frame_list[current_frame % FRAME_BUFFER_SIZE] = frame_info; - - if (IsKeyPressed(ImGuiKey_F10, false)) { - const bool changed_ctrl = io.KeyCtrl != show_advanced; - show_advanced = io.KeyCtrl; - show = changed_ctrl || !show; - } - - if (show) { - if (show_advanced) { - if (Begin("Video debug info", &show, 0)) { - DrawAdvanced(); - } - } else { - if (Begin("Video Info", nullptr, - ImGuiWindowFlags_NoNav | ImGuiWindowFlags_NoDecoration | - ImGuiWindowFlags_AlwaysAutoResize)) { - DrawSimple(); - } - } - End(); - } -} diff --git a/src/imgui/layer/video_info.h b/src/imgui/layer/video_info.h deleted file mode 100644 index 8a8af554e..000000000 --- a/src/imgui/layer/video_info.h +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#pragma once - -#include "imgui/imgui_layer.h" - -namespace Vulkan { -class RendererVulkan; -} -namespace ImGui::Layers { - -class VideoInfo : public Layer { - ::Vulkan::RendererVulkan* renderer{}; - -public: - explicit VideoInfo(::Vulkan::RendererVulkan* renderer) : renderer(renderer) {} - - void Draw() override; -}; - -} // namespace ImGui::Layers diff --git a/src/imgui/renderer/CMakeLists.txt b/src/imgui/renderer/CMakeLists.txt index b5f51ef62..5d74632f9 100644 --- a/src/imgui/renderer/CMakeLists.txt +++ b/src/imgui/renderer/CMakeLists.txt @@ -7,6 +7,7 @@ add_executable(Dear_ImGui_FontEmbed ${CMAKE_SOURCE_DIR}/externals/dear_imgui/mis set(FONT_LIST NotoSansJP-Regular.ttf + ProggyVector-Regular.ttf ) set(OutputList "") diff --git a/src/imgui/renderer/fonts/ProggyVector-Regular.ttf b/src/imgui/renderer/fonts/ProggyVector-Regular.ttf new file mode 100644 index 000000000..0865b6561 Binary files /dev/null and b/src/imgui/renderer/fonts/ProggyVector-Regular.ttf differ diff --git a/src/imgui/renderer/imgui_core.cpp b/src/imgui/renderer/imgui_core.cpp index 8c2b31c9e..2473f3713 100644 --- a/src/imgui/renderer/imgui_core.cpp +++ b/src/imgui/renderer/imgui_core.cpp @@ -6,6 +6,7 @@ #include "common/config.h" #include "common/path_util.h" +#include "core/devtools/layer.h" #include "imgui/imgui_layer.h" #include "imgui_core.h" #include "imgui_impl_sdl3.h" @@ -16,6 +17,7 @@ #include "video_core/renderer_vulkan/renderer_vulkan.h" #include "imgui_fonts/notosansjp_regular.ttf.g.cpp" +#include "imgui_fonts/proggyvector_regular.ttf.g.cpp" static void CheckVkResult(const vk::Result err) { LOG_ERROR(ImGui, "Vulkan error {}", vk::to_string(err)); @@ -33,6 +35,7 @@ std::deque>& GetChangeLayers() { } static std::mutex change_layers_mutex{}; +static ImGuiID dock_id; namespace ImGui { @@ -51,6 +54,7 @@ void Initialize(const ::Vulkan::Instance& instance, const Frontend::WindowSDL& w io.ConfigFlags |= ImGuiConfigFlags_NavEnableGamepad; io.ConfigFlags |= ImGuiConfigFlags_DockingEnable; io.DisplaySize = ImVec2((float)window.getWidth(), (float)window.getHeight()); + ImGui::PushStyleVar(ImGuiStyleVar_WindowRounding, 6.0f); // Makes the window edges rounded auto path = config_path.u8string(); char* config_file_buf = new char[path.size() + 1](); @@ -73,12 +77,16 @@ void Initialize(const ::Vulkan::Instance& instance, const Frontend::WindowSDL& w ImFontConfig font_cfg{}; font_cfg.OversampleH = 2; font_cfg.OversampleV = 1; - io.Fonts->AddFontFromMemoryCompressedTTF(imgui_font_notosansjp_regular_compressed_data, - imgui_font_notosansjp_regular_compressed_size, 16.0f, - &font_cfg, ranges.Data); + io.FontDefault = io.Fonts->AddFontFromMemoryCompressedTTF( + imgui_font_notosansjp_regular_compressed_data, + imgui_font_notosansjp_regular_compressed_size, 16.0f, &font_cfg, ranges.Data); + io.Fonts->AddFontFromMemoryCompressedTTF(imgui_font_proggyvector_regular_compressed_data, + imgui_font_proggyvector_regular_compressed_size, + 16.0f); StyleColorsDark(); + ::Core::Devtools::Layer::SetupSettings(); Sdl::Init(window.GetSdlWindow()); const Vulkan::InitInfo vk_info{ @@ -99,6 +107,14 @@ void Initialize(const ::Vulkan::Instance& instance, const Frontend::WindowSDL& w Vulkan::Init(vk_info); TextureManager::StartWorker(); + + char label[32]; + ImFormatString(label, IM_ARRAYSIZE(label), "WindowOverViewport_%08X", GetMainViewport()->ID); + dock_id = ImHashStr(label); + + if (const auto dpi = SDL_GetWindowDisplayScale(window.GetSdlWindow()); dpi > 0.0f) { + GetIO().FontGlobalScale = dpi; + } } void OnResize() { @@ -140,8 +156,10 @@ bool ProcessEvent(SDL_Event* event) { case SDL_EVENT_GAMEPAD_BUTTON_DOWN: case SDL_EVENT_GAMEPAD_AXIS_MOTION: case SDL_EVENT_GAMEPAD_TOUCHPAD_DOWN: - case SDL_EVENT_GAMEPAD_TOUCHPAD_MOTION: - return GetIO().NavActive; + case SDL_EVENT_GAMEPAD_TOUCHPAD_MOTION: { + const auto& io = GetIO(); + return io.NavActive && io.Ctx->NavWindow != nullptr && io.Ctx->NavWindow->ID != dock_id; + } default: return false; } @@ -165,6 +183,8 @@ void NewFrame() { Sdl::NewFrame(); ImGui::NewFrame(); + DockSpaceOverViewport(0, GetMainViewport(), ImGuiDockNodeFlags_PassthruCentralNode); + for (auto* layer : layers) { layer->Draw(); } diff --git a/src/input/controller.cpp b/src/input/controller.cpp index 4de6d83b8..dcd8ed946 100644 --- a/src/input/controller.cpp +++ b/src/input/controller.cpp @@ -127,7 +127,7 @@ void GameController::SetLightBarRGB(u8 r, u8 g, u8 b) { bool GameController::SetVibration(u8 smallMotor, u8 largeMotor) { if (m_sdl_gamepad != nullptr) { return SDL_RumbleGamepad(m_sdl_gamepad, (smallMotor / 255.0f) * 0xFFFF, - (largeMotor / 255.0f) * 0xFFFF, -1) == 0; + (largeMotor / 255.0f) * 0xFFFF, -1); } return true; } diff --git a/src/qt_gui/background_music_player.cpp b/src/qt_gui/background_music_player.cpp index 37d877098..a40c5bfae 100644 --- a/src/qt_gui/background_music_player.cpp +++ b/src/qt_gui/background_music_player.cpp @@ -10,6 +10,12 @@ BackgroundMusicPlayer::BackgroundMusicPlayer(QObject* parent) : QObject(parent) m_mediaPlayer->setLoops(QMediaPlayer::Infinite); } +void BackgroundMusicPlayer::setVolume(int volume) { + float linearVolume = QAudio::convertVolume(volume / 100.0f, QAudio::LogarithmicVolumeScale, + QAudio::LinearVolumeScale); + m_audioOutput->setVolume(linearVolume); +} + void BackgroundMusicPlayer::playMusic(const QString& snd0path) { if (snd0path.isEmpty()) { stopMusic(); diff --git a/src/qt_gui/background_music_player.h b/src/qt_gui/background_music_player.h index 52f44f431..6d70fe68c 100644 --- a/src/qt_gui/background_music_player.h +++ b/src/qt_gui/background_music_player.h @@ -16,6 +16,7 @@ public: return instance; } + void setVolume(int volume); void playMusic(const QString& snd0path); void stopMusic(); @@ -25,4 +26,4 @@ private: QMediaPlayer* m_mediaPlayer; QAudioOutput* m_audioOutput; QUrl m_currentMusic; -}; \ No newline at end of file +}; diff --git a/src/qt_gui/cheats_patches.cpp b/src/qt_gui/cheats_patches.cpp index 655478d2b..c044c2c3c 100644 --- a/src/qt_gui/cheats_patches.cpp +++ b/src/qt_gui/cheats_patches.cpp @@ -456,10 +456,9 @@ void CheatsPatches::downloadCheats(const QString& source, const QString& gameSer if (source == "GoldHEN") { url = "https://raw.githubusercontent.com/GoldHEN/GoldHEN_Cheat_Repository/main/json.txt"; } else if (source == "wolf2022") { - url = "https://wolf2022.ir/trainer/" + gameSerial + "_" + gameVersion + ".json"; + url = "https://wolf2022.ir/trainer/list.json"; } else if (source == "shadPS4") { - url = "https://raw.githubusercontent.com/shadps4-emu/ps4_cheats/main/" - "CHEATS_JSON.txt"; + url = "https://raw.githubusercontent.com/shadps4-emu/ps4_cheats/main/CHEATS_JSON.txt"; } else { QMessageBox::warning(this, tr("Invalid Source"), QString(tr("The selected source is invalid.") + "\n%1").arg(source)); @@ -474,44 +473,32 @@ void CheatsPatches::downloadCheats(const QString& source, const QString& gameSer QByteArray jsonData = reply->readAll(); bool foundFiles = false; - if (source == "GoldHEN" || source == "shadPS4") { - QString textContent(jsonData); - QRegularExpression regex( - QString("%1_%2[^=]*\\.json").arg(gameSerial).arg(gameVersion)); - QRegularExpressionMatchIterator matches = regex.globalMatch(textContent); - QString baseUrl; + if (source == "wolf2022") { + QJsonDocument jsonDoc = QJsonDocument::fromJson(jsonData); + QJsonArray gamesArray = jsonDoc.object().value("games").toArray(); - if (source == "GoldHEN") { - baseUrl = "https://raw.githubusercontent.com/GoldHEN/GoldHEN_Cheat_Repository/" - "main/json/"; - } else { - baseUrl = "https://raw.githubusercontent.com/shadps4-emu/ps4_cheats/" - "main/CHEATS/"; - } + foreach (const QJsonValue& value, gamesArray) { + QJsonObject gameObject = value.toObject(); + QString title = gameObject.value("title").toString(); + QString version = gameObject.value("version").toString(); - while (matches.hasNext()) { - QRegularExpressionMatch match = matches.next(); - QString fileName = match.captured(0); + if (title == gameSerial && + (version == gameVersion || version == gameVersion.mid(1))) { + QString fileUrl = + "https://wolf2022.ir/trainer/" + gameObject.value("url").toString(); - if (!fileName.isEmpty()) { - QString newFileName = fileName; - int dotIndex = newFileName.lastIndexOf('.'); - if (dotIndex != -1) { + QString localFileName = gameObject.value("url").toString(); + localFileName = + localFileName.left(localFileName.lastIndexOf('.')) + "_wolf2022.json"; - if (source == "GoldHEN") { - newFileName.insert(dotIndex, "_GoldHEN"); - } else { - newFileName.insert(dotIndex, "_shadPS4"); - } - } - QString fileUrl = baseUrl + fileName; - QString localFilePath = dir.filePath(newFileName); + QString localFilePath = dir.filePath(localFileName); if (QFile::exists(localFilePath) && showMessageBox) { QMessageBox::StandardButton reply; reply = QMessageBox::question( this, tr("File Exists"), - tr("File already exists. Do you want to replace it?"), + tr("File already exists. Do you want to replace it?") + "\n" + + localFileName, QMessageBox::Yes | QMessageBox::No); if (reply == QMessageBox::No) { continue; @@ -549,38 +536,81 @@ void CheatsPatches::downloadCheats(const QString& source, const QString& gameSer if (!foundFiles && showMessageBox) { QMessageBox::warning(this, tr("Cheats Not Found"), tr("CheatsNotFound_MSG")); } - } else if (source == "wolf2022") { - QString fileName = QFileInfo(QUrl(url).path()).fileName(); - QString baseFileName = fileName; - int dotIndex = baseFileName.lastIndexOf('.'); - if (dotIndex != -1) { - baseFileName.insert(dotIndex, "_wolf2022"); + } else if (source == "GoldHEN" || source == "shadPS4") { + QString textContent(jsonData); + QRegularExpression regex( + QString("%1_%2[^=]*\\.json").arg(gameSerial).arg(gameVersion)); + QRegularExpressionMatchIterator matches = regex.globalMatch(textContent); + QString baseUrl; + + if (source == "GoldHEN") { + baseUrl = "https://raw.githubusercontent.com/GoldHEN/GoldHEN_Cheat_Repository/" + "main/json/"; + } else { + baseUrl = "https://raw.githubusercontent.com/shadps4-emu/ps4_cheats/" + "main/CHEATS/"; } - QString filePath; - Common::FS::PathToQString(filePath, - Common::FS::GetUserPath(Common::FS::PathType::CheatsDir)); - filePath += "/" + baseFileName; - if (QFile::exists(filePath) && showMessageBox) { - QMessageBox::StandardButton reply2; - reply2 = - QMessageBox::question(this, tr("File Exists"), - tr("File already exists. Do you want to replace it?"), - QMessageBox::Yes | QMessageBox::No); - if (reply2 == QMessageBox::No) { - reply->deleteLater(); - return; + + while (matches.hasNext()) { + QRegularExpressionMatch match = matches.next(); + QString fileName = match.captured(0); + + if (!fileName.isEmpty()) { + QString newFileName = fileName; + int dotIndex = newFileName.lastIndexOf('.'); + if (dotIndex != -1) { + + if (source == "GoldHEN") { + newFileName.insert(dotIndex, "_GoldHEN"); + } else { + newFileName.insert(dotIndex, "_shadPS4"); + } + } + QString fileUrl = baseUrl + fileName; + QString localFilePath = dir.filePath(newFileName); + + if (QFile::exists(localFilePath) && showMessageBox) { + QMessageBox::StandardButton reply; + reply = QMessageBox::question( + this, tr("File Exists"), + tr("File already exists. Do you want to replace it?") + "\n" + + newFileName, + QMessageBox::Yes | QMessageBox::No); + if (reply == QMessageBox::No) { + continue; + } + } + QNetworkRequest fileRequest(fileUrl); + QNetworkReply* fileReply = manager->get(fileRequest); + + connect(fileReply, &QNetworkReply::finished, [=, this]() { + if (fileReply->error() == QNetworkReply::NoError) { + QByteArray fileData = fileReply->readAll(); + QFile localFile(localFilePath); + if (localFile.open(QIODevice::WriteOnly)) { + localFile.write(fileData); + localFile.close(); + } else { + QMessageBox::warning( + this, tr("Error"), + QString(tr("Failed to save file:") + "\n%1") + .arg(localFilePath)); + } + } else { + QMessageBox::warning(this, tr("Error"), + QString(tr("Failed to download file:") + + "%1\n\n" + tr("Error:") + "%2") + .arg(fileUrl) + .arg(fileReply->errorString())); + } + fileReply->deleteLater(); + }); + + foundFiles = true; } } - QFile cheatFile(filePath); - if (cheatFile.open(QIODevice::WriteOnly)) { - cheatFile.write(jsonData); - cheatFile.close(); - foundFiles = true; - populateFileListCheats(); - } else { - QMessageBox::warning( - this, tr("Error"), - QString(tr("Failed to save file:") + "\n%1").arg(filePath)); + if (!foundFiles && showMessageBox) { + QMessageBox::warning(this, tr("Cheats Not Found"), tr("CheatsNotFound_MSG")); } } if (foundFiles && showMessageBox) { @@ -910,11 +940,16 @@ void CheatsPatches::addCheatsToLayout(const QJsonArray& modsArray, const QJsonAr void CheatsPatches::populateFileListCheats() { QString cheatsDir; Common::FS::PathToQString(cheatsDir, Common::FS::GetUserPath(Common::FS::PathType::CheatsDir)); - QString pattern = m_gameSerial + "_" + m_gameVersion + "*.json"; + + QString fullGameVersion = m_gameVersion; + QString modifiedGameVersion = m_gameVersion.mid(1); + + QString patternWithFirstChar = m_gameSerial + "_" + fullGameVersion + "*.json"; + QString patternWithoutFirstChar = m_gameSerial + "_" + modifiedGameVersion + "*.json"; QDir dir(cheatsDir); QStringList filters; - filters << pattern; + filters << patternWithFirstChar << patternWithoutFirstChar; dir.setNameFilters(filters); QFileInfoList fileList = dir.entryInfoList(QDir::Files); @@ -1248,4 +1283,4 @@ void CheatsPatches::onPatchCheckBoxHovered(QCheckBox* checkBox, bool hovered) { } else { instructionsTextEdit->setText(defaultTextEdit); } -} +} \ No newline at end of file diff --git a/src/qt_gui/check_update.cpp b/src/qt_gui/check_update.cpp index f5e284a26..023c6e7bb 100644 --- a/src/qt_gui/check_update.cpp +++ b/src/qt_gui/check_update.cpp @@ -23,6 +23,7 @@ #include #include #include +#include #include "check_update.h" using namespace Common::FS; @@ -313,20 +314,37 @@ void CheckUpdate::requestChangelog(const QString& currentRev, const QString& lat } void CheckUpdate::DownloadUpdate(const QString& url) { + QProgressBar* progressBar = new QProgressBar(this); + progressBar->setRange(0, 100); + progressBar->setTextVisible(true); + progressBar->setValue(0); + + layout()->addWidget(progressBar); + QNetworkRequest request(url); QNetworkReply* reply = networkManager->get(request); - connect(reply, &QNetworkReply::finished, this, [this, reply, url]() { + connect(reply, &QNetworkReply::downloadProgress, this, + [progressBar](qint64 bytesReceived, qint64 bytesTotal) { + if (bytesTotal > 0) { + int percentage = static_cast((bytesReceived * 100) / bytesTotal); + progressBar->setValue(percentage); + } + }); + + connect(reply, &QNetworkReply::finished, this, [this, reply, progressBar, url]() { + progressBar->setValue(100); if (reply->error() != QNetworkReply::NoError) { QMessageBox::warning(this, tr("Error"), tr("Network error occurred while trying to access the URL") + ":\n" + url + "\n" + reply->errorString()); reply->deleteLater(); + progressBar->deleteLater(); return; } - QString userPath = - QString::fromStdString(Common::FS::GetUserPath(Common::FS::PathType::UserDir).string()); + QString userPath; + Common::FS::PathToQString(userPath, Common::FS::GetUserPath(Common::FS::PathType::UserDir)); QString tempDownloadPath = userPath + "/temp_download_update"; QDir dir(tempDownloadPath); if (!dir.exists()) { @@ -348,16 +366,18 @@ void CheckUpdate::DownloadUpdate(const QString& url) { } reply->deleteLater(); + progressBar->deleteLater(); }); } void CheckUpdate::Install() { - QString userPath = - QString::fromStdString(Common::FS::GetUserPath(Common::FS::PathType::UserDir).string()); + QString userPath; + Common::FS::PathToQString(userPath, Common::FS::GetUserPath(Common::FS::PathType::UserDir)); QString startingUpdate = tr("Starting Update..."); QString tempDirPath = userPath + "/temp_download_update"; - QString rootPath = QString::fromStdString(std::filesystem::current_path().string()); + QString rootPath; + Common::FS::PathToQString(rootPath, std::filesystem::current_path()); QString scriptContent; QString scriptFileName; diff --git a/src/qt_gui/game_grid_frame.cpp b/src/qt_gui/game_grid_frame.cpp index 3113aecc0..0292828b0 100644 --- a/src/qt_gui/game_grid_frame.cpp +++ b/src/qt_gui/game_grid_frame.cpp @@ -22,7 +22,7 @@ GameGridFrame::GameGridFrame(std::shared_ptr game_info_get, QWidg this->setContextMenuPolicy(Qt::CustomContextMenu); PopulateGameGrid(m_game_info->m_games, false); - connect(this, &QTableWidget::cellClicked, this, &GameGridFrame::SetGridBackgroundImage); + connect(this, &QTableWidget::currentCellChanged, this, &GameGridFrame::onCurrentCellChanged); connect(this->verticalScrollBar(), &QScrollBar::valueChanged, this, &GameGridFrame::RefreshGridBackgroundImage); @@ -31,22 +31,33 @@ GameGridFrame::GameGridFrame(std::shared_ptr game_info_get, QWidg connect(this, &QTableWidget::customContextMenuRequested, this, [=, this](const QPoint& pos) { m_gui_context_menus.RequestGameMenu(pos, m_game_info->m_games, this, false); }); - connect(this, &QTableWidget::cellClicked, this, [&]() { - cellClicked = true; - crtRow = this->currentRow(); - crtColumn = this->currentColumn(); - columnCnt = this->columnCount(); - }); } -void GameGridFrame::PlayBackgroundMusic(QTableWidgetItem* item) { - if (!item) { +void GameGridFrame::onCurrentCellChanged(int currentRow, int currentColumn, int previousRow, + int previousColumn) { + cellClicked = true; + crtRow = currentRow; + crtColumn = currentColumn; + columnCnt = this->columnCount(); + + auto itemID = (crtRow * columnCnt) + currentColumn; + if (itemID > m_game_info->m_games.count() - 1) { + validCellSelected = false; BackgroundMusicPlayer::getInstance().stopMusic(); return; } - QString snd0path; - Common::FS::PathToQString(snd0path, m_game_info->m_games[item->row()].snd0_path); - BackgroundMusicPlayer::getInstance().playMusic(snd0path); + validCellSelected = true; + SetGridBackgroundImage(crtRow, crtColumn); + auto snd0Path = QString::fromStdString(m_game_info->m_games[itemID].snd0_path.string()); + PlayBackgroundMusic(snd0Path); +} + +void GameGridFrame::PlayBackgroundMusic(QString path) { + if (path.isEmpty() || !Config::getPlayBGM()) { + BackgroundMusicPlayer::getInstance().stopMusic(); + return; + } + BackgroundMusicPlayer::getInstance().playMusic(path); } void GameGridFrame::PopulateGameGrid(QVector m_games_search, bool fromSearch) { @@ -157,3 +168,7 @@ void GameGridFrame::RefreshGridBackgroundImage() { this->setPalette(palette); } } + +bool GameGridFrame::IsValidCellSelected() { + return validCellSelected; +} diff --git a/src/qt_gui/game_grid_frame.h b/src/qt_gui/game_grid_frame.h index 0083fd688..c09767684 100644 --- a/src/qt_gui/game_grid_frame.h +++ b/src/qt_gui/game_grid_frame.h @@ -20,7 +20,9 @@ Q_SIGNALS: public Q_SLOTS: void SetGridBackgroundImage(int row, int column); void RefreshGridBackgroundImage(); - void PlayBackgroundMusic(QTableWidgetItem* item); + void PlayBackgroundMusic(QString path); + void onCurrentCellChanged(int currentRow, int currentColumn, int previousRow, + int previousColumn); private: QImage backgroundImage; @@ -28,10 +30,12 @@ private: GuiContextMenus m_gui_context_menus; std::shared_ptr m_game_info; std::shared_ptr> m_games_shared; + bool validCellSelected = false; public: explicit GameGridFrame(std::shared_ptr game_info_get, QWidget* parent = nullptr); void PopulateGameGrid(QVector m_games, bool fromSearch); + bool IsValidCellSelected(); bool cellClicked = false; int icon_size; diff --git a/src/qt_gui/game_install_dialog.cpp b/src/qt_gui/game_install_dialog.cpp index d8cc7a837..11daf2de0 100644 --- a/src/qt_gui/game_install_dialog.cpp +++ b/src/qt_gui/game_install_dialog.cpp @@ -18,6 +18,7 @@ GameInstallDialog::GameInstallDialog() : m_gamesDirectory(nullptr) { auto layout = new QVBoxLayout(this); layout->addWidget(SetupGamesDirectory()); + layout->addWidget(SetupAddonsDirectory()); layout->addStretch(); layout->addWidget(SetupDialogActions()); @@ -27,7 +28,7 @@ GameInstallDialog::GameInstallDialog() : m_gamesDirectory(nullptr) { GameInstallDialog::~GameInstallDialog() {} -void GameInstallDialog::Browse() { +void GameInstallDialog::BrowseGamesDirectory() { auto path = QFileDialog::getExistingDirectory(this, tr("Directory to install games")); if (!path.isEmpty()) { @@ -35,6 +36,14 @@ void GameInstallDialog::Browse() { } } +void GameInstallDialog::BrowseAddonsDirectory() { + auto path = QFileDialog::getExistingDirectory(this, tr("Directory to install DLC")); + + if (!path.isEmpty()) { + m_addonsDirectory->setText(QDir::toNativeSeparators(path)); + } +} + QWidget* GameInstallDialog::SetupGamesDirectory() { auto group = new QGroupBox(tr("Directory to install games")); auto layout = new QHBoxLayout(group); @@ -51,7 +60,30 @@ QWidget* GameInstallDialog::SetupGamesDirectory() { // Browse button. auto browse = new QPushButton(tr("Browse")); - connect(browse, &QPushButton::clicked, this, &GameInstallDialog::Browse); + connect(browse, &QPushButton::clicked, this, &GameInstallDialog::BrowseGamesDirectory); + + layout->addWidget(browse); + + return group; +} + +QWidget* GameInstallDialog::SetupAddonsDirectory() { + auto group = new QGroupBox(tr("Directory to install DLC")); + auto layout = new QHBoxLayout(group); + + // Input. + m_addonsDirectory = new QLineEdit(); + QString install_dir; + Common::FS::PathToQString(install_dir, Config::getAddonInstallDir()); + m_addonsDirectory->setText(install_dir); + m_addonsDirectory->setMinimumWidth(400); + + layout->addWidget(m_addonsDirectory); + + // Browse button. + auto browse = new QPushButton(tr("Browse")); + + connect(browse, &QPushButton::clicked, this, &GameInstallDialog::BrowseAddonsDirectory); layout->addWidget(browse); @@ -70,6 +102,7 @@ QWidget* GameInstallDialog::SetupDialogActions() { void GameInstallDialog::Save() { // Check games directory. auto gamesDirectory = m_gamesDirectory->text(); + auto addonsDirectory = m_addonsDirectory->text(); if (gamesDirectory.isEmpty() || !QDir(gamesDirectory).exists() || !QDir::isAbsolutePath(gamesDirectory)) { @@ -78,7 +111,22 @@ void GameInstallDialog::Save() { return; } + if (addonsDirectory.isEmpty() || !QDir::isAbsolutePath(addonsDirectory)) { + QMessageBox::critical(this, tr("Error"), + "The value for location to install DLC is not valid."); + return; + } + QDir addonsDir(addonsDirectory); + if (!addonsDir.exists()) { + if (!addonsDir.mkpath(".")) { + QMessageBox::critical(this, tr("Error"), + "The DLC install location could not be created."); + return; + } + } + Config::setGameInstallDir(Common::FS::PathFromQString(gamesDirectory)); + Config::setAddonInstallDir(Common::FS::PathFromQString(addonsDirectory)); const auto config_dir = Common::FS::GetUserPath(Common::FS::PathType::UserDir); Config::save(config_dir / "config.toml"); accept(); diff --git a/src/qt_gui/game_install_dialog.h b/src/qt_gui/game_install_dialog.h index 6f439e81d..0a4e29357 100644 --- a/src/qt_gui/game_install_dialog.h +++ b/src/qt_gui/game_install_dialog.h @@ -16,13 +16,16 @@ public: ~GameInstallDialog(); private slots: - void Browse(); + void BrowseGamesDirectory(); + void BrowseAddonsDirectory(); private: QWidget* SetupGamesDirectory(); + QWidget* SetupAddonsDirectory(); QWidget* SetupDialogActions(); void Save(); private: QLineEdit* m_gamesDirectory; + QLineEdit* m_addonsDirectory; }; \ No newline at end of file diff --git a/src/qt_gui/game_list_frame.cpp b/src/qt_gui/game_list_frame.cpp index 45e52f37d..c2f6736b8 100644 --- a/src/qt_gui/game_list_frame.cpp +++ b/src/qt_gui/game_list_frame.cpp @@ -41,7 +41,7 @@ GameListFrame::GameListFrame(std::shared_ptr game_info_get, QWidg this->horizontalHeader()->setSectionResizeMode(3, QHeaderView::Fixed); PopulateGameList(); - connect(this, &QTableWidget::itemClicked, this, &GameListFrame::SetListBackgroundImage); + connect(this, &QTableWidget::currentCellChanged, this, &GameListFrame::onCurrentCellChanged); connect(this->verticalScrollBar(), &QScrollBar::valueChanged, this, &GameListFrame::RefreshListBackgroundImage); connect(this->horizontalScrollBar(), &QScrollBar::valueChanged, this, @@ -69,8 +69,18 @@ GameListFrame::GameListFrame(std::shared_ptr game_info_get, QWidg }); } -void GameListFrame::PlayBackgroundMusic(QTableWidgetItem* item) { +void GameListFrame::onCurrentCellChanged(int currentRow, int currentColumn, int previousRow, + int previousColumn) { + QTableWidgetItem* item = this->item(currentRow, currentColumn); if (!item) { + return; + } + SetListBackgroundImage(item); + PlayBackgroundMusic(item); +} + +void GameListFrame::PlayBackgroundMusic(QTableWidgetItem* item) { + if (!item || !Config::getPlayBGM()) { BackgroundMusicPlayer::getInstance().stopMusic(); return; } diff --git a/src/qt_gui/game_list_frame.h b/src/qt_gui/game_list_frame.h index a1ec5c563..af9ce9280 100644 --- a/src/qt_gui/game_list_frame.h +++ b/src/qt_gui/game_list_frame.h @@ -23,6 +23,8 @@ public Q_SLOTS: void SortNameAscending(int columnIndex); void SortNameDescending(int columnIndex); void PlayBackgroundMusic(QTableWidgetItem* item); + void onCurrentCellChanged(int currentRow, int currentColumn, int previousRow, + int previousColumn); private: void SetTableItem(int row, int column, QString itemStr); @@ -43,24 +45,44 @@ public: int icon_size; static bool CompareStringsAscending(GameInfo a, GameInfo b, int columnIndex) { - if (columnIndex == 1) { + switch (columnIndex) { + case 1: return a.name < b.name; - } else if (columnIndex == 2) { + case 2: return a.serial < b.serial; - } else if (columnIndex == 3) { + case 3: + return a.region < b.region; + case 4: return a.fw < b.fw; + case 5: + return a.size < b.size; + case 6: + return a.version < b.version; + case 7: + return a.path < b.path; + default: + return false; } - return false; } static bool CompareStringsDescending(GameInfo a, GameInfo b, int columnIndex) { - if (columnIndex == 1) { + switch (columnIndex) { + case 1: return a.name > b.name; - } else if (columnIndex == 2) { + case 2: return a.serial > b.serial; - } else if (columnIndex == 3) { + case 3: + return a.region > b.region; + case 4: return a.fw > b.fw; + case 5: + return a.size > b.size; + case 6: + return a.version > b.version; + case 7: + return a.path > b.path; + default: + return false; } - return false; } }; \ No newline at end of file diff --git a/src/qt_gui/gui_context_menus.h b/src/qt_gui/gui_context_menus.h index 3218884d5..4eb657572 100644 --- a/src/qt_gui/gui_context_menus.h +++ b/src/qt_gui/gui_context_menus.h @@ -312,10 +312,7 @@ public: if (selected == &installPackage) { QStringList pkg_app_ = m_pkg_app_list[itemIndex].split(";;"); - std::filesystem::path path(pkg_app_[9].toStdString()); -#ifdef _WIN32 - path = std::filesystem::path(pkg_app_[9].toStdWString()); -#endif + std::filesystem::path path = Common::FS::PathFromQString(pkg_app_[9]); InstallDragDropPkg(path, 1, 1); } } diff --git a/src/qt_gui/main_window.cpp b/src/qt_gui/main_window.cpp index 759c6992e..8d8e17177 100644 --- a/src/qt_gui/main_window.cpp +++ b/src/qt_gui/main_window.cpp @@ -2,14 +2,15 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include +#include #include -#include #include "about_dialog.h" #include "cheats_patches.h" #include "check_update.h" #include "common/io_file.h" #include "common/path_util.h" +#include "common/scm_rev.h" #include "common/string_util.h" #include "common/version.h" #include "core/file_format/pkg.h" @@ -21,6 +22,7 @@ MainWindow::MainWindow(QWidget* parent) : QMainWindow(parent), ui(new Ui::MainWindow) { ui->setupUi(this); + installEventFilter(this); setAttribute(Qt::WA_DeleteOnClose); } @@ -306,6 +308,7 @@ void MainWindow::CreateConnects() { }); // List connect(ui->setlistModeListAct, &QAction::triggered, m_dock_widget.data(), [this]() { + BackgroundMusicPlayer::getInstance().stopMusic(); m_dock_widget->setWidget(m_game_list_frame.data()); m_game_grid_frame->hide(); m_elf_viewer->hide(); @@ -322,6 +325,7 @@ void MainWindow::CreateConnects() { }); // Grid connect(ui->setlistModeGridAct, &QAction::triggered, m_dock_widget.data(), [this]() { + BackgroundMusicPlayer::getInstance().stopMusic(); m_dock_widget->setWidget(m_game_grid_frame.data()); m_game_grid_frame->show(); m_game_list_frame->hide(); @@ -338,6 +342,7 @@ void MainWindow::CreateConnects() { }); // Elf connect(ui->setlistElfAct, &QAction::triggered, m_dock_widget.data(), [this]() { + BackgroundMusicPlayer::getInstance().stopMusic(); m_dock_widget->setWidget(m_elf_viewer.data()); m_game_grid_frame->hide(); m_game_list_frame->hide(); @@ -512,25 +517,6 @@ void MainWindow::CreateConnects() { isIconBlack = false; } }); - - connect(m_game_grid_frame.get(), &QTableWidget::cellClicked, this, - &MainWindow::PlayBackgroundMusic); - connect(m_game_list_frame.get(), &QTableWidget::cellClicked, this, - &MainWindow::PlayBackgroundMusic); -} - -void MainWindow::PlayBackgroundMusic() { - if (isGameRunning || !Config::getPlayBGM()) { - BackgroundMusicPlayer::getInstance().stopMusic(); - return; - } - int itemID = isTableList ? m_game_list_frame->currentItem()->row() - : m_game_grid_frame->crtRow * m_game_grid_frame->columnCnt + - m_game_grid_frame->crtColumn; - - QString snd0path; - Common::FS::PathToQString(snd0path, m_game_info->m_games[itemID].snd0_path); - BackgroundMusicPlayer::getInstance().playMusic(snd0path); } void MainWindow::StartGame() { @@ -619,6 +605,7 @@ void MainWindow::ConfigureGuiFromSettings() { } else { ui->setlistModeGridAct->setChecked(true); } + BackgroundMusicPlayer::getInstance().setVolume(Config::getBGMvolume()); } void MainWindow::SaveWindowState() const { @@ -638,10 +625,7 @@ void MainWindow::InstallPkg() { int pkgNum = 0; for (const QString& file : fileNames) { ++pkgNum; - std::filesystem::path path(file.toStdString()); -#ifdef _WIN64 - path = std::filesystem::path(file.toStdWString()); -#endif + std::filesystem::path path = Common::FS::PathFromQString(file); MainWindow::InstallDragDropPkg(path, pkgNum, nPkg); } } @@ -659,10 +643,7 @@ void MainWindow::BootGame() { QMessageBox::critical(nullptr, tr("Game Boot"), QString(tr("Only one file can be selected!"))); } else { - std::filesystem::path path(fileNames[0].toStdString()); -#ifdef _WIN64 - path = std::filesystem::path(fileNames[0].toStdWString()); -#endif + std::filesystem::path path = Common::FS::PathFromQString(fileNames[0]); Core::Emulator emulator; if (!std::filesystem::exists(path)) { QMessageBox::critical(nullptr, tr("Run Game"), @@ -676,9 +657,12 @@ void MainWindow::BootGame() { void MainWindow::InstallDragDropPkg(std::filesystem::path file, int pkgNum, int nPkg) { if (Loader::DetectFileType(file) == Loader::FileTypes::Pkg) { - pkg = PKG(); - pkg.Open(file); std::string failreason; + pkg = PKG(); + if (!pkg.Open(file, failreason)) { + QMessageBox::critical(this, tr("PKG ERROR"), QString::fromStdString(failreason)); + return; + } auto extract_path = Config::getGameInstallDir() / pkg.GetTitleID(); QString pkgType = QString::fromStdString(pkg.GetPkgFlags()); QString gameDirPath; @@ -703,8 +687,8 @@ void MainWindow::InstallDragDropPkg(std::filesystem::path file, int pkgNum, int } std::string entitlement_label = Common::SplitString(content_id, '-')[2]; - auto addon_extract_path = Common::FS::GetUserPath(Common::FS::PathType::AddonsDir) / - pkg.GetTitleID() / entitlement_label; + auto addon_extract_path = + Config::getAddonInstallDir() / pkg.GetTitleID() / entitlement_label; QString addonDirPath; Common::FS::PathToQString(addonDirPath, addon_extract_path); QDir addon_dir(addonDirPath); @@ -784,7 +768,7 @@ void MainWindow::InstallDragDropPkg(std::filesystem::path file, int pkgNum, int } } } else { - msgBox.setText(QString(tr("Game already installed") + "\n" + addonDirPath + "\n" + + msgBox.setText(QString(tr("Game already installed") + "\n" + gameDirPath + "\n" + tr("Would you like to overwrite?"))); msgBox.setStandardButtons(QMessageBox::Yes | QMessageBox::No); msgBox.setDefaultButton(QMessageBox::No); @@ -1042,3 +1026,17 @@ void MainWindow::OnLanguageChanged(const std::string& locale) { LoadTranslation(); } + +bool MainWindow::eventFilter(QObject* obj, QEvent* event) { + if (event->type() == QEvent::KeyPress) { + QKeyEvent* keyEvent = static_cast(event); + if (keyEvent->key() == Qt::Key_Enter || keyEvent->key() == Qt::Key_Return) { + auto tblMode = Config::getTableMode(); + if (tblMode != 2 && (tblMode != 1 || m_game_grid_frame->IsValidCellSelected())) { + StartGame(); + return true; + } + } + } + return QMainWindow::eventFilter(obj, event); +} diff --git a/src/qt_gui/main_window.h b/src/qt_gui/main_window.h index 9294ef8c9..a428f4317 100644 --- a/src/qt_gui/main_window.h +++ b/src/qt_gui/main_window.h @@ -94,6 +94,8 @@ private: QTranslator* translator; protected: + bool eventFilter(QObject* obj, QEvent* event) override; + void dragEnterEvent(QDragEnterEvent* event1) override { if (event1->mimeData()->hasUrls()) { event1->acceptProposedAction(); @@ -108,10 +110,7 @@ protected: int nPkg = urlList.size(); for (const QUrl& url : urlList) { pkgNum++; - std::filesystem::path path(url.toLocalFile().toStdString()); -#ifdef _WIN64 - path = std::filesystem::path(url.toLocalFile().toStdWString()); -#endif + std::filesystem::path path = Common::FS::PathFromQString(url.toLocalFile()); InstallDragDropPkg(path, pkgNum, nPkg); } } diff --git a/src/qt_gui/pkg_viewer.cpp b/src/qt_gui/pkg_viewer.cpp index 8f20f6929..0ffb9b579 100644 --- a/src/qt_gui/pkg_viewer.cpp +++ b/src/qt_gui/pkg_viewer.cpp @@ -104,11 +104,12 @@ void PKGViewer::ProcessPKGInfo() { m_pkg_patch_list.clear(); m_full_pkg_list.clear(); for (int i = 0; i < m_pkg_list.size(); i++) { - std::filesystem::path path(m_pkg_list[i].toStdString()); -#ifdef _WIN32 - path = std::filesystem::path(m_pkg_list[i].toStdWString()); -#endif - package.Open(path); + std::filesystem::path path = Common::FS::PathFromQString(m_pkg_list[i]); + std::string failreason; + if (!package.Open(path, failreason)) { + QMessageBox::critical(this, tr("PKG ERROR"), QString::fromStdString(failreason)); + return; + } psf.Open(package.sfo); QString title_name = QString::fromStdString(std::string{psf.GetString("TITLE").value_or("Unknown")}); diff --git a/src/qt_gui/settings_dialog.cpp b/src/qt_gui/settings_dialog.cpp index e02aeed9e..035f67c9f 100644 --- a/src/qt_gui/settings_dialog.cpp +++ b/src/qt_gui/settings_dialog.cpp @@ -70,7 +70,7 @@ SettingsDialog::SettingsDialog(std::span physical_devices, QWidge InitializeEmulatorLanguages(); LoadValuesFromConfig(); - defaultTextEdit = tr("Point your mouse at an options to display a description in here"); + defaultTextEdit = tr("Point your mouse at an option to display its description."); ui->descriptionText->setText(defaultTextEdit); connect(ui->buttonBox, &QDialogButtonBox::rejected, this, &QWidget::close); @@ -140,8 +140,17 @@ SettingsDialog::SettingsDialog(std::span physical_devices, QWidge checkUpdate->exec(); }); - connect(ui->playBGMCheckBox, &QCheckBox::stateChanged, this, - [](int val) { Config::setPlayBGM(val); }); + connect(ui->playBGMCheckBox, &QCheckBox::stateChanged, this, [](int val) { + Config::setPlayBGM(val); + if (val == Qt::Unchecked) { + BackgroundMusicPlayer::getInstance().stopMusic(); + } + }); + + connect(ui->BGMVolumeSlider, &QSlider::valueChanged, this, [](float val) { + Config::setBGMvolume(val); + BackgroundMusicPlayer::getInstance().setVolume(val); + }); } // GPU TAB @@ -165,9 +174,6 @@ SettingsDialog::SettingsDialog(std::span physical_devices, QWidge connect(ui->nullGpuCheckBox, &QCheckBox::stateChanged, this, [](int val) { Config::setNullGpu(val); }); - - connect(ui->dumpPM4CheckBox, &QCheckBox::stateChanged, this, - [](int val) { Config::setDumpPM4(val); }); } // DEBUG TAB @@ -206,7 +212,6 @@ SettingsDialog::SettingsDialog(std::span physical_devices, QWidge ui->heightDivider->installEventFilter(this); ui->dumpShadersCheckBox->installEventFilter(this); ui->nullGpuCheckBox->installEventFilter(this); - ui->dumpPM4CheckBox->installEventFilter(this); // Debug ui->debugDump->installEventFilter(this); @@ -229,8 +234,8 @@ void SettingsDialog::LoadValuesFromConfig() { ui->vblankSpinBox->setValue(Config::vblankDiv()); ui->dumpShadersCheckBox->setChecked(Config::dumpShaders()); ui->nullGpuCheckBox->setChecked(Config::nullGpu()); - ui->dumpPM4CheckBox->setChecked(Config::dumpPM4()); ui->playBGMCheckBox->setChecked(Config::getPlayBGM()); + ui->BGMVolumeSlider->setValue((Config::getBGMvolume())); ui->fullscreenCheckBox->setChecked(Config::isFullscreenMode()); ui->showSplashCheckBox->setChecked(Config::showSplash()); ui->ps4proCheckBox->setChecked(Config::isNeoMode()); @@ -371,4 +376,4 @@ bool SettingsDialog::eventFilter(QObject* obj, QEvent* event) { } } return QDialog::eventFilter(obj, event); -} \ No newline at end of file +} diff --git a/src/qt_gui/settings_dialog.ui b/src/qt_gui/settings_dialog.ui index ca71d5ca4..4edec9e1b 100644 --- a/src/qt_gui/settings_dialog.ui +++ b/src/qt_gui/settings_dialog.ui @@ -52,7 +52,7 @@ 0 0 836 - 442 + 446 @@ -369,7 +369,7 @@ 10 30 241 - 41 + 71 @@ -386,6 +386,55 @@ + + + + + + + + Volume + + + + + + + Set the volume of the background music. + + + 100 + + + 10 + + + 20 + + + 50 + + + Qt::Orientation::Horizontal + + + false + + + false + + + QSlider::TickPosition::NoTicks + + + 10 + + + + + + + @@ -615,13 +664,6 @@ - - - - Enable PM4 Dumping - - - diff --git a/src/qt_gui/translations/ar.ts b/src/qt_gui/translations/ar.ts index b62125a7a..f7e43877e 100644 --- a/src/qt_gui/translations/ar.ts +++ b/src/qt_gui/translations/ar.ts @@ -534,6 +534,11 @@ Play title music تشغيل موسيقى العنوان + + + Volume + الصوت + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - وجه مؤشر الفأرة إلى خيار لعرض الوصف هنا + Point your mouse at an option to display its description. + وجّه الماوس نحو خيار لعرض وصفه. @@ -1016,7 +1021,7 @@ updaterGroupBox - التحديث:\nمستقر: إصدارات رسمية يتم إصدارها شهريًا، قد تكون قديمة جدًا ولكنها أكثر استقرارًا وتم اختبارها.\nغير مستقر: إصدارات التطوير التي تحتوي على أحدث الميزات والإصلاحات، لكنها قد تحتوي على أخطاء وأقل استقرارًا. + تحديث: Release: إصدارات رسمية تصدر شهريًا، قد تكون قديمة بعض الشيء، لكنها أكثر استقرارًا واختبارًا. Nightly: إصدارات تطوير تحتوي على أحدث الميزات والإصلاحات، لكنها قد تحتوي على أخطاء وأقل استقرارًا. diff --git a/src/qt_gui/translations/da_DK.ts b/src/qt_gui/translations/da_DK.ts index c41b34431..5e130212d 100644 --- a/src/qt_gui/translations/da_DK.ts +++ b/src/qt_gui/translations/da_DK.ts @@ -534,6 +534,11 @@ Play title music Afspil titelsang + + + Volume + Lydstyrke + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Placer musen på en indstilling for at vise en beskrivelse her + Point your mouse at an option to display its description. + Peg musen over et valg for at vise dets beskrivelse. @@ -1016,7 +1021,7 @@ updaterGroupBox - Opdatering:\nStabil: Officielle builds, der frigives månedligt, som kan være meget ældre, men mere stabile og testet.\nUstabil: Udviklerbuilds med de nyeste funktioner og rettelser, men som kan indeholde fejl og være mindre stabile. + Opdatering:\nRelease: Officielle builds, der frigives månedligt, som kan være meget ældre, men mere stabile og testet.\nNightly: Udviklerbuilds med de nyeste funktioner og rettelser, men som kan indeholde fejl og være mindre stabile. diff --git a/src/qt_gui/translations/de.ts b/src/qt_gui/translations/de.ts index 028f448bc..9c6906a11 100644 --- a/src/qt_gui/translations/de.ts +++ b/src/qt_gui/translations/de.ts @@ -534,6 +534,11 @@ Play title music Titelmusik abspielen + + + Volume + Lautstärke + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Zeigen Sie mit der Maus auf eine Option, um hier eine Beschreibung anzuzeigen + Point your mouse at an option to display its description. + Bewege die Maus über eine Option, um deren Beschreibung anzuzeigen. @@ -1016,7 +1021,7 @@ updaterGroupBox - Update:\nStabil: Offizielle Builds, die monatlich veröffentlicht werden, können viel älter sein, aber stabiler und getestet.\nUnstabil: Entwickler-Builds, die die neuesten Funktionen und Fehlerbehebungen enthalten, aber Fehler enthalten und weniger stabil sein können. + Update:\nRelease: Offizielle Builds, die monatlich veröffentlicht werden, können viel älter sein, aber stabiler und getestet.\nNightly: Entwickler-Builds, die die neuesten Funktionen und Fehlerbehebungen enthalten, aber Fehler enthalten und weniger stabil sein können. diff --git a/src/qt_gui/translations/el.ts b/src/qt_gui/translations/el.ts index ed3e0336d..20e0d1b00 100644 --- a/src/qt_gui/translations/el.ts +++ b/src/qt_gui/translations/el.ts @@ -534,6 +534,11 @@ Play title music Αναπαραγωγή μουσικής τίτλου + + + Volume + ένταση + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Τοποθετήστε τον κέρσορα πάνω από μια επιλογή για να εμφανιστεί εδώ η περιγραφή + Point your mouse at an option to display its description. + Τοποθετήστε το ποντίκι σας πάνω σε μια επιλογή για να εμφανίσετε την περιγραφή της. @@ -1016,7 +1021,7 @@ updaterGroupBox - Ενημερώσεις:\nΣταθερές: Επίσημες εκδόσεις που κυκλοφορούν μηνιαίως, είναι παλαιότερες αλλά πιο σταθερές και δοκιμασμένες.\nΑσταθείς: Εκδόσεις προγραμματιστών με νέες δυνατότητες και διορθώσεις, αλλά μπορεί να περιέχουν σφάλματα και να είναι λιγότερο σταθερές. + Ενημερώσεις:\nRelease: Επίσημες εκδόσεις που κυκλοφορούν μηνιαίως, είναι παλαιότερες αλλά πιο σταθερές και δοκιμασμένες.\nNightly: Εκδόσεις προγραμματιστών με νέες δυνατότητες και διορθώσεις, αλλά μπορεί να περιέχουν σφάλματα και να είναι λιγότερο σταθερές. diff --git a/src/qt_gui/translations/en.ts b/src/qt_gui/translations/en.ts index b0da5bde2..1dd11f69e 100644 --- a/src/qt_gui/translations/en.ts +++ b/src/qt_gui/translations/en.ts @@ -534,6 +534,11 @@ Play title music Play title music + + + Volume + Volume + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Point your mouse at an options to display a description in here + Point your mouse at an option to display its description. + Point your mouse at an option to display its description. @@ -1016,7 +1021,7 @@ updaterGroupBox - Update:\nStable: Official versions released every month that may be very outdated, but are more reliable and tested.\nUnstable: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. + Update:\nRelease: Official versions released every month that may be very outdated, but are more reliable and tested.\nNightly: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. @@ -1056,17 +1061,17 @@ debugDump - Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory + Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory. vkValidationCheckBox - Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about it's internal state. This will reduce performance and likely change the behavior of emulation. + Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about its internal state.\nThis will reduce performance and likely change the behavior of emulation. vkSyncValidationCheckBox - Enable Vulkan Synchronization Validation:\nEnables a system that validates the timing of Vulkan rendering tasks. This will reduce performance and likely change the behavior of emulation. + Enable Vulkan Synchronization Validation:\nEnables a system that validates the timing of Vulkan rendering tasks.\nThis will reduce performance and likely change the behavior of emulation. diff --git a/src/qt_gui/translations/es_ES.ts b/src/qt_gui/translations/es_ES.ts index 730346d84..9af0e45e0 100644 --- a/src/qt_gui/translations/es_ES.ts +++ b/src/qt_gui/translations/es_ES.ts @@ -534,6 +534,11 @@ Play title music Reproducir la música de apertura + + + Volume + Volumen + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Apunta con el ratón a una opción para mostrar una descripción aquí + Point your mouse at an option to display its description. + Coloque el mouse sobre una opción para mostrar su descripción. @@ -1016,7 +1021,7 @@ updaterGroupBox - Actualización:\nEstable: Versiones oficiales lanzadas cada mes que pueden estar muy desactualizadas, pero son más confiables y están probadas.\nInestable: Versiones de desarrollo que tienen todas las últimas funciones y correcciones, pero pueden contener errores y son menos estables. + Actualización:\nRelease: Versiones oficiales lanzadas cada mes que pueden estar muy desactualizadas, pero son más confiables y están probadas.\nNightly: Versiones de desarrollo que tienen todas las últimas funciones y correcciones, pero pueden contener errores y son menos estables. diff --git a/src/qt_gui/translations/fa_IR.ts b/src/qt_gui/translations/fa_IR.ts index 217edb780..15e07c886 100644 --- a/src/qt_gui/translations/fa_IR.ts +++ b/src/qt_gui/translations/fa_IR.ts @@ -534,6 +534,11 @@ Play title music پخش موسیقی عنوان + + + Volume + صدا + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Point your mouse at an options to display a description in here + Point your mouse at an option to display its description. + ماوس خود را بر روی یک گزینه قرار دهید تا توضیحات آن نمایش داده شود. @@ -1016,7 +1021,7 @@ updaterGroupBox - Update:\nStable: Official versions released every month that may be very outdated, but are more reliable and tested.\nUnstable: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. + Update:\nRelease: Official versions released every month that may be very outdated, but are more reliable and tested.\nNightly: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. @@ -1056,12 +1061,12 @@ debugDump - Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory + Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory. vkValidationCheckBox - Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about it's internal state. This will reduce performance and likely change the behavior of emulation. + Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about its internal state. This will reduce performance and likely change the behavior of emulation. diff --git a/src/qt_gui/translations/fi.ts b/src/qt_gui/translations/fi.ts index 68e47a6b6..8c1f4c090 100644 --- a/src/qt_gui/translations/fi.ts +++ b/src/qt_gui/translations/fi.ts @@ -534,6 +534,11 @@ Play title music Soita otsikkomusiikkia + + + Volume + Äänenvoimakkuus + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Vie hiiri valinnan päälle näyttääksesi kuvauksen tähän + Point your mouse at an option to display its description. + Siirrä hiiri vaihtoehdon päälle näyttämään sen kuvaus. @@ -1016,7 +1021,7 @@ updaterGroupBox - Päivitys:\nVakaa: Viralliset versiot, jotka julkaistaan joka kuukausi ja voivat olla hyvin vanhoja, mutta ovat luotettavampia ja testatumpia.\nEpävakaa: Kehitysversiot, joissa on kaikki uusimmat ominaisuudet ja korjaukset, mutta ne voivat sisältää bugeja ja ovat vähemmän vakaita. + Päivitys:\nRelease: Viralliset versiot, jotka julkaistaan joka kuukausi ja voivat olla hyvin vanhoja, mutta ovat luotettavampia ja testatumpia.\nNightly: Kehitysversiot, joissa on kaikki uusimmat ominaisuudet ja korjaukset, mutta ne voivat sisältää bugeja ja ovat vähemmän vakaita. diff --git a/src/qt_gui/translations/fr.ts b/src/qt_gui/translations/fr.ts index e47299964..f99ea2f5d 100644 --- a/src/qt_gui/translations/fr.ts +++ b/src/qt_gui/translations/fr.ts @@ -534,6 +534,11 @@ Play title music Lire la musique du titre + + + Volume + Volume + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Placez votre souris sur une option pour afficher une description ici + Point your mouse at an option to display its description. + Pointez votre souris sur une option pour afficher sa description. @@ -1016,7 +1021,7 @@ updaterGroupBox - Mise à jour :\nStable : versions officielles publiées chaque mois qui peuvent être très anciennes, mais plus fiables et testées.\nInstable : versions de développement avec toutes les dernières fonctionnalités et correctifs, mais pouvant avoir des bogues et être moins stables. + Mise à jour :\nRelease: versions officielles publiées chaque mois qui peuvent être très anciennes, mais plus fiables et testées.\nNightly: versions de développement avec toutes les dernières fonctionnalités et correctifs, mais pouvant avoir des bogues et être moins stables. diff --git a/src/qt_gui/translations/hu_HU.ts b/src/qt_gui/translations/hu_HU.ts index 0d0d45262..7759f3fb6 100644 --- a/src/qt_gui/translations/hu_HU.ts +++ b/src/qt_gui/translations/hu_HU.ts @@ -534,6 +534,11 @@ Play title music Címzene lejátszása + + + Volume + Hangerő + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Mutassa a kurzort a lehetőségeken, hogy itt leírást láthasson + Point your mouse at an option to display its description. + Helyezze az egérmutatót egy lehetőség fölé, hogy megjelenítse annak leírását. @@ -1016,7 +1021,7 @@ updaterGroupBox - Frissítés:\nStabil: Hivatalos verziók, amelyeket havonta adnak ki, és amelyek nagyon elavultak lehetnek, de megbízhatóbbak és teszteltek.\nInstabil: Fejlesztési verziók, amelyek az összes legújabb funkciót és javítást tartalmazzák, de hibákat tartalmazhatnak és kevésbé stabilak. + Frissítés:\nRelease: Hivatalos verziók, amelyeket havonta adnak ki, és amelyek nagyon elavultak lehetnek, de megbízhatóbbak és teszteltek.\nNightly: Fejlesztési verziók, amelyek az összes legújabb funkciót és javítást tartalmazzák, de hibákat tartalmazhatnak és kevésbé stabilak. @@ -1056,7 +1061,7 @@ debugDump - Debug dumpolás engedélyezése:\nElmenti a futó PS4 program import- és exportszimbólumait, valamint a fájl fejlécinformációit egy könyvtárba + Debug dumpolás engedélyezése:\nElmenti a futó PS4 program import- és exportszimbólumait, valamint a fájl fejlécinformációit egy könyvtárba. diff --git a/src/qt_gui/translations/id.ts b/src/qt_gui/translations/id.ts index 9efa123fe..0842df897 100644 --- a/src/qt_gui/translations/id.ts +++ b/src/qt_gui/translations/id.ts @@ -534,6 +534,11 @@ Play title music Putar musik judul + + + Volume + Volume + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Letakkan mouse Anda di atas opsi untuk menampilkan deskripsi di sini + Point your mouse at an option to display its description. + Arahkan mouse Anda pada opsi untuk menampilkan deskripsinya. @@ -1016,7 +1021,7 @@ updaterGroupBox - Pembaruan:\nStabil: Versi resmi yang dirilis setiap bulan yang mungkin sangat ketinggalan zaman, tetapi lebih dapat diandalkan dan teruji.\nTidak Stabil: Versi pengembangan yang memiliki semua fitur dan perbaikan terbaru, tetapi mungkin mengandung bug dan kurang stabil. + Pembaruan:\nRelease: Versi resmi yang dirilis setiap bulan yang mungkin sangat ketinggalan zaman, tetapi lebih dapat diandalkan dan teruji.\nNightly: Versi pengembangan yang memiliki semua fitur dan perbaikan terbaru, tetapi mungkin mengandung bug dan kurang stabil. @@ -1056,7 +1061,7 @@ debugDump - Aktifkan Pembuangan Debug:\nMenyimpan simbol impor dan ekspor serta informasi header file dari program PS4 yang sedang berjalan ke direktori + Aktifkan Pembuangan Debug:\nMenyimpan simbol impor dan ekspor serta informasi header file dari program PS4 yang sedang berjalan ke direktori. diff --git a/src/qt_gui/translations/it.ts b/src/qt_gui/translations/it.ts index e3203862b..c42589d44 100644 --- a/src/qt_gui/translations/it.ts +++ b/src/qt_gui/translations/it.ts @@ -534,6 +534,11 @@ Play title music Riproduci musica del titolo + + + Volume + Volume + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Posiziona il mouse su un'opzione per visualizzare una descrizione qui + Point your mouse at an option to display its description. + Sposta il mouse su un'opzione per visualizzarne la descrizione. @@ -1016,7 +1021,7 @@ updaterGroupBox - Aggiornamento:\nStabile: Versioni ufficiali rilasciate ogni mese che potrebbero essere molto datate, ma sono più affidabili e testate.\nInstabile: Versioni di sviluppo che hanno tutte le ultime funzionalità e correzioni, ma potrebbero contenere bug e sono meno stabili. + Aggiornamento:\nRelease: Versioni ufficiali rilasciate ogni mese che potrebbero essere molto datate, ma sono più affidabili e testate.\nNightly: Versioni di sviluppo che hanno tutte le ultime funzionalità e correzioni, ma potrebbero contenere bug e sono meno stabili. @@ -1056,7 +1061,7 @@ debugDump - Abilita Pompaggio di Debug:\nSalva i simboli di importazione ed esportazione e le informazioni sull'intestazione del file del programma PS4 attualmente in esecuzione in una directory + Abilita Pompaggio di Debug:\nSalva i simboli di importazione ed esportazione e le informazioni sull'intestazione del file del programma PS4 attualmente in esecuzione in una directory. diff --git a/src/qt_gui/translations/ja_JP.ts b/src/qt_gui/translations/ja_JP.ts index 4e079f1d3..166100db6 100644 --- a/src/qt_gui/translations/ja_JP.ts +++ b/src/qt_gui/translations/ja_JP.ts @@ -534,6 +534,11 @@ Play title music タイトル音楽を再生する + + + Volume + 音量 + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - ここに説明を表示するには、オプションにマウスをポイントしてください + Point your mouse at an option to display its description. + オプションにマウスをポイントすると、その説明が表示されます。 @@ -1016,7 +1021,7 @@ updaterGroupBox - 更新:\n安定版: 非常に古いかもしれないが、より信頼性が高くテスト済みの公式バージョンを毎月リリースします。\n不安定版: 最新の機能と修正がすべて含まれていますが、バグが含まれている可能性があり、安定性は低いです。 + 更新:\nRelease: 非常に古いかもしれないが、より信頼性が高くテスト済みの公式バージョンを毎月リリースします。\nNightly: 最新の機能と修正がすべて含まれていますが、バグが含まれている可能性があり、安定性は低いです。 diff --git a/src/qt_gui/translations/ko_KR.ts b/src/qt_gui/translations/ko_KR.ts index 1476a893d..303e9fd52 100644 --- a/src/qt_gui/translations/ko_KR.ts +++ b/src/qt_gui/translations/ko_KR.ts @@ -534,6 +534,11 @@ Play title music Play title music + + + Volume + 음량 + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Point your mouse at an options to display a description in here + Point your mouse at an option to display its description. + Point your mouse at an option to display its description. @@ -1016,7 +1021,7 @@ updaterGroupBox - Update:\nStable: Official versions released every month that may be very outdated, but are more reliable and tested.\nUnstable: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. + Update:\nRelease: Official versions released every month that may be very outdated, but are more reliable and tested.\nNightly: Development versions that have all the latest features and fixes, but may contain bugs and are less stable. @@ -1056,12 +1061,12 @@ debugDump - Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory + Enable Debug Dumping:\nSaves the import and export symbols and file header information of the currently running PS4 program to a directory. vkValidationCheckBox - Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about it's internal state. This will reduce performance and likely change the behavior of emulation. + Enable Vulkan Validation Layers:\nEnables a system that validates the state of the Vulkan renderer and logs information about its internal state. This will reduce performance and likely change the behavior of emulation. diff --git a/src/qt_gui/translations/lt_LT.ts b/src/qt_gui/translations/lt_LT.ts index abf084e0b..bb5d185d6 100644 --- a/src/qt_gui/translations/lt_LT.ts +++ b/src/qt_gui/translations/lt_LT.ts @@ -534,6 +534,11 @@ Play title music Groti antraštės muziką + + + Volume + Garsumas + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Rodykite pelę ant pasirinkimo, kad čia būtų rodoma aprašymas + Point your mouse at an option to display its description. + Žymeklį nukreipkite ant pasirinkimo, kad pamatytumėte jo aprašymą. @@ -1016,7 +1021,7 @@ updaterGroupBox - Atnaujinti:\nStabilus: Oficialios versijos, išleidžiamos kiekvieną mėnesį, kurios gali būti labai pasenusios, tačiau yra patikimos ir išbandytos.\nNestabilus: Vystymo versijos, kuriose yra visos naujausios funkcijos ir taisymai, tačiau gali turėti klaidų ir būti mažiau stabilios. + Atnaujinti:\nRelease: Oficialios versijos, išleidžiamos kiekvieną mėnesį, kurios gali būti labai pasenusios, tačiau yra patikimos ir išbandytos.\nNightly: Vystymo versijos, kuriose yra visos naujausios funkcijos ir taisymai, tačiau gali turėti klaidų ir būti mažiau stabilios. diff --git a/src/qt_gui/translations/nb.ts b/src/qt_gui/translations/nb.ts index b3797ae05..b5dd59f60 100644 --- a/src/qt_gui/translations/nb.ts +++ b/src/qt_gui/translations/nb.ts @@ -534,6 +534,11 @@ Play title music Spill tittelmusikk + + + Volume + Volum + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Hold musen over et alternativ for å vise en beskrivelse her + Point your mouse at an option to display its description. + Hold musen over et valg for at vise beskrivelsen. @@ -1016,7 +1021,7 @@ updaterGroupBox - Oppdatering:\nStabil: Offisielle versjoner utgitt hver måned som kan være veldig utdaterte, men er mer pålitelige og testet.\nUstabil: Utviklingsversjoner som har alle de nyeste funksjonene og feilrettingene, men som kan inneholde feil og er mindre stabile. + Oppdatering:\nRelease: Offisielle versjoner utgitt hver måned som kan være veldig utdaterte, men er mer pålitelige og testet.\nNightly: Utviklingsversjoner som har alle de nyeste funksjonene og feilrettingene, men som kan inneholde feil og er mindre stabile. diff --git a/src/qt_gui/translations/nl.ts b/src/qt_gui/translations/nl.ts index cf659acbe..144eeeb5f 100644 --- a/src/qt_gui/translations/nl.ts +++ b/src/qt_gui/translations/nl.ts @@ -534,6 +534,11 @@ Play title music Titelmuziek afspelen + + + Volume + Volume + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Beweeg je muis over een optie om hier een beschrijving weer te geven + Point your mouse at an option to display its description. + Wijzig de muisaanwijzer naar een optie om de beschrijving weer te geven. @@ -1016,7 +1021,7 @@ updaterGroupBox - Updateren:\nStabiel: Officiële versies die elke maand worden uitgebracht, die zeer verouderd kunnen zijn, maar betrouwbaar en getest zijn.\nOnstabiel: Ontwikkelingsversies die alle nieuwste functies en bugfixes bevatten, maar mogelijk bugs bevatten en minder stabiel zijn. + Updateren:\nRelease: Officiële versies die elke maand worden uitgebracht, die zeer verouderd kunnen zijn, maar betrouwbaar en getest zijn.\nNightly: Ontwikkelingsversies die alle nieuwste functies en bugfixes bevatten, maar mogelijk bugs bevatten en minder stabiel zijn. diff --git a/src/qt_gui/translations/pl_PL.ts b/src/qt_gui/translations/pl_PL.ts index 810971804..880418715 100644 --- a/src/qt_gui/translations/pl_PL.ts +++ b/src/qt_gui/translations/pl_PL.ts @@ -534,6 +534,11 @@ Play title music Odtwórz muzykę tytułową + + + Volume + Głośność + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Najedź myszą na opcję, aby wyświetlić opis tutaj + Point your mouse at an option to display its description. + Najedź kursorem na opcję, aby wyświetlić jej opis. @@ -1016,7 +1021,7 @@ updaterGroupBox - Aktualizator:\nStabilny: Oficjalne wersje wydawane co miesiąc, które mogą być bardzo przestarzałe, ale są niezawodne i przetestowane.\nNiestabilny: Wersje rozwojowe, które zawierają wszystkie najnowsze funkcje i poprawki błędów, ale mogą mieć błędy i być mniej stabilne. + Aktualizator:\nRelease: Oficjalne wersje wydawane co miesiąc, które mogą być bardzo przestarzałe, ale są niezawodne i przetestowane.\nNightly: Wersje rozwojowe, które zawierają wszystkie najnowsze funkcje i poprawki błędów, ale mogą mieć błędy i być mniej stabilne. diff --git a/src/qt_gui/translations/pt_BR.ts b/src/qt_gui/translations/pt_BR.ts index 4676dfff6..7ee5b92f6 100644 --- a/src/qt_gui/translations/pt_BR.ts +++ b/src/qt_gui/translations/pt_BR.ts @@ -534,6 +534,11 @@ Play title music Reproduzir música de abertura + + + Volume + Volume + MainWindow @@ -970,13 +975,13 @@ - Point your mouse at an options to display a description in here - Passe o mouse sobre uma opção para exibir a descrição aqui + Point your mouse at an option to display its description. + Passe o mouse sobre uma opção para exibir sua descrição. consoleLanguageGroupBox - Idioma do console:\nDefine o idioma usado pelo jogo PS4.\nRecomenda-se configurá-lo para um idioma que o jogo suporte, o que pode variar conforme a região. + Idioma do console:\nDefine o idioma usado pelo jogo no PS4.\nRecomenda-se configurá-lo para um idioma que o jogo suporte, o que pode variar conforme a região. @@ -1016,12 +1021,12 @@ updaterGroupBox - Atualizações:\nStable: versões oficiais que são lançadas todo mês e podem ser bastante antigas, mas são mais confiáveis e testadas.\nUnstable: versões de desenvolvimento que têm todos os novos recursos e correções, mas podem ter bugs e ser instáveis. + Atualizações:\nRelease: Versões oficiais que são lançadas todo mês e podem ser bastante antigas, mas são mais confiáveis e testadas.\nNightly: Versões de desenvolvimento que têm todos os novos recursos e correções, mas podem ter bugs e ser instáveis. GUIgroupBox - Reproduzir música de título:\nSe o jogo suportar, ativa a reprodução de música especial ao selecionar o jogo na interface. + Reproduzir música de abertura:\nSe o jogo suportar, ativa a reprodução de uma música especial ao selecionar o jogo na interface do menu. @@ -1061,12 +1066,12 @@ vkValidationCheckBox - Ativar Camadas de Validação do Vulkan:\nAtiva um sistema que valida o estado do renderizador Vulkan e registra informações sobre seu estado interno. Isso diminui o desempenho e pode alterar o comportamento da emulação. + Ativar Camadas de Validação do Vulkan:\nAtiva um sistema que valida o estado do renderizador Vulkan e registra informações sobre seu estado interno.\nIsso diminui o desempenho e pode alterar o comportamento da emulação. vkSyncValidationCheckBox - Ativar Validação de Sincronização do Vulkan:\nAtiva um sistema que valida o agendamento de tarefas de renderização Vulkan. Isso diminui o desempenho e pode alterar o comportamento da emulação. + Ativar Validação de Sincronização do Vulkan:\nAtiva um sistema que valida o agendamento de tarefas de renderização Vulkan.\nIsso diminui o desempenho e pode alterar o comportamento da emulação. diff --git a/src/qt_gui/translations/ro_RO.ts b/src/qt_gui/translations/ro_RO.ts index ac298469d..783cb7822 100644 --- a/src/qt_gui/translations/ro_RO.ts +++ b/src/qt_gui/translations/ro_RO.ts @@ -534,6 +534,11 @@ Play title music Redă muzica titlului + + + Volume + Volum + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Pune mouse-ul pe o opțiune pentru a afișa o descriere aici + Point your mouse at an option to display its description. + Indicați mouse-ul asupra unei opțiuni pentru a afișa descrierea acesteia. @@ -1016,7 +1021,7 @@ updaterGroupBox - Actualizare:\nStabil: Versiuni oficiale lansate în fiecare lună, care pot fi foarte învechite, dar sunt mai fiabile și testate.\nInstabil: Versiuni de dezvoltare care conțin toate cele mai recente funcții și corecții, dar pot conține erori și sunt mai puțin stabile. + Actualizare:\nRelease: Versiuni oficiale lansate în fiecare lună, care pot fi foarte învechite, dar sunt mai fiabile și testate.\nNightly: Versiuni de dezvoltare care conțin toate cele mai recente funcții și corecții, dar pot conține erori și sunt mai puțin stabile. diff --git a/src/qt_gui/translations/ru_RU.ts b/src/qt_gui/translations/ru_RU.ts index 87847de30..f6a24dd2f 100644 --- a/src/qt_gui/translations/ru_RU.ts +++ b/src/qt_gui/translations/ru_RU.ts @@ -402,12 +402,12 @@ Enable Fullscreen - Включить полноэкранный режим + Полноэкранный режим Show Splash - Показать заставку + Показывать заставку @@ -457,7 +457,7 @@ Vblank Divider - Разделитель Vblank + Делитель Vblank @@ -527,12 +527,17 @@ GUI Settings - Настройки GUI + Настройки интерфейса Play title music - Воспроизвести музыку заголовка + Воспроизведение заглавной музыки + + + + Volume + Громкость @@ -943,7 +948,7 @@ Can't apply cheats before the game is started - Невозможно применить читы до начала игрыs + Невозможно применить читы до начала игры @@ -961,7 +966,7 @@ Restore Defaults - Восстановить умолчания + По умолчанию @@ -970,13 +975,13 @@ - Point your mouse at an options to display a description in here - Наведите курсор мыши на опцию, чтобы отобразить описание здесь + Point your mouse at an option to display its description. + Наведите указатель мыши на опцию, чтобы отобразить ее описание. consoleLanguageGroupBox - Язык консоли:\nУстановите язык, который будет использоваться в играх PS4.\nРекомендуется устанавливать язык, поддерживаемый игрой, так как он может отличаться в зависимости от региона. + Язык консоли:\nУстановите язык, который будет использоваться в играх PS4.\nРекомендуется устанавливать язык который поддерживается игрой, так как он может отличаться в зависимости от региона. @@ -986,17 +991,17 @@ fullscreenCheckBox - Включить полноэкранный режим:\nАвтоматически переводит игровое окно в полноэкранный режим.\nВы можете отключить это, нажав клавишу F11. + Полноэкранный режим:\nАвтоматически переводит игровое окно в полноэкранный режим.\nВы можете отключить это, нажав клавишу F11. showSplashCheckBox - Показать заставку:\nОтображает заставку игры (специальное изображение) во время запуска игры. + Показывать заставку:\nОтображает заставку игры (специальное изображение) во время запуска игры. ps4proCheckBox - Это PS4 Pro:\nЗаставляет эмулятор работать как PS4 PRO, что может включить специальные функции в играх, поддерживающих это. + Режим PS4 Pro:\nЗаставляет эмулятор работать как PS4 Pro, что может включить специальные функции в играх, поддерживающих это. @@ -1006,22 +1011,22 @@ logTypeGroupBox - Тип журнала:\nУстановите, синхронизировать ли вывод окна журнала для производительности. Это может негативно сказаться на эмуляции. + Тип логов:\nУстановите, синхронизировать ли вывод окна логов ради производительности. Это может негативно сказаться на эмуляции. logFilter - Фильтр журнала: Фильтрует журнал, чтобы печатать только определенную информацию. Пример: "Core:Trace" "Lib.Pad:Debug Common.Filesystem:Error" "*:Critical" Уровни: Trace, Debug, Info, Warning, Error, Critical - в этом порядке, конкретный уровень глушит все предыдущие уровни в списке и регистрирует все последующие уровни. + Фильтр логов: Фильтрует логи, чтобы показывать только определенную информацию. Примеры: "Core:Trace" "Lib.Pad:Debug Common.Filesystem:Error" "*:Critical" Уровни: Trace, Debug, Info, Warning, Error, Critical - в этом порядке, конкретный уровень глушит все предыдущие уровни в списке и показывает все последующие уровни. updaterGroupBox - Обновление:\nСтабильная версия: Официальные версии, которые могут быть очень старыми и выпускаются каждый месяц, но они более надежные и проверенные.\nНестабильная версия: Версии разработки, которые содержат все последние функции и исправления, но могут содержать ошибки и менее стабильны. + Обновление:\nRelease: Официальные версии, которые выпускаются каждый месяц и могут быть очень старыми, но они более надежные и проверенные.\nNightly: Версии разработки, которые содержат все последние функции и исправления, но могут содержать ошибки и менее стабильны. GUIgroupBox - Воспроизведение музыки из заголовка:\nЕсли игра это поддерживает, включает воспроизведение специальной музыки при выборе игры в графическом интерфейсе. + Воспроизведение заглавной музыки:\nЕсли игра это поддерживает, включает воспроизведение специальной музыки при выборе игры в интерфейсе. @@ -1036,7 +1041,7 @@ heightDivider - Делитель Vblank:\nЧастота кадров, с которой обновляется эмулятор, умножается на это число. Изменение этого может иметь негативные последствия, такие как увеличение скорости игры или разрушение критических функций игры, которые не ожидают этого изменения! + Делитель Vblank:\nЧастота кадров, с которой обновляется эмулятор, умножается на это число. Изменение этого параметра может иметь негативные последствия, такие как увеличение скорости игры или нарушение критических функций игры, которые этого не ожидают! @@ -1046,7 +1051,7 @@ nullGpuCheckBox - Включить Null GPU:\nДля технической отладки отключает рендеринг игры так, как будто графической карты нет. + Включить NULL GPU:\nДля технической отладки отключает рендеринг игры так, как будто графической карты нет. @@ -1056,12 +1061,12 @@ debugDump - Включить дамп отладки:\nСохраняет символы импорта и экспорта и информацию о заголовке файла текущей исполняемой программы PS4 в каталоге + Включить отладочные дампы:\nСохраняет символы импорта, экспорта и информацию о заголовке файла текущей исполняемой программы PS4 в папку. vkValidationCheckBox - Включить слои валидации Vulkan:\nВключает систему, которая проверяет состояние рендерера Vulkan и регистрирует информацию о его внутреннем состоянии. Это снизит производительность и, вероятно, изменит поведение эмуляции. + Включить слои валидации Vulkan:\nВключает систему, которая проверяет состояние рендерера Vulkan и логирует информацию о его внутреннем состоянии. Это снизит производительность и, вероятно, изменит поведение эмуляции. @@ -1132,7 +1137,7 @@ Network error: - Ошибка сети: + Сетевая ошибка: @@ -1182,12 +1187,12 @@ Do you want to update? - Вы хотите обновить? + Вы хотите обновиться? Show Changelog - Показать изменения + Показать журнал изменений @@ -1197,7 +1202,7 @@ Update - Обновить + Обновиться @@ -1207,17 +1212,17 @@ Hide Changelog - Скрыть изменения + Скрыть журнал изменений Changes - Изменения + Журнал изменений Network error occurred while trying to access the URL - Произошла ошибка сети при попытке доступа к URL + Произошла сетевая ошибка при попытке доступа к URL diff --git a/src/qt_gui/translations/sq.ts b/src/qt_gui/translations/sq.ts index 710de63f9..d9f1d3859 100644 --- a/src/qt_gui/translations/sq.ts +++ b/src/qt_gui/translations/sq.ts @@ -534,6 +534,11 @@ Play title music Luaj muzikën e titullit + + + Volume + Volumi + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Vendosni miun në një opsion për të shfaqur një përshkrim këtu + Point your mouse at an option to display its description. + Hidhni mouse-in mbi një opsion për të shfaqur përshkrimin e tij. @@ -1016,7 +1021,7 @@ updaterGroupBox - Aktualizimi:\nStabil: Versionet zyrtare të lëshuara çdo muaj që mund të jenë shumë të vjetra, por janë më të besueshme dhe të testuara.\nPanshkuar: Versionet e zhvillimit që kanë të gjitha veçoritë dhe rregullimet më të fundit, por mund të përmbajnë gabime dhe janë më pak të qëndrueshme. + Aktualizimi:\nRelease: Versionet zyrtare të lëshuara çdo muaj që mund të jenë shumë të vjetra, por janë më të besueshme dhe të testuara.\nNightly: Versionet e zhvillimit që kanë të gjitha veçoritë dhe rregullimet më të fundit, por mund të përmbajnë gabime dhe janë më pak të qëndrueshme. diff --git a/src/qt_gui/translations/tr_TR.ts b/src/qt_gui/translations/tr_TR.ts index a4fa289f2..bb1c7c423 100644 --- a/src/qt_gui/translations/tr_TR.ts +++ b/src/qt_gui/translations/tr_TR.ts @@ -534,6 +534,11 @@ Play title music Başlık müziğini çal + + + Volume + Ses seviyesi + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Buraya açıklama göstermek için bir seçeneğin üzerine fareyi getirin + Point your mouse at an option to display its description. + Seçenek üzerinde farenizi tutarak açıklamasını görüntüleyin. @@ -1016,7 +1021,7 @@ updaterGroupBox - Güncelleme:\nStabil: Her ay yayınlanan resmi sürümler; çok eski olabilirler, ancak daha güvenilirdir ve test edilmiştir.\nKararsız: Tüm en son özellikler ve düzeltmeler ile birlikte geliştirme sürümleri; hatalar içerebilir ve daha az kararlıdırlar. + Güncelleme:\nRelease: Her ay yayınlanan resmi sürümler; çok eski olabilirler, ancak daha güvenilirdir ve test edilmiştir.\nNightly: Tüm en son özellikler ve düzeltmeler ile birlikte geliştirme sürümleri; hatalar içerebilir ve daha az kararlıdırlar. diff --git a/src/qt_gui/translations/vi_VN.ts b/src/qt_gui/translations/vi_VN.ts index af5eb5249..8dfd03e2d 100644 --- a/src/qt_gui/translations/vi_VN.ts +++ b/src/qt_gui/translations/vi_VN.ts @@ -534,6 +534,11 @@ Play title music Phát nhạc tiêu đề + + + Volume + Âm lượng + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - Di chuột vào tùy chọn để hiển thị mô tả ở đây + Point your mouse at an option to display its description. + Di chuyển chuột đến tùy chọn để hiển thị mô tả của nó. @@ -1016,7 +1021,7 @@ updaterGroupBox - Cập nhật:\nỔn định: Các phiên bản chính thức được phát hành hàng tháng; có thể khá cũ nhưng đáng tin cậy hơn và đã được thử nghiệm.\nKhông ổn định: Các phiên bản phát triển có tất cả các tính năng và sửa lỗi mới nhất; có thể có lỗi và ít ổn định hơn. + Cập nhật:\nRelease: Các phiên bản chính thức được phát hành hàng tháng; có thể khá cũ nhưng đáng tin cậy hơn và đã được thử nghiệm.\nNightly: Các phiên bản phát triển có tất cả các tính năng và sửa lỗi mới nhất; có thể có lỗi và ít ổn định hơn. diff --git a/src/qt_gui/translations/zh_CN.ts b/src/qt_gui/translations/zh_CN.ts index 638fa08cb..1c55cd26e 100644 --- a/src/qt_gui/translations/zh_CN.ts +++ b/src/qt_gui/translations/zh_CN.ts @@ -534,6 +534,11 @@ Play title music 播放标题音乐 + + + Volume + 音量 + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - 将鼠标指针放在选项上以在这里显示说明 + Point your mouse at an option to display its description. + 将鼠标指针指向选项以显示其描述。 @@ -1016,7 +1021,7 @@ updaterGroupBox - 更新:\n稳定版本: 官方版本，可能非常旧，并且每月发布，但更可靠且经过测试。\n不稳定版本: 开发版本，包含所有最新功能和修复，但可能包含错误且不够稳定。 + 更新:\nRelease: 官方版本，可能非常旧，并且每月发布，但更可靠且经过测试。\nNightly: 开发版本，包含所有最新功能和修复，但可能包含错误且不够稳定。 diff --git a/src/qt_gui/translations/zh_TW.ts b/src/qt_gui/translations/zh_TW.ts index 4d508d2ad..dfb622a54 100644 --- a/src/qt_gui/translations/zh_TW.ts +++ b/src/qt_gui/translations/zh_TW.ts @@ -534,6 +534,11 @@ Play title music 播放標題音樂 + + + Volume + 音量 + MainWindow @@ -970,8 +975,8 @@ - Point your mouse at an options to display a description in here - 將鼠標懸停在選項上以在此顯示描述 + Point your mouse at an option to display its description. + 將鼠標指向選項以顯示其描述。 @@ -1016,7 +1021,7 @@ updaterGroupBox - 更新:\n穩定版: 每月發布的官方版本，可能非常舊，但更可靠且經過測試。\n不穩定: 開發版本，擁有所有最新的功能和修復，但可能包含錯誤，穩定性較差。 + 更新:\nRelease: 每月發布的官方版本，可能非常舊，但更可靠且經過測試。\nNightly: 開發版本，擁有所有最新的功能和修復，但可能包含錯誤，穩定性較差。 diff --git a/src/qt_gui/trophy_viewer.cpp b/src/qt_gui/trophy_viewer.cpp index 528beee0d..49fb993eb 100644 --- a/src/qt_gui/trophy_viewer.cpp +++ b/src/qt_gui/trophy_viewer.cpp @@ -28,11 +28,8 @@ void TrophyViewer::PopulateTrophyWidget(QString title) { QDir dir(trophyDirQt); if (!dir.exists()) { - std::filesystem::path path(gameTrpPath_.toStdString()); -#ifdef _WIN64 - path = std::filesystem::path(gameTrpPath_.toStdWString()); -#endif - if (!trp.Extract(path)) + std::filesystem::path path = Common::FS::PathFromQString(gameTrpPath_); + if (!trp.Extract(path, title.toStdString())) return; } QFileInfoList dirList = dir.entryInfoList(QDir::Dirs | QDir::NoDotAndDotDot); @@ -79,7 +76,7 @@ void TrophyViewer::PopulateTrophyWidget(QString title) { trpType.append(reader.attributes().value("ttype").toString()); trpPid.append(reader.attributes().value("pid").toString()); if (reader.attributes().hasAttribute("unlockstate")) { - if (reader.attributes().value("unlockstate").toString() == "unlocked") { + if (reader.attributes().value("unlockstate").toString() == "true") { trpUnlocked.append("unlocked"); } else { trpUnlocked.append("locked"); diff --git a/src/sdl_window.cpp b/src/sdl_window.cpp index f7835aabe..4a4020a42 100644 --- a/src/sdl_window.cpp +++ b/src/sdl_window.cpp @@ -23,7 +23,7 @@ namespace Frontend { WindowSDL::WindowSDL(s32 width_, s32 height_, Input::GameController* controller_, std::string_view window_title) : width{width_}, height{height_}, controller{controller_} { - if (SDL_Init(SDL_INIT_VIDEO) < 0) { + if (!SDL_Init(SDL_INIT_VIDEO)) { UNREACHABLE_MSG("Failed to initialize SDL video subsystem: {}", SDL_GetError()); } SDL_InitSubSystem(SDL_INIT_AUDIO); @@ -304,6 +304,9 @@ void WindowSDL::onKeyPress(const SDL_Event* event) { if (axis != Input::Axis::AxisMax) { controller->Axis(0, axis, ax); } + if (SDL_GetCursor() != NULL) { + SDL_HideCursor(); + } } void WindowSDL::onGamepadEvent(const SDL_Event* event) { @@ -329,6 +332,9 @@ void WindowSDL::onGamepadEvent(const SDL_Event* event) { if (button != 0) { controller->CheckButton(0, button, event->type == SDL_EVENT_GAMEPAD_BUTTON_DOWN); } + if (SDL_GetCursor() != NULL) { + SDL_HideCursor(); + } break; case SDL_EVENT_GAMEPAD_AXIS_MOTION: axis = event->gaxis.axis == SDL_GAMEPAD_AXIS_LEFTX ? Input::Axis::LeftX diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp index 8aa292b1c..891b26084 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp @@ -233,6 +233,7 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) { ctx.AddExecutionMode(main, spv::ExecutionMode::OriginUpperLeft); } if (info.has_discard) { + ctx.AddExtension("SPV_EXT_demote_to_helper_invocation"); ctx.AddCapability(spv::Capability::DemoteToHelperInvocationEXT); } if (info.stores.Get(IR::Attribute::Depth)) { diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp index 92279c5fb..605fd6fe1 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp @@ -49,38 +49,55 @@ Id OutputAttrPointer(EmitContext& ctx, IR::Attribute attr, u32 element) { if (info.num_components == 1) { return info.id; } else { - return ctx.OpAccessChain(ctx.output_f32, info.id, ctx.ConstU32(element)); + return ctx.OpAccessChain(info.pointer_type, info.id, ctx.ConstU32(element)); + } + } + if (IR::IsMrt(attr)) { + const u32 index{u32(attr) - u32(IR::Attribute::RenderTarget0)}; + const auto& info{ctx.frag_outputs.at(index)}; + if (info.num_components == 1) { + return info.id; + } else { + return ctx.OpAccessChain(info.pointer_type, info.id, ctx.ConstU32(element)); } } switch (attr) { case IR::Attribute::Position0: { return ctx.OpAccessChain(ctx.output_f32, ctx.output_position, ctx.ConstU32(element)); + } case IR::Attribute::Position1: case IR::Attribute::Position2: case IR::Attribute::Position3: { const u32 index = u32(attr) - u32(IR::Attribute::Position1); return VsOutputAttrPointer(ctx, ctx.runtime_info.vs_info.outputs[index][element]); } - case IR::Attribute::RenderTarget0: - case IR::Attribute::RenderTarget1: - case IR::Attribute::RenderTarget2: - case IR::Attribute::RenderTarget3: - case IR::Attribute::RenderTarget4: - case IR::Attribute::RenderTarget5: - case IR::Attribute::RenderTarget6: - case IR::Attribute::RenderTarget7: { - const u32 index = u32(attr) - u32(IR::Attribute::RenderTarget0); - if (ctx.frag_num_comp[index] > 1) { - return ctx.OpAccessChain(ctx.output_f32, ctx.frag_color[index], ctx.ConstU32(element)); - } else { - return ctx.frag_color[index]; - } - } case IR::Attribute::Depth: return ctx.frag_depth; default: - throw NotImplementedException("Read attribute {}", attr); + throw NotImplementedException("Write attribute {}", attr); } +} + +std::pair OutputAttrComponentType(EmitContext& ctx, IR::Attribute attr) { + if (IR::IsParam(attr)) { + const u32 index{u32(attr) - u32(IR::Attribute::Param0)}; + const auto& info{ctx.output_params.at(index)}; + return {info.component_type, info.is_integer}; + } + if (IR::IsMrt(attr)) { + const u32 index{u32(attr) - u32(IR::Attribute::RenderTarget0)}; + const auto& info{ctx.frag_outputs.at(index)}; + return {info.component_type, info.is_integer}; + } + switch (attr) { + case IR::Attribute::Position0: + case IR::Attribute::Position1: + case IR::Attribute::Position2: + case IR::Attribute::Position3: + case IR::Attribute::Depth: + return {ctx.F32[1], false}; + default: + throw NotImplementedException("Write attribute {}", attr); } } } // Anonymous namespace @@ -156,17 +173,21 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp) { // Attribute is disabled or varying component is not written return ctx.ConstF32(comp == 3 ? 1.0f : 0.0f); } - if (param.is_default) { - return ctx.OpCompositeExtract(param.component_type, param.id, comp); - } - if (param.num_components > 1) { + Id result; + if (param.is_default) { + result = ctx.OpCompositeExtract(param.component_type, param.id, comp); + } else if (param.num_components > 1) { const Id pointer{ ctx.OpAccessChain(param.pointer_type, param.id, ctx.ConstU32(comp))}; - return ctx.OpLoad(param.component_type, pointer); + result = ctx.OpLoad(param.component_type, pointer); } else { - return ctx.OpLoad(param.component_type, param.id); + result = ctx.OpLoad(param.component_type, param.id); } + if (param.is_integer) { + result = ctx.OpBitcast(ctx.F32[1], result); + } + return result; } else { const auto step_rate = EmitReadStepRate(ctx, param.id.value); const auto offset = ctx.OpIAdd( @@ -222,7 +243,12 @@ void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, u32 elemen return; } const Id pointer{OutputAttrPointer(ctx, attr, element)}; - ctx.OpStore(pointer, ctx.OpBitcast(ctx.F32[1], value)); + const auto component_type{OutputAttrComponentType(ctx, attr)}; + if (component_type.second) { + ctx.OpStore(pointer, ctx.OpBitcast(component_type.first, value)); + } else { + ctx.OpStore(pointer, value); + } } template diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp index b66f09664..6a9eb246f 100644 --- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp +++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp @@ -120,6 +120,7 @@ void EmitContext::DefineArithmeticTypes() { output_f32 = Name(TypePointer(spv::StorageClass::Output, F32[1]), "output_f32"); output_u32 = Name(TypePointer(spv::StorageClass::Output, U32[1]), "output_u32"); + output_s32 = Name(TypePointer(spv::StorageClass::Output, S32[1]), "output_s32"); full_result_i32x2 = Name(TypeStruct(S32[1], S32[1]), "full_result_i32x2"); full_result_u32x2 = Name(TypeStruct(U32[1], U32[1]), "full_result_u32x2"); @@ -151,21 +152,21 @@ const VectorIds& GetAttributeType(EmitContext& ctx, AmdGpu::NumberFormat fmt) { UNREACHABLE_MSG("Invalid attribute type {}", fmt); } -EmitContext::SpirvAttribute EmitContext::GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id) { +EmitContext::SpirvAttribute EmitContext::GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id, + u32 num_components, bool output) { switch (fmt) { case AmdGpu::NumberFormat::Float: case AmdGpu::NumberFormat::Unorm: case AmdGpu::NumberFormat::Snorm: case AmdGpu::NumberFormat::SnormNz: - return {id, input_f32, F32[1], 4}; - case AmdGpu::NumberFormat::Uint: - return {id, input_u32, U32[1], 4}; - case AmdGpu::NumberFormat::Sint: - return {id, input_s32, S32[1], 4}; case AmdGpu::NumberFormat::Sscaled: - return {id, input_f32, F32[1], 4}; case AmdGpu::NumberFormat::Uscaled: - return {id, input_f32, F32[1], 4}; + case AmdGpu::NumberFormat::Srgb: + return {id, output ? output_f32 : input_f32, F32[1], num_components, false}; + case AmdGpu::NumberFormat::Uint: + return {id, output ? output_u32 : input_u32, U32[1], num_components, true}; + case AmdGpu::NumberFormat::Sint: + return {id, output ? output_s32 : input_s32, S32[1], num_components, true}; default: break; } @@ -227,6 +228,7 @@ void EmitContext::DefineInputs() { instance_id = DefineVariable(U32[1], spv::BuiltIn::InstanceIndex, spv::StorageClass::Input); for (const auto& input : info.vs_inputs) { + ASSERT(input.binding < IR::NumParams); const Id type{GetAttributeType(*this, input.fmt)[4]}; if (input.instance_step_rate == Info::VsInput::InstanceIdType::OverStepRate0 || input.instance_step_rate == Info::VsInput::InstanceIdType::OverStepRate1) { @@ -236,9 +238,13 @@ void EmitContext::DefineInputs() { : 1; // Note that we pass index rather than Id input_params[input.binding] = { - rate_idx, input_u32, - U32[1], input.num_components, - false, input.instance_data_buf, + rate_idx, + input_u32, + U32[1], + input.num_components, + true, + false, + input.instance_data_buf, }; } else { Id id{DefineInput(type, input.binding)}; @@ -247,7 +253,7 @@ void EmitContext::DefineInputs() { } else { Name(id, fmt::format("vs_in_attr{}", input.binding)); } - input_params[input.binding] = GetAttributeInfo(input.fmt, id); + input_params[input.binding] = GetAttributeInfo(input.fmt, id, 4, false); interfaces.push_back(id); } } @@ -259,9 +265,11 @@ void EmitContext::DefineInputs() { front_facing = DefineVariable(U1[1], spv::BuiltIn::FrontFacing, spv::StorageClass::Input); for (const auto& input : runtime_info.fs_info.inputs) { const u32 semantic = input.param_index; + ASSERT(semantic < IR::NumParams); if (input.is_default && !input.is_flat) { - input_params[semantic] = {MakeDefaultValue(*this, input.default_value), F32[1], - F32[1], 4, true}; + input_params[semantic] = { + MakeDefaultValue(*this, input.default_value), input_f32, F32[1], 4, false, true, + }; continue; } const IR::Attribute param{IR::Attribute::Param0 + input.param_index}; @@ -272,7 +280,8 @@ void EmitContext::DefineInputs() { Decorate(id, spv::Decoration::Flat); } Name(id, fmt::format("fs_in_attr{}", semantic)); - input_params[semantic] = {id, input_f32, F32[1], num_components}; + input_params[semantic] = + GetAttributeInfo(AmdGpu::NumberFormat::Float, id, num_components, false); interfaces.push_back(id); } break; @@ -308,7 +317,8 @@ void EmitContext::DefineOutputs() { const u32 num_components = info.stores.NumComponents(param); const Id id{DefineOutput(F32[num_components], i)}; Name(id, fmt::format("out_attr{}", i)); - output_params[i] = {id, output_f32, F32[1], num_components}; + output_params[i] = + GetAttributeInfo(AmdGpu::NumberFormat::Float, id, num_components, true); interfaces.push_back(id); } break; @@ -320,10 +330,12 @@ void EmitContext::DefineOutputs() { continue; } const u32 num_components = info.stores.NumComponents(mrt); - frag_color[i] = DefineOutput(F32[num_components], i); - frag_num_comp[i] = num_components; - Name(frag_color[i], fmt::format("frag_color{}", i)); - interfaces.push_back(frag_color[i]); + const AmdGpu::NumberFormat num_format{runtime_info.fs_info.color_buffers[i].num_format}; + const Id type{GetAttributeType(*this, num_format)[num_components]}; + const Id id{DefineOutput(type, i)}; + Name(id, fmt::format("frag_color{}", i)); + frag_outputs[i] = GetAttributeInfo(num_format, id, num_components, true); + interfaces.push_back(id); } break; default: diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.h b/src/shader_recompiler/backend/spirv/spirv_emit_context.h index fb7b29b3e..9db019946 100644 --- a/src/shader_recompiler/backend/spirv/spirv_emit_context.h +++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.h @@ -166,6 +166,7 @@ public: Id input_s32{}; Id output_u32{}; Id output_f32{}; + Id output_s32{}; boost::container::small_vector interfaces; @@ -177,8 +178,6 @@ public: Id frag_coord{}; Id front_facing{}; Id frag_depth{}; - std::array frag_color{}; - std::array frag_num_comp{}; Id clip_distances{}; Id cull_distances{}; @@ -237,11 +236,13 @@ public: Id pointer_type; Id component_type; u32 num_components; + bool is_integer{}; bool is_default{}; s32 buffer_handle{-1}; }; - std::array input_params{}; - std::array output_params{}; + std::array input_params{}; + std::array output_params{}; + std::array frag_outputs{}; private: void DefineArithmeticTypes(); @@ -254,7 +255,8 @@ private: void DefineImagesAndSamplers(); void DefineSharedMemory(); - SpirvAttribute GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id); + SpirvAttribute GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id, u32 num_components, + bool output); }; } // namespace Shader::Backend::SPIRV diff --git a/src/shader_recompiler/frontend/decode.cpp b/src/shader_recompiler/frontend/decode.cpp index 66df5c292..98f97dd12 100644 --- a/src/shader_recompiler/frontend/decode.cpp +++ b/src/shader_recompiler/frontend/decode.cpp @@ -313,6 +313,7 @@ void GcnDecodeContext::repairOperandType() { m_instruction.src[2].type = ScalarType::Uint64; break; case Opcode::IMAGE_GATHER4_C: + case Opcode::IMAGE_GATHER4_C_O: m_instruction.src[0].type = ScalarType::Any; break; default: diff --git a/src/shader_recompiler/frontend/format.cpp b/src/shader_recompiler/frontend/format.cpp index 90f10498a..7b3ad00ba 100644 --- a/src/shader_recompiler/frontend/format.cpp +++ b/src/shader_recompiler/frontend/format.cpp @@ -3625,8 +3625,8 @@ constexpr std::array InstructionFormatMIMG = {{ {InstClass::VectorMemImgSmp, InstCategory::VectorMemory, 4, 1, ScalarType::Uint32, ScalarType::Float32}, // 88 = IMAGE_GATHER4_C_O - {InstClass::VectorMemImgSmp, InstCategory::VectorMemory, 4, 1, ScalarType::Undefined, - ScalarType::Undefined}, + {InstClass::VectorMemImgSmp, InstCategory::VectorMemory, 4, 1, ScalarType::Uint32, + ScalarType::Float32}, // 89 = IMAGE_GATHER4_C_CL_O {InstClass::VectorMemImgSmp, InstCategory::VectorMemory, 4, 1, ScalarType::Undefined, ScalarType::Undefined}, diff --git a/src/shader_recompiler/frontend/translate/export.cpp b/src/shader_recompiler/frontend/translate/export.cpp index 7d901822d..f82f8fc1b 100644 --- a/src/shader_recompiler/frontend/translate/export.cpp +++ b/src/shader_recompiler/frontend/translate/export.cpp @@ -25,7 +25,7 @@ void Translator::EmitExport(const GcnInst& inst) { return comp; } const u32 index = u32(attrib) - u32(IR::Attribute::RenderTarget0); - switch (runtime_info.fs_info.mrt_swizzles[index]) { + switch (runtime_info.fs_info.color_buffers[index].mrt_swizzle) { case MrtSwizzle::Identity: return comp; case MrtSwizzle::Alt: diff --git a/src/shader_recompiler/frontend/translate/translate.h b/src/shader_recompiler/frontend/translate/translate.h index 7559b8533..6ce9ef101 100644 --- a/src/shader_recompiler/frontend/translate/translate.h +++ b/src/shader_recompiler/frontend/translate/translate.h @@ -161,14 +161,19 @@ public: // VOP1 void V_MOV(const GcnInst& inst); void V_READFIRSTLANE_B32(const GcnInst& inst); + void V_CVT_I32_F64(const GcnInst& inst); + void V_CVT_F64_I32(const GcnInst& inst); void V_CVT_F32_I32(const GcnInst& inst); void V_CVT_F32_U32(const GcnInst& inst); void V_CVT_U32_F32(const GcnInst& inst); void V_CVT_I32_F32(const GcnInst& inst); void V_CVT_F16_F32(const GcnInst& inst); void V_CVT_F32_F16(const GcnInst& inst); + void V_CVT_RPI_I32_F32(const GcnInst& inst); void V_CVT_FLR_I32_F32(const GcnInst& inst); void V_CVT_OFF_F32_I4(const GcnInst& inst); + void V_CVT_F32_F64(const GcnInst& inst); + void V_CVT_F64_F32(const GcnInst& inst); void V_CVT_F32_UBYTE(u32 index, const GcnInst& inst); void V_FRACT_F32(const GcnInst& inst); void V_TRUNC_F32(const GcnInst& inst); diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp index cf92460d3..b061d3b78 100644 --- a/src/shader_recompiler/frontend/translate/vector_alu.cpp +++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp @@ -99,6 +99,10 @@ void Translator::EmitVectorAlu(const GcnInst& inst) { return V_MOV(inst); case Opcode::V_READFIRSTLANE_B32: return V_READFIRSTLANE_B32(inst); + case Opcode::V_CVT_I32_F64: + return V_CVT_I32_F64(inst); + case Opcode::V_CVT_F64_I32: + return V_CVT_F64_I32(inst); case Opcode::V_CVT_F32_I32: return V_CVT_F32_I32(inst); case Opcode::V_CVT_F32_U32: @@ -113,6 +117,12 @@ void Translator::EmitVectorAlu(const GcnInst& inst) { return V_CVT_F32_F16(inst); case Opcode::V_CVT_FLR_I32_F32: return V_CVT_FLR_I32_F32(inst); + case Opcode::V_CVT_F32_F64: + return V_CVT_F32_F64(inst); + case Opcode::V_CVT_F64_F32: + return V_CVT_F64_F32(inst); + case Opcode::V_CVT_RPI_I32_F32: + return V_CVT_RPI_I32_F32(inst); case Opcode::V_CVT_OFF_F32_I4: return V_CVT_OFF_F32_I4(inst); case Opcode::V_CVT_F32_UBYTE0: @@ -610,6 +620,16 @@ void Translator::V_MOV(const GcnInst& inst) { SetDst(inst.dst[0], GetSrc(inst.src[0])); } +void Translator::V_CVT_I32_F64(const GcnInst& inst) { + const IR::F64 src0{GetSrc64(inst.src[0])}; + SetDst(inst.dst[0], ir.ConvertFToS(32, src0)); +} + +void Translator::V_CVT_F64_I32(const GcnInst& inst) { + const IR::U32 src0{GetSrc(inst.src[0])}; + SetDst64(inst.dst[0], ir.ConvertSToF(64, 32, src0)); +} + void Translator::V_CVT_F32_I32(const GcnInst& inst) { const IR::U32 src0{GetSrc(inst.src[0])}; SetDst(inst.dst[0], ir.ConvertSToF(32, 32, src0)); @@ -642,6 +662,11 @@ void Translator::V_CVT_F32_F16(const GcnInst& inst) { SetDst(inst.dst[0], ir.FPConvert(32, ir.BitCast(src0l))); } +void Translator::V_CVT_RPI_I32_F32(const GcnInst& inst) { + const IR::F32 src0{GetSrc(inst.src[0])}; + SetDst(inst.dst[0], ir.ConvertFToI(32, true, ir.FPFloor(ir.FPAdd(src0, ir.Imm32(0.5f))))); +} + void Translator::V_CVT_FLR_I32_F32(const GcnInst& inst) { const IR::F32 src0{GetSrc(inst.src[0])}; SetDst(inst.dst[0], ir.ConvertFToI(32, true, ir.FPFloor(src0))); @@ -656,6 +681,16 @@ void Translator::V_CVT_OFF_F32_I4(const GcnInst& inst) { SetDst(inst.dst[0], ir.Imm32(IntToFloat[src0.U32() & 0xF])); } +void Translator::V_CVT_F32_F64(const GcnInst& inst) { + const IR::F64 src0{GetSrc64(inst.src[0])}; + SetDst(inst.dst[0], ir.FPConvert(32, src0)); +} + +void Translator::V_CVT_F64_F32(const GcnInst& inst) { + const IR::F32 src0{GetSrc(inst.src[0])}; + SetDst64(inst.dst[0], ir.FPConvert(64, src0)); +} + void Translator::V_CVT_F32_UBYTE(u32 index, const GcnInst& inst) { const IR::U32 src0{GetSrc(inst.src[0])}; const IR::U32 byte = ir.BitFieldExtract(src0, ir.Imm32(8 * index), ir.Imm32(8)); @@ -909,6 +944,8 @@ void Translator::V_CMP_CLASS_F32(const GcnInst& inst) { switch (inst.dst[1].field) { case OperandField::VccLo: return ir.SetVcc(value); + case OperandField::ScalarGPR: + return ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[1].code), value); default: UNREACHABLE(); } diff --git a/src/shader_recompiler/frontend/translate/vector_memory.cpp b/src/shader_recompiler/frontend/translate/vector_memory.cpp index 7ecc2e762..c0957c3d1 100644 --- a/src/shader_recompiler/frontend/translate/vector_memory.cpp +++ b/src/shader_recompiler/frontend/translate/vector_memory.cpp @@ -144,6 +144,7 @@ void Translator::EmitVectorMemory(const GcnInst& inst) { // Image gather operations case Opcode::IMAGE_GATHER4_LZ: case Opcode::IMAGE_GATHER4_C: + case Opcode::IMAGE_GATHER4_C_O: case Opcode::IMAGE_GATHER4_C_LZ: case Opcode::IMAGE_GATHER4_LZ_O: return IMAGE_GATHER(inst); diff --git a/src/shader_recompiler/ir/ir_emitter.cpp b/src/shader_recompiler/ir/ir_emitter.cpp index a7edb6d9c..412c9581f 100644 --- a/src/shader_recompiler/ir/ir_emitter.cpp +++ b/src/shader_recompiler/ir/ir_emitter.cpp @@ -1402,6 +1402,15 @@ F16F32F64 IREmitter::FPConvert(size_t result_bitsize, const F16F32F64& value) { switch (value.Type()) { case Type::F16: return Inst(Opcode::ConvertF32F16, value); + case Type::F64: + return Inst(Opcode::ConvertF32F64, value); + default: + break; + } + case 64: + switch (value.Type()) { + case Type::F32: + return Inst(Opcode::ConvertF64F32, value); default: break; } diff --git a/src/shader_recompiler/runtime_info.h b/src/shader_recompiler/runtime_info.h index 1bb065544..115bbe10d 100644 --- a/src/shader_recompiler/runtime_info.h +++ b/src/shader_recompiler/runtime_info.h @@ -80,10 +80,16 @@ struct FragmentRuntimeInfo { auto operator<=>(const PsInput&) const noexcept = default; }; boost::container::static_vector inputs; - std::array mrt_swizzles; + struct PsColorBuffer { + AmdGpu::NumberFormat num_format; + MrtSwizzle mrt_swizzle; + + auto operator<=>(const PsColorBuffer&) const noexcept = default; + }; + std::array color_buffers; bool operator==(const FragmentRuntimeInfo& other) const noexcept { - return std::ranges::equal(mrt_swizzles, other.mrt_swizzles) && + return std::ranges::equal(color_buffers, other.color_buffers) && std::ranges::equal(inputs, other.inputs); } }; diff --git a/src/video_core/amdgpu/liverpool.cpp b/src/video_core/amdgpu/liverpool.cpp index 74e623e3d..3dce871fe 100644 --- a/src/video_core/amdgpu/liverpool.cpp +++ b/src/video_core/amdgpu/liverpool.cpp @@ -44,7 +44,7 @@ Liverpool::~Liverpool() { } void Liverpool::Process(std::stop_token stoken) { - Common::SetCurrentThreadName("GPU_CommandProcessor"); + Common::SetCurrentThreadName("shadPS4:GPU_CommandProcessor"); while (!stoken.stop_requested()) { { diff --git a/src/video_core/amdgpu/liverpool.h b/src/video_core/amdgpu/liverpool.h index 411b25ed1..7cc7e5a90 100644 --- a/src/video_core/amdgpu/liverpool.h +++ b/src/video_core/amdgpu/liverpool.h @@ -253,6 +253,13 @@ struct Liverpool { } }; + struct ModeControl { + s32 msaa_enable : 1; + s32 vport_scissor_enable : 1; + s32 line_stripple_enable : 1; + s32 send_unlit_stiles_to_pkr : 1; + }; + enum class ZOrder : u32 { LateZ = 0, EarlyZLateZ = 1, @@ -356,13 +363,16 @@ struct Liverpool { Stencil8 = 1, }; - union { + union ZInfo { BitField<0, 2, ZFormat> format; BitField<2, 2, u32> num_samples; BitField<13, 3, u32> tile_split; + BitField<20, 3, u32> tile_mode_index; + BitField<23, 4, u32> decompress_on_n_zplanes; BitField<27, 1, u32> allow_expclear; BitField<28, 1, u32> read_size; BitField<29, 1, u32> tile_surface_en; + BitField<30, 1, u32> clear_disallowed; BitField<31, 1, u32> zrange_precision; } z_info; union { @@ -465,6 +475,8 @@ struct Liverpool { BitField<13, 1, u32> enable_polygon_offset_para; BitField<16, 1, u32> enable_window_offset; BitField<19, 1, ProvokingVtxLast> provoking_vtx_last; + BitField<20, 1, u32> persp_corr_dis; + BitField<21, 1, u32> multi_prim_ib_ena; PolygonMode PolyMode() const { return enable_polygon_mode ? polygon_mode_front.Value() : PolygonMode::Fill; @@ -559,29 +571,39 @@ struct Liverpool { s16 top_left_x; s16 top_left_y; }; - union { - BitField<0, 15, u32> bottom_right_x; - BitField<16, 15, u32> bottom_right_y; + struct { + s16 bottom_right_x; + s16 bottom_right_y; }; + // From AMD spec: 'Negative numbers clamped to 0' + static s16 Clamp(s16 value) { + return std::max(s16(0), value); + } + u32 GetWidth() const { - return static_cast(bottom_right_x - top_left_x); + return static_cast(Clamp(bottom_right_x) - Clamp(top_left_x)); } u32 GetHeight() const { - return static_cast(bottom_right_y - top_left_y); + return static_cast(Clamp(bottom_right_y) - Clamp(top_left_y)); } }; + struct WindowOffset { + s32 window_x_offset : 16; + s32 window_y_offset : 16; + }; + struct ViewportScissor { union { BitField<0, 15, s32> top_left_x; - BitField<15, 15, s32> top_left_y; - BitField<30, 1, s32> window_offset_disable; + BitField<16, 15, s32> top_left_y; + BitField<31, 1, s32> window_offset_disable; }; - union { - BitField<0, 15, s32> bottom_right_x; - BitField<15, 15, s32> bottom_right_y; + struct { + s16 bottom_right_x; + s16 bottom_right_y; }; u32 GetWidth() const { @@ -617,6 +639,7 @@ struct Liverpool { BitField<8, 1, u32> xy_transformed; BitField<9, 1, u32> z_transformed; BitField<10, 1, u32> w_transformed; + BitField<11, 1, u32> perfcounter_ref; }; struct ClipUserData { @@ -672,6 +695,7 @@ struct Liverpool { BitField<24, 5, BlendFactor> alpha_dst_factor; BitField<29, 1, u32> separate_alpha_blend; BitField<30, 1, u32> enable; + BitField<31, 1, u32> disable_rop3; }; union ColorControl { @@ -680,9 +704,11 @@ struct Liverpool { Normal = 1u, EliminateFastClear = 2u, Resolve = 3u, + Err = 4u, FmaskDecompress = 5u, }; + BitField<0, 1, u32> disable_dual_quad; BitField<3, 1, u32> degamma_enable; BitField<4, 3, OperationMode> mode; BitField<16, 8, u32> rop3; @@ -720,7 +746,7 @@ struct Liverpool { BitField<0, 11, u32> slice_start; BitField<13, 11, u32> slice_max; } view; - union { + union Color0Info { BitField<0, 2, EndianSwap> endian; BitField<2, 5, DataFormat> format; BitField<7, 1, u32> linear_general; @@ -733,10 +759,17 @@ struct Liverpool { BitField<17, 1, u32> simple_float; BitField<18, 1, RoundMode> round_mode; BitField<19, 1, u32> cmask_is_linear; + BitField<20, 3, u32> blend_opt_dont_rd_dst; + BitField<23, 3, u32> blend_opt_discard_pixel; + BitField<26, 1, u32> fmask_compression_disable_ci; + BitField<27, 1, u32> fmask_compress_1frag_only; + BitField<28, 1, u32> dcc_enable; + BitField<29, 1, u32> cmask_addr_type; } info; - union { + union Color0Attrib { BitField<0, 5, TilingMode> tile_mode_index; BitField<5, 5, u32> fmask_tile_mode_index; + BitField<10, 2, u32> fmask_bank_height; BitField<12, 3, u32> num_samples_log2; BitField<15, 2, u32> num_fragments_log2; BitField<17, 1, u32> force_dst_alpha_1; @@ -869,8 +902,14 @@ struct Liverpool { u32 raw; BitField<0, 1, u32> depth_clear_enable; BitField<1, 1, u32> stencil_clear_enable; + BitField<2, 1, u32> depth_copy; + BitField<3, 1, u32> stencil_copy; + BitField<4, 1, u32> resummarize_enable; BitField<5, 1, u32> stencil_compress_disable; BitField<6, 1, u32> depth_compress_disable; + BitField<7, 1, u32> copy_centroid; + BitField<8, 1, u32> copy_sample; + BitField<9, 1, u32> decompress_enable; }; union DepthView { @@ -923,6 +962,22 @@ struct Liverpool { } }; + union Eqaa { + u32 raw; + BitField<0, 1, u32> max_anchor_samples; + BitField<4, 3, u32> ps_iter_samples; + BitField<8, 3, u32> mask_export_num_samples; + BitField<12, 3, u32> alpha_to_mask_num_samples; + BitField<16, 1, u32> high_quality_intersections; + BitField<17, 1, u32> incoherent_eqaa_reads; + BitField<18, 1, u32> interpolate_comp_z; + BitField<19, 1, u32> interpolate_src_z; + BitField<20, 1, u32> static_anchor_associations; + BitField<21, 1, u32> alpha_to_mask_eqaa_disable; + BitField<24, 3, u32> overrasterization_amount; + BitField<27, 1, u32> enable_postz_overrasterization; + }; + union Regs { struct { INSERT_PADDING_WORDS(0x2C08); @@ -953,10 +1008,14 @@ struct Liverpool { Scissor screen_scissor; INSERT_PADDING_WORDS(0xA010 - 0xA00C - 2); DepthBuffer depth_buffer; - INSERT_PADDING_WORDS(0xA08E - 0xA018); + INSERT_PADDING_WORDS(0xA080 - 0xA018); + WindowOffset window_offset; + ViewportScissor window_scissor; + INSERT_PADDING_WORDS(0xA08E - 0xA081 - 2); ColorBufferMask color_target_mask; ColorBufferMask color_shader_mask; - INSERT_PADDING_WORDS(0xA094 - 0xA08E - 2); + ViewportScissor generic_scissor; + INSERT_PADDING_WORDS(2); std::array viewport_scissors; std::array viewport_depths; INSERT_PADDING_WORDS(0xA103 - 0xA0D4); @@ -994,7 +1053,9 @@ struct Liverpool { PolygonControl polygon_control; ViewportControl viewport_control; VsOutputControl vs_output_control; - INSERT_PADDING_WORDS(0xA29E - 0xA207 - 2); + INSERT_PADDING_WORDS(0xA292 - 0xA207 - 1); + ModeControl mode_control; + INSERT_PADDING_WORDS(0xA29D - 0xA292 - 1); u32 index_size; u32 max_index_size; IndexBufferType index_buffer_type; @@ -1206,8 +1267,11 @@ static_assert(GFX6_3D_REG_INDEX(depth_htile_data_base) == 0xA005); static_assert(GFX6_3D_REG_INDEX(screen_scissor) == 0xA00C); static_assert(GFX6_3D_REG_INDEX(depth_buffer.z_info) == 0xA010); static_assert(GFX6_3D_REG_INDEX(depth_buffer.depth_slice) == 0xA017); +static_assert(GFX6_3D_REG_INDEX(window_offset) == 0xA080); +static_assert(GFX6_3D_REG_INDEX(window_scissor) == 0xA081); static_assert(GFX6_3D_REG_INDEX(color_target_mask) == 0xA08E); static_assert(GFX6_3D_REG_INDEX(color_shader_mask) == 0xA08F); +static_assert(GFX6_3D_REG_INDEX(generic_scissor) == 0xA090); static_assert(GFX6_3D_REG_INDEX(viewport_scissors) == 0xA094); static_assert(GFX6_3D_REG_INDEX(primitive_restart_index) == 0xA103); static_assert(GFX6_3D_REG_INDEX(stencil_control) == 0xA10B); @@ -1227,6 +1291,7 @@ static_assert(GFX6_3D_REG_INDEX(color_control) == 0xA202); static_assert(GFX6_3D_REG_INDEX(clipper_control) == 0xA204); static_assert(GFX6_3D_REG_INDEX(viewport_control) == 0xA206); static_assert(GFX6_3D_REG_INDEX(vs_output_control) == 0xA207); +static_assert(GFX6_3D_REG_INDEX(mode_control) == 0xA292); static_assert(GFX6_3D_REG_INDEX(index_size) == 0xA29D); static_assert(GFX6_3D_REG_INDEX(index_buffer_type) == 0xA29F); static_assert(GFX6_3D_REG_INDEX(enable_primitive_id) == 0xA2A1); diff --git a/src/video_core/amdgpu/pm4_cmds.h b/src/video_core/amdgpu/pm4_cmds.h index 5d9c0f9ee..b9fbfcb89 100644 --- a/src/video_core/amdgpu/pm4_cmds.h +++ b/src/video_core/amdgpu/pm4_cmds.h @@ -36,6 +36,8 @@ union PM4Type0Header { }; union PM4Type3Header { + static constexpr u32 TYPE = 3; + constexpr PM4Type3Header(PM4ItOpcode code, u32 num_words_min_one, PM4ShaderType stype = PM4ShaderType::ShaderGraphics, PM4Predicate pred = PM4Predicate::PredDisable) { diff --git a/src/video_core/buffer_cache/buffer.cpp b/src/video_core/buffer_cache/buffer.cpp index f8afd6991..5a049c185 100644 --- a/src/video_core/buffer_cache/buffer.cpp +++ b/src/video_core/buffer_cache/buffer.cpp @@ -95,7 +95,8 @@ Buffer::Buffer(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_, // Create buffer object. const vk::BufferCreateInfo buffer_ci = { .size = size_bytes, - .usage = flags, + // When maintenance5 is not supported, use all flags since we can't add flags to views. + .usage = instance->IsMaintenance5Supported() ? flags : AllFlags, }; VmaAllocationInfo alloc_info{}; buffer.Create(buffer_ci, usage, &alloc_info); @@ -119,7 +120,7 @@ vk::BufferView Buffer::View(u32 offset, u32 size, bool is_written, AmdGpu::DataF : vk::BufferUsageFlagBits2KHR::eUniformTexelBuffer, }; const vk::BufferViewCreateInfo view_ci = { - .pNext = &usage_flags, + .pNext = instance->IsMaintenance5Supported() ? &usage_flags : nullptr, .buffer = buffer.buffer, .format = Vulkan::LiverpoolToVK::SurfaceFormat(dfmt, nfmt), .offset = offset, diff --git a/src/video_core/buffer_cache/buffer_cache.cpp b/src/video_core/buffer_cache/buffer_cache.cpp index caffee6ba..43dc2fdc9 100644 --- a/src/video_core/buffer_cache/buffer_cache.cpp +++ b/src/video_core/buffer_cache/buffer_cache.cpp @@ -105,6 +105,15 @@ bool BufferCache::BindVertexBuffers(const Shader::Info& vs_info) { if (instance.IsVertexInputDynamicState()) { const auto cmdbuf = scheduler.CommandBuffer(); cmdbuf.setVertexInputEXT(bindings, attributes); + } else if (bindings.empty()) { + // Required to call bindVertexBuffers2EXT at least once in the current command buffer + // with non-null strides without a non-dynamic stride pipeline in between. Thus even + // when nothing is bound we still need to make a dummy call. Non-null strides in turn + // requires a count greater than 0. + const auto cmdbuf = scheduler.CommandBuffer(); + const std::array null_buffers = {GetBuffer(NULL_BUFFER_ID).buffer.buffer}; + constexpr std::array null_offsets = {static_cast(0)}; + cmdbuf.bindVertexBuffers2EXT(0, null_buffers, null_offsets, null_offsets, null_offsets); } }; @@ -114,6 +123,8 @@ bool BufferCache::BindVertexBuffers(const Shader::Info& vs_info) { std::array host_buffers; std::array host_offsets; + std::array host_sizes; + std::array host_strides; boost::container::static_vector guest_buffers; struct BufferRange { @@ -193,11 +204,18 @@ bool BufferCache::BindVertexBuffers(const Shader::Info& vs_info) { host_buffers[i] = host_buffer->vk_buffer; host_offsets[i] = host_buffer->offset + buffer.base_address - host_buffer->base_address; + host_sizes[i] = buffer.GetSize(); + host_strides[i] = buffer.GetStride(); } if (num_buffers > 0) { const auto cmdbuf = scheduler.CommandBuffer(); - cmdbuf.bindVertexBuffers(0, num_buffers, host_buffers.data(), host_offsets.data()); + if (instance.IsVertexInputDynamicState()) { + cmdbuf.bindVertexBuffers(0, num_buffers, host_buffers.data(), host_offsets.data()); + } else { + cmdbuf.bindVertexBuffers2EXT(0, num_buffers, host_buffers.data(), host_offsets.data(), + host_sizes.data(), host_strides.data()); + } } return has_step_rate; diff --git a/src/video_core/renderer_vulkan/renderer_vulkan.cpp b/src/video_core/renderer_vulkan/renderer_vulkan.cpp index ac6b99e64..97e5185e5 100644 --- a/src/video_core/renderer_vulkan/renderer_vulkan.cpp +++ b/src/video_core/renderer_vulkan/renderer_vulkan.cpp @@ -14,6 +14,9 @@ #include +#include "core/debug_state.h" +#include "core/devtools/layer.h" + namespace Vulkan { bool CanBlitToSwapchain(const vk::PhysicalDevice physical_device, vk::Format format) { @@ -96,7 +99,7 @@ RendererVulkan::RendererVulkan(Frontend::WindowSDL& window_, AmdGpu::Liverpool* draw_scheduler{instance}, present_scheduler{instance}, flip_scheduler{instance}, swapchain{instance, window}, rasterizer{std::make_unique(instance, draw_scheduler, liverpool)}, - texture_cache{rasterizer->GetTextureCache()}, video_info_ui{this} { + texture_cache{rasterizer->GetTextureCache()} { const u32 num_images = swapchain.GetImageCount(); const vk::Device device = instance.GetDevice(); @@ -114,11 +117,11 @@ RendererVulkan::RendererVulkan(Frontend::WindowSDL& window_, AmdGpu::Liverpool* // Setup ImGui ImGui::Core::Initialize(instance, window, num_images, swapchain.GetSurfaceFormat().format); - ImGui::Layer::AddLayer(&video_info_ui); + ImGui::Layer::AddLayer(Common::Singleton::Instance()); } RendererVulkan::~RendererVulkan() { - ImGui::Layer::RemoveLayer(&video_info_ui); + ImGui::Layer::RemoveLayer(Common::Singleton::Instance()); draw_scheduler.Finish(); const vk::Device device = instance.GetDevice(); for (auto& frame : present_frames) { @@ -416,6 +419,8 @@ void RendererVulkan::Present(Frame* frame) { std::scoped_lock fl{free_mutex}; free_queue.push(frame); free_cv.notify_one(); + + DebugState.IncFlipFrameNum(); } Frame* RendererVulkan::GetRenderFrame() { diff --git a/src/video_core/renderer_vulkan/renderer_vulkan.h b/src/video_core/renderer_vulkan/renderer_vulkan.h index c8e566418..0dd869614 100644 --- a/src/video_core/renderer_vulkan/renderer_vulkan.h +++ b/src/video_core/renderer_vulkan/renderer_vulkan.h @@ -5,7 +5,6 @@ #include -#include "imgui/layer/video_info.h" #include "video_core/amdgpu/liverpool.h" #include "video_core/renderer_vulkan/vk_instance.h" #include "video_core/renderer_vulkan/vk_scheduler.h" @@ -105,8 +104,6 @@ private: std::condition_variable_any frame_cv; std::optional splash_img; std::vector vo_buffers_addr; - - ImGui::Layers::VideoInfo video_info_ui; }; } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_common.h b/src/video_core/renderer_vulkan/vk_common.h index e59eb47eb..9178aeb65 100644 --- a/src/video_core/renderer_vulkan/vk_common.h +++ b/src/video_core/renderer_vulkan/vk_common.h @@ -17,7 +17,11 @@ #define VULKAN_HPP_NO_EXCEPTIONS // Define assert-on-result to nothing to instead return the result for our handling. #define VULKAN_HPP_ASSERT_ON_RESULT + +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wunused-value" #include +#pragma clang diagnostic pop #define VMA_STATIC_VULKAN_FUNCTIONS 0 #define VMA_DYNAMIC_VULKAN_FUNCTIONS 1 diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp index 3c191c4a1..c10cac6cb 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp @@ -46,28 +46,34 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul boost::container::static_vector vertex_bindings; boost::container::static_vector vertex_attributes; - const auto& vs_info = stages[u32(Shader::Stage::Vertex)]; - for (const auto& input : vs_info->vs_inputs) { - if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 || - input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) { - // Skip attribute binding as the data will be pulled by shader - continue; - } + if (!instance.IsVertexInputDynamicState()) { + const auto& vs_info = stages[u32(Shader::Stage::Vertex)]; + for (const auto& input : vs_info->vs_inputs) { + if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 || + input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) { + // Skip attribute binding as the data will be pulled by shader + continue; + } - const auto buffer = vs_info->ReadUd(input.sgpr_base, input.dword_offset); - vertex_attributes.push_back({ - .location = input.binding, - .binding = input.binding, - .format = LiverpoolToVK::SurfaceFormat(buffer.GetDataFmt(), buffer.GetNumberFmt()), - .offset = 0, - }); - vertex_bindings.push_back({ - .binding = input.binding, - .stride = buffer.GetStride(), - .inputRate = input.instance_step_rate == Shader::Info::VsInput::None - ? vk::VertexInputRate::eVertex - : vk::VertexInputRate::eInstance, - }); + const auto buffer = + vs_info->ReadUd(input.sgpr_base, input.dword_offset); + if (buffer.GetSize() == 0) { + continue; + } + vertex_attributes.push_back({ + .location = input.binding, + .binding = input.binding, + .format = LiverpoolToVK::SurfaceFormat(buffer.GetDataFmt(), buffer.GetNumberFmt()), + .offset = 0, + }); + vertex_bindings.push_back({ + .binding = input.binding, + .stride = buffer.GetStride(), + .inputRate = input.instance_step_rate == Shader::Info::VsInput::None + ? vk::VertexInputRate::eVertex + : vk::VertexInputRate::eInstance, + }); + } } const vk::PipelineVertexInputStateCreateInfo vertex_input_info = { @@ -82,11 +88,17 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul "Rectangle List primitive type is only supported for embedded VS"); } + auto prim_restart = key.enable_primitive_restart != 0; + if (prim_restart && IsPrimitiveListTopology() && !instance.IsListRestartSupported()) { + LOG_WARNING(Render_Vulkan, + "Primitive restart is enabled for list topology but not supported by driver."); + prim_restart = false; + } const vk::PipelineInputAssemblyStateCreateInfo input_assembly = { .topology = LiverpoolToVK::PrimitiveType(key.prim_type), - .primitiveRestartEnable = key.enable_primitive_restart != 0, + .primitiveRestartEnable = prim_restart, }; - ASSERT_MSG(!key.enable_primitive_restart || key.primitive_restart_index == 0xFFFF || + ASSERT_MSG(!prim_restart || key.primitive_restart_index == 0xFFFF || key.primitive_restart_index == 0xFFFFFFFF, "Primitive restart index other than -1 is not supported yet"); @@ -147,6 +159,8 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul } if (instance.IsVertexInputDynamicState()) { dynamic_states.push_back(vk::DynamicState::eVertexInputEXT); + } else { + dynamic_states.push_back(vk::DynamicState::eVertexInputBindingStrideEXT); } const vk::PipelineDynamicStateCreateInfo dynamic_info = { @@ -273,7 +287,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul .pNext = &pipeline_rendering_ci, .stageCount = static_cast(shader_stages.size()), .pStages = shader_stages.data(), - .pVertexInputState = &vertex_input_info, + .pVertexInputState = !instance.IsVertexInputDynamicState() ? &vertex_input_info : nullptr, .pInputAssemblyState = &input_assembly, .pViewportState = &viewport_info, .pRasterizationState = &raster_state, @@ -379,7 +393,7 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs, for (const auto& buffer : stage->buffers) { const auto vsharp = buffer.GetSharp(*stage); const bool is_storage = buffer.IsStorage(vsharp); - if (vsharp) { + if (vsharp && vsharp.GetSize() > 0) { const VAddr address = vsharp.base_address; if (texture_cache.IsMeta(address)) { LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a PS shader (buffer)"); diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.h b/src/video_core/renderer_vulkan/vk_graphics_pipeline.h index 74817656a..ba4996742 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.h +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.h @@ -26,6 +26,7 @@ using Liverpool = AmdGpu::Liverpool; struct GraphicsPipelineKey { std::array stage_hashes; std::array color_formats; + std::array color_num_formats; std::array mrt_swizzles; vk::Format depth_format; vk::Format stencil_format; @@ -45,6 +46,7 @@ struct GraphicsPipelineKey { Liverpool::ColorBufferMask cb_shader_mask; std::array blend_controls; std::array write_masks; + std::array vertex_buffer_formats; bool operator==(const GraphicsPipelineKey& key) const noexcept { return std::memcmp(this, &key, sizeof(key)) == 0; @@ -83,6 +85,16 @@ public: return key.depth_stencil.depth_enable.Value(); } + [[nodiscard]] bool IsPrimitiveListTopology() const { + return key.prim_type == Liverpool::PrimitiveType::PointList || + key.prim_type == Liverpool::PrimitiveType::LineList || + key.prim_type == Liverpool::PrimitiveType::TriangleList || + key.prim_type == Liverpool::PrimitiveType::AdjLineList || + key.prim_type == Liverpool::PrimitiveType::AdjTriangleList || + key.prim_type == Liverpool::PrimitiveType::RectList || + key.prim_type == Liverpool::PrimitiveType::QuadList; + } + private: void BuildDescSetLayout(); diff --git a/src/video_core/renderer_vulkan/vk_instance.cpp b/src/video_core/renderer_vulkan/vk_instance.cpp index c09414a11..3f874ff88 100644 --- a/src/video_core/renderer_vulkan/vk_instance.cpp +++ b/src/video_core/renderer_vulkan/vk_instance.cpp @@ -260,9 +260,8 @@ bool Instance::CreateDevice() { color_write_en &= add_extension(VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME); const bool calibrated_timestamps = add_extension(VK_EXT_CALIBRATED_TIMESTAMPS_EXTENSION_NAME); const bool robustness = add_extension(VK_EXT_ROBUSTNESS_2_EXTENSION_NAME); - const bool topology_restart = - add_extension(VK_EXT_PRIMITIVE_TOPOLOGY_LIST_RESTART_EXTENSION_NAME); - const bool maintenance5 = add_extension(VK_KHR_MAINTENANCE_5_EXTENSION_NAME); + list_restart = add_extension(VK_EXT_PRIMITIVE_TOPOLOGY_LIST_RESTART_EXTENSION_NAME); + maintenance5 = add_extension(VK_KHR_MAINTENANCE_5_EXTENSION_NAME); // These extensions are promoted by Vulkan 1.3, but for greater compatibility we use Vulkan 1.2 // with extensions. @@ -272,6 +271,7 @@ bool Instance::CreateDevice() { add_extension(VK_KHR_DYNAMIC_RENDERING_EXTENSION_NAME); add_extension(VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_EXTENSION_NAME); add_extension(VK_KHR_SYNCHRONIZATION_2_EXTENSION_NAME); + add_extension(VK_EXT_EXTENDED_DYNAMIC_STATE_EXTENSION_NAME); #ifdef __APPLE__ // Required by Vulkan spec if supported. @@ -366,6 +366,9 @@ bool Instance::CreateDevice() { vk::PhysicalDeviceColorWriteEnableFeaturesEXT{ .colorWriteEnable = true, }, + vk::PhysicalDeviceExtendedDynamicStateFeaturesEXT{ + .extendedDynamicState = true, + }, vk::PhysicalDeviceExtendedDynamicState3FeaturesEXT{ .extendedDynamicState3ColorWriteMask = true, }, @@ -414,7 +417,7 @@ bool Instance::CreateDevice() { if (!workgroup_memory_explicit_layout) { device_chain.unlink(); } - if (!topology_restart) { + if (!list_restart) { device_chain.unlink(); } if (robustness) { diff --git a/src/video_core/renderer_vulkan/vk_instance.h b/src/video_core/renderer_vulkan/vk_instance.h index e6e39ab1f..e019ffba3 100644 --- a/src/video_core/renderer_vulkan/vk_instance.h +++ b/src/video_core/renderer_vulkan/vk_instance.h @@ -138,6 +138,15 @@ public: return null_descriptor; } + /// Returns true when VK_KHR_maintenance5 is supported. + bool IsMaintenance5Supported() const { + return maintenance5; + } + + bool IsListRestartSupported() const { + return list_restart; + } + /// Returns the vendor ID of the physical device u32 GetVendorID() const { return properties.vendorID; @@ -280,6 +289,8 @@ private: bool color_write_en{}; bool vertex_input_dynamic_state{}; bool null_descriptor{}; + bool maintenance5{}; + bool list_restart{}; u64 min_imported_host_pointer_alignment{}; u32 subgroup_size{}; bool tooling_info{}; diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp index 4aca00730..0ccaf3fac 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp @@ -95,10 +95,6 @@ Shader::RuntimeInfo PipelineCache::BuildRuntimeInfo(Shader::Stage stage) { case Shader::Stage::Fragment: { info.num_user_data = regs.ps_program.settings.num_user_regs; info.num_allocated_vgprs = regs.ps_program.settings.num_vgprs * 4; - std::ranges::transform(graphics_key.mrt_swizzles, info.fs_info.mrt_swizzles.begin(), - [](Liverpool::ColorBuffer::SwapMode mode) { - return static_cast(mode); - }); const auto& ps_inputs = regs.ps_inputs; for (u32 i = 0; i < regs.num_interp; i++) { info.fs_info.inputs.push_back({ @@ -108,6 +104,12 @@ Shader::RuntimeInfo PipelineCache::BuildRuntimeInfo(Shader::Stage stage) { .default_value = u8(ps_inputs[i].default_value), }); } + for (u32 i = 0; i < Shader::MaxColorBuffers; i++) { + info.fs_info.color_buffers[i] = { + .num_format = graphics_key.color_num_formats[i], + .mrt_swizzle = static_cast(graphics_key.mrt_swizzles[i]), + }; + } break; } case Shader::Stage::Compute: { @@ -244,9 +246,11 @@ bool PipelineCache::RefreshGraphicsKey() { // attachments. This might be not a case as HW color buffers can be bound in an arbitrary // order. We need to do some arrays compaction at this stage key.color_formats.fill(vk::Format::eUndefined); + key.color_num_formats.fill(AmdGpu::NumberFormat::Unorm); key.blend_controls.fill({}); key.write_masks.fill({}); key.mrt_swizzles.fill(Liverpool::ColorBuffer::SwapMode::Standard); + key.vertex_buffer_formats.fill(vk::Format::eUndefined); // First pass of bindings check to idenitfy formats and swizzles and pass them to rhe shader // recompiler. @@ -260,6 +264,7 @@ bool PipelineCache::RefreshGraphicsKey() { const bool is_vo_surface = renderer->IsVideoOutSurface(col_buf); key.color_formats[remapped_cb] = LiverpoolToVK::AdjustColorBufferFormat( base_format, col_buf.info.comp_swap.Value(), false /*is_vo_surface*/); + key.color_num_formats[remapped_cb] = col_buf.NumFormat(); if (base_format == key.color_formats[remapped_cb]) { key.mrt_swizzles[remapped_cb] = col_buf.info.comp_swap.Value(); } @@ -310,7 +315,26 @@ bool PipelineCache::RefreshGraphicsKey() { std::tie(infos[i], modules[i], key.stage_hashes[i]) = GetProgram(stage, params, binding); } - const auto* fs_info = infos[u32(Shader::Stage::Fragment)]; + const auto* vs_info = infos[static_cast(Shader::Stage::Vertex)]; + if (vs_info && !instance.IsVertexInputDynamicState()) { + u32 vertex_binding = 0; + for (const auto& input : vs_info->vs_inputs) { + if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 || + input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) { + continue; + } + const auto& buffer = + vs_info->ReadUd(input.sgpr_base, input.dword_offset); + if (buffer.GetSize() == 0) { + continue; + } + ASSERT(vertex_binding < MaxVertexBufferCount); + key.vertex_buffer_formats[vertex_binding++] = + Vulkan::LiverpoolToVK::SurfaceFormat(buffer.GetDataFmt(), buffer.GetNumberFmt()); + } + } + + const auto* fs_info = infos[static_cast(Shader::Stage::Fragment)]; key.mrt_mask = fs_info ? fs_info->mrt_mask : 0u; // Second pass to fill remain CB pipeline key data diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index e511c161e..159b489d8 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -368,11 +368,55 @@ void Rasterizer::UpdateViewportScissorState() { .maxDepth = vp.zscale + vp.zoffset, }); } - const auto& sc = regs.screen_scissor; - scissors.push_back({ - .offset = {sc.top_left_x, sc.top_left_y}, - .extent = {sc.GetWidth(), sc.GetHeight()}, - }); + + const bool enable_offset = !regs.window_scissor.window_offset_disable.Value(); + Liverpool::Scissor scsr{}; + const auto combined_scissor_value_tl = [](s16 scr, s16 win, s16 gen, s16 win_offset) { + return std::max({scr, s16(win + win_offset), s16(gen + win_offset)}); + }; + + scsr.top_left_x = combined_scissor_value_tl( + regs.screen_scissor.top_left_x, s16(regs.window_scissor.top_left_x.Value()), + s16(regs.generic_scissor.top_left_x.Value()), + enable_offset ? regs.window_offset.window_x_offset : 0); + + scsr.top_left_y = combined_scissor_value_tl( + regs.screen_scissor.top_left_y, s16(regs.window_scissor.top_left_y.Value()), + s16(regs.generic_scissor.top_left_y.Value()), + enable_offset ? regs.window_offset.window_y_offset : 0); + + const auto combined_scissor_value_br = [](s16 scr, s16 win, s16 gen, s16 win_offset) { + return std::min({scr, s16(win + win_offset), s16(gen + win_offset)}); + }; + + scsr.bottom_right_x = combined_scissor_value_br( + regs.screen_scissor.bottom_right_x, regs.window_scissor.bottom_right_x, + regs.generic_scissor.bottom_right_x, + enable_offset ? regs.window_offset.window_x_offset : 0); + + scsr.bottom_right_y = combined_scissor_value_br( + regs.screen_scissor.bottom_right_y, regs.window_scissor.bottom_right_y, + regs.generic_scissor.bottom_right_y, + enable_offset ? regs.window_offset.window_y_offset : 0); + + for (u32 idx = 0; idx < Liverpool::NumViewports; idx++) { + auto vp_scsr = scsr; + if (regs.mode_control.vport_scissor_enable) { + vp_scsr.top_left_x = + std::max(vp_scsr.top_left_x, s16(regs.viewport_scissors[idx].top_left_x.Value())); + vp_scsr.top_left_y = + std::max(vp_scsr.top_left_y, s16(regs.viewport_scissors[idx].top_left_y.Value())); + vp_scsr.bottom_right_x = + std::min(vp_scsr.bottom_right_x, regs.viewport_scissors[idx].bottom_right_x); + vp_scsr.bottom_right_y = + std::min(vp_scsr.bottom_right_y, regs.viewport_scissors[idx].bottom_right_y); + } + scissors.push_back({ + .offset = {vp_scsr.top_left_x, vp_scsr.top_left_y}, + .extent = {vp_scsr.GetWidth(), vp_scsr.GetHeight()}, + }); + } + const auto cmdbuf = scheduler.CommandBuffer(); cmdbuf.setViewport(0, viewports); cmdbuf.setScissor(0, scissors); diff --git a/src/video_core/renderer_vulkan/vk_swapchain.cpp b/src/video_core/renderer_vulkan/vk_swapchain.cpp index 13c0adb0b..8c268c9be 100644 --- a/src/video_core/renderer_vulkan/vk_swapchain.cpp +++ b/src/video_core/renderer_vulkan/vk_swapchain.cpp @@ -123,7 +123,7 @@ void Swapchain::Present() { }; auto result = instance.GetPresentQueue().presentKHR(present_info); - if (result == vk::Result::eErrorOutOfDateKHR) { + if (result == vk::Result::eErrorOutOfDateKHR || result == vk::Result::eSuboptimalKHR) { needs_recreation = true; } else { ASSERT_MSG(result == vk::Result::eSuccess, "Swapchain presentation failed: {}",