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shader recompiler: removed unnecessary changes & missing consts

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Vinicius Rangel 2024-07-26 10:11:36 -03:00
parent df257087d1
commit 7e0e99e21d
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GPG key ID: A5B154D904B761D9
5 changed files with 23 additions and 48 deletions
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15
src/shader_recompiler/frontend/translate/translate.cpp
View file

@ -79,7 +79,7 @@ template <>
IR::U32F32 Translator::GetSrc(const InstOperand& operand, bool force_flt) {
IR::U32F32 value{};
bool is_float = operand.type == ScalarType::Float32 || force_flt;
const bool is_float = operand.type == ScalarType::Float32 || force_flt;
switch (operand.field) {
case OperandField::ScalarGPR:
if (is_float) {
@ -190,7 +190,7 @@ IR::U64F64 Translator::GetSrc64(const InstOperand& operand, bool force_flt) {
IR::Value value_lo{};
bool immediate = false;
bool is_float = operand.type == ScalarType::Float64 || force_flt;
const bool is_float = operand.type == ScalarType::Float64 || force_flt;
switch (operand.field) {
case OperandField::ScalarGPR:
if (is_float) {
@ -344,7 +344,7 @@ void Translator::SetDst(const InstOperand& operand, const IR::U32F32& value) {
void Translator::SetDst64(const InstOperand& operand, const IR::U64F64& value_raw) {
IR::U64F64 value_untyped = value_raw;
bool is_float = value_raw.Type() == IR::Type::F64 || value_raw.Type() == IR::Type::F32;
const bool is_float = value_raw.Type() == IR::Type::F64 || value_raw.Type() == IR::Type::F32;
if (is_float) {
if (operand.output_modifier.multiplier != 0.f) {
value_untyped =
@ -354,11 +354,12 @@ void Translator::SetDst64(const InstOperand& operand, const IR::U64F64& value_ra
value_untyped = ir.FPSaturate(value_raw);
}
}
IR::U64 value = is_float ? ir.BitCast<IR::U64>(IR::F64{value_untyped}) : IR::U64{value_untyped};
const IR::U64 value =
is_float ? ir.BitCast<IR::U64>(IR::F64{value_untyped}) : IR::U64{value_untyped};
IR::Value unpacked{ir.UnpackUint2x32(value)};
IR::U32 lo{ir.CompositeExtract(unpacked, 0U)};
IR::U32 hi{ir.CompositeExtract(unpacked, 1U)};
const IR::Value unpacked{ir.UnpackUint2x32(value)};
const IR::U32 lo{ir.CompositeExtract(unpacked, 0U)};
const IR::U32 hi{ir.CompositeExtract(unpacked, 1U)};
switch (operand.field) {
case OperandField::ScalarGPR:
ir.SetScalarReg(IR::ScalarReg(operand.code + 1), hi);

18
src/shader_recompiler/frontend/translate/vector_alu.cpp
View file

@ -106,14 +106,14 @@ void Translator::V_ADDC_U32(const GcnInst& inst) {
scarry = ir.GetVccLo();
}
IR::U32 result = ir.IAdd(ir.IAdd(src0, src1), scarry);
const IR::U32 result = ir.IAdd(ir.IAdd(src0, src1), scarry);
const IR::VectorReg dst_reg{inst.dst[0].code};
ir.SetVectorReg(dst_reg, result);
IR::U1 less_src0 = ir.ILessThan(result, src0, false);
IR::U1 less_src1 = ir.ILessThan(result, src1, false);
IR::U1 did_overflow = ir.LogicalOr(less_src0, less_src1);
const IR::U1 less_src0 = ir.ILessThan(result, src0, false);
const IR::U1 less_src1 = ir.ILessThan(result, src1, false);
const IR::U1 did_overflow = ir.LogicalOr(less_src0, less_src1);
ir.SetVcc(did_overflow);
}
@ -325,14 +325,14 @@ void Translator::V_MAD_U64_U32(const GcnInst& inst) {
const auto src1 = GetSrc<IR::U32>(inst.src[1]);
const auto src2 = GetSrc64<IR::U64>(inst.src[2]);
IR::U64 mul_result = ir.UConvert(64, ir.IMul(src0, src1));
IR::U64 sum_result = ir.IAdd(mul_result, src2);
const IR::U64 mul_result = ir.UConvert(64, ir.IMul(src0, src1));
const IR::U64 sum_result = ir.IAdd(mul_result, src2);
SetDst64(inst.dst[0], sum_result);
IR::U1 less_src0 = ir.ILessThan(sum_result, mul_result, false);
IR::U1 less_src1 = ir.ILessThan(sum_result, src2, false);
IR::U1 did_overflow = ir.LogicalOr(less_src0, less_src1);
const IR::U1 less_src0 = ir.ILessThan(sum_result, mul_result, false);
const IR::U1 less_src1 = ir.ILessThan(sum_result, src2, false);
const IR::U1 did_overflow = ir.LogicalOr(less_src0, less_src1);
ir.SetVcc(did_overflow);
}

21
src/shader_recompiler/ir/ir_emitter.cpp
View file

@ -1199,13 +1199,6 @@ U32U64 IREmitter::ConvertFToU(size_t bitsize, const F32F64& value) {
default:
ThrowInvalidType(value.Type());
}
case 64:
switch (value.Type()) {
case Type::F32:
return Inst<U64>(Opcode::ConvertU64F32, value);
default:
ThrowInvalidType(value.Type());
}
default:
UNREACHABLE_MSG("Invalid destination bitsize {}", bitsize);
}
@ -1276,20 +1269,6 @@ U16U32U64 IREmitter::UConvert(size_t result_bitsize, const U16U32U64& value) {
default:
break;
}
case 32:
switch (value.Type()) {
case Type::U64:
return Inst<U32>(Opcode::ConvertU32U64, value);
default:
break;
}
case 64:
switch (value.Type()) {
case Type::U32:
return Inst<U64>(Opcode::ConvertU64U32, value);
default:
break;
}
default:
break;
}

3
src/shader_recompiler/ir/opcodes.inc
View file

@ -293,9 +293,6 @@ OPCODE(ConvertF64S32, F64, U32,
OPCODE(ConvertF64U32, F64, U32, )
OPCODE(ConvertF32U16, F32, U16, )
OPCODE(ConvertU16U32, U16, U32, )
OPCODE(ConvertU64U32, U64, U32, )
OPCODE(ConvertU32U64, U32, U64, )
OPCODE(ConvertU64F32, U64, F32, )
// Image operations
OPCODE(ImageSampleImplicitLod, F32x4, Opaque, Opaque, Opaque, Opaque, )

14
src/shader_recompiler/ir/passes/ssa_rewrite_pass.cpp
View file

@ -310,8 +310,7 @@ private:
DefTable current_def;
};
void VisitInst(Pass& pass, IR::Block* block, const IR::Block::iterator& iter) {
auto& inst{*iter};
void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
const IR::Opcode opcode{inst.GetOpcode()};
switch (opcode) {
case IR::Opcode::SetThreadBitScalarReg:
@ -349,14 +348,14 @@ void VisitInst(Pass& pass, IR::Block* block, const IR::Block::iterator& iter) {
case IR::Opcode::GetThreadBitScalarReg:
case IR::Opcode::GetScalarRegister: {
const IR::ScalarReg reg{inst.Arg(0).ScalarReg()};
bool thread_bit = opcode == IR::Opcode::GetThreadBitScalarReg;
IR::Value value = pass.ReadVariable(reg, block, thread_bit);
const bool thread_bit = opcode == IR::Opcode::GetThreadBitScalarReg;
const IR::Value value = pass.ReadVariable(reg, block, thread_bit);
inst.ReplaceUsesWith(value);
break;
}
case IR::Opcode::GetVectorRegister: {
const IR::VectorReg reg{inst.Arg(0).VectorReg()};
IR::Value value = pass.ReadVariable(reg, block);
const IR::Value value = pass.ReadVariable(reg, block);
inst.ReplaceUsesWith(value);
break;
}
@ -387,9 +386,8 @@ void VisitInst(Pass& pass, IR::Block* block, const IR::Block::iterator& iter) {
}
void VisitBlock(Pass& pass, IR::Block* block) {
const auto end{block->end()};
for (auto iter = block->begin(); iter != end; ++iter) {
VisitInst(pass, block, iter);
for (IR::Inst& inst : block->Instructions()) {
VisitInst(pass, block, inst);
}
pass.SealBlock(block);
}