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https://github.com/shadps4-emu/shadPS4.git
synced 2025-04-21 03:54:45 +00:00
Implemented Legacy Max/Min using NMax/NMin
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parent
c279e9e6f4
commit
86f403aaf9
7 changed files with 44 additions and 11 deletions
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@ -51,7 +51,11 @@ Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F64[1], a, b, c));
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}
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Id EmitFPMax32(EmitContext& ctx, Id a, Id b) {
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Id EmitFPMax32(EmitContext& ctx, Id a, Id b, bool is_legacy) {
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if (is_legacy) {
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return ctx.OpNMax(ctx.F32[1], a, b);
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}
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return ctx.OpFMax(ctx.F32[1], a, b);
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}
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@ -59,7 +63,12 @@ Id EmitFPMax64(EmitContext& ctx, Id a, Id b) {
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return ctx.OpFMax(ctx.F64[1], a, b);
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}
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Id EmitFPMin32(EmitContext& ctx, Id a, Id b) {
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Id EmitFPMin32(EmitContext& ctx, Id a, Id b, bool is_legacy) {
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if (is_legacy)
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{
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return ctx.OpNMin(ctx.F32[1], a, b);
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}
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return ctx.OpFMin(ctx.F32[1], a, b);
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}
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@ -165,9 +165,9 @@ Id EmitFPSub32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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Id EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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Id EmitFPMax32(EmitContext& ctx, Id a, Id b);
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Id EmitFPMax32(EmitContext& ctx, Id a, Id b, bool is_legacy = false);
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Id EmitFPMax64(EmitContext& ctx, Id a, Id b);
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Id EmitFPMin32(EmitContext& ctx, Id a, Id b);
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Id EmitFPMin32(EmitContext& ctx, Id a, Id b, bool is_legacy = false);
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Id EmitFPMin64(EmitContext& ctx, Id a, Id b);
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Id EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPMul32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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@ -625,6 +625,9 @@ void Translate(IR::Block* block, u32 block_base, std::span<const GcnInst> inst_l
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case Opcode::V_MIN3_F32:
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translator.V_MIN3_F32(inst);
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break;
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case Opcode::V_MIN_LEGACY_F32:
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translator.V_MIN_LEGACY_F32(inst);
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break;
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case Opcode::V_MADMK_F32:
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translator.V_MADMK_F32(inst);
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break;
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@ -876,7 +879,7 @@ void Translate(IR::Block* block, u32 block_base, std::span<const GcnInst> inst_l
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translator.V_MAD_F32(inst);
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break;
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case Opcode::V_MAX_LEGACY_F32:
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translator.V_MAX_F32(inst);
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translator.V_MAX_LEGACY_F32(inst);
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break;
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case Opcode::V_RSQ_LEGACY_F32:
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case Opcode::V_RSQ_CLAMP_F32:
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@ -113,6 +113,7 @@ public:
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void V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst);
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void V_MAX_F32(const GcnInst& inst);
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void V_MAX_U32(bool is_signed, const GcnInst& inst);
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void V_MAX_LEGACY_F32(const GcnInst& inst);
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void V_RSQ_F32(const GcnInst& inst);
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void V_SIN_F32(const GcnInst& inst);
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void V_LOG_F32(const GcnInst& inst);
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@ -120,6 +121,7 @@ public:
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void V_SQRT_F32(const GcnInst& inst);
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void V_MIN_F32(const GcnInst& inst);
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void V_MIN3_F32(const GcnInst& inst);
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void V_MIN_LEGACY_F32(const GcnInst& inst);
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void V_MADMK_F32(const GcnInst& inst);
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void V_CUBEMA_F32(const GcnInst& inst);
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void V_CUBESC_F32(const GcnInst& inst);
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@ -215,6 +215,12 @@ void Translator::V_MAX_U32(bool is_signed, const GcnInst& inst) {
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SetDst(inst.dst[0], ir.IMax(src0, src1, is_signed));
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}
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void Translator::V_MAX_LEGACY_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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const IR::F32 src1{GetSrc(inst.src[1], true)};
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SetDst(inst.dst[0], ir.FPMax(src0, src1, true));
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}
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void Translator::V_RSQ_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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SetDst(inst.dst[0], ir.FPRecipSqrt(src0));
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@ -253,6 +259,12 @@ void Translator::V_MIN3_F32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPMin(src0, ir.FPMin(src1, src2)));
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}
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void Translator::V_MIN_LEGACY_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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const IR::F32 src1{GetSrc(inst.src[1], true)};
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SetDst(inst.dst[0], ir.FPMin(src0, src1, true));
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}
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void Translator::V_MADMK_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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const IR::F32 src1{GetSrc(inst.src[1], true)};
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@ -865,28 +865,35 @@ U1 IREmitter::FPUnordered(const F32F64& lhs, const F32F64& rhs) {
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return LogicalOr(FPIsNan(lhs), FPIsNan(rhs));
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}
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F32F64 IREmitter::FPMax(const F32F64& lhs, const F32F64& rhs) {
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F32F64 IREmitter::FPMax(const F32F64& lhs, const F32F64& rhs, bool is_legacy) {
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if (lhs.Type() != rhs.Type()) {
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UNREACHABLE_MSG("Mismatching types {} and {}", lhs.Type(), rhs.Type());
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}
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switch (lhs.Type()) {
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case Type::F32:
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return Inst<F32>(Opcode::FPMax32, lhs, rhs);
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return Inst<F32>(Opcode::FPMax32, lhs, rhs, is_legacy);
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case Type::F64:
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if (is_legacy) {
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UNREACHABLE_MSG("F64 cannot be used with LEGACY ops");
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}
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return Inst<F64>(Opcode::FPMax64, lhs, rhs);
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default:
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ThrowInvalidType(lhs.Type());
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}
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}
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F32F64 IREmitter::FPMin(const F32F64& lhs, const F32F64& rhs) {
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F32F64 IREmitter::FPMin(const F32F64& lhs, const F32F64& rhs, bool is_legacy) {
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if (lhs.Type() != rhs.Type()) {
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UNREACHABLE_MSG("Mismatching types {} and {}", lhs.Type(), rhs.Type());
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}
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switch (lhs.Type()) {
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case Type::F32:
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return Inst<F32>(Opcode::FPMin32, lhs, rhs);
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return Inst<F32>(Opcode::FPMin32, lhs, rhs, is_legacy);
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case Type::F64:
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if (is_legacy) {
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UNREACHABLE_MSG("F64 cannot be used with LEGACY ops");
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}
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return Inst<F64>(Opcode::FPMin64, lhs, rhs);
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default:
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ThrowInvalidType(lhs.Type());
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@ -149,8 +149,8 @@ public:
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[[nodiscard]] U1 FPIsInf(const F32F64& value);
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[[nodiscard]] U1 FPOrdered(const F32F64& lhs, const F32F64& rhs);
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[[nodiscard]] U1 FPUnordered(const F32F64& lhs, const F32F64& rhs);
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[[nodiscard]] F32F64 FPMax(const F32F64& lhs, const F32F64& rhs);
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[[nodiscard]] F32F64 FPMin(const F32F64& lhs, const F32F64& rhs);
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[[nodiscard]] F32F64 FPMax(const F32F64& lhs, const F32F64& rhs, bool is_legacy = false);
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[[nodiscard]] F32F64 FPMin(const F32F64& lhs, const F32F64& rhs, bool is_legacy = false);
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[[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b);
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[[nodiscard]] Value IAddCary(const U32& a, const U32& b);
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