diff --git a/src/shader_recompiler/frontend/translate/scalar_alu.cpp b/src/shader_recompiler/frontend/translate/scalar_alu.cpp
index f5ec996b5..c97c38ba7 100644
--- a/src/shader_recompiler/frontend/translate/scalar_alu.cpp
+++ b/src/shader_recompiler/frontend/translate/scalar_alu.cpp
@@ -376,10 +376,10 @@ void Translator::S_ADD_I32(const GcnInst& inst) {
     const IR::U32 src1{GetSrc(inst.src[1])};
     const IR::U32 result{ir.IAdd(src0, src1)};
     SetDst(inst.dst[0], result);
-    const IR::U32 sign_mask = ir.Imm32(1 << 31);
-    const IR::U32 sign0 = ir.BitwiseAnd(src0, sign_mask);
-    const IR::U32 sign1 = ir.BitwiseAnd(src1, sign_mask);
-    const IR::U32 signr = ir.BitwiseAnd(result, sign_mask);
+    const IR::U32 sign_mask{ir.Imm32(1 << 31)};
+    const IR::U32 sign0{ir.BitwiseAnd(src0, sign_mask)};
+    const IR::U32 sign1{ir.BitwiseAnd(src1, sign_mask)};
+    const IR::U32 signr{ir.BitwiseAnd(result, sign_mask)};
     ir.SetScc(ir.LogicalAnd(ir.IEqual(sign0, sign1), ir.INotEqual(sign0, signr)));
 }
 
@@ -511,7 +511,7 @@ void Translator::S_BREV_B32(const GcnInst& inst) {
 void Translator::S_ADD_U32(const GcnInst& inst) {
     const IR::U32 src0{GetSrc(inst.src[0])};
     const IR::U32 src1{GetSrc(inst.src[1])};
-    const IR::U32 result = ir.IAdd(src0, src1);
+    const IR::U32 result{ir.IAdd(src0, src1)};
     SetDst(inst.dst[0], result);
     ir.SetScc(ir.ILessThan(result, src0, false));
 }
@@ -526,12 +526,12 @@ void Translator::S_SUB_U32(const GcnInst& inst) {
 void Translator::S_SUB_I32(const GcnInst& inst) {
     const IR::U32 src0{GetSrc(inst.src[0])};
     const IR::U32 src1{GetSrc(inst.src[1])};
-    const IR::U32 result = ir.ISub(src0, src1);
+    const IR::U32 result{ir.ISub(src0, src1)};
     SetDst(inst.dst[0], result);
-    const IR::U32 sign_mask = ir.Imm32(1 << 31);
-    const IR::U32 sign0 = ir.BitwiseAnd(src0, sign_mask);
-    const IR::U32 sign1 = ir.BitwiseAnd(src1, sign_mask);
-    const IR::U32 signr = ir.BitwiseAnd(result, sign_mask);
+    const IR::U32 sign_mask{ir.Imm32(1 << 31)};
+    const IR::U32 sign0{ir.BitwiseAnd(src0, sign_mask)};
+    const IR::U32 sign1{ir.BitwiseAnd(src1, sign_mask)};
+    const IR::U32 signr{ir.BitwiseAnd(result, sign_mask)};
     ir.SetScc(ir.LogicalAnd(ir.INotEqual(sign0, sign1), ir.INotEqual(sign0, signr)));
 }