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https://github.com/shadps4-emu/shadPS4.git
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Moved opcode to it's proper location (#1221)
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parent
af398e3684
commit
da519f9091
2 changed files with 8 additions and 8 deletions
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@ -161,6 +161,7 @@ public:
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// VOP1
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void V_MOV(const GcnInst& inst);
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void V_READFIRSTLANE_B32(const GcnInst& inst);
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void V_CVT_F64_I32(const GcnInst& inst);
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void V_CVT_F32_I32(const GcnInst& inst);
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void V_CVT_F32_U32(const GcnInst& inst);
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void V_CVT_U32_F32(const GcnInst& inst);
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@ -170,7 +171,6 @@ public:
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void V_CVT_FLR_I32_F32(const GcnInst& inst);
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void V_CVT_OFF_F32_I4(const GcnInst& inst);
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void V_CVT_F32_UBYTE(u32 index, const GcnInst& inst);
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void V_CVT_F64_I32(const GcnInst& inst);
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void V_FRACT_F32(const GcnInst& inst);
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void V_TRUNC_F32(const GcnInst& inst);
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void V_CEIL_F32(const GcnInst& inst);
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@ -99,6 +99,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
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return V_MOV(inst);
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case Opcode::V_READFIRSTLANE_B32:
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return V_READFIRSTLANE_B32(inst);
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case Opcode::V_CVT_F64_I32:
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return V_CVT_F64_I32(inst);
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case Opcode::V_CVT_F32_I32:
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return V_CVT_F32_I32(inst);
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case Opcode::V_CVT_F32_U32:
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@ -123,8 +125,6 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
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return V_CVT_F32_UBYTE(2, inst);
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case Opcode::V_CVT_F32_UBYTE3:
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return V_CVT_F32_UBYTE(3, inst);
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case Opcode::V_CVT_F64_I32:
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return V_CVT_F64_I32(inst);
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case Opcode::V_FRACT_F32:
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return V_FRACT_F32(inst);
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case Opcode::V_TRUNC_F32:
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@ -612,6 +612,11 @@ void Translator::V_MOV(const GcnInst& inst) {
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SetDst(inst.dst[0], GetSrc<IR::F32>(inst.src[0]));
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}
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void Translator::V_CVT_F64_I32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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SetDst64(inst.dst[0], ir.ConvertSToF(64, 32, src0));
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}
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void Translator::V_CVT_F32_I32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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SetDst(inst.dst[0], ir.ConvertSToF(32, 32, src0));
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@ -664,11 +669,6 @@ void Translator::V_CVT_F32_UBYTE(u32 index, const GcnInst& inst) {
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SetDst(inst.dst[0], ir.ConvertUToF(32, 32, byte));
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}
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void Translator::V_CVT_F64_I32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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SetDst64(inst.dst[0], ir.ConvertSToF(64, 32, src0));
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}
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void Translator::V_FRACT_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc<IR::F32>(inst.src[0])};
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SetDst(inst.dst[0], ir.Fract(src0));
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