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https://github.com/shadps4-emu/shadPS4.git
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initial preparations for subresources upload
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parent
9c49844107
commit
f3338e7080
4 changed files with 18 additions and 15 deletions
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@ -227,11 +227,6 @@ struct Image {
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bool IsTiled() const {
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return GetTilingMode() != TilingMode::Display_Linear;
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}
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size_t GetSize() const {
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// TODO: Derive this properly from tiling params
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return Pitch() * (height + 1) * NumComponents(GetDataFmt());
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}
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};
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static_assert(sizeof(Image) == 32); // 256bits
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@ -128,6 +128,7 @@ ImageInfo::ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group,
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size.width = attrib.width;
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size.height = attrib.height;
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pitch = attrib.tiling_mode == TilingMode::Linear ? size.width : (size.width + 127) & (~127);
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usage.vo_buffer = true;
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const bool is_32bpp = attrib.pixel_format != VideoOutFormat::A16R16G16B16Float;
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ASSERT(is_32bpp);
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@ -141,7 +142,7 @@ ImageInfo::ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group,
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guest_size_bytes = pitch * ((size.height + 63) & (~63)) * 4;
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}
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}
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usage.vo_buffer = true;
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mips_layout.emplace_back(0, guest_size_bytes);
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}
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ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer,
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@ -161,7 +162,9 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer,
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usage.render_target = true;
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guest_address = buffer.Address();
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guest_size_bytes = buffer.GetColorSliceSize() * buffer.NumSlices();
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const auto color_slice_sz = buffer.GetColorSliceSize();
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guest_size_bytes = color_slice_sz * buffer.NumSlices();
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mips_layout.emplace_back(0, color_slice_sz);
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}
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ImageInfo::ImageInfo(const AmdGpu::Liverpool::DepthBuffer& buffer, u32 num_slices,
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@ -179,7 +182,9 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::DepthBuffer& buffer, u32 num_slice
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usage.depth_target = true;
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guest_address = buffer.Address();
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guest_size_bytes = buffer.GetDepthSliceSize() * num_slices;
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const auto depth_slice_sz = buffer.GetDepthSliceSize();
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guest_size_bytes = depth_slice_sz * num_slices;
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mips_layout.emplace_back(0, depth_slice_sz);
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}
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ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
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@ -198,7 +203,6 @@ ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
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usage.texture = true;
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guest_address = image.Address();
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guest_size_bytes = image.GetSize();
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mips_layout.reserve(resources.levels);
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const auto num_bits = NumBits(image.GetDataFmt());
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@ -43,6 +43,7 @@ struct ImageInfo {
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} usage{}; // Usage data tracked during image lifetime
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bool is_cube = false;
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bool is_volume = false;
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bool is_tiled = false;
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bool is_read_only = false;
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vk::Format pixel_format = vk::Format::eUndefined;
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@ -246,21 +246,24 @@ void TextureCache::RefreshImage(Image& image) {
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return;
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}
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ASSERT(image.info.resources.levels == image.info.mips_layout.size());
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const u8* image_data = reinterpret_cast<const u8*>(image.cpu_addr);
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for (u32 m = 0; m < image.info.resources.levels; m++) {
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const u32 width = image.info.size.width >> m;
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const u32 height = image.info.size.height >> m;
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const u32 map_size = width * height * image.info.resources.layers;
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const u32 width = std::max(image.info.size.width >> m, 1u);
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const u32 height = std::max(image.info.size.height >> m, 1u);
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const u32 depth = image.info.is_volume ? std::max(image.info.size.depth >> m, 1u) : 1u;
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const u32 map_size = image.info.mips_layout[m].second * image.info.resources.layers;
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// Upload data to the staging buffer.
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const auto [data, offset, _] = staging.Map(map_size, 16);
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if (image.info.is_tiled) {
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ConvertTileToLinear(data, image_data, width, height, Config::isNeoMode());
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} else {
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std::memcpy(data, image_data, map_size);
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std::memcpy(data,
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image_data + image.info.mips_layout[m].first * image.info.resources.layers,
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map_size);
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}
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staging.Commit(map_size);
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image_data += map_size;
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// Copy to the image.
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const vk::BufferImageCopy image_copy = {
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@ -274,7 +277,7 @@ void TextureCache::RefreshImage(Image& image) {
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.layerCount = u32(image.info.resources.layers),
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},
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.imageOffset = {0, 0, 0},
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.imageExtent = {width, height, 1},
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.imageExtent = {width, height, depth},
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};
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scheduler.EndRendering();
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