From 009aa57f4afa7b6ef6658d602e1c7a00b5229dd0 Mon Sep 17 00:00:00 2001 From: Jarrod Norwell Date: Fri, 31 May 2024 09:53:22 +0200 Subject: [PATCH] Implemented LogicOp fix --- .../renderer_opengl/gl_rasterizer.cpp | 14 ++++++++++- .../renderer_vulkan/vk_rasterizer.cpp | 23 ++++++++++++++++++- 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index d376d86d85..f054fd338a 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp @@ -1204,7 +1204,19 @@ void RasterizerOpenGL::SyncLogicOpState() { } flags[Dirty::LogicOp] = false; - const auto& regs = maxwell3d->regs; + auto regs = maxwell3d->regs; + + if (device.IsAmd()) { + auto IsFloat = [] (Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) { + return n.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float; + }; + + bool has_float = + std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(), + IsFloat); + regs.logic_op.enable = static_cast(!has_float); + } + if (regs.logic_op.enable) { glEnable(GL_COLOR_LOGIC_OP); glLogicOp(MaxwellToGL::LogicOp(regs.logic_op.op)); diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index 8ba50a8344..fac631fb8e 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -952,7 +952,28 @@ void RasterizerVulkan::UpdateDynamicStates() { UpdateDepthBiasEnable(regs); } if (device.IsExtExtendedDynamicState3EnablesSupported()) { - UpdateLogicOpEnable(regs); + const auto old = regs.logic_op.enable; + + if (device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE || + device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE_KHR) { + struct In { + const Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type d; + In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {} + bool operator()(Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) const { + return n.type == d; + } + }; + + auto has_float = std::any_of( + regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(), + In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float)); + + regs.logic_op.enable = static_cast(!has_float); + UpdateLogicOpEnable(regs); + regs.logic_op.enable = old; + } else { + UpdateLogicOpEnable(regs); + } UpdateDepthClampEnable(regs); } }