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Fix Aes shift rows and inv shift rows Soft Fallback

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srPerm and _isrPerm were inverted.

Definition in reference manual :
 bits(128) AESShiftRows(bits(128) op) 
     return ( 
         op< 95: 88> : op< 55: 48> : op< 15:  8> : op<103: 96> : 
         op< 63: 56> : op< 23: 16> : op<111:104> : op< 71: 64> : 
         op< 31: 24> : op<119:112> : op< 79: 72> : op< 39: 32> : 
         op<127:120> : op< 87: 80> : op< 47: 40> : op<  7:  0> 
     ); 

 bits(128) AESInvShiftRows(bits(128) op) 
     return ( 
         op< 31: 24> : op< 55: 48> : op< 79: 72> : op<103: 96> : 
         op<127:120> : op< 23: 16> : op< 47: 40> : op< 71: 64> : 
         op< 95: 88> : op<119:112> : op< 15:  8> : op< 39: 32> :          op< 63: 56> : op< 87: 80> : op<111:104> : op<  7:  0> 
     );
This commit is contained in:
Furoryan 2024-07-31 08:50:54 +02:00 • committed by GitHub
parent 56b2f84702
commit 48b352ea1a
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GPG key ID: B5690EEEBB952194
1 changed files with 2 additions and 2 deletions
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4
src/ARMeilleure/Instructions/CryptoHelper.cs
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@ -171,12 +171,12 @@ namespace ARMeilleure.Instructions
private static ReadOnlySpan<byte> _srPerm => new byte[]
{
0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3,
0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11
};
private static ReadOnlySpan<byte> _isrPerm => new byte[]
{
0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11,
0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3
};
#pragma warning restore IDE1006
#endregion