Update Instructions.cs
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@ -2685,6 +2685,154 @@ namespace Ryujinx.Tests.Cpu.Tester
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V(d, result);
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}
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// fcvtns_advsimd.html#FCVTNS_asisdmisc_R
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public static void Fcvtns_S(Bits sz, Bits Rn, Bits Rd)
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{
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const bool U = false;
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const bool o2 = false;
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const bool o1 = false;
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/* Decode Scalar */
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int d = (int)UInt(Rd);
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int n = (int)UInt(Rn);
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int esize = 32 << (int)UInt(sz);
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int datasize = esize;
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int elements = 1;
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FPRounding rounding = FPDecodeRounding(Bits.Concat(o1, o2));
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bool unsigned = (U == true);
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/* Operation */
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/* CheckFPAdvSIMDEnabled64(); */
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Bits result = new Bits(datasize);
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Bits operand = V(datasize, n);
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Bits element;
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for (int e = 0; e <= elements - 1; e++)
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{
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element = Elem(operand, e, esize);
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Elem(result, e, esize, FPToFixed(esize, element, 0, unsigned, FPCR, rounding));
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}
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V(d, result);
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}
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// fcvtns_advsimd.html#FCVTNS_asimdmisc_R
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public static void Fcvtns_V(bool Q, Bits sz, Bits Rn, Bits Rd)
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{
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const bool U = false;
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const bool o2 = false;
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const bool o1 = false;
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/* Decode Vector */
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int d = (int)UInt(Rd);
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int n = (int)UInt(Rn);
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/* if sz:Q == '10' then ReservedValue(); */
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int esize = 32 << (int)UInt(sz);
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int datasize = (Q ? 128 : 64);
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int elements = datasize / esize;
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FPRounding rounding = FPDecodeRounding(Bits.Concat(o1, o2));
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bool unsigned = (U == true);
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/* Operation */
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/* CheckFPAdvSIMDEnabled64(); */
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Bits result = new Bits(datasize);
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Bits operand = V(datasize, n);
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Bits element;
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for (int e = 0; e <= elements - 1; e++)
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{
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element = Elem(operand, e, esize);
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Elem(result, e, esize, FPToFixed(esize, element, 0, unsigned, FPCR, rounding));
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}
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V(d, result);
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}
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// fcvtnu_advsimd.html#FCVTNU_asisdmisc_R
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public static void Fcvtnu_S(Bits sz, Bits Rn, Bits Rd)
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{
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const bool U = true;
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const bool o2 = false;
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const bool o1 = false;
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/* Decode Scalar */
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int d = (int)UInt(Rd);
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int n = (int)UInt(Rn);
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int esize = 32 << (int)UInt(sz);
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int datasize = esize;
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int elements = 1;
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FPRounding rounding = FPDecodeRounding(Bits.Concat(o1, o2));
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bool unsigned = (U == true);
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/* Operation */
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/* CheckFPAdvSIMDEnabled64(); */
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Bits result = new Bits(datasize);
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Bits operand = V(datasize, n);
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Bits element;
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for (int e = 0; e <= elements - 1; e++)
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{
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element = Elem(operand, e, esize);
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Elem(result, e, esize, FPToFixed(esize, element, 0, unsigned, FPCR, rounding));
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}
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V(d, result);
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}
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// fcvtnu_advsimd.html#FCVTNU_asimdmisc_R
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public static void Fcvtnu_V(bool Q, Bits sz, Bits Rn, Bits Rd)
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{
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const bool U = true;
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const bool o2 = false;
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const bool o1 = false;
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/* Decode Vector */
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int d = (int)UInt(Rd);
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int n = (int)UInt(Rn);
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/* if sz:Q == '10' then ReservedValue(); */
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int esize = 32 << (int)UInt(sz);
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int datasize = (Q ? 128 : 64);
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int elements = datasize / esize;
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FPRounding rounding = FPDecodeRounding(Bits.Concat(o1, o2));
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bool unsigned = (U == true);
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/* Operation */
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/* CheckFPAdvSIMDEnabled64(); */
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Bits result = new Bits(datasize);
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Bits operand = V(datasize, n);
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Bits element;
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for (int e = 0; e <= elements - 1; e++)
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{
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element = Elem(operand, e, esize);
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Elem(result, e, esize, FPToFixed(esize, element, 0, unsigned, FPCR, rounding));
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}
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V(d, result);
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}
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// neg_advsimd.html#NEG_asisdmisc_R
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public static void Neg_S(Bits size, Bits Rn, Bits Rd)
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{
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