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Change FP enum case

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This commit is contained in:
Alex Barney 2018-10-30 11:28:21 -05:00
commit 8c33b43eec
7 changed files with 68 additions and 68 deletions
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32
ChocolArm64/Instruction/ASoftFallback.cs
View file

@ -112,13 +112,13 @@ namespace ChocolArm64.Instruction
if (op > tMaxValue) if (op > tMaxValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMaxValue; return tMaxValue;
} }
else if (op < tMinValue) else if (op < tMinValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMinValue; return tMinValue;
} }
@ -137,13 +137,13 @@ namespace ChocolArm64.Instruction
if (op > (long)tMaxValue) if (op > (long)tMaxValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMaxValue; return tMaxValue;
} }
else if (op < (long)tMinValue) else if (op < (long)tMinValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMinValue; return tMinValue;
} }
@ -161,7 +161,7 @@ namespace ChocolArm64.Instruction
if (op > (ulong)tMaxValue) if (op > (ulong)tMaxValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMaxValue; return tMaxValue;
} }
@ -179,7 +179,7 @@ namespace ChocolArm64.Instruction
if (op > tMaxValue) if (op > tMaxValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return tMaxValue; return tMaxValue;
} }
@ -193,7 +193,7 @@ namespace ChocolArm64.Instruction
{ {
if (op == long.MinValue) if (op == long.MinValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return long.MaxValue; return long.MaxValue;
} }
@ -209,7 +209,7 @@ namespace ChocolArm64.Instruction
if ((~(op1 ^ op2) & (op1 ^ add)) < 0L) if ((~(op1 ^ op2) & (op1 ^ add)) < 0L)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
if (op1 < 0L) if (op1 < 0L)
{ {
@ -232,7 +232,7 @@ namespace ChocolArm64.Instruction
if ((add < op1) && (add < op2)) if ((add < op1) && (add < op2))
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return ulong.MaxValue; return ulong.MaxValue;
} }
@ -248,7 +248,7 @@ namespace ChocolArm64.Instruction
if (((op1 ^ op2) & (op1 ^ sub)) < 0L) if (((op1 ^ op2) & (op1 ^ sub)) < 0L)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
if (op1 < 0L) if (op1 < 0L)
{ {
@ -271,7 +271,7 @@ namespace ChocolArm64.Instruction
if (op1 < op2) if (op1 < op2)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return ulong.MinValue; return ulong.MinValue;
} }
@ -292,7 +292,7 @@ namespace ChocolArm64.Instruction
if ((~op2 & add) < 0L) if ((~op2 & add) < 0L)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return long.MaxValue; return long.MaxValue;
} }
@ -306,7 +306,7 @@ namespace ChocolArm64.Instruction
// Op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue // Op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue
// Op2 from (long)ulong.MinValue to long.MaxValue // Op2 from (long)ulong.MinValue to long.MaxValue
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return long.MaxValue; return long.MaxValue;
} }
@ -319,7 +319,7 @@ namespace ChocolArm64.Instruction
if (add > (ulong)long.MaxValue) if (add > (ulong)long.MaxValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return long.MaxValue; return long.MaxValue;
} }
@ -341,7 +341,7 @@ namespace ChocolArm64.Instruction
if ((add < (ulong)op1) && (add < op2)) if ((add < (ulong)op1) && (add < op2))
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return ulong.MaxValue; return ulong.MaxValue;
} }
@ -366,7 +366,7 @@ namespace ChocolArm64.Instruction
if (add < (long)ulong.MinValue) if (add < (long)ulong.MinValue)
{ {
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(AFpsr.Qc);
return ulong.MinValue; return ulong.MinValue;
} }

90
ChocolArm64/Instruction/ASoftFloat.cs
View file

@ -209,7 +209,7 @@ namespace ChocolArm64.Instruction
if (type == FPType.SNaN || type == FPType.QNaN) if (type == FPType.SNaN || type == FPType.QNaN)
{ {
if (state.GetFpcrFlag(Fpcr.Dn)) if (state.GetFpcrFlag(AFpcr.Dn))
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
} }
@ -220,7 +220,7 @@ namespace ChocolArm64.Instruction
if (type == FPType.SNaN) if (type == FPType.SNaN)
{ {
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
} }
else if (type == FPType.Infinity) else if (type == FPType.Infinity)
@ -281,7 +281,7 @@ namespace ChocolArm64.Instruction
real = Math.Pow(2d, -14) * ((double)frac16 * Math.Pow(2d, -10)); real = Math.Pow(2d, -14) * ((double)frac16 * Math.Pow(2d, -10));
} }
} }
else if (exp16 == 0x1Fu && !state.GetFpcrFlag(Fpcr.Ahp)) else if (exp16 == 0x1Fu && !state.GetFpcrFlag(AFpcr.Ahp))
{ {
if (frac16 == 0u) if (frac16 == 0u)
{ {
@ -338,9 +338,9 @@ namespace ChocolArm64.Instruction
exponent++; exponent++;
} }
if (state.GetFpcrFlag(Fpcr.Fz) && exponent < minimumExp) if (state.GetFpcrFlag(AFpcr.Fz) && exponent < minimumExp)
{ {
state.SetFpsrFlag(Fpsr.Ufc); state.SetFpsrFlag(AFpsr.Ufc);
return FPZero(sign); return FPZero(sign);
} }
@ -355,9 +355,9 @@ namespace ChocolArm64.Instruction
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f)); uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
double error = mantissa * Math.Pow(2d, f) - (double)intMant; double error = mantissa * Math.Pow(2d, f) - (double)intMant;
if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(Fpcr.Ufe))) if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(AFpcr.Ufe)))
{ {
FPProcessException(FPExc.Underflow, state); FPProcessException(AFpExc.Underflow, state);
} }
bool overflowToInf; bool overflowToInf;
@ -409,7 +409,7 @@ namespace ChocolArm64.Instruction
{ {
result = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign); result = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
FPProcessException(FPExc.Overflow, state); FPProcessException(AFpExc.Overflow, state);
error = 1d; error = 1d;
} }
@ -421,7 +421,7 @@ namespace ChocolArm64.Instruction
if (error != 0d) if (error != 0d)
{ {
FPProcessException(FPExc.Inexact, state); FPProcessException(AFpExc.Inexact, state);
} }
return result; return result;
@ -433,7 +433,7 @@ namespace ChocolArm64.Instruction
(int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13)); (int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13));
} }
private static void FPProcessException(FPExc exc, AThreadState state) private static void FPProcessException(AFpExc exc, AThreadState state)
{ {
int enable = (int)exc + 8; int enable = (int)exc + 8;
@ -456,7 +456,7 @@ namespace ChocolArm64.Instruction
double real = value.FPUnpackCv(out FPType type, out bool sign, state, out uint valueBits); double real = value.FPUnpackCv(out FPType type, out bool sign, state, out uint valueBits);
bool altHp = state.GetFpcrFlag(Fpcr.Ahp); bool altHp = state.GetFpcrFlag(AFpcr.Ahp);
ushort resultBits; ushort resultBits;
@ -466,7 +466,7 @@ namespace ChocolArm64.Instruction
{ {
resultBits = FPZero(sign); resultBits = FPZero(sign);
} }
else if (state.GetFpcrFlag(Fpcr.Dn)) else if (state.GetFpcrFlag(AFpcr.Dn))
{ {
resultBits = FPDefaultNaN(); resultBits = FPDefaultNaN();
} }
@ -477,7 +477,7 @@ namespace ChocolArm64.Instruction
if (type == FPType.SNaN || altHp) if (type == FPType.SNaN || altHp)
{ {
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
} }
else if (type == FPType.Infinity) else if (type == FPType.Infinity)
@ -486,7 +486,7 @@ namespace ChocolArm64.Instruction
{ {
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu); resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else else
{ {
@ -538,12 +538,12 @@ namespace ChocolArm64.Instruction
if (exp32 == 0u) if (exp32 == 0u)
{ {
if (frac32 == 0u || state.GetFpcrFlag(Fpcr.Fz)) if (frac32 == 0u || state.GetFpcrFlag(AFpcr.Fz))
{ {
type = FPType.Zero; type = FPType.Zero;
real = 0d; real = 0d;
if (frac32 != 0u) FPProcessException(FPExc.InputDenorm, state); if (frac32 != 0u) FPProcessException(AFpExc.InputDenorm, state);
} }
else else
{ {
@ -618,9 +618,9 @@ namespace ChocolArm64.Instruction
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f)); uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
double error = mantissa * Math.Pow(2d, f) - (double)intMant; double error = mantissa * Math.Pow(2d, f) - (double)intMant;
if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(Fpcr.Ufe))) if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(AFpcr.Ufe)))
{ {
FPProcessException(FPExc.Underflow, state); FPProcessException(AFpExc.Underflow, state);
} }
bool overflowToInf; bool overflowToInf;
@ -668,13 +668,13 @@ namespace ChocolArm64.Instruction
ushort resultBits; ushort resultBits;
if (!state.GetFpcrFlag(Fpcr.Ahp)) if (!state.GetFpcrFlag(AFpcr.Ahp))
{ {
if (biasedExp >= (uint)Math.Pow(2d, e) - 1u) if (biasedExp >= (uint)Math.Pow(2d, e) - 1u)
{ {
resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign); resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
FPProcessException(FPExc.Overflow, state); FPProcessException(AFpExc.Overflow, state);
error = 1d; error = 1d;
} }
@ -689,7 +689,7 @@ namespace ChocolArm64.Instruction
{ {
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu); resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
error = 0d; error = 0d;
} }
@ -701,7 +701,7 @@ namespace ChocolArm64.Instruction
if (error != 0d) if (error != 0d)
{ {
FPProcessException(FPExc.Inexact, state); FPProcessException(AFpExc.Inexact, state);
} }
return resultBits; return resultBits;
@ -712,7 +712,7 @@ namespace ChocolArm64.Instruction
return (ushort)((valueBits & 0x80000000u) >> 16 | 0x7E00u | (valueBits & 0x003FE000u) >> 13); return (ushort)((valueBits & 0x80000000u) >> 16 | 0x7E00u | (valueBits & 0x003FE000u) >> 13);
} }
private static void FPProcessException(FPExc exc, AThreadState state) private static void FPProcessException(AFpExc exc, AThreadState state)
{ {
int enable = (int)exc + 8; int enable = (int)exc + 8;
@ -747,7 +747,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((inf1 && !sign1) || (inf2 && !sign2)) else if ((inf1 && !sign1) || (inf2 && !sign2))
{ {
@ -788,13 +788,13 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if (inf1 || zero2) else if (inf1 || zero2)
{ {
result = FPInfinity(sign1 ^ sign2); result = FPInfinity(sign1 ^ sign2);
if (!inf1) FPProcessException(FPExc.DivideByZero, state); if (!inf1) FPProcessException(AFpExc.DivideByZero, state);
} }
else if (zero1 || inf2) else if (zero1 || inf2)
{ {
@ -957,7 +957,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if (inf1 || inf2) else if (inf1 || inf2)
{ {
@ -993,7 +993,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
if (!done) if (!done)
@ -1008,7 +1008,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((infA && !signA) || (infP && !signP)) else if ((infA && !signA) || (infP && !signP))
{ {
@ -1199,7 +1199,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else else
{ {
@ -1227,7 +1227,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((inf1 && !sign1) || (inf2 && sign2)) else if ((inf1 && !sign1) || (inf2 && sign2))
{ {
@ -1400,10 +1400,10 @@ namespace ChocolArm64.Instruction
{ {
op |= 1u << 22; op |= 1u << 22;
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
if (state.GetFpcrFlag(Fpcr.Dn)) if (state.GetFpcrFlag(AFpcr.Dn))
{ {
return FPDefaultNaN(); return FPDefaultNaN();
} }
@ -1411,7 +1411,7 @@ namespace ChocolArm64.Instruction
return BitConverter.Int32BitsToSingle((int)op); return BitConverter.Int32BitsToSingle((int)op);
} }
private static void FPProcessException(FPExc exc, AThreadState state) private static void FPProcessException(AFpExc exc, AThreadState state)
{ {
int enable = (int)exc + 8; int enable = (int)exc + 8;
@ -1446,7 +1446,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((inf1 && !sign1) || (inf2 && !sign2)) else if ((inf1 && !sign1) || (inf2 && !sign2))
{ {
@ -1487,13 +1487,13 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if (inf1 || zero2) else if (inf1 || zero2)
{ {
result = FPInfinity(sign1 ^ sign2); result = FPInfinity(sign1 ^ sign2);
if (!inf1) FPProcessException(FPExc.DivideByZero, state); if (!inf1) FPProcessException(AFpExc.DivideByZero, state);
} }
else if (zero1 || inf2) else if (zero1 || inf2)
{ {
@ -1656,7 +1656,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if (inf1 || inf2) else if (inf1 || inf2)
{ {
@ -1692,7 +1692,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
if (!done) if (!done)
@ -1707,7 +1707,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((infA && !signA) || (infP && !signP)) else if ((infA && !signA) || (infP && !signP))
{ {
@ -1898,7 +1898,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else else
{ {
@ -1926,7 +1926,7 @@ namespace ChocolArm64.Instruction
{ {
result = FPDefaultNaN(); result = FPDefaultNaN();
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
else if ((inf1 && !sign1) || (inf2 && sign2)) else if ((inf1 && !sign1) || (inf2 && sign2))
{ {
@ -2099,10 +2099,10 @@ namespace ChocolArm64.Instruction
{ {
op |= 1ul << 51; op |= 1ul << 51;
FPProcessException(FPExc.InvalidOp, state); FPProcessException(AFpExc.InvalidOp, state);
} }
if (state.GetFpcrFlag(Fpcr.Dn)) if (state.GetFpcrFlag(AFpcr.Dn))
{ {
return FPDefaultNaN(); return FPDefaultNaN();
} }
@ -2110,7 +2110,7 @@ namespace ChocolArm64.Instruction
return BitConverter.Int64BitsToDouble((long)op); return BitConverter.Int64BitsToDouble((long)op);
} }
private static void FPProcessException(FPExc exc, AThreadState state) private static void FPProcessException(AFpExc exc, AThreadState state)
{ {
int enable = (int)exc + 8; int enable = (int)exc + 8;

2
ChocolArm64/State/FPExc.cs → ChocolArm64/State/AFpExc.cs
View file

@ -1,6 +1,6 @@
namespace ChocolArm64.State namespace ChocolArm64.State
{ {
enum FPExc enum AFpExc
{ {
InvalidOp = 0, InvalidOp = 0,
DivideByZero = 1, DivideByZero = 1,

2
ChocolArm64/State/FPType.cs → ChocolArm64/State/AFpType.cs
View file

@ -1,6 +1,6 @@
namespace ChocolArm64.State namespace ChocolArm64.State
{ {
enum FPType enum AFpType
{ {
Nonzero, Nonzero,
Zero, Zero,

2
ChocolArm64/State/FPCR.cs → ChocolArm64/State/AFpcr.cs
View file

@ -1,6 +1,6 @@
namespace ChocolArm64.State namespace ChocolArm64.State
{ {
enum Fpcr enum AFpcr
{ {
Ufe = 11, Ufe = 11,
RMode = 22, RMode = 22,

2
ChocolArm64/State/FPSR.cs → ChocolArm64/State/AFpsr.cs
View file

@ -1,6 +1,6 @@
namespace ChocolArm64.State namespace ChocolArm64.State
{ {
enum Fpsr enum AFpsr
{ {
Ufc = 3, Ufc = 3,
Qc = 27 Qc = 27

6
ChocolArm64/State/AThreadState.cs
View file

@ -146,19 +146,19 @@ namespace ChocolArm64.State
Undefined?.Invoke(this, new AInstUndefinedEventArgs(position, rawOpCode)); Undefined?.Invoke(this, new AInstUndefinedEventArgs(position, rawOpCode));
} }
internal bool GetFpcrFlag(Fpcr flag) internal bool GetFpcrFlag(AFpcr flag)
{ {
return (Fpcr & (1 << (int)flag)) != 0; return (Fpcr & (1 << (int)flag)) != 0;
} }
internal void SetFpsrFlag(Fpsr flag) internal void SetFpsrFlag(AFpsr flag)
{ {
Fpsr |= 1 << (int)flag; Fpsr |= 1 << (int)flag;
} }
internal ARoundMode FPRoundingMode() internal ARoundMode FPRoundingMode()
{ {
return (ARoundMode)((Fpcr >> (int)State.Fpcr.RMode) & 3); return (ARoundMode)((Fpcr >> (int)State.AFpcr.RMode) & 3);
} }
} }
} }