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Adjust naming from new PRs

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This commit is contained in:
Alex Barney 2018-10-28 22:38:40 -05:00
parent fcd757ed05
commit af871123d7
4 changed files with 85 additions and 85 deletions
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4
ChocolArm64/ABitUtils.cs
View file

@ -41,9 +41,9 @@ namespace ChocolArm64
return (long)RotateRight((ulong)bits, shift, size);
}
public static ulong RotateRight(ulong Bits, int Shift, int Size)
public static ulong RotateRight(ulong bits, int shift, int size)
{
return (Bits >> Shift) | (Bits << (Size - Shift));
return (bits >> shift) | (bits << (size - shift));
}
}
}

6
ChocolArm64/ATranslatorCache.cs
View file

@ -123,7 +123,7 @@ namespace ChocolArm64
private void ClearCacheIfNeeded()
{
long Timestamp = GetTimestamp();
long timestamp = GetTimestamp();
while (_totalSize > MaxTotalSize)
{
@ -138,9 +138,9 @@ namespace ChocolArm64
CacheBucket bucket = _cache[node.Value];
long TimeDelta = Timestamp - bucket.Timestamp;
long timeDelta = Timestamp - bucket.Timestamp;
if (TimeDelta <= MinTimeDelta)
if (timeDelta <= MinTimeDelta)
{
break;
}

78
ChocolArm64/Instruction/AInstEmitSimdHash.cs
View file

@ -8,79 +8,79 @@ namespace ChocolArm64.Instruction
static partial class AInstEmit
{
#region "Sha1"
public static void Sha1c_V(AilEmitterCtx Context)
public static void Sha1c_V(AilEmitterCtx context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
AOpCodeSimdReg op = (AOpCodeSimdReg)context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
context.EmitLdvec(op.Rd);
EmitVectorExtractZx(context, op.Rn, 0, 2);
context.EmitLdvec(op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashChoose));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.HashChoose));
Context.EmitStvec(Op.Rd);
context.EmitStvec(op.Rd);
}
public static void Sha1h_V(AilEmitterCtx Context)
public static void Sha1h_V(AilEmitterCtx context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
AOpCodeSimd op = (AOpCodeSimd)context.CurrOp;
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
EmitVectorExtractZx(context, op.Rn, 0, 2);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.FixedRotate));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.FixedRotate));
EmitScalarSet(Context, Op.Rd, 2);
EmitScalarSet(context, op.Rd, 2);
}
public static void Sha1m_V(AilEmitterCtx Context)
public static void Sha1m_V(AilEmitterCtx context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
AOpCodeSimdReg op = (AOpCodeSimdReg)context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
context.EmitLdvec(op.Rd);
EmitVectorExtractZx(context, op.Rn, 0, 2);
context.EmitLdvec(op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashMajority));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.HashMajority));
Context.EmitStvec(Op.Rd);
context.EmitStvec(op.Rd);
}
public static void Sha1p_V(AilEmitterCtx Context)
public static void Sha1p_V(AilEmitterCtx context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
AOpCodeSimdReg op = (AOpCodeSimdReg)context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
context.EmitLdvec(op.Rd);
EmitVectorExtractZx(context, op.Rn, 0, 2);
context.EmitLdvec(op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashParity));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.HashParity));
Context.EmitStvec(Op.Rd);
context.EmitStvec(op.Rd);
}
public static void Sha1su0_V(AilEmitterCtx Context)
public static void Sha1su0_V(AilEmitterCtx context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
AOpCodeSimdReg op = (AOpCodeSimdReg)context.CurrOp;
Context.EmitLdvec(Op.Rd);
Context.EmitLdvec(Op.Rn);
Context.EmitLdvec(Op.Rm);
context.EmitLdvec(op.Rd);
context.EmitLdvec(op.Rn);
context.EmitLdvec(op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha1SchedulePart1));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.Sha1SchedulePart1));
Context.EmitStvec(Op.Rd);
context.EmitStvec(op.Rd);
}
public static void Sha1su1_V(AilEmitterCtx Context)
public static void Sha1su1_V(AilEmitterCtx context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
AOpCodeSimd op = (AOpCodeSimd)context.CurrOp;
Context.EmitLdvec(Op.Rd);
Context.EmitLdvec(Op.Rn);
context.EmitLdvec(op.Rd);
context.EmitLdvec(op.Rn);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha1SchedulePart2));
ASoftFallback.EmitCall(context, nameof(ASoftFallback.Sha1SchedulePart2));
Context.EmitStvec(Op.Rd);
context.EmitStvec(op.Rd);
}
#endregion

82
ChocolArm64/Instruction/ASoftFallback.cs
View file

@ -531,69 +531,69 @@ namespace ChocolArm64.Instruction
#endregion
#region "Sha1"
public static Vector128<float> HashChoose(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
public static Vector128<float> HashChoose(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaChoose((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
uint t = ShaChoose((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2));
hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2);
Rol32_160(ref hash_e, ref hash_abcd);
Rol32_160(ref hashE, ref hashAbcd);
}
return hash_abcd;
return hashAbcd;
}
public static uint FixedRotate(uint hash_e)
public static uint FixedRotate(uint hashE)
{
return hash_e.Rol(30);
return hashE.Rol(30);
}
public static Vector128<float> HashMajority(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
public static Vector128<float> HashMajority(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaMajority((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
uint t = ShaMajority((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2));
hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2);
Rol32_160(ref hash_e, ref hash_abcd);
Rol32_160(ref hashE, ref hashAbcd);
}
return hash_abcd;
return hashAbcd;
}
public static Vector128<float> HashParity(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
public static Vector128<float> HashParity(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaParity((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
uint t = ShaParity((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2));
hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2);
Rol32_160(ref hash_e, ref hash_abcd);
Rol32_160(ref hashE, ref hashAbcd);
}
return hash_abcd;
return hashAbcd;
}
public static Vector128<float> Sha1SchedulePart1(Vector128<float> w0_3, Vector128<float> w4_7, Vector128<float> w8_11)
@ -623,13 +623,13 @@ namespace ChocolArm64.Instruction
Vector128<float> result = new Vector128<float>();
Vector128<float> T = Sse.Xor(tw0_3, Sse.StaticCast<uint, float>(
Vector128<float> t = Sse.Xor(tw0_3, Sse.StaticCast<uint, float>(
Sse2.ShiftRightLogical128BitLane(Sse.StaticCast<float, uint>(w12_15), (byte)4)));
uint tE0 = (uint)VectorExtractIntZx(T, (byte)0, 2);
uint tE1 = (uint)VectorExtractIntZx(T, (byte)1, 2);
uint tE2 = (uint)VectorExtractIntZx(T, (byte)2, 2);
uint tE3 = (uint)VectorExtractIntZx(T, (byte)3, 2);
uint tE0 = (uint)VectorExtractIntZx(t, (byte)0, 2);
uint tE1 = (uint)VectorExtractIntZx(t, (byte)1, 2);
uint tE2 = (uint)VectorExtractIntZx(t, (byte)2, 2);
uint tE3 = (uint)VectorExtractIntZx(t, (byte)3, 2);
result = VectorInsertInt((ulong)tE0.Rol(1), result, (byte)0, 2);
result = VectorInsertInt((ulong)tE1.Rol(1), result, (byte)1, 2);
@ -638,17 +638,17 @@ namespace ChocolArm64.Instruction
return VectorInsertInt((ulong)(tE3.Rol(1) ^ tE0.Rol(2)), result, (byte)3, 2);
}
private static void Rol32_160(ref uint y, ref Vector128<float> X)
private static void Rol32_160(ref uint y, ref Vector128<float> x)
{
if (!Sse2.IsSupported)
{
throw new PlatformNotSupportedException();
}
uint xE3 = (uint)VectorExtractIntZx(X, (byte)3, 2);
uint xE3 = (uint)VectorExtractIntZx(x, (byte)3, 2);
X = Sse.StaticCast<uint, float>(Sse2.ShiftLeftLogical128BitLane(Sse.StaticCast<float, uint>(X), (byte)4));
X = VectorInsertInt((ulong)y, X, (byte)0, 2);
x = Sse.StaticCast<uint, float>(Sse2.ShiftLeftLogical128BitLane(Sse.StaticCast<float, uint>(x), (byte)4));
x = VectorInsertInt((ulong)y, x, (byte)0, 2);
y = xE3;
}