Update tests
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b56a86222c
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be10223690
2 changed files with 22 additions and 54 deletions
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@ -70,6 +70,7 @@ namespace Ryujinx.Tests.Cpu
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Marshal.FreeHGlobal(_ramPointer);
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_memory = null;
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_context = null;
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_translator = null;
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_unicornEmu = null;
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}
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@ -120,12 +121,12 @@ namespace Ryujinx.Tests.Cpu
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_context.SetX(31, x31);
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_context.SetV(0, v0);
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_context.SetV(1, v1);
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_context.SetV(2, v2);
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_context.SetV(3, v3);
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_context.SetV(4, v4);
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_context.SetV(5, v5);
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_context.SetV(0, v0);
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_context.SetV(1, v1);
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_context.SetV(2, v2);
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_context.SetV(3, v3);
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_context.SetV(4, v4);
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_context.SetV(5, v5);
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_context.SetV(30, v30);
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_context.SetV(31, v31);
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@ -171,7 +172,7 @@ namespace Ryujinx.Tests.Cpu
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if (_unicornAvailable)
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{
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_unicornEmu.RunForCount((ulong)(_currAddress - _entryPoint - 8) / 4);
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_unicornEmu.RunForCount((ulong)(_currAddress - _entryPoint - 4) / 4);
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}
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}
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@ -196,16 +197,7 @@ namespace Ryujinx.Tests.Cpu
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int fpcr = 0,
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int fpsr = 0)
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{
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/*using (System.IO.FileStream fs = new System.IO.FileStream("D:\\code.bin", System.IO.FileMode.Create))
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{
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System.IO.BinaryWriter bw = new System.IO.BinaryWriter(fs);
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bw.Write(opcode);
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bw.Write(0xD65F03C0);
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}*/
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Opcode(opcode);
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Opcode(0xD4200000); // BRK #0
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Opcode(0xD65F03C0); // RET
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SetContext(x0, x1, x2, x3, x31, v0, v1, v2, v3, v4, v5, v30, v31, overflow, carry, zero, negative, fpcr, fpsr);
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ExecuteOpcodes();
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@ -33,7 +33,6 @@ namespace Ryujinx.Tests.Cpu
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SetContext(x0: xn);
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Opcode(opCmn);
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Opcode(opCset);
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Opcode(0xD4200000); // BRK #0
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Opcode(0xD65F03C0); // RET
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ExecuteOpcodes();
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@ -59,7 +58,6 @@ namespace Ryujinx.Tests.Cpu
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SetContext(x0: wn);
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Opcode(opCmn);
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Opcode(opCset);
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Opcode(0xD4200000); // BRK #0
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Opcode(0xD65F03C0); // RET
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ExecuteOpcodes();
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@ -85,7 +83,6 @@ namespace Ryujinx.Tests.Cpu
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SetContext(x0: xn);
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Opcode(opCmp);
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Opcode(opCset);
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Opcode(0xD4200000); // BRK #0
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Opcode(0xD65F03C0); // RET
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ExecuteOpcodes();
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@ -111,7 +108,6 @@ namespace Ryujinx.Tests.Cpu
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SetContext(x0: wn);
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Opcode(opCmp);
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Opcode(opCset);
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Opcode(0xD4200000); // BRK #0
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Opcode(0xD65F03C0); // RET
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ExecuteOpcodes();
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@ -134,7 +130,6 @@ namespace Ryujinx.Tests.Cpu
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SUB W0, W0, #3
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MUL W0, W1, W0
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SDIV W0, W2, W0
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BRK #0
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RET
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*/
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@ -146,7 +141,6 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0x51000C00);
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Opcode(0x1B007C20);
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Opcode(0x1AC00C40);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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@ -183,20 +177,16 @@ namespace Ryujinx.Tests.Cpu
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FADD S0, S0, S1
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FDIV S0, S2, S0
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FMUL S0, S0, S0
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BRK #0
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RET
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*/
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SetContext(
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v0: MakeVectorScalar(a),
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v1: MakeVectorScalar(b));
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SetContext(v0: MakeVectorScalar(a), v1: MakeVectorScalar(b));
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Opcode(0x1E2E1002);
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Opcode(0x1E201840);
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Opcode(0x1E211841);
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Opcode(0x1E212800);
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Opcode(0x1E201840);
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Opcode(0x1E200800);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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@ -233,27 +223,23 @@ namespace Ryujinx.Tests.Cpu
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FADD D0, D0, D1
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FDIV D0, D2, D0
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FMUL D0, D0, D0
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BRK #0
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RET
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*/
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SetContext(
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v0: MakeVectorScalar(a),
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v1: MakeVectorScalar(b));
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SetContext(v0: MakeVectorScalar(a), v1: MakeVectorScalar(b));
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Opcode(0x1E6E1002);
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Opcode(0x1E601840);
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Opcode(0x1E611841);
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Opcode(0x1E612800);
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Opcode(0x1E601840);
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Opcode(0x1E600800);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetV(0).AsDouble(), Is.EqualTo(16d));
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}
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[Test]
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[Test, Ignore("The Tester supports only one return point.")]
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public void MiscF([Range(0u, 92u, 1u)] uint a)
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{
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ulong Fn(uint n)
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@ -277,9 +263,9 @@ namespace Ryujinx.Tests.Cpu
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/*
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0x0000000000001000: MOV W4, W0
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0x0000000000001004: CBZ W0, #0x3C
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0x0000000000001004: CBZ W0, #0x34
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0x0000000000001008: CMP W0, #1
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0x000000000000100C: B.LS #0x48
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0x000000000000100C: B.LS #0x34
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0x0000000000001010: MOVZ W2, #0x2
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0x0000000000001014: MOVZ X1, #0x1
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0x0000000000001018: MOVZ X3, #0
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@ -288,22 +274,19 @@ namespace Ryujinx.Tests.Cpu
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0x0000000000001024: MOV X3, X1
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0x0000000000001028: MOV X1, X0
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0x000000000000102C: CMP W4, W2
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0x0000000000001030: B.HS #0x1C
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0x0000000000001034: BRK #0
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0x0000000000001038: RET
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0x000000000000103C: MOVZ X0, #0
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0x0000000000001040: BRK #0
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0x0000000000001030: B.HS #-0x14
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0x0000000000001034: RET
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0x0000000000001038: MOVZ X0, #0
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0x000000000000103C: RET
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0x0000000000001040: MOVZ X0, #0x1
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0x0000000000001044: RET
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0x0000000000001048: MOVZ X0, #0x1
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0x000000000000104C: BRK #0
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0x0000000000001050: RET
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*/
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SetContext(x0: a);
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Opcode(0x2A0003E4);
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Opcode(0x340001C0);
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Opcode(0x340001A0);
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Opcode(0x7100041F);
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Opcode(0x540001E9);
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Opcode(0x540001A9);
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Opcode(0x52800042);
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Opcode(0xD2800021);
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Opcode(0xD2800003);
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@ -313,13 +296,10 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xAA0003E1);
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Opcode(0x6B02009F);
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Opcode(0x54FFFF62);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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Opcode(0xD2800000);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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Opcode(0xD2800020);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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@ -336,14 +316,12 @@ namespace Ryujinx.Tests.Cpu
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0x0000000000001000: MOV X0, #2
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0x0000000000001004: MOV X1, #3
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0x0000000000001008: ADD X0, X0, X1
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0x000000000000100C: BRK #0
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0x0000000000001010: RET
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0x000000000000100C: RET
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*/
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Opcode(0xD2800040);
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Opcode(0xD2800061);
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Opcode(0x8B010000);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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@ -355,14 +333,12 @@ namespace Ryujinx.Tests.Cpu
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0x0000000000001000: MOV X0, #3
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0x0000000000001004: MOV X1, #2
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0x0000000000001008: ADD X0, X0, X1
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0x000000000000100C: BRK #0
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0x0000000000001010: RET
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0x000000000000100C: RET
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*/
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Opcode(0xD2800060);
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Opcode(0xD2800041);
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Opcode(0x8B010000);
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Opcode(0xD4200000);
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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