Address PR feedback

ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs

@@ -45,15 +45,12 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 Dictionary<Register, OperandType> types = new Dictionary<Register, OperandType>();
 
                 Queue<Register> pendingQueue = new Queue<Register>();
-
                 Queue<Register> readyQueue   = new Queue<Register>();
 
                 foreach (Copy copy in _copies)
                 {
                     locations[copy.Source] = copy.Source;
-
                     sources[copy.Dest]     = copy.Source;
-
                     types[copy.Dest]       = copy.Type;
 
                     pendingQueue.Enqueue(copy.Dest);

ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs

@@ -268,7 +268,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             int availableRegisters = context.Masks.GetAvailableRegisters(regType);
 
             int[] usePositions     = new int[RegistersCount];
-
             int[] blockedPositions = new int[RegistersCount];
 
             for (int index = 0; index < RegistersCount; index++)
@@ -426,7 +425,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 if (higuest < current)
                 {
                     higuest  = current;
-
                     selected = index;
 
                     if (current == int.MaxValue)

ARMeilleure/CodeGen/X86/Assembler.cs

@@ -8,12 +8,10 @@ namespace ARMeilleure.CodeGen.X86
     class Assembler
     {
         private const int BadOp       = 0;
-
         private const int OpModRMBits = 24;
 
         private const byte RexPrefix  = 0x40;
         private const byte RexWPrefix = 0x48;
-
         private const byte LockPrefix = 0xf0;
 
         [Flags]
@@ -1037,7 +1035,6 @@ namespace ARMeilleure.CodeGen.X86
             }
 
             bool needsSibByte      = false;
-
             bool needsDisplacement = false;
 
             int sib = 0;
@@ -1050,7 +1047,6 @@ namespace ARMeilleure.CodeGen.X86
                 X86Register baseRegLow = (X86Register)(baseReg.Index & 0b111);
 
                 needsSibByte      = memOp.Index != null     || baseRegLow == X86Register.Rsp;
-
                 needsDisplacement = memOp.Displacement != 0 || baseRegLow == X86Register.Rbp;
 
                 if (needsDisplacement)

ARMeilleure/CodeGen/X86/CodeGenContext.cs

@@ -116,7 +116,10 @@ namespace ARMeilleure.CodeGen.X86
 
             int frameSize = calleeSaveRegionSize + allocResult.SpillRegionSize;
 
-            int callArgsAndFrameSize = frameSize + argsCount * 16; //FIXME * 16 => calc
+            // TODO: Instead of always multiplying by 16 (the largest possible size of a variable,
+            // since a V128 has 16 bytes), we should calculate the exact size consumed by the
+            // arguments passed to the called functions on the stack.
+            int callArgsAndFrameSize = frameSize + argsCount * 16;
 
             // Ensure that the Stack Pointer will be aligned to 16 bytes.
             callArgsAndFrameSize = (callArgsAndFrameSize + 0xf) & ~0xf;

ARMeilleure/CodeGen/X86/CodeGenerator.cs

@@ -1308,7 +1308,6 @@ namespace ARMeilleure.CodeGen.X86
                             int mask1 = 0b11_10_01_00;
 
                             mask0 = BitUtils.RotateRight(mask0,     index * 2, 8);
-                          //mask1 = BitUtils.RotateLeft (mask1,     index * 2, 8);
                             mask1 = BitUtils.RotateRight(mask1, 8 - index * 2, 8);
 
                             context.Assembler.Pshufd(src1, src1, (byte)mask0); // Lane to be inserted in position 0.

ARMeilleure/Decoders/OpCode32BImm.cs

@@ -8,7 +8,7 @@ namespace ARMeilleure.Decoders
         {
             uint pc = GetPc();
 
-            // When the codition is never, the instruction is BLX to Thumb mode.
+            // When the condition is never, the instruction is BLX to Thumb mode.
             if (Cond != Condition.Nv)
             {
                 pc &= ~3u;

ARMeilleure/Decoders/OpCodeAdr.cs

@@ -3,6 +3,7 @@ namespace ARMeilleure.Decoders
     class OpCodeAdr : OpCode
     {
         public int Rd { get; private set; }
+
         public long Immediate { get; private set; }
 
          public OpCodeAdr(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)

ARMeilleure/Decoders/OpCodeMov.cs

@@ -3,7 +3,9 @@ namespace ARMeilleure.Decoders
     class OpCodeMov : OpCode
     {
         public int Rd { get; private set; }
+
         public long Immediate { get; private set; }
+
         public int Bit { get; private set; }
 
         public OpCodeMov(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
@@ -23,6 +25,7 @@ namespace ARMeilleure.Decoders
             Bit       = (opCode >> 21) & 0x3;
 
             Bit <<= 4;
+
             Immediate <<= Bit;
 
             RegisterSize = (opCode >> 31) != 0

Ryujinx/Config.jsonc

@@ -56,9 +56,6 @@
     // Use old ChocolArm64 ARM emulator
     "enable_legacy_jit": false,
 
-    // Enable or disable aggressive CPU optimizations
-    "enable_aggressive_cpu_opts": true,
-
     // Enable or disable ignoring missing services, this may cause instability
     "ignore_missing_services": false,
 

Ryujinx/Configuration.cs

@@ -113,11 +113,6 @@ namespace Ryujinx
         /// </summary>
         public bool EnableLegacyJit { get; private set; }
 
-        /// <summary>
-        /// Enable or Disable aggressive CPU optimizations
-        /// </summary>
-        public bool EnableAggressiveCpuOpts { get; private set; }
-
         /// <summary>
         /// Enable or disable ignoring missing services
         /// </summary>
@@ -247,11 +242,6 @@ namespace Ryujinx
 
             device.System.UseLegacyJit = Instance.EnableLegacyJit;
 
-            if (Instance.EnableAggressiveCpuOpts)
-            {
-                Optimizations.AssumeStrictAbiCompliance = true;
-            }
-
             ServiceConfiguration.IgnoreMissingServices = Instance.IgnoreMissingServices;
 
             if (Instance.GamepadControls.Enabled)

Ryujinx/_schema.json

@@ -21,7 +21,6 @@
     "enable_fs_integrity_checks",
     "fs_global_access_log_mode",
     "enable_legacy_jit",
-    "enable_aggressive_cpu_opts",
     "controller_type",
     "enable_keyboard",
     "keyboard_controls",
@@ -463,17 +462,6 @@
         false
       ]
     },
-    "enable_aggressive_cpu_opts": {
-      "$id": "#/properties/enable_aggressive_cpu_opts",
-      "type": "boolean",
-      "title": "Enable Aggressive CPU Optimizations",
-      "description": "Enable or disable aggressive CPU optimizations",
-      "default": true,
-      "examples": [
-        true,
-        false
-      ]
-    },
     "ignore_missing_services": {
       "$id": "#/properties/ignore_missing_services",
       "type": "boolean",