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Opt. (retest).

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LDj3SNuD 2018-08-04 19:10:01 +02:00 • committed by GitHub
commit d78acb3aac
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1 changed files with 10 additions and 6 deletions
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16
ChocolArm64/Instruction/AInstEmitSimdHelper.cs
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@ -891,9 +891,9 @@ namespace ChocolArm64.Instruction
EmitVectorZeroLowerTmp(Context); EmitVectorZeroLowerTmp(Context);
} }
for (int Index = 0; Index < Elems; Index++) if (Add || Sub)
{ {
if (Add || Sub) for (int Index = 0; Index < Elems; Index++)
{ {
EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed); EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed); EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
@ -915,9 +915,13 @@ namespace ChocolArm64.Instruction
EmitBinarySatQSub(Context, Signed); EmitBinarySatQSub(Context, Signed);
} }
} }
}
if (Accumulate) EmitVectorInsertTmp(Context, Index, Op.Size);
}
}
else if (Accumulate)
{
for (int Index = 0; Index < Elems; Index++)
{ {
EmitVectorExtract(Context, Op.Rn, Index, Op.Size, !Signed); EmitVectorExtract(Context, Op.Rn, Index, Op.Size, !Signed);
EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed); EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
@ -932,9 +936,9 @@ namespace ChocolArm64.Instruction
{ {
EmitBinarySatQAccumulate(Context, Signed); EmitBinarySatQAccumulate(Context, Signed);
} }
}
EmitVectorInsertTmp(Context, Index, Op.Size); EmitVectorInsertTmp(Context, Index, Op.Size);
}
} }
Context.EmitLdvectmp(); Context.EmitLdvectmp();