Update CpuTestSimd.cs
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61036b1e41
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1 changed files with 57 additions and 25 deletions
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@ -248,6 +248,40 @@ namespace Ryujinx.Tests.Cpu
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0x6EE1B800u // FCVTZU V0.2D, V0.2D
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};
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}
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private static uint[] _F_RecpX_Sqrt_S_S_()
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{
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return new uint[]
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{
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0x5EA1F820u, // FRECPX S0, S1
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0x1E21C020u // FSQRT S0, S1
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};
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}
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private static uint[] _F_RecpX_Sqrt_S_D_()
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{
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return new uint[]
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{
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0x5EE1F820u, // FRECPX D0, D1
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0x1E61C020u // FSQRT D0, D1
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};
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}
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private static uint[] _F_Sqrt_V_2S_4S_()
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{
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return new uint[]
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{
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0x2EA1F800u // FSQRT V0.2S, V0.2S
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};
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}
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private static uint[] _F_Sqrt_V_2D_()
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{
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return new uint[]
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{
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0x6EE1F800u // FSQRT V0.2D, V0.2D
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};
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}
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#endregion
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private const int RndCnt = 2;
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@ -841,76 +875,74 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("FSQRT <Sd>, <Sn>")]
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public void F_Sqrt_S_S([ValueSource("_1S_F_")] ulong A)
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[Test, Pairwise]
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public void F_RecpX_Sqrt_S_S([ValueSource("_F_RecpX_Sqrt_S_S_")] uint Opcodes,
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[ValueSource("_1S_F_")] ulong A)
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{
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uint Opcode = 0x1E21C020; // FSQRT S0, S1
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ulong Z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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}
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[Test, Pairwise, Description("FSQRT <Dd>, <Dn>")]
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public void F_Sqrt_S_D([ValueSource("_1D_F_")] ulong A)
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[Test, Pairwise]
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public void F_RecpX_Sqrt_S_D([ValueSource("_F_RecpX_Sqrt_S_D_")] uint Opcodes,
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[ValueSource("_1D_F_")] ulong A)
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{
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uint Opcode = 0x1E61C020; // FSQRT D0, D1
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ulong Z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V0 = MakeVectorE1(Z);
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Vector128<float> V1 = MakeVectorE0(A);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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}
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[Test, Pairwise, Description("FSQRT <Vd>.<T>, <Vn>.<T>")]
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public void F_Sqrt_V_2S_4S([Values(0u)] uint Rd,
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[Test, Pairwise]
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public void F_Sqrt_V_2S_4S([ValueSource("_F_Sqrt_V_2S_4S_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_2S_F_")] ulong Z,
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[ValueSource("_2S_F_")] ulong A,
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[Values(0b0u, 0b1u)] uint Q) // <2S, 4S>
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{
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uint Opcode = 0x2EA1F800; // FSQRT V0.2S, V0.2S
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= ((Q & 1) << 30);
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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}
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[Test, Pairwise, Description("FSQRT <Vd>.<T>, <Vn>.<T>")]
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public void F_Sqrt_V_2D([Values(0u)] uint Rd,
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[Test, Pairwise]
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public void F_Sqrt_V_2D([ValueSource("_F_Sqrt_V_2D_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1D_F_")] ulong Z,
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[ValueSource("_1D_F_")] ulong A)
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{
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uint Opcode = 0x6EE1F800; // FSQRT V0.2D, V0.2D
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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}
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[Test, Pairwise, Description("NEG <V><d>, <V><n>")]
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