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Kernel: Introduce the IOWindow class

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This class is intended to replace all IOAddress usages in the Kernel
codebase altogether. The idea is to ensure IO can be done in
arch-specific manner that is determined mostly in compile-time, but to
still be able to use most of the Kernel code in non-x86 builds. Specific
devices that rely on x86-specific IO instructions are already placed in
the Arch/x86 directory and are omitted for non-x86 builds.

The reason this works so well is the fact that x86 IO space acts in a
similar fashion to the traditional memory space being available in most
CPU architectures - the x86 IO space is essentially just an array of
bytes like the physical memory address space, but requires x86 IO
instructions to load and store data. Therefore, many devices allow host
software to interact with the hardware registers in both ways, with a
noticeable trend even in the modern x86 hardware to move away from the
old x86 IO space to exclusively using memory-mapped IO.

Therefore, the IOWindow class encapsulates both methods for x86 builds.
The idea is to allow PCI devices to be used in either way in x86 builds,
so when trying to map an IOWindow on a PCI BAR, the Kernel will try to
find the proper method being declared with the PCI BAR flags.
For old PCI hardware on non-x86 builds this might turn into a problem as
we can't use port mapped IO, so the Kernel will gracefully fail with
ENOTSUP error code if that's the case, as there's really nothing we can
do within such case.

For general IO, the read{8,16,32} and write{8,16,32} methods are
available as a convenient API for other places in the Kernel. There are
simply no direct 64-bit IO API methods yet, as it's not needed right now
and is not considered to be Arch-agnostic too - the x86 IO space doesn't
support generating 64 bit cycle on IO bus and instead requires two 2
32-bit accesses. If for whatever reason it appears to be necessary to do
IO in such manner, it could probably be added with some neat tricks to
do so. It is recommended to use Memory::TypedMapping struct if direct 64
bit IO is actually needed.
This commit is contained in:
Liav A 2022-09-23 11:50:04 +03:00 • committed by Linus Groh
parent 6bafbd64e2
commit 05ba034000
Notes: sideshowbarker 2024-07-18 05:37:06 +09:00
36 changed files with 919 additions and 469 deletions
Download patch file Download diff file Expand all files Collapse all files

121
Kernel/Storage/ATA/GenericIDE/Channel.cpp
View file

@ -8,8 +8,8 @@
#include <AK/Singleton.h>
#include <AK/StringView.h>
#include <Kernel/Arch/Delay.h>
#include <Kernel/Arch/x86/IO.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/IOWindow.h>
#include <Kernel/Memory/MemoryManager.h>
#include <Kernel/Process.h>
#include <Kernel/Sections.h>
@ -24,16 +24,16 @@ namespace Kernel {
#define PATA_PRIMARY_IRQ 14
#define PATA_SECONDARY_IRQ 15
UNMAP_AFTER_INIT NonnullLockRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT NonnullLockRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, IOWindowGroup io_window_group, ChannelType type)
{
auto ata_identify_data_buffer = KBuffer::try_create_with_size("ATA Identify Page"sv, 4096, Memory::Region::Access::ReadWrite, AllocationStrategy::AllocateNow).release_value();
return adopt_lock_ref(*new IDEChannel(controller, io_group, type, move(ata_identify_data_buffer)));
return adopt_lock_ref(*new IDEChannel(controller, move(io_window_group), type, move(ata_identify_data_buffer)));
}
UNMAP_AFTER_INIT NonnullLockRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT NonnullLockRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, u8 irq, IOWindowGroup io_window_group, ChannelType type)
{
auto ata_identify_data_buffer = KBuffer::try_create_with_size("ATA Identify Page"sv, 4096, Memory::Region::Access::ReadWrite, AllocationStrategy::AllocateNow).release_value();
return adopt_lock_ref(*new IDEChannel(controller, irq, io_group, type, move(ata_identify_data_buffer)));
return adopt_lock_ref(*new IDEChannel(controller, irq, move(io_window_group), type, move(ata_identify_data_buffer)));
}
StringView IDEChannel::channel_type_string() const
@ -47,10 +47,10 @@ bool IDEChannel::select_device_and_wait_until_not_busy(DeviceType device_type, s
{
microseconds_delay(20);
u8 slave = device_type == DeviceType::Slave;
m_io_group.io_base().offset(ATA_REG_HDDEVSEL).out<u8>(0xA0 | (slave << 4)); // First, we need to select the drive itself
m_io_window_group.io_window().write8(ATA_REG_HDDEVSEL, 0xA0 | (slave << 4)); // First, we need to select the drive itself
microseconds_delay(20);
size_t time_elapsed = 0;
while (m_io_group.control_base().in<u8>() & ATA_SR_BSY && time_elapsed <= milliseconds_timeout) {
while (m_io_window_group.control_window().read8(0) & ATA_SR_BSY && time_elapsed <= milliseconds_timeout) {
microseconds_delay(1000);
time_elapsed++;
}
@ -62,13 +62,13 @@ ErrorOr<void> IDEChannel::port_phy_reset()
MutexLocker locker(m_lock);
SpinlockLocker hard_locker(m_hard_lock);
// reset the channel
u8 device_control = m_io_group.control_base().in<u8>();
u8 device_control = m_io_window_group.control_window().read8(0);
// Wait 30 milliseconds
microseconds_delay(30000);
m_io_group.control_base().out<u8>(device_control | (1 << 2));
m_io_window_group.control_window().write8(0, device_control | (1 << 2));
// Wait 30 milliseconds
microseconds_delay(30000);
m_io_group.control_base().out<u8>(device_control);
m_io_window_group.control_window().write8(0, device_control);
// Wait up to 30 seconds before failing
if (!select_device_and_wait_until_not_busy(DeviceType::Master, 30000)) {
dbgln("IDEChannel: reset failed, busy flag on master stuck");
@ -95,16 +95,16 @@ ErrorOr<void> IDEChannel::allocate_resources_for_isa_ide_controller(Badge<ISAIDE
UNMAP_AFTER_INIT ErrorOr<void> IDEChannel::allocate_resources(bool force_pio)
{
dbgln_if(PATA_DEBUG, "IDEChannel: {} IO base: {}", channel_type_string(), m_io_group.io_base());
dbgln_if(PATA_DEBUG, "IDEChannel: {} control base: {}", channel_type_string(), m_io_group.control_base());
if (m_io_group.bus_master_base().has_value())
dbgln_if(PATA_DEBUG, "IDEChannel: {} bus master base: {}", channel_type_string(), m_io_group.bus_master_base().value());
dbgln_if(PATA_DEBUG, "IDEChannel: {} IO base: {}", channel_type_string(), m_io_window_group.io_window());
dbgln_if(PATA_DEBUG, "IDEChannel: {} control base: {}", channel_type_string(), m_io_window_group.control_window());
if (m_io_window_group.bus_master_window())
dbgln_if(PATA_DEBUG, "IDEChannel: {} bus master base: {}", channel_type_string(), m_io_window_group.bus_master_window());
else
dbgln_if(PATA_DEBUG, "IDEChannel: {} bus master base disabled", channel_type_string());
if (!force_pio) {
m_dma_enabled = true;
VERIFY(m_io_group.bus_master_base().has_value());
VERIFY(m_io_window_group.bus_master_window());
// Let's try to set up DMA transfers.
m_prdt_region = TRY(MM.allocate_dma_buffer_page("IDE PRDT"sv, Memory::Region::Access::ReadWrite, m_prdt_page));
@ -115,24 +115,24 @@ UNMAP_AFTER_INIT ErrorOr<void> IDEChannel::allocate_resources(bool force_pio)
prdt().end_of_table = 0x8000;
// clear bus master interrupt status
m_io_group.bus_master_base().value().offset(2).out<u8>(m_io_group.bus_master_base().value().offset(2).in<u8>() | 4);
m_io_window_group.bus_master_window()->write8(2, m_io_window_group.bus_master_window()->read8(2) | 4);
}
return {};
}
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type, NonnullOwnPtr<KBuffer> ata_identify_data_buffer)
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, u8 irq, IOWindowGroup io_group, ChannelType type, NonnullOwnPtr<KBuffer> ata_identify_data_buffer)
: ATAPort(controller, (type == ChannelType::Primary ? 0 : 1), move(ata_identify_data_buffer))
, IRQHandler(irq)
, m_channel_type(type)
, m_io_group(io_group)
, m_io_window_group(move(io_group))
{
}
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, IOAddressGroup io_group, ChannelType type, NonnullOwnPtr<KBuffer> ata_identify_data_buffer)
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, IOWindowGroup io_group, ChannelType type, NonnullOwnPtr<KBuffer> ata_identify_data_buffer)
: ATAPort(controller, (type == ChannelType::Primary ? 0 : 1), move(ata_identify_data_buffer))
, IRQHandler(type == ChannelType::Primary ? PATA_PRIMARY_IRQ : PATA_SECONDARY_IRQ)
, m_channel_type(type)
, m_io_group(io_group)
, m_io_window_group(move(io_group))
{
}
@ -149,36 +149,37 @@ bool IDEChannel::handle_irq(RegisterState const&)
ErrorOr<void> IDEChannel::stop_busmastering()
{
VERIFY(m_lock.is_locked());
VERIFY(m_io_group.bus_master_base().has_value());
m_io_group.bus_master_base().value().out<u8>(0);
VERIFY(m_io_window_group.bus_master_window());
m_io_window_group.bus_master_window()->write8(0, 0);
return {};
}
ErrorOr<void> IDEChannel::start_busmastering(TransactionDirection direction)
{
VERIFY(m_lock.is_locked());
VERIFY(m_io_group.bus_master_base().has_value());
m_io_group.bus_master_base().value().out<u8>(direction != TransactionDirection::Write ? 0x9 : 0x1);
VERIFY(m_io_window_group.bus_master_window());
m_io_window_group.bus_master_window()->write8(0, (direction != TransactionDirection::Write ? 0x9 : 0x1));
return {};
}
ErrorOr<void> IDEChannel::force_busmastering_status_clean()
{
VERIFY(m_lock.is_locked());
VERIFY(m_io_group.bus_master_base().has_value());
m_io_group.bus_master_base().value().offset(2).out<u8>(m_io_group.bus_master_base().value().offset(2).in<u8>() | 4);
VERIFY(m_io_window_group.bus_master_window());
m_io_window_group.bus_master_window()->write8(2, m_io_window_group.bus_master_window()->read8(2) | 4);
return {};
}
ErrorOr<u8> IDEChannel::busmastering_status()
{
VERIFY(m_io_group.bus_master_base().has_value());
return m_io_group.bus_master_base().value().offset(2).in<u8>();
VERIFY(m_io_window_group.bus_master_window());
return m_io_window_group.bus_master_window()->read8(2);
}
ErrorOr<void> IDEChannel::prepare_transaction_with_busmastering(TransactionDirection direction, PhysicalAddress prdt_buffer)
{
VERIFY(m_lock.is_locked());
m_io_group.bus_master_base().value().offset(4).out<u32>(prdt_buffer.get());
m_io_group.bus_master_base().value().out<u8>(direction != TransactionDirection::Write ? 0x8 : 0);
m_io_window_group.bus_master_window()->write32(4, prdt_buffer.get());
m_io_window_group.bus_master_window()->write8(0, direction != TransactionDirection::Write ? 0x8 : 0);
// Turn on "Interrupt" and "Error" flag. The error flag should be cleared by hardware.
m_io_group.bus_master_base().value().offset(2).out<u8>(m_io_group.bus_master_base().value().offset(2).in<u8>() | 0x6);
m_io_window_group.bus_master_window()->write8(2, m_io_window_group.bus_master_window()->read8(2) | 0x6);
return {};
}
ErrorOr<void> IDEChannel::initiate_transaction(TransactionDirection)
@ -190,29 +191,29 @@ ErrorOr<void> IDEChannel::initiate_transaction(TransactionDirection)
ErrorOr<u8> IDEChannel::task_file_status()
{
VERIFY(m_lock.is_locked());
return m_io_group.control_base().in<u8>();
return m_io_window_group.control_window().read8(0);
}
ErrorOr<u8> IDEChannel::task_file_error()
{
VERIFY(m_lock.is_locked());
return m_io_group.io_base().offset(ATA_REG_ERROR).in<u8>();
return m_io_window_group.io_window().read8(ATA_REG_ERROR);
}
ErrorOr<bool> IDEChannel::detect_presence_on_selected_device()
{
VERIFY(m_lock.is_locked());
m_io_group.io_base().offset(ATA_REG_SECCOUNT0).out<u8>(0x55);
m_io_group.io_base().offset(ATA_REG_LBA0).out<u8>(0xAA);
m_io_window_group.io_window().write8(ATA_REG_SECCOUNT0, 0x55);
m_io_window_group.io_window().write8(ATA_REG_LBA0, 0xAA);
m_io_group.io_base().offset(ATA_REG_SECCOUNT0).out<u8>(0xAA);
m_io_group.io_base().offset(ATA_REG_LBA0).out<u8>(0x55);
m_io_window_group.io_window().write8(ATA_REG_SECCOUNT0, 0xAA);
m_io_window_group.io_window().write8(ATA_REG_LBA0, 0x55);
m_io_group.io_base().offset(ATA_REG_SECCOUNT0).out<u8>(0x55);
m_io_group.io_base().offset(ATA_REG_LBA0).out<u8>(0xAA);
m_io_window_group.io_window().write8(ATA_REG_SECCOUNT0, 0x55);
m_io_window_group.io_window().write8(ATA_REG_LBA0, 0xAA);
auto nsectors_value = m_io_group.io_base().offset(ATA_REG_SECCOUNT0).in<u8>();
auto lba0 = m_io_group.io_base().offset(ATA_REG_LBA0).in<u8>();
auto nsectors_value = m_io_window_group.io_window().read8(ATA_REG_SECCOUNT0);
auto lba0 = m_io_window_group.io_window().read8(ATA_REG_LBA0);
if (lba0 == 0xAA && nsectors_value == 0x55)
return true;
@ -222,7 +223,7 @@ ErrorOr<bool> IDEChannel::detect_presence_on_selected_device()
ErrorOr<void> IDEChannel::wait_if_busy_until_timeout(size_t timeout_in_milliseconds)
{
size_t time_elapsed = 0;
while (m_io_group.control_base().in<u8>() & ATA_SR_BSY && time_elapsed <= timeout_in_milliseconds) {
while (m_io_window_group.control_window().read8(0) & ATA_SR_BSY && time_elapsed <= timeout_in_milliseconds) {
microseconds_delay(1000);
time_elapsed++;
}
@ -234,7 +235,7 @@ ErrorOr<void> IDEChannel::wait_if_busy_until_timeout(size_t timeout_in_milliseco
ErrorOr<void> IDEChannel::force_clear_interrupts()
{
VERIFY(m_lock.is_locked());
m_io_group.io_base().offset(ATA_REG_STATUS).in<u8>();
m_io_window_group.io_window().read8(ATA_REG_STATUS);
return {};
}
@ -250,21 +251,21 @@ ErrorOr<void> IDEChannel::load_taskfile_into_registers(ATAPort::TaskFile const&
}
// Note: Preserve the selected drive, always use LBA addressing
auto driver_register = ((m_io_group.io_base().offset(ATA_REG_HDDEVSEL).in<u8>() & (1 << 4)) | (head | (1 << 5) | (1 << 6)));
m_io_group.io_base().offset(ATA_REG_HDDEVSEL).out<u8>(driver_register);
auto driver_register = ((m_io_window_group.io_window().read8(ATA_REG_HDDEVSEL) & (1 << 4)) | (head | (1 << 5) | (1 << 6)));
m_io_window_group.io_window().write8(ATA_REG_HDDEVSEL, driver_register);
microseconds_delay(50);
if (lba_mode == LBAMode::FortyEightBit) {
m_io_group.io_base().offset(ATA_REG_SECCOUNT1).out<u8>((task_file.count >> 8) & 0xFF);
m_io_group.io_base().offset(ATA_REG_LBA3).out<u8>(task_file.lba_high[0]);
m_io_group.io_base().offset(ATA_REG_LBA4).out<u8>(task_file.lba_high[1]);
m_io_group.io_base().offset(ATA_REG_LBA5).out<u8>(task_file.lba_high[2]);
m_io_window_group.io_window().write8(ATA_REG_SECCOUNT1, (task_file.count >> 8) & 0xFF);
m_io_window_group.io_window().write8(ATA_REG_LBA3, task_file.lba_high[0]);
m_io_window_group.io_window().write8(ATA_REG_LBA4, task_file.lba_high[1]);
m_io_window_group.io_window().write8(ATA_REG_LBA5, task_file.lba_high[2]);
}
m_io_group.io_base().offset(ATA_REG_SECCOUNT0).out<u8>(task_file.count & 0xFF);
m_io_group.io_base().offset(ATA_REG_LBA0).out<u8>(task_file.lba_low[0]);
m_io_group.io_base().offset(ATA_REG_LBA1).out<u8>(task_file.lba_low[1]);
m_io_group.io_base().offset(ATA_REG_LBA2).out<u8>(task_file.lba_low[2]);
m_io_window_group.io_window().write8(ATA_REG_SECCOUNT0, task_file.count & 0xFF);
m_io_window_group.io_window().write8(ATA_REG_LBA0, task_file.lba_low[0]);
m_io_window_group.io_window().write8(ATA_REG_LBA1, task_file.lba_low[1]);
m_io_window_group.io_window().write8(ATA_REG_LBA2, task_file.lba_low[2]);
// FIXME: Set a timeout here?
size_t time_elapsed = 0;
@ -272,13 +273,13 @@ ErrorOr<void> IDEChannel::load_taskfile_into_registers(ATAPort::TaskFile const&
if (time_elapsed > completion_timeout_in_milliseconds)
return Error::from_errno(EBUSY);
// FIXME: Use task_file_status method
auto status = m_io_group.control_base().in<u8>();
auto status = m_io_window_group.control_window().read8(0);
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY))
break;
microseconds_delay(1000);
time_elapsed++;
}
m_io_group.io_base().offset(ATA_REG_COMMAND).out<u8>(task_file.command);
m_io_window_group.io_window().write8(ATA_REG_COMMAND, task_file.command);
return {};
}
@ -288,7 +289,7 @@ ErrorOr<void> IDEChannel::device_select(size_t device_index)
if (device_index > 1)
return Error::from_errno(EINVAL);
microseconds_delay(20);
m_io_group.io_base().offset(ATA_REG_HDDEVSEL).out<u8>(0xA0 | ((device_index) << 4));
m_io_window_group.io_window().write8(ATA_REG_HDDEVSEL, (0xA0 | ((device_index) << 4)));
microseconds_delay(20);
return {};
}
@ -296,14 +297,14 @@ ErrorOr<void> IDEChannel::device_select(size_t device_index)
ErrorOr<void> IDEChannel::enable_interrupts()
{
VERIFY(m_lock.is_locked());
m_io_group.control_base().out<u8>(0);
m_io_window_group.control_window().write8(0, 0);
m_interrupts_enabled = true;
return {};
}
ErrorOr<void> IDEChannel::disable_interrupts()
{
VERIFY(m_lock.is_locked());
m_io_group.control_base().out<u8>(1 << 1);
m_io_window_group.control_window().write8(0, 1 << 1);
m_interrupts_enabled = false;
return {};
}
@ -313,7 +314,7 @@ ErrorOr<void> IDEChannel::read_pio_data_to_buffer(UserOrKernelBuffer& buffer, si
VERIFY(m_lock.is_locked());
VERIFY(words_count == 256);
for (u32 i = 0; i < 256; ++i) {
u16 data = m_io_group.io_base().offset(ATA_REG_DATA).in<u16>();
u16 data = m_io_window_group.io_window().read16(ATA_REG_DATA);
// FIXME: Don't assume 512 bytes sector
TRY(buffer.write(&data, block_offset * 512 + (i * 2), 2));
}
@ -327,7 +328,7 @@ ErrorOr<void> IDEChannel::write_pio_data_from_buffer(UserOrKernelBuffer const& b
u16 buf;
// FIXME: Don't assume 512 bytes sector
TRY(buffer.read(&buf, block_offset * 512 + (i * 2), 2));
IO::out16(m_io_group.io_base().offset(ATA_REG_DATA).get(), buf);
m_io_window_group.io_window().write16(ATA_REG_DATA, buf);
}
return {};
}