mirrors/rpcs3
1
0
Fork 0
mirror of https://github.com/RPCS3/rpcs3.git synced 2025-04-20 19:45:20 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

Implement the SRR0 register.

Browse source
This commit is contained in:
Andrew Church 2015-01-19 03:18:03 +09:00
parent a87de1b565
commit 03b059c1d5
2 changed files with 10 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
rpcs3/Emu/Cell/SPUThread.cpp
View file

@ -558,6 +558,8 @@ u32 SPUThread::GetChannelCount(u32 ch)
switch (ch)
{
case SPU_WrSRR0: res = 1; break;
case SPU_RdSRR0: res = 1; break;
case SPU_WrOutMbox: res = SPU.Out_MBox.GetFreeCount(); break;
case SPU_WrOutIntrMbox: res = SPU.Out_IntrMBox.GetFreeCount(); break;
case SPU_RdInMbox: res = SPU.In_MBox.GetCount(); break;
@ -589,6 +591,9 @@ void SPUThread::WriteChannel(u32 ch, const u128& r)
switch (ch)
{
case SPU_WrSRR0:
SRR0 = v & 0x3FFFC; //LSLR & ~3
break;
case SPU_WrOutIntrMbox:
{
if (!group) // if RawSPU
@ -910,6 +915,9 @@ void SPUThread::ReadChannel(u128& r, u32 ch)
switch (ch)
{
case SPU_RdSRR0:
v = SRR0;
break;
case SPU_RdInMbox:
{
while (!SPU.In_MBox.Pop(v) && !Emu.IsStopped())
@ -1223,4 +1231,4 @@ spu_thread::spu_thread(u32 entry, const std::string& name, u32 stack_size, u32 p
thread->SetPrio(prio ? prio : Emu.GetInfo().GetProcParam().primary_prio);
argc = 0;
}
}

1
rpcs3/Emu/Cell/SPUThread.h
View file

@ -276,6 +276,7 @@ class SPUThread : public PPCThread
public:
u128 GPR[128]; // General-Purpose Registers
SPU_FPSCR FPSCR;
u32 SRR0;
SPU_SNRConfig_hdr cfg; // Signal Notification Registers Configuration (OR-mode enabled: 0x1 for SNR1, 0x2 for SNR2)
u64 R_ADDR; // reservation address