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shader_recompiler: Fix GetAttribute SPIR-V output type.

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squidbus 2024-09-28 19:28:45 -07:00
commit 10af2e8937
3 changed files with 21 additions and 12 deletions
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16
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
View file

@ -187,17 +187,21 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp) {
// Attribute is disabled or varying component is not written // Attribute is disabled or varying component is not written
return ctx.ConstF32(comp == 3 ? 1.0f : 0.0f); return ctx.ConstF32(comp == 3 ? 1.0f : 0.0f);
} }
if (param.is_default) {
return ctx.OpCompositeExtract(param.component_type, param.id, comp);
}
if (param.num_components > 1) { Id result;
if (param.is_default) {
result = ctx.OpCompositeExtract(param.component_type, param.id, comp);
} else if (param.num_components > 1) {
const Id pointer{ const Id pointer{
ctx.OpAccessChain(param.pointer_type, param.id, ctx.ConstU32(comp))}; ctx.OpAccessChain(param.pointer_type, param.id, ctx.ConstU32(comp))};
return ctx.OpLoad(param.component_type, pointer); result = ctx.OpLoad(param.component_type, pointer);
} else { } else {
return ctx.OpLoad(param.component_type, param.id); result = ctx.OpLoad(param.component_type, param.id);
} }
if (param.is_integer) {
result = ctx.OpBitcast(ctx.F32[1], result);
}
return result;
} else { } else {
const auto step_rate = EmitReadStepRate(ctx, param.id.value); const auto step_rate = EmitReadStepRate(ctx, param.id.value);
const auto offset = ctx.OpIAdd( const auto offset = ctx.OpIAdd(

16
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
View file

@ -162,11 +162,11 @@ EmitContext::SpirvAttribute EmitContext::GetAttributeInfo(AmdGpu::NumberFormat f
case AmdGpu::NumberFormat::Sscaled: case AmdGpu::NumberFormat::Sscaled:
case AmdGpu::NumberFormat::Uscaled: case AmdGpu::NumberFormat::Uscaled:
case AmdGpu::NumberFormat::Srgb: case AmdGpu::NumberFormat::Srgb:
return {id, output ? output_f32 : input_f32, F32[1], 4}; return {id, output ? output_f32 : input_f32, F32[1], 4, false};
case AmdGpu::NumberFormat::Uint: case AmdGpu::NumberFormat::Uint:
return {id, output ? output_u32 : input_u32, U32[1], 4}; return {id, output ? output_u32 : input_u32, U32[1], 4, true};
case AmdGpu::NumberFormat::Sint: case AmdGpu::NumberFormat::Sint:
return {id, output ? output_s32 : input_s32, S32[1], 4}; return {id, output ? output_s32 : input_s32, S32[1], 4, true};
default: default:
break; break;
} }
@ -237,9 +237,13 @@ void EmitContext::DefineInputs() {
: 1; : 1;
// Note that we pass index rather than Id // Note that we pass index rather than Id
input_params[input.binding] = { input_params[input.binding] = {
rate_idx, input_u32, rate_idx,
U32[1], input.num_components, input_u32,
false, input.instance_data_buf, U32[1],
input.num_components,
true,
false,
input.instance_data_buf,
}; };
} else { } else {
Id id{DefineInput(type, input.binding)}; Id id{DefineInput(type, input.binding)};

1
src/shader_recompiler/backend/spirv/spirv_emit_context.h
View file

@ -236,6 +236,7 @@ public:
Id pointer_type; Id pointer_type;
Id component_type; Id component_type;
u32 num_components; u32 num_components;
bool is_integer{};
bool is_default{}; bool is_default{};
s32 buffer_handle{-1}; s32 buffer_handle{-1};
}; };