Match the coding style a bit more

This commit is contained in:
offtkp 2024-09-02 04:57:01 +03:00
parent 0491cebdb3
commit aee53079ca

View file

@ -376,10 +376,10 @@ void Translator::S_ADD_I32(const GcnInst& inst) {
const IR::U32 src1{GetSrc(inst.src[1])};
const IR::U32 result{ir.IAdd(src0, src1)};
SetDst(inst.dst[0], result);
const IR::U32 sign_mask = ir.Imm32(1 << 31);
const IR::U32 sign0 = ir.BitwiseAnd(src0, sign_mask);
const IR::U32 sign1 = ir.BitwiseAnd(src1, sign_mask);
const IR::U32 signr = ir.BitwiseAnd(result, sign_mask);
const IR::U32 sign_mask{ir.Imm32(1 << 31)};
const IR::U32 sign0{ir.BitwiseAnd(src0, sign_mask)};
const IR::U32 sign1{ir.BitwiseAnd(src1, sign_mask)};
const IR::U32 signr{ir.BitwiseAnd(result, sign_mask)};
ir.SetScc(ir.LogicalAnd(ir.IEqual(sign0, sign1), ir.INotEqual(sign0, signr)));
}
@ -511,7 +511,7 @@ void Translator::S_BREV_B32(const GcnInst& inst) {
void Translator::S_ADD_U32(const GcnInst& inst) {
const IR::U32 src0{GetSrc(inst.src[0])};
const IR::U32 src1{GetSrc(inst.src[1])};
const IR::U32 result = ir.IAdd(src0, src1);
const IR::U32 result{ir.IAdd(src0, src1)};
SetDst(inst.dst[0], result);
ir.SetScc(ir.ILessThan(result, src0, false));
}
@ -526,12 +526,12 @@ void Translator::S_SUB_U32(const GcnInst& inst) {
void Translator::S_SUB_I32(const GcnInst& inst) {
const IR::U32 src0{GetSrc(inst.src[0])};
const IR::U32 src1{GetSrc(inst.src[1])};
const IR::U32 result = ir.ISub(src0, src1);
const IR::U32 result{ir.ISub(src0, src1)};
SetDst(inst.dst[0], result);
const IR::U32 sign_mask = ir.Imm32(1 << 31);
const IR::U32 sign0 = ir.BitwiseAnd(src0, sign_mask);
const IR::U32 sign1 = ir.BitwiseAnd(src1, sign_mask);
const IR::U32 signr = ir.BitwiseAnd(result, sign_mask);
const IR::U32 sign_mask{ir.Imm32(1 << 31)};
const IR::U32 sign0{ir.BitwiseAnd(src0, sign_mask)};
const IR::U32 sign1{ir.BitwiseAnd(src1, sign_mask)};
const IR::U32 signr{ir.BitwiseAnd(result, sign_mask)};
ir.SetScc(ir.LogicalAnd(ir.INotEqual(sign0, sign1), ir.INotEqual(sign0, signr)));
}