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JitArm64_LoadStore: Use UMIN in dcbx when available

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Sintendo 2024-12-29 11:51:31 +01:00
commit 4d5d6d3464
1 changed files with 10 additions and 2 deletions
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12
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -7,6 +7,7 @@
#include "Common/Arm64Emitter.h" #include "Common/Arm64Emitter.h"
#include "Common/BitSet.h" #include "Common/BitSet.h"
#include "Common/CPUDetect.h"
#include "Common/CommonTypes.h" #include "Common/CommonTypes.h"
#include "Common/ScopeGuard.h" #include "Common/ScopeGuard.h"
@ -805,8 +806,15 @@ void JitArm64::dcbx(UGeckoInstruction inst)
SDIV(WB, reg_downcount, reg_cycle_count); // WB = downcount / cycle_count SDIV(WB, reg_downcount, reg_cycle_count); // WB = downcount / cycle_count
SUB(WA, loop_counter, 1); // WA = CTR - 1 SUB(WA, loop_counter, 1); // WA = CTR - 1
// ^ Note that this CTR-1 implicitly handles the CTR == 0 case correctly. // ^ Note that this CTR-1 implicitly handles the CTR == 0 case correctly.
CMP(WB, WA); if (cpu_info.bCSSC)
CSEL(WA, WB, WA, CCFlags::CC_LO); // WA = min(WB, WA) {
UMIN(WA, WB, WA);
}
else
{
CMP(WB, WA);
CSEL(WA, WB, WA, CCFlags::CC_LO); // WA = min(WB, WA)
}
// WA now holds the amount of loops to execute minus 1, which is the amount we need to adjust // WA now holds the amount of loops to execute minus 1, which is the amount we need to adjust
// downcount, CTR, and Rb by to exit the loop construct with the right values in those // downcount, CTR, and Rb by to exit the loop construct with the right values in those